42results about How to "Improve verification efficiency" patented technology

This invention discloses an automatic verification and risk warning method for international trade information based on smart ports. It collects multi-source document data, including customs declarations, bills of lading, transportation routes, payment vouchers, and certificates of origin, and converts them into a standardized format through field mapping rules. A cross-document verification rule base is established, and rule matching is performed on key fields such as invoice amount and declared price, and bill of lading quantity and packing list, using a weighted scoring mechanism to calculate consistency scores. A spatiotemporal graph of trade behavior is constructed, and risk characteristics are statistically analyzed using an improved random walk algorithm, outputting a dynamic risk feature matrix. This matrix is ​​matched with a historical risk case database, and the probability of risks such as smuggling, false declarations, and tax evasion is calculated in conjunction with regional risk benchmarks. Risk thresholds are dynamically adjusted based on port clearance flow, triggering adaptive warnings and generating warning information including warning level, risk type, and inspection measures, thereby improving the intelligence level of port supervision.

This application relates to a scheduling method, apparatus, computer equipment, storage medium, and computer program product for power operation tickets. The method includes: dividing the fields to be verified in the power operation ticket into regions based on the correlation characteristics between them and their location characteristics; verifying the fields in each region to obtain a verification result for each region; weighting the verification values ​​of each result according to the type of the result and the order of the regions to obtain a weighted verification result for the power operation ticket; and distributing power operation tickets according to the operation objects matched by the weighted verification values ​​in the weighted verification result. This method eliminates the need for manual verification of the fields to be verified, reducing the verification time for power operation tickets and thus improving the efficiency of power system maintenance.

The application discloses a three-dimensional detection and diagnosis simulation verification method and platform for tunnel apparent diseases and a storage medium. The method comprises the following steps: collecting point cloud data and image data of a tunnel model, performing difference analysis based on the two types of data to obtain an apparent detection result, and positioning a suspicious disease area of the tunnel model according to the apparent detection result. A machine learning model is used to analyze a disease diagnosis result corresponding to the suspicious disease area, and the disease diagnosis result is compared with preset real disease information of the tunnel model, and a comparison result obtained can be used to optimize the machine learning model. The scheme avoids the limitations of real vehicle verification and non-entity verification, and effectively improves the verification effect and verification efficiency of the machine learning model.

This application relates to an event-driven method and computing device for recognizing revenue from intra-group transactions. The method includes: acquiring a transaction order and determining its type; if the transaction order is an intra-group transaction order, acquiring its triggering event; if the triggering event is a key business completion event, generating a cost recognition voucher for the purchaser of the transaction order and a revenue recognition voucher for the seller of the transaction order; wherein the key business completion event represents a business operation event indicating that the relevant performance obligations have been fulfilled. This achieves a fundamental shift from employee-based identification and triggering to system-based perception and response, improving the timeliness and accuracy of financial processing, thereby reducing operating costs and increasing processing efficiency.

The application discloses a kind of for EFlash BIST function verification method, comprising the following steps: S1, in register transfer level (RTL) top layer instantiation an EFlash BIST sequence generation module, waiting for chip power-on reset to enter working state, the test mode control pin of general input and output interface of chip is set high, and chip enters test mode;S2, generate excitation sequence through EFlash BIST sequence generation module and input excitation sequence to BIST interface through general input and output interface, after BIST controller converts excitation sequence into access operation to FLASH module, execute current operation and return operation result data to EFlash BIST sequence generation module to carry out next round operation.The application can ensure the correctness and reliability of BIST controller function and part FLASH particle function, improve the overall verification efficiency of chip.

This application provides an image simulation verification method, apparatus, device, and storage medium. The method includes: when image simulation verification is required, extracting multiple verification image sets from a pre-constructed list of simulation verification image sets, wherein each verification image set is configured with image effect parameters; extracting multiple scene image data from any verification image set; inputting the multiple scene image data and the image effect parameters corresponding to the verification image sets into a preset simulation model for simulation processing to obtain corresponding simulation images; determining whether the color values ​​of each scene image data and the corresponding simulation image are consistent to obtain the first verification result of each simulation image of the verification image set; determining all the first verification results corresponding to the multiple verification image sets; generating a first image simulation verification report based on all the first verification results, and outputting the first image simulation verification report, thereby improving the verification efficiency of image simulation.

This invention provides a method, system, and storage medium for automated and high-precision batch soft and hard collision verification of transmission line insulator string attachment points based on GIM models. It relates to the field of tension insulator string collision verification technology and includes: identifying all tension insulator string tower attachment points to be tested and their corresponding hardware components from the model; constructing a refined model library; completing the initial import and placement of the refined model; achieving precise alignment of the hardware components with the refined tower attachment point model in spatial position and orientation; driving the refined model from a static installation state to a dynamic spatial state under specific operating conditions; and performing hard collision checks on each inspection unit in the dynamic spatial state. This invention liberates designers from tedious and repetitive work, resulting in an order-of-magnitude improvement in verification efficiency.

The application discloses a verification method, device and equipment and a readable storage medium. The method comprises the following steps: constructing a write attribute, a read attribute and a comparison attribute according to operation representation bus interface signals and time sequences corresponding to write data and read data; binding the operation representation bus interface signals with corresponding bus interface signals of a to-be-tested module; judging whether signals corresponding to write data in bus interface signals of the to-be-tested module satisfy the write attribute and whether signals corresponding to read data satisfy the read attribute according to a binding relationship, so as to verify whether the time sequence is correct; and comparing write data and corresponding read data of the to-be-tested module according to the comparison attribute, so as to verify the consistency of the read-write data. The technical scheme disclosed by the application constructs the write attribute, the read attribute and the comparison attribute, automatically verifies corresponding time sequences by using the write attribute and the read attribute, and automatically verifies read-write data by using the comparison attribute, so that the verification efficiency and the verification accuracy are improved.

This invention discloses a method and system for verifying the functionality of a vector processor. The method unifies matrix, vector, and scalar data formats into a matrix type using a reference model. Multi-input interface data is stored in corresponding data queues in the form of address plus data. The required computational data is extracted according to the current instruction, and unused data is stored back to the original queue. Expected output data at the clock cycle level is generated and compared with the actual output data of the vector processor to determine functional correctness. The system includes an instruction generator module, a controller module, a data generation module, a reference model module, a data collection module, and a data comparator module. This invention can improve the accuracy of vector processor fault location, simplify verification logic, and improve overall verification efficiency.

The application discloses a chip design verification system and method, an electronic device and a storage medium, and relates to the technical field of integrated circuit design. Since the excitation descriptor chain table generated by the dynamic scheduler according to the target test scene can directly present whether it contains a transparent attribute, if the transparent attribute exists, the descriptor chain table is directly transmitted to the output comparator through a bypass channel, bypassing the complex calculation link of the reference model; if not, the traditional path is taken to process the reference model. The application provides a differentiated path selection mechanism, changes the data flow direction of the verification platform, and under the condition that the excitation descriptor chain table contains the transparent attribute, the comparison between the excitation descriptor chain table and the to-be-verified execution result can be performed in advance without waiting for the reference model operation, thereby improving the verification efficiency of the to-be-tested design.

The application discloses a kind of power grid line tower coordinate verification method, device and computer equipment, it is related to power grid technical field, mainly in can improve the verification efficiency and verification accuracy of tower coordinate.The method includes: obtaining the tower GPS coordinates corresponding to different towers on target power grid line, wherein different towers include target to be verified tower, and determine the obstacle GPS coordinates corresponding to different obstacles in the preset range with target to be verified tower as center;Determine the tower span between two adjacent towers in different towers based on tower GPS coordinates;Based on obstacle GPS coordinates and target GPS coordinates corresponding to target to be verified tower, determine longitude reference obstacle and latitude reference obstacle in different obstacles;Based on tower span, target GPS coordinates, reference longitude coordinate value corresponding to different longitude reference obstacles, reference latitude coordinate value corresponding to different latitude reference obstacles, the target GPS coordinates of target to be verified tower are verified.

The utility model relates to the field of automobile inspection, concretely relates to a fall pit simulation test device. The device includes acceleration section, fall pit and deceleration section, acceleration section is at least 200m, fall pit pit depth is at least 120mm, pit width is at least 1000mm pit length is greater than test car width at least 400mm, pit edge chamfer is R10, deceleration section is at least 60m. This test device can be applied to the fall pit test of vehicle, and the strength of vehicle is tested and verified, and the application of the utility model can be based on user use scene data, and test result can very good reflect the use demand of user, and standard test device and operation process can provide stable boundary for design, and according to statistical result, a test is adopted to replace multiple tests, and the verification efficiency is very high, and the acceptance standard is refined, and strong support is provided for the consistency evaluation of test.

The application provides a webpage information verification method and related device, which can be applied to a robot process automation (RPA) platform. The method comprises the following steps: obtaining an original file; extracting to-be-verified information and a query condition corresponding to the to-be-verified information from the original file; querying a webpage according to the query condition to obtain a query result, wherein the query result is used to represent whether the webpage includes the query condition; and when the query result represents that the webpage includes the query condition, determining a verification result of the to-be-verified information according to the to-be-verified information and the query result. According to the to-be-verified information and the query condition extracted from the original file, the RPA platform simulates human operation and interacts with the webpage, webpage information can be safely and efficiently obtained, automatic verification of the webpage information is realized, and the efficiency of webpage information verification is improved.

This invention provides a controller adaptive verification system and method. The controller adaptive verification system includes a policy control module, a stimulus generation module, a monitoring module, a verification module, and a coverage evaluation module. The policy control module controls the test policy for the target controller. The stimulus generation module generates a test transaction sequence according to the test policy and drives the test transaction sequence to the target controller. The monitoring module monitors the interface behavior data of the target controller in response to the test transaction sequence. The verification module performs multi-level verification on the interface behavior data and outputs the verification results. The coverage evaluation module obtains coverage evaluation data based on the verification results and feeds the coverage evaluation data back to the policy control module to adjust the test policy. This effectively improves the verification efficiency of the target controller.

This invention discloses a SoC chip simulation verification method and system based on static and dynamic package separation. The method includes: acquiring simulation resources of the SoC chip to be verified; dividing the simulation resources into static and dynamic parts; the static part includes at least chip design code and basic verification environment components that do not need to be modified in the current verification stage, and the dynamic part includes at least verification test cases that need to be modified; encapsulating the static part into a static package and the dynamic part into a dynamic package; compiling the static package to execute the initialization simulation process, and saving the current initialization simulation state after the initialization simulation process is completed; compiling the dynamic package; loading the saved initialization simulation state, and executing the verification test cases in the dynamic package based on the restored initialization simulation state. This method avoids repeated compilation of large static resources due to modification of test cases, significantly shortens compilation time, and improves the verification efficiency and iteration speed of large-scale SoC chips.

The utility model relates to electronic equipment protection technical field, concretely is a kind of on-line verification device of monitor of ESD on-line monitoring system, it includes host computer and several monitors, host computer is connected with each monitor by communication network communication, test circuit is respectively arranged in each monitor, precision resistance and electronic switch are connected in test circuit, precision resistance is the precision resistance with multiple gear positions, the gear position of precision resistance can be adjusted by electronic switch, test circuit can detect the resistance value of loop resistance, and compare detection value with check threshold value, judge whether monitor check is qualified, and send the judgment result to host computer, if check is unqualified, host computer sends information to maintenance end, and prompts maintenance personnel to monitor and calibrate.The utility model can carry out on-line verification to monitor, avoid the influence of monitor dismounting to production, improve check efficiency, reduce check cost, and guarantee the reliability of monitoring system operation.

The application discloses a JPEG compression verification method and device and a storage medium, relates to the field of data processing, and comprises the following steps: acquiring an original image frame and a compressed image; performing grayscale processing and image cutting operation on the compressed image to acquire a plurality of compressed image blocks and grayscale image blocks; performing edge detection on the grayscale image blocks to acquire a binary edge image; acquiring an affine transformation matrix according to the pixel values of all pixels in the binary edge image; generating a plurality of feature image blocks according to the original image frame, image configuration parameters, each compressed image block and the affine transformation matrix; performing feature comparison on the i-th compressed image block and the i-th feature image block to acquire an i-th similarity comparison result; comparing the i-th similarity comparison result with a preconfigured preset threshold value respectively to acquire an i-th comparison result; and acquiring a compression verification result when the i acquired comparison results meet a preset stop condition. The method has high compatibility, low cost and high efficiency.

This application discloses a data transmission method, apparatus, electronic device, and readable storage medium. The method includes: acquiring multiple attribute information of multiple data to be transmitted, wherein the multiple attribute information includes data quantity and data type; determining a target verification rule for the multiple data to be transmitted from multiple preset verification rules based on the multiple attribute information; generating multiple data files and multiple verification files corresponding to the multiple data files based on the data quantity, the target verification rule, and the multiple data to be transmitted; and sending the multiple data files and multiple verification files to a target server based on the number of data files and a first preset quantity threshold. By generating verification files through pre-configured verification rules and uploading the packaged multiple data files and multiple verification files to the target server in a parallel manner, the efficiency of data transmission and data verification is greatly improved.

The present application relates to a kind of multi-service provider-oriented fine-grained verifiable data query method and system, data owner obtains the data unit of original data, according to the sub-data of data unit being stored by service provider, data unit commitment is generated using vector commitment and RSA accumulator, and then chain summary is obtained based on data unit commitment;Data owner chains on-chain summary;Query user initiates query request to target service provider;Target service provider retrieves local database in response to query request, obtains the query result that meets query request and constructs multi-layer verification object, including data layer verification object, unit layer verification object and row column / surface layer verification object;Target service provider returns query result and multi-layer verification object to query user;Query user issues request to chain and obtains chain summary required for query result;And query result is verified in multiple layers in combination with chain summary and the source of error data is realized fine-grained positioning.

This invention provides a multi-physics coupling test method and system for intelligent vehicle hybrid network architecture, belonging to the field of automotive electronics testing technology. The method includes: applying single-physics coupling, dual-physics coupling, and system-level multi-physics coupling loads through a tiered testing process, simultaneously acquiring electrical signal, optical signal performance parameters, and environmental parameters; calculating a unified signal health index (HI) and degradation rate based on a preset algorithm; analyzing the contribution of each physical field factor to performance degradation when the HI is below a health threshold or the degradation rate exceeds a rate threshold, and identifying the dominant failure factor; and intelligently matching the corresponding optimization strategy from a pre-built optimization strategy library. This invention solves the problems of media isolation, data fragmentation, and inefficient optimization in traditional testing methods, achieving unified cross-media testing, real-time health status assessment, and precise automated optimization, thus improving the reliability verification efficiency of intelligent vehicle hybrid network architecture.

This invention discloses an efficient analysis method for projectile-target separation during the penetration resistance process of a hollow heterogeneous protective structure, belonging to the field of impact dynamics. The method includes: for a given hollow heterogeneous protective structure; establishing a finite element model of the projectile; constructing a storage array for the spatial position information of the hollow heterogeneous protective structure; establishing a target drag function based on cavity expansion theory; constructing a projectile-target separation analysis model for the hollow heterogeneous protective structure; obtaining the results of the projectile-target separation analysis method using explicit dynamics methods; obtaining the storage array for the spatial position information of the hollow heterogeneous protective structure at the time of simulation termination, including projectile deformation, stress state, and the spatial position information at the time of simulation termination; further obtaining the crater morphology of the hollow heterogeneous protective structure through data processing of the storage array; and determining whether the given hollow heterogeneous protective structure will lead to projectile destruction by combining axial force and bending moment failure criteria. This invention achieves high-efficiency, low-cost, and rapid simulation analysis.

The application relates to the technical field of intelligent manufacturing knowledge management, and discloses a semantic enhancement knowledge graph dynamic integrity protection method, which comprises the following steps: semantic enhancement modeling, constructing a unified data model in the discrete manufacturing field, and the unified data model at least comprising an entity set, a relation set, an attribute set, a static structure constraint set and a dynamic operation constraint set; formulating the static structure constraint set and the dynamic operation constraint set into an SHACL rule base; performing a structure constraint shape in the SHACL rule base on full-amount data before knowledge graph deployment, generating a structured verification report, intercepting a real-time data operation request, extracting a semantic subgraph related to the current operation, and only performing local verification on the semantic subgraph by loading corresponding SPARQL operation constraint shapes, and if the verification fails, the operation request is rejected and a correction prompt is returned. The application realizes the elimination of semantic fragmentation by internalizing manufacturing business rules into dynamic operation constraints.

This invention provides a Mini-Rig test bench and its fault injection method based on an aircraft hydraulic system, relating to the field of semi-physical simulation. The test bench includes a semi-physical simulation module, a hydraulic system control unit interface, a data acquisition and playback module, a simulation-real-life switching module, and a fault injection module. The semi-physical simulation module generates input signals for the control unit; the hydraulic system control unit interface connects to the control unit under test; the simulation-real-life switching module switches between semi-physical simulation and full-scale physical operation states; the fault injection function simulates various abnormal operating conditions to verify the control unit's functionality; and the data acquisition and playback module collects and stores the control unit's inputs and outputs and the system status in real time during operation. This invention can efficiently verify the functions and logic of the hydraulic system control unit and implement various fault injection and simulation-real-life switching functions, thereby improving the efficiency and accuracy of hydraulic system control unit testing and verification.

This invention relates to the field of electronic technology, specifically disclosing a clock tree functional verification method, apparatus, electronic device, and storage medium. The method includes: generating verification adaptation information between the target clock node of the clock tree to be verified and the verification environment based on the clock parameter configuration information of the clock tree to be verified; and performing functional verification on the target clock node based on the verification adaptation information and a preset unified interface in response to a verification request. This solution, by introducing a mechanism that dynamically generates verification adaptation information based on parameterized configuration information and combines it with a unified interface call, can decouple the verification logic from the specific hardware design path, effectively improving the flexibility and maintainability of the verification environment; and supports seamless reuse of the same set of verification code and test stimuli across different projects and different design levels, significantly reducing redundant development workload and maintenance costs.

This application discloses a verification method, apparatus, electronic device, and medium for digital circuits, relating to the field of computer technology. The method includes: acquiring the hardware description language code of the circuit under test; determining a first control signal, a first clock signal, and a data signal corresponding to the first control signal based on the hardware description language code; processing the first clock signal according to preset processing rules to obtain a second clock signal; acquiring a first simulation waveform of the first control signal during the simulation process of the circuit under test, a second simulation waveform of the first clock signal during the simulation process, a third simulation waveform of the second clock signal during the simulation process, and a fourth simulation waveform of the data signal during the simulation process; and verifying the circuit under test based on each simulation waveform to obtain a verification result. This application simplifies the verification environment for digital circuits and improves the verification efficiency of digital circuits.

This invention discloses a calibration method for a segmented magnetic float level gauge. The calibration method includes: providing support rods; the number of support rods is the same as the number of floats in the segmented magnetic float level gauge, and each support rod corresponds to one float; using the support rods, the magnetic floats inside the floats are sequentially lifted from the inlet at the bottom of the float to the top of the float, maintaining the position of the magnetic floats; recording the first output signal of the transmitter when at least one magnetic float is at a first preset position during the lifting process; comparing the first output signal with a first standard electrical signal to verify whether the segmented magnetic float level gauge is functioning correctly; wherein, the first standard electrical signal is the preset standard electrical signal value when the magnetic float is at the first preset position in the float. This invention provides a simple and efficient calibration method for segmented magnetic float level gauges, reducing calibration costs.

This application relates to a method and system for comparing table data in a row-oriented storage database. The method includes: acquiring the database to be verified; collecting business characteristics, constructing a B+ tree index, and partitioning the database; sequentially locating the difference partitions, difference rows, and difference fields based on the B+ tree index and partitioning combined with hash calculation; and outputting the comparison results based on the difference fields. This embodiment achieves rapid location and on-demand reading of difference partitions in a row-oriented storage database. By sequentially locating the difference partitions, difference rows, and difference fields based on the B+ tree index and partitioning combined with hash calculation, it achieves rapid identification of the partitions containing the difference data, avoiding a full scan of irrelevant data, thereby significantly reducing disk I / O, memory usage, and bandwidth consumption, improving verification efficiency, and reducing resource overhead.

The invention provides a mass parallel EMS robustness verification method and system for Internet of Things equipment, and belongs to the technical field of the Internet of Things equipment, and the method specifically comprises the steps: carrying out the robustness verification processing according to the robustness verification processing results in different number intervals, and combining the combination data of the Internet of Things equipment which carries out the robustness verification processing in the number intervals, determining an optimization target number interval in the number interval, and determining a verification number interval in the number interval based on the optimization target number interval data and in combination with coincident data of the equipment combination of the operating access Internet of Things equipment in the number interval and different optimization target number intervals, and the reliability of the verification processing of the robustness is improved.

This invention belongs to the field of power battery safety testing technology, and relates to a battery module thermal runaway testing device and method. The device includes multiple battery cells arranged sequentially along a predetermined direction, a heating unit located on one side of a target battery cell, a heat insulation structure located between the heating unit and adjacent battery cells, a limiting structure for maintaining a preset gap between battery cells, a temperature monitoring unit located at the center of the large surface of the battery cell, and a temperature control base located below the battery cell. The heating unit is in direct contact with the target battery cell, and the heat insulation structure is used to limit heat transfer to adjacent battery cells, thereby forming a directional heat diffusion path. The method includes pre-processing the battery cells, assembling the test module, triggering thermal runaway of the target battery cell and collecting voltage and temperature data, and determining the thermal runaway state through a linkage judgment condition of voltage drop, temperature, and temperature rise rate. It can verify the rationality of the battery cell gaps and thermal diffusion behavior while maintaining the authenticity of the module structure, reducing testing costs and shortening the test cycle.