Random verification method and device for verifying processor chip after manufacturing

Abstract

The invention discloses a random verification method and a device for verifying a processor chip after manufacturing. The method comprises the following steps: adding constraints related to a reserved register and a reserved memory address in a command template; adding a register initializing program generator, a memory initializing program generator and a command counter; modifying a random program generating engine, removing an original register initializing file generating mechanism and an original memory initializing file generating mechanism and changing the original command sequence generating and terminating conditions; adding a random generating program recorder, a register comparison program generator and a memory comparison program generator; converting a file generated by using the random command generating method for verifying the processor chip after manufacturing into a file format which can be dispatched by a software platform; assigning initial positions at which different program code segments are loaded in the memory; and loading the program code segments converted into the file format which can be dispatched by the software platform into the corresponding memory addresses according to the assigned initial positions.

Description

technical field [0001] The invention relates to the field of very large scale integrated circuit (VLSI) design verification, and in particular to a random verification method and device for verification of post-manufacturing processor chips. Background technique [0002] It is an important and arduous task to verify the design and process of LSI to ensure its correctness. At present, before a chip is taped out, the correctness of the chip is mainly ensured through functional verification, and after the chip is taped out, the existing errors are found through the chip verification after manufacturing to further ensure the correctness of the chip. With the advancement of research, the means of functional verification before chip manufacturing are becoming more and more abundant and perfect, providing strong support for the verification of integrated circuits, but the functional verification before chip manufacturing is not a complete enumeration process, and cannot be guarante...

AI Technical Summary

Problems solved by technology

[0013] The purpose of the present invention is to provide a random verification method and device for post-manufacturing processor chip verification. Through the method and device, the problem that the existing random verification method before chip manufacturing cannot be directly applied to the chip verification after manufacture can be solved. , to meet the needs of using random verification technology to improve chip verification after manufacture and improve verification efficiency

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