Universal method and platform for verifying compatibility between intellectual property (IP) core and advanced microcontroller bus architecture (AMBA) bus interface

Abstract

The invention provides a universal platform of verifying compatibility between an intellectual property (IP) core and an advanced microcontroller bus architecture (AMBA) bus interface, which comprises a functional simulation tool, an AMBA bus infrastructure, a third-party verification IP core, a controller, a driver, a stimulus, a checker, an advanced peripheral bus (APB) bridge, an advanced high-performance bus (AHB) master interface, an AHB slave interface and an APB slave interface, wherein all the modules are connected to form an integrated coordinating verification environment by adopting a verification component and hierarchical packaging and interconnections ways provided by a SystemVerilog language and advanced verification methodology (AVM). The platform can verify the compatibility of different types of IP core interfaces, and the development time and cost of the verification platform and a verification method are reduced. The invention also provides the universal method for verifying the compatibility between the IP core and the AMBA bus interface. In the method, excitation is produced more normatively, scientifically and accurately, unnecessary iteration is reduced and the verification time is shortened.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to a universal verification platform and verification method for compatibility between an IP core and an AMBA bus interface. Background technique [0002] With the VLSI process technology moving towards 45nm, the complexity of SoC design has increased significantly, and IP core multiplexing has become the main way to realize SoC design. At present, 85% of IC design companies will use pre-determined modules based on IP multiplexing in the process of SoC design. [0003] In SoC design based on IP core multiplexing, ensuring the compatibility between IP interface and on-chip communication protocol is an effective means of SoC design reuse methodology to solve SoC integration problems. Therefore, the design and verification of on-chip bus becomes particularly critical. At present, there are many on-chip bus standards in the industry, mainly including: OCP, AMBA, CoreConnect, Wi...

AI Technical Summary

Problems solved by technology

[0014] At present, the general verification platform is often customized and developed only for a certain interface type, without considering the versatility. Different interface types require different verification platforms, which increases the development time and cost of the verification platform.

Images