Power amplifier

Abstract

In the power amplifier device, broadband operation of the high-frequency power amplifier circuit is realized. The power amplifier device (100A) includes: a power amplifier circuit (1) for amplifying high-frequency input signals; a first impedance matching circuit (2) for impedance matching of the output signal of the power amplifier circuit (1); a second harmonic termination circuit (3) disposed on the output side of the first impedance matching circuit (2), which outputs a high-frequency signal from the input terminal as a high-frequency signal by reflecting at least a portion of the even and odd harmonics contained in the signal input from the first impedance matching circuit (2), and outputs a high-frequency signal containing the fundamental wave, the remaining even harmonics and the odd harmonics from the output terminal; and a filter (4) disposed after the second harmonic termination circuit (3) to attenuate at least a portion of the even and odd harmonics and output a high-frequency signal containing the fundamental wave, the remaining even harmonics and the odd harmonics.

Description

Technical Field

[0001] This invention relates to power amplification devices. Background Technology

[0002] Patent Document 1 discloses a technique for achieving broadband operation of a high-frequency power amplifier circuit used in a power amplifier device. In Patent Document 1, a programmable high-order harmonic termination circuit is provided between the output terminal of the output stage and the output matching circuit. In Patent Document 1, the high-order harmonics are reflected so that the reflected wave component coincides with the fundamental frequency.

[0003] Patent Document 1: US Patent No. 9,882,587

[0004] In Patent Document 1, a high-order harmonic terminating circuit is connected to a terminal with low impedance (e.g., several Ω). Therefore, due to the internal resistance of the programmable high-order harmonic terminating circuit switch, it is difficult to increase the amplitude of the reflected wave component of the high-order harmonics, making broadband operation difficult to achieve. Therefore, there is room for improvement in increasing the amplitude of the reflected wave component of the high-order harmonics and achieving broadband operation. Summary of the Invention

[0005] The present invention was made in view of the above circumstances, and its object is to provide a power amplifier device capable of realizing broadband operation of a high-frequency power amplifier circuit.

[0006] To address the aforementioned issues and achieve the objective, a power amplification device according to a certain aspect of the present invention includes: a power amplification circuit having a first input terminal and a first output terminal, amplifying a first high-frequency signal containing a fundamental wave input to the first input terminal, and outputting a second high-frequency signal containing a fundamental wave, even harmonics, and odd harmonics from the first output terminal; a first impedance matching circuit having a second input terminal and a second output terminal, the second input terminal being connected to the first output terminal of the power amplification circuit, outputting the second high-frequency signal input to the second input terminal as a third high-frequency signal from the second output terminal, and converting the impedances of the second input terminal and the second output terminal; and a higher harmonic termination circuit having a third input terminal and a third output terminal, the third input terminal being connected to the second output terminal of the first impedance matching circuit, and reversing the impedance of the second input terminal and the second output terminal. The third high-frequency signal input to the third input terminal contains at least a portion of the even and odd harmonics, thereby outputting a fourth high-frequency signal from the third input terminal, and outputting a fifth high-frequency signal containing the fundamental wave and the remaining even and odd harmonics from the third output terminal; and a filter having a fourth input terminal and a fourth output terminal, the fourth input terminal being connected to the third output terminal of the higher harmonic termination circuit, attenuating at least a portion of the even and odd harmonics contained in the fifth high-frequency signal input to the fourth input terminal, and outputting a sixth high-frequency signal containing the fundamental wave and the remaining even and odd harmonics from the fourth output terminal, the fourth high-frequency signal containing at least a second harmonic, the second harmonic reaching the first output terminal of the power amplifier circuit in a first phase via the first impedance matching circuit.

[0007] To address the aforementioned issues and achieve the objective, another aspect of the power amplification device of the present invention includes: a power amplification circuit having a first input terminal and a first output terminal, amplifying a first high-frequency signal containing a fundamental wave input to the first input terminal, and outputting it from the first output terminal as a second high-frequency signal containing a fundamental wave, even harmonics, and odd harmonics; a first impedance matching circuit having a second input terminal and a second output terminal, the second input terminal being connected to the first output terminal of the power amplification circuit, outputting the second high-frequency signal input to the second input terminal as a third high-frequency signal from the second output terminal, and converting the impedance of the second input terminal and the second output terminal; and a bandwidth selection switch having... It has a fifth input terminal and multiple fifth output terminals. The fifth input terminal is connected to the output terminal of the first impedance matching circuit. The fifth input terminal and at least one fifth output terminal are connected based on the fundamental frequency contained in the third high-frequency signal, thereby selecting the propagation path of the third high-frequency signal. Multiple higher harmonic termination circuits are provided corresponding to each of the multiple fifth output terminals of the frequency band selection switch. Each circuit has a third input terminal and a third output terminal. The third input terminal is connected to the corresponding fifth output terminal, causing at least a portion of the even and odd harmonics contained in the third high-frequency signal input to the third input terminal to be reflected, thereby serving as a fourth high-frequency signal from the first... The system has three input terminals for outputting a fifth high-frequency signal, including the fundamental wave and the remaining even and odd harmonics, from the third output terminal; multiple filters, each corresponding to one of the multiple higher harmonic termination circuits, each having a fourth input terminal and a fourth output terminal, wherein the fourth input terminal is connected to the third output terminal of the corresponding higher harmonic termination circuit, causing at least a portion of the even and odd harmonics contained in the fifth high-frequency signal input to the fourth input terminal to attenuate, and outputting a sixth high-frequency signal, including the fundamental wave and the remaining even and odd harmonics, from the fourth output terminal; and multiple duplexers, each corresponding to one of the multiple filters, each having a seventh input terminal and a seventh output terminal. The circuit includes output terminals and input / output terminals. The seventh input terminal is connected to the fourth output terminal of the corresponding filter. Based on the frequency of the sixth high-frequency signal input to the seventh input terminal, an eighth high-frequency signal is output from the input / output terminal. Based on the frequency of the ninth high-frequency signal input to the input / output terminal, a tenth high-frequency signal is output from the seventh output terminal. The fourth high-frequency signal contains at least a second harmonic. The second harmonic reaches the first output terminal of the power amplifier circuit in a first phase via the first impedance matching circuit. The plurality of high-order harmonic termination circuits operate at different frequencies, the plurality of filters operate at different frequencies, and the plurality of duplexers operate at different frequencies.

[0008] According to the present invention, broadband operation of a high-frequency power amplifier circuit can be achieved. Attached Figure Description

[0009] Figure 1 This diagram illustrates the function of higher harmonic terminating circuits.

[0010] Figure 2 This is a diagram illustrating an example of a high-order harmonic terminating circuit.

[0011] Figure 3 This is a diagram illustrating an example of a high-order harmonic terminating circuit.

[0012] Figure 4 This diagram illustrates the function of the high-order harmonic removal filter.

[0013] Figure 5 This is a diagram showing the structure of the power amplifier device according to the first embodiment.

[0014] Figure 6 It means from Figure 5 The diagram shows an example of the voltage and current waveforms of the signal output from the power amplifier.

[0015] Figure 7 It means from Figure 5 The diagram shows an example of the voltage and current waveforms of the signal output from the power amplifier.

[0016] Figure 8 These are diagrams showing examples of the fundamental wave waveform, and examples of the waveforms of even and odd harmonics.

[0017] Figure 9 This is a diagram showing the circuit structure of the comparative example.

[0018] Figure 10 This is a diagram showing the circuit structure of a second signal processing unit set up after the power amplifier circuit.

[0019] Figure 11 This is a diagram illustrating the parasitic resistance allowed relative to the reflection coefficient.

[0020] Figure 12 It is a diagram showing the relationship between the fundamental frequency and higher harmonics.

[0021] Figure 13 This is a diagram illustrating an example of the structure of a first impedance matching circuit.

[0022] Figure 14 This is a schematic diagram used to illustrate the operating principle of a transmission line transformer.

[0023] Figure 15 This is a simplified 3D diagram of a transmission line transformer.

[0024] Figure 16 yes Figure 15 The sectional view on the cross section shown by the dashed line.

[0025] Figure 17 This is a diagram showing an example of a coil pattern.

[0026] Figure 18 It is a graph showing the relationship between the path length and the Euclidean distance when moving along a coil pattern from the origin to the end.

[0027] Figure 19 This is a diagram illustrating an example of the structure of a second harmonic termination circuit.

[0028] Figure 20 This is a diagram illustrating an example of a filter structure.

[0029] Figure 21 This is a diagram representing a filter that contains N unit filter circuits.

[0030] Figure 22 This is a diagram illustrating the capacitor shared by two adjacent unit filter circuits.

[0031] Figure 23 This is a diagram showing other unit filter circuits.

[0032] Figure 24 This is a diagram representing a filter that contains N unit filter circuits.

[0033] Figure 25 This is a diagram illustrating the inductor shared by two adjacent unit filter circuits.

[0034] Figure 26 This is a diagram illustrating an example of a filter structure.

[0035] Figure 27 This is a diagram showing the structure of the power amplifier device according to the second embodiment.

[0036] Figure 28 It means Figure 27 A diagram illustrating the structure of the second signal processing unit.

[0037] Figure 29 This is a diagram showing the structure of the power amplifier device according to the third embodiment.

[0038] Figure 30 This is a diagram illustrating a structural example of a tunable second harmonic termination circuit.

[0039] Figure 31 This is a diagram illustrating an example of the structure of a tunable filter.

[0040] Figure 32 This is a diagram illustrating the function of a tunable filter.

[0041] Figure 33 This is a diagram showing the structure of the power amplifier device according to the fourth embodiment.

[0042] Figure 34 It means Figure 33 A diagram illustrating the structure of the third signal processing unit in the diagram.

[0043] Figure 35 This is a diagram showing the structure of the power amplifier device according to the fifth embodiment.

[0044] Figure 36 This is a diagram showing the structure of the power amplifier device according to the sixth embodiment.

[0045] Figure 37 This is a diagram showing the structure of the power amplifier device according to the seventh embodiment.

[0046] Figure 38 This is a diagram showing an example of the structure of a power amplifier circuit.

[0047] Figure 39 It means Figure 37 A diagram illustrating the structure of the third signal processing unit in the diagram.

[0048] Figure 40 This is a diagram showing the structure of the power amplifier device according to the eighth embodiment.

[0049] Figure 41 This is a diagram showing the structure of the power amplifier device according to the ninth embodiment.

[0050] Figure 42 It means Figure 41 A diagram illustrating the structure of the fourth signal processing unit.

[0051] Figure 43 This is a diagram showing the structure of the power amplifier device according to the tenth embodiment.

[0052] Figure 44 It means according to Figure 43 The diagram shows an example of the structure of the first impedance matching circuit and the fourth signal processing unit in the power amplifier device of the tenth embodiment.

[0053] Figure 45 This is a diagram showing the structure of the power amplifier according to the eleventh embodiment.

[0054] Figure 46 This is a diagram showing the structure of the power amplifier according to the twelfth embodiment.

[0055] Figure 47This is a diagram showing the structure of the power amplifier according to the thirteenth embodiment.

[0056] Figure 48 This is a diagram showing the structure of the power amplifier device according to the fourteenth embodiment.

[0057] Figure 49 This is a diagram showing the structure of the power amplifier device according to the fifteenth embodiment.

[0058] Figure 50 This is a diagram showing the structure of the power amplifier according to the sixteenth embodiment.

[0059] Figure 51 This is a diagram showing the structure of the power amplifier according to the seventeenth embodiment.

[0060] Figure 52 This is a diagram showing the structure of the power amplifier according to the eighteenth embodiment.

[0061] Figure 53 This is a diagram showing the structure of the power amplifier according to the nineteenth embodiment.

[0062] Figure 54 This is a diagram showing the structure of the power amplifier device according to the twentieth embodiment.

[0063] Figure 55 This is a diagram showing the structure of the power amplifier device according to the twenty-first embodiment.

[0064] Figure 56 This is a diagram showing the structure of the power amplifier device according to the twenty-second embodiment.

[0065] Figure 57A It means Figure 56 The diagram shows an example of a power amplifier device implementation.

[0066] Figure 57B It means Figure 56 The diagram shows an example of a power amplifier device implementation.

[0067] Figure 58A It means Figure 56 The diagram shows an example of a power amplifier device implementation.

[0068] Figure 58B It means Figure 56 The diagram shows an example of a power amplifier device implementation.

[0069] Figure 59 It means Figure 56 The diagram shows an example of a power amplifier device implementation.

[0070] Figure 60 It means Figure 56 The diagram shows an example of a power amplifier device implementation.

[0071] Figure 61 It means Figure 56 The diagram shows an example of a power amplifier device implementation.

[0072] Figure 62 This is a diagram showing the structure of the power amplifier device according to the twenty-third embodiment.

[0073] Figure 63 This is a diagram showing the structure of the power amplifier device according to the twenty-fourth embodiment.

[0074] Figure 64 It means Figure 63 The diagram shows an example of a power amplifier device implementation.

[0075] Figure 65 This is a diagram showing the structure of the power amplifier device according to the twenty-fifth embodiment. Detailed Implementation

[0076] Hereinafter, embodiments of the present invention will be described in detail based on the accompanying drawings. In the following descriptions of each embodiment, the same reference numerals are used to denote the same or equivalent components as in other embodiments, and their descriptions are simplified or omitted. The present invention is not limited by these embodiments. Furthermore, the constituent elements of each embodiment include structures that can be easily substituted by those skilled in the art, or structures that are substantially the same. In addition, the structures described below can be appropriately combined. Furthermore, structural omissions, substitutions, or modifications can be made without departing from the spirit of the invention. Moreover, the various modifications described in this embodiment can be arbitrarily combined within the scope clearly understood by those skilled in the art.

[0077] Before describing each embodiment, the high-order harmonic termination and high-order harmonic removal in this disclosure will be explained.

[0078] (Higher harmonic terminal)

[0079] The so-called high-order harmonic termination is a technique that uses a high-order harmonic termination circuit to reflect the high-order harmonics generated in the amplifier into the circuit components of the subsequent stage, and then input the amplifier as a specific phase, so that the amplifier can perform amplification operation in switching mode. Figure 1 This diagram illustrates the function of higher harmonic termination based on the higher harmonic termination circuit. Figure 1 In the power amplifier circuit 1, a high-order harmonic terminating circuit 30 is provided after the power amplifier circuit 1, and an impedance matching circuit 20 is provided after the high-order harmonic terminating circuit 30.

[0080] exist Figure 1 In this circuit, relative to the input signal P of the power amplifier circuit 1, the output signal from the output terminal of the power amplifier circuit 1 includes the fundamental frequency P1 and the higher harmonic frequency Ph1. The fundamental frequency P1 is output through the higher harmonic termination circuit 30 and the impedance matching circuit 20.

[0081] Conversely, for the higher harmonic Ph1, the reflected wave component Ph2 becomes the reflected wave component folded back to the input side of the higher harmonic termination circuit 30. A portion of the reflected wave component Ph2, Ph3, flows into the reference potential and is consumed. The remaining reflected wave component Ph4 of the reflected wave component Ph2 is input to the output of the power amplifier circuit 1 as a specific phase. The so-called specific phase is a first phase relative to the traveling wave component of the even harmonic, or a second phase relative to the traveling wave component of the odd harmonic. The first phase is, for example, an opposite phase. That is, at the output of the power amplifier circuit, the reflected wave component of the even harmonic cancels out at least a portion of the traveling wave component of the even harmonic. The second phase is, for example, in phase. That is, at the output of the power amplifier circuit 1, the reflected wave component of the odd harmonic adds to a portion of the traveling wave component of the odd harmonic (constructively interferes). By setting the phase in this way, at the output terminal of the power amplifier circuit 1, as a result of coinciding the output signal of the power amplifier circuit 1 and the reflected wave component Ph4, the power amplifier circuit 1 becomes an amplification operation in the switching mode.

[0082] In power amplifier circuit 1, the signal whose fundamental wave P1 and reflected wave component Ph4 coincide is amplified in a switching mode. In principle, when a portion of the reflected wave component Ph2 is input to power amplifier circuit 1 as the reflected wave component Ph4, the attenuation of higher harmonics is less, and their amplitude is larger. As described later, a near-ideal rectangular wave signal can be obtained, resulting in a greater improvement in performance. Furthermore, the reference potential exemplifies ground potential, but this disclosure is not limited thereto.

[0083] (Example of a high-order harmonic terminating circuit)

[0084] Figure 2 as well as Figure 3 This is a diagram illustrating an example of a high-order harmonic terminating circuit. Figure 2 The circuit shown consists of a series resonant circuit SC composed of a capacitor C1 and an inductor L1 connected in series. Figure 2 The series resonant circuit SC shown is positioned between the transmission path and the reference potential. Figure 2In the circuit, a series resonant circuit SC is positioned between the first terminal T1 and the second terminal T2 of the high-order harmonic terminating circuit 30. One end of the series resonant circuit SC is connected to a reference potential, and the other end of the series resonant circuit SC is connected to both the first terminal T1 and the second terminal T2. Figure 2 The circuit shown has zero impedance at the resonant frequency of capacitor C1 and inductor L1. Therefore, Figure 2 The circuit functions as a higher harmonic terminating circuit, which generates a reflected wave component of a specific higher harmonic frequency by terminating the signal at that frequency. Additionally, in Figure 2 In this example, the capacitance of capacitor C1 is set to "C", and the inductance of inductor L1 is set to "L". Therefore, Figure 2 The circuit shown is at a frequency greater than the resonant frequency f. R (f R = 1 / 2π(LC) 1 / 2 The frequency on the lower frequency side (f < 1 / 2π (LC)) 1 / 2 In this circuit, approximately capacitive components are placed between the reference potential and the reference potential. Figure 2 The circuit shown is at a frequency greater than the resonant frequency f. R The frequency on the high-frequency side (f > 1 / 2π (LC)) 1 / 2 In this case, a component with approximately inductive properties is placed in the circuit between the reference potential and the reference potential. Therefore, Figure 2 The circuit shown sets the resonant frequency f at frequencies different from the specific higher harmonic frequencies. R This allows for adjustment of the phase of the reflected wave components.

[0085] in addition, Figure 3 The circuit shown consists of a parallel resonant circuit PC composed of a capacitor C2 and an inductor L2 connected in parallel. Figure 3 The parallel resonant circuit PC is inserted into the transmission path as shown. Figure 3 In the circuit, a parallel resonant circuit PC is positioned between the first terminal T1 and the second terminal T2 of the high-order harmonic terminating circuit 30. One end of the parallel resonant circuit PC is connected to the first terminal T1, and the other end of the parallel resonant circuit PC is connected to the second terminal T2. Figure 3 The circuit shown has infinite impedance at the resonant frequency of capacitor C2 and inductor L2. Therefore, Figure 3 The circuit functions as a high-order harmonic terminating circuit, which terminates signals at specific high-order harmonic frequencies. Additionally, in Figure 3 In this example, the capacitance of capacitor C2 is set to "C", and the inductance of inductor L2 is set to "L". Therefore, Figure 3 The circuit is also with Figure 2 Similarly, in circuits with a resonant frequency f... R (f R= 1 / 2π(LC) 1 / 2 The frequency on the lower frequency side (f < 1 / 2π (LC)) 1 / 2 )Down, Figure 3 The circuit as a whole is approximately composed of inductive components. Figure 3 The circuit shown is at a frequency greater than the resonant frequency f. R The frequency on the high-frequency side (f > 1 / 2π (LC)) 1 / 2 )Down, Figure 3 The circuit as a whole is approximately composed of capacitive components. Therefore, Figure 3 The circuit shown also sets a resonant frequency at a frequency different from the specific higher harmonic frequency, thereby enabling the adjustment of the phase of the reflected wave component.

[0086] Will as Figure 2 Such a circuit generates impedance that becomes a short circuit at higher harmonic frequencies that are the resonant frequency, or like... Figure 3 A circuit that generates an open impedance at the higher harmonic frequencies, which serve as the resonant frequency, is placed somewhere along the signal transmission path. This allows for the creation of a higher harmonic termination circuit that terminates signals at specific higher harmonic frequencies.

[0087] (Higher harmonics removed)

[0088] The so-called high-order harmonic removal is a technique that uses a high-order harmonic removal filter to attenuate high-order harmonics and prevent them from being output to the output terminal of the high-order harmonic removal filter. Figure 4 This diagram illustrates the effect of high-order harmonic removal based on a high-order harmonic removal filter. Figure 4 In the power amplifier circuit 1, an impedance matching circuit 20 is provided in the stage after the power amplifier circuit 1 (i.e., the output side), and a high-order harmonic removal filter 40 is provided in the stage after the impedance matching circuit 20 (i.e., the output side).

[0089] exist Figure 4 In the above, relative to the input signal P of the power amplifier circuit 1, the output signal of the power amplifier circuit 1 and the output signal of the impedance matching circuit 20 include the fundamental wave P1 and the higher harmonic Ph1. The fundamental wave P1 is not removed in the higher harmonic removal filter 40, and the fundamental wave P1 passes through the higher harmonic removal filter 40.

[0090] In contrast, for the higher harmonic Ph1, which does not pass through the higher harmonic removal filter 40, a portion is reflected back to the input side of the higher harmonic removal filter 40 as the reflected wave component Ph5, while the remaining reflected wave component Ph6 flows into the reference potential and is consumed. The reflected wave component Ph5 reflected back to the input side of the higher harmonic removal filter 40 is input to the impedance matching circuit 20 as the reflected wave component Ph7 flowing back in the transmission path. A portion of the reflected wave component Ph7 input to the impedance matching circuit 20, the reflected wave component Ph8, flows into the reference potential and is consumed. The remainder becomes the reflected wave component Ph9 flowing back in the transmission path. The reflected wave component Ph9 becomes the reflected wave component Ph10 flowing back in the transmission path. The reflected wave components Ph5, Ph6, Ph7, Ph8, Ph9, and Ph10 are consumed as heat energy due to parasitic resistance, etc. As described above, the higher harmonic removal filter 40 allows the fundamental frequency to pass through while removing other higher harmonics and preventing them from being output.

[0091] (First Implementation)

[0092] Figure 5 This is a diagram showing the structure of the power amplifier device 100A according to the first embodiment. (See diagram for example.) Figure 5 As shown, the power amplifier device 100A according to the first embodiment includes a power amplifier circuit 1, a first impedance matching circuit 2, a second harmonic termination circuit 3, and a filter 4. The power amplifier circuit 1 has a first input terminal T11 and a first output terminal T10. The power amplifier circuit 1 amplifies a first high-frequency signal S1 input to the first input terminal T11. The first high-frequency signal S1 contains a fundamental frequency. The power amplifier circuit 1 outputs a second high-frequency signal S2 from the first output terminal T10. The second high-frequency signal S2 contains a fundamental frequency, even harmonics, and odd harmonics.

[0093] The first impedance matching circuit 2 has a second input terminal T21 and a second output terminal T20. The second input terminal T21 is connected to the first output terminal T10 of the power amplifier circuit 1. The first impedance matching circuit 2 outputs the second high-frequency signal S2, which is input to the second input terminal T21, as a third high-frequency signal S3 from the second output terminal T20. The first impedance matching circuit 2 converts the impedance of the second input terminal T21 and the second output terminal T20. That is, the first impedance matching circuit 2 converts the input impedance of the component connected to the second output terminal T20 of the first impedance matching circuit 2, providing load impedance to the power amplifier circuit 1. That is, in Figure 5In this circuit, the first impedance matching circuit 2 functions by converting the input impedance of the second harmonic terminating circuit 3 into its own input impedance. The first impedance matching circuit 2 functions as a low-loss impedance conversion circuit not only for the fundamental frequency but also for at least one higher harmonic frequency. The first impedance matching circuit 2 does not exhibit low-pass characteristics. The first impedance matching circuit 2 is not constructed from an LC ladder circuit but rather from, for example, a transmission line transformer.

[0094] The second harmonic terminating circuit 3 is a higher harmonic terminating circuit. The second harmonic terminating circuit 3 has a third input terminal T31 and a third output terminal T30. The third input terminal T31 is connected to the second output terminal T20 of the first impedance matching circuit 2. The second harmonic terminating circuit 3 reflects at least a portion of the even and odd harmonics contained in the third high-frequency signal S3 input to the third input terminal T31. Therefore, in the second harmonic terminating circuit 3, a fourth high-frequency signal S4 is output from the third input terminal T31, and a fifth high-frequency signal S5, containing the fundamental wave, the remaining even harmonics, and the odd harmonics, is output from the third output terminal T30. The filter 4 removes the higher harmonics contained in the signal.

[0095] Filter 4 has a fourth input terminal T41 and a fourth output terminal T40. The fourth input terminal T41 is connected to the third output terminal T30 of the second harmonic termination circuit 3. Filter 4 attenuates at least a portion of the even and odd harmonics contained in the fifth high-frequency signal S5 input to the fourth input terminal T41. Filter 4 outputs a sixth high-frequency signal S6, containing the fundamental frequency, the remaining even harmonics, and the odd harmonics, from the fourth output terminal T40. Furthermore, as described later, a signal processing unit that integrates the functions of the second harmonic termination circuit 3 and the filter 4 can also be used.

[0096] In the above structure, the second high-frequency signal S2 output from the first output terminal T10 of the power amplifier circuit 1 undergoes impedance transformation in the first impedance matching circuit 2 and is then input to the second harmonic termination circuit 3. The fundamental frequency contained in the second high-frequency signal S2 output from the first output terminal T10 of the power amplifier circuit 1 passes through the second harmonic termination circuit 3. The fundamental frequency passing through the second harmonic termination circuit 3 passes through the filter 4. At the stage after the filter 4, i.e., on the side of the fourth output terminal T40, as described later, a frequency band selection switch is provided to select the frequency band. The signal of the fundamental frequency passing through the filter 4 is output to the antenna via an antenna switch, etc.

[0097] As described above, the second harmonic contained in the second high-frequency signal S2 output from the first output terminal T10 of the power amplifier circuit 1 is reflected in the second harmonic termination circuit 3, becoming a reflected wave component that folds back from the third input terminal T31 of the second harmonic termination circuit 3 to the first impedance matching circuit 2. That is, the second harmonic termination circuit 3 outputs a fourth high-frequency signal S4 containing at least the second harmonic from the third input terminal T31. After the reflected wave component of the second harmonic undergoes a certain phase change via the first impedance matching circuit 2, it reaches the first output terminal T10 of the power amplifier circuit 1 and is input with a first phase. The first phase of the reflected wave component of the second harmonic cancels at least a portion of the phase of the traveling wave component of the second harmonic in the first output terminal T10 of the power amplifier circuit 1. Thus, in the first output terminal T10 of the power amplifier circuit 1, the traveling wave component, the reflected wave component, and the fundamental wave of the second harmonic are superimposed, resulting in amplification operation in switching mode. Furthermore, higher harmonics other than the second harmonic are input to the filter 4 and consumed after passing through the second harmonic termination circuit 3.

[0098] Additionally, the second harmonic termination circuit 3 sometimes outputs a fourth high-frequency signal S4 containing the third harmonic. This third harmonic reaches the first output terminal T10 of the power amplifier circuit 1 via the first impedance matching circuit 2 in a second phase. The second high-frequency signal S2 output from the power amplifier circuit 1 contains the third harmonic, and at least a portion of the third harmonic contained in the second high-frequency signal S2 is added at the first output terminal T10 of the power amplifier circuit 1. That is, the second phase is the phase in which at least a portion of the third harmonic contained in the second high-frequency signal S2 is added at the first output terminal T10 of the power amplifier circuit 1.

[0099] Figure 6 as well as Figure 7 It means from Figure 5 A diagram showing an example of the voltage waveform V and current waveform I of the output signal from a power amplifier 100A. Figure 6 As shown, consider the case where both voltage waveform V and current waveform I are sinusoidal waves with a phase difference of 180°. In this case, power loss occurs during the time period when voltage waveform V and current waveform I overlap.

[0100] In contrast, such as Figure 7 As shown, when both the voltage waveform V and the current waveform I are rectangular waves with a phase difference of 180°, during the time periods when one of the voltage waveform V and the current waveform I is at a high level, the other is at a low level. Therefore, the waveforms do not overlap, and no power loss occurs. Thus, in the power amplifier device 100A according to this embodiment, the higher harmonics contained in the transmitted signal are reflected back and overlapped with the fundamental wave, thereby making the output signal of the power amplifier device 100A approach a rectangular wave. This reduces power loss.

[0101] Here, the higher harmonics Ph1 contained in the output signal of power amplifier circuit 1 are considered as even harmonics containing the second harmonic and odd harmonics containing the third harmonic. A rectangular wave is obtained by coinciding the odd harmonics with the fundamental wave. Coinciding the even harmonics with the fundamental wave prevents the waveform from approaching a rectangle. Therefore, it is necessary to suppress the influence of even harmonics on the fundamental wave. In particular, it is preferable to suppress the influence of the second harmonic, which has a larger amplitude than other higher harmonics. Furthermore, it is preferable to coincide the third harmonic, whose amplitude is second only to the second harmonic, with the third harmonic when its amplitude is large, with the third harmonic.

[0102] Figure 8 This is a diagram showing examples of waveforms for even and odd harmonics relative to the fundamental frequency P1. Figure 8 This represents an example of the second harmonic as an even harmonic, and an example of the third harmonic as an odd harmonic.

[0103] exist Figure 8 In this case, the frequency of the traveling wave component P2t of the second harmonic becomes twice the frequency of the fundamental wave P1. For example... Figure 8 As shown, the reflected wave component P2r (shown by the dashed line) is set to have the opposite phase to the traveling wave component P2t (shown by the solid line) of the second harmonic. That is, the phase difference between the traveling wave component P2t and the reflected wave component P2r is set to 180°. By setting the phases of the traveling wave component P2t and the reflected wave component P2r in this relationship, the traveling wave component P2t and the reflected wave component P2r cancel each other out. Therefore, the amplitude of the composite wave P2s after the traveling wave component P2t and the reflected wave component P2r coincide becomes zero. Therefore, even if the composite wave P2s is input to the output of power amplifier circuit 1, it will not affect the fundamental wave P1. The same applies to even harmonics other than the second harmonic. That is, at the output of power amplifier circuit 1, for even harmonics, the traveling wave component P2t and the reflected wave component P2r are set to have the opposite phase. As a result, the amplitude of the composite wave P2s becomes zero, which reduces power loss.

[0104] In addition, Figure 8 In this case, the frequency of the traveling wave component P3t of the third harmonic is three times the frequency of the fundamental wave P1. For example... Figure 8 As shown, the reflected wave component P3r (shown by the thin solid line) is set to be in phase with the traveling wave component P3t (shown by the thick dashed line) of the third harmonic. That is, the phase difference between the traveling wave component P3t and the reflected wave component P3r is set to 0°. Therefore, as... Figure 8As shown, the waveforms of the traveling wave component P3t and the reflected wave component P3r overlap. By setting the phases of the traveling wave component P3t and the reflected wave component P3r in such a relationship, a composite wave P3s is obtained by combining the traveling wave component P3t and the reflected wave component P3r. This composite wave P3s is input to the output of power amplifier circuit 1, coinciding with the fundamental wave P1. Therefore, a signal with a waveform closer to a rectangular wave than the fundamental wave P1 can be obtained. This reduces power loss. The same applies to odd harmonics other than the third harmonic. That is, at the output of power amplifier circuit 1, for odd harmonics, the traveling wave component P3t and the reflected wave component P3r are set to be in phase. This reduces power loss.

[0105] Here, refer to Figures 9-11 The permissible parasitic resistance in the higher harmonic terminating circuit 30 or the second harmonic terminating circuit 3 is explained.

[0106] Figure 9 This is a diagram showing the circuit structure of a comparative example. For example... Figure 9 As shown, in the comparative example, a high-order harmonic termination circuit 30 is provided after the power amplifier circuit 1, and a first signal processing unit 44 is provided after the high-order harmonic termination circuit 30. The first signal processing unit 44 has the functions of an impedance matching circuit 20 and a high-order harmonic removal filter 40.

[0107] The fundamental input impedance of the higher harmonic terminating circuit 30 is several Ω (e.g., 3 Ω), and the input impedance of the first signal processing unit 44 is also several Ω (e.g., 3 Ω). The input impedance of the subsequent stage of the first signal processing unit 44 is, for example, 50 Ω. Therefore, in the higher harmonic terminating circuit 30 of the comparative example, a sufficiently high amplitude reflected wave needs to be generated relative to the several Ω input impedance. If the parasitic resistance in the higher harmonic terminating circuit 30 is large, it is difficult to generate a sufficiently high amplitude reflected wave.

[0108] Figure 10 This is a diagram showing the circuit structure in which a second signal processing unit 34 is provided after the power amplifier circuit 1. Figure 10 The second signal processing unit 34 has Figure 5 The functions of the second harmonic termination circuit 3 and the filter 4. According to Figure 10 In the circuit structure shown, the input impedance of the second signal processing unit 34 is, for example, 50 Ω. Therefore, in Figure 10 In the second signal processing unit 34 shown, a reflected wave component can be generated relative to an input impedance of 50 [Ω], which is sufficiently large than the aforementioned number [Ω]. Therefore, a reflected wave with a sufficiently high amplitude can be generated. This means that the value of parasitic resistance allowed by the second signal processing unit 34 is mitigated. That is, a parasitic resistance larger than that of the comparative example is allowed. For this, refer to... Figure 11 Please provide an explanation.

[0109] Figure 11 It is to explain relative to Figure 9 High-order harmonic terminating circuit 30 and Figure 10 The diagram shows the permissible parasitic resistance of the second harmonic termination circuit 3. Figure 11 In the diagram, curve S0 represents... Figure 9 The curve S represents the relationship between the reflection coefficient of the reflected wave generated in the higher harmonic terminating circuit 30 at the output of the power amplifier circuit 1 and the parasitic resistance of the higher harmonic terminating circuit 30. Figure 10 The curve showing the relationship between the reflection coefficient of the reflected wave generated in the second harmonic terminating circuit 3 at the output of the power amplifier circuit 1 and the parasitic resistance of the second harmonic terminating circuit 3.

[0110] Figure 11 It is a graph plotted with the magnitude of the reflected wave component at the output of power amplifier circuit 1 as the reflection coefficient relative to the value of parasitic resistance. Figure 11 This represents the relationship between parasitic resistance and the reflection coefficient of the reflected wave component. In Figure 11 In the diagram, the horizontal axis represents the parasitic resistance of the higher harmonic terminating circuit 30, and the vertical axis represents the reflection coefficient. For example... Figure 11 As shown, if the parasitic resistance increases, the reflection coefficient decreases. Therefore, in order to obtain the reflected wave component with the largest possible amplitude, in Figure 11 The region on the left side of the image causes power amplifier circuit 1 to operate, requiring the highest possible reflection coefficient.

[0111] Here, if the necessary reflection coefficient is assumed to be 0.90, then for representing Figure 9 The intersection point X0 of the curve S0 representing the characteristics of the high-order harmonic terminating circuit 30 and the line L9 with a reflection coefficient of 0.90 allows for a parasitic resistance PR0 of approximately 0.18 [Ω]. In contrast, for representing... Figure 10 The intersection point X1 of the characteristic curve S of the second signal processing unit 34 and the line L9 with a reflection coefficient of 0.90 allows for a parasitic resistance PR of approximately 3 [Ω]. Therefore, Figure 10 The allowed parasitic resistance value of the second signal processing unit 34 is higher than Figure 9 30 high-order harmonic terminal circuits.

[0112] exist Figure 10 If we consider inputting the generated reflection into the power amplifier circuit 1, then we need to consider the power loss in the first impedance matching circuit 2. Figure 11The curves represent the cases where the assumed power loss between the power amplifier circuit 1 and the first impedance matching circuit 2 is set to 1.0dB, 0.8dB, 0.6dB, and 0.4dB. On line L9, with a necessary reflection coefficient of 0.90, when the assumed power loss is set to 0.8dB, the intersection of the 0.8dB curve and line L9 is close to the aforementioned intersection point X0, thus allowing for a parasitic resistance similar to that of curve S0.

[0113] On line L9, where the necessary reflection coefficient is 0.90, if the power loss is 0.6 dB or 0.4 dB lower than 0.8 dB, then... Figure 11 The right-hand offset allows for a parasitic resistance value larger than PR0. For example, with an assumed power loss of 0.6 dB, the intersection point X2 of the curve and line L9 for 0.6 dB allows for a parasitic resistance PR2. The parasitic resistance PR2 is approximately four times the parasitic resistance PR0.

[0114] The above is for reference only. Figure 11 As explained, relative to Figure 9 High-order harmonic terminating circuit 30, Figure 10 The second signal processing unit 34 has a larger allowed parasitic resistance value, thus enabling the generation of reflected wave components with higher amplitudes. Therefore, it is possible to increase the amplitude of higher harmonics.

[0115] (The relationship between fundamental frequency and higher harmonics)

[0116] Figure 12 This is a graph showing the relationship between the fundamental frequency and higher harmonics. In Figure 12 In the waveform, the fundamental wave P1 is a sine wave centered at level "0". Waveform P30 is formed by coinciding the third harmonic with the fundamental wave P1 in phase. Waveform P50 is formed by coinciding the third and fifth harmonics with the fundamental wave P1 in phase. Waveform P70 is formed by coinciding the third, fifth, and seventh harmonics with the fundamental wave P1 in phase. Waveform P90 is formed by coinciding the third, fifth, seventh, and ninth harmonics with the fundamental wave P1 in phase. Waveform P110 is formed by coinciding the third, fifth, seventh, ninth, and eleventh harmonics with the fundamental wave P1 in phase.

[0117] For reference Figure 12 It can be understood that by coinciding the composite wave, composed of the traveling wave component and the reflected wave component of the odd harmonics that coincide in phase, with the fundamental wave P1, a waveform closer to a rectangular wave can be obtained. Therefore, as referenced... Figure 6 as well as Figure 7 As explained, this can reduce power loss. Figure 5In the first embodiment shown, the composite wave formed by merging the fundamental traveling wave component and the reflected wave component of the second harmonic (which is an even harmonic) with opposite phases coincides with the fundamental wave P1. As described above, the amplitude of the composite wave is zero, thus reducing the influence of the second harmonic (which is an even harmonic) on the fundamental wave P1.

[0118] (First impedance matching circuit)

[0119] Figure 13 This is a diagram illustrating an example of the structure of the first impedance matching circuit 2. Figure 13 The first impedance matching circuit 2 shown includes: a transmission line transformer 200, a DC cutoff capacitor CBKI1 disposed on the input terminal side, a DC cutoff capacitor CBKO1 disposed on the output terminal side, an inductor LRFC2 disposed on the input terminal side and connected in series, and a capacitor CB2. A bias voltage is applied between one end of the inductor LRFC2 and one end of the capacitor CB2. The other end of the capacitor CB2 is connected to a reference potential.

[0120] Reference Figure 14 , Figure 15 as well as Figure 16 An example of a transmission line transformer 200 will be given.

[0121] Figure 14 This is a schematic diagram illustrating the operating principle of the transmission line transformer 200. The transmission line transformer 200 includes a first transmission line 21, a second transmission line 22, and a third transmission line 23 disposed on the surface or inner layer of the substrate. Figure 14 The longitudinal direction corresponds to the thickness direction of the substrate. The first transmission line 21 and the second transmission line 22 are arranged at different positions in the thickness direction of the substrate. The third transmission line 23 is arranged between the first transmission line 21 and the second transmission line 22 in the thickness direction of the substrate.

[0122] One end of the third transmission line 23 is designated as the first end 23A, and the other end as the second end 23B. One end of the first transmission line 21 is designated as the third end 21A, and the other end as the fourth end 21B. One end of the second transmission line 22 is designated as the fifth end 22A, and the other end as the sixth end 22B. The first end 23A of the third transmission line 23 is connected to the third end 21A of the first transmission line 21, and the second end 23B is connected to a reference potential. Furthermore, the term "connected to a reference potential" here includes both DC connection and AC connection to a reference potential. The third end 21A of the first transmission line 21 is connected to a first terminal 310 for connection to an external circuit. The fourth end 21B of the first transmission line 21 is connected to the fifth end 22A of the second transmission line 22. The sixth end 22B of the second transmission line 22 is connected to a second terminal 320 for connection to an external circuit. That is, the first transmission line 21 and the second transmission line 22 are connected in series, and the two ends of the series-connected transmission lines are respectively equivalent to the first terminal 310 and the second terminal 320.

[0123] The first transmission line 21 and the second transmission line 22 are electromagnetically coupled to the third transmission line 23. In this embodiment, the first transmission line 21 and the third transmission line 23 are equivalent to the coupling of coils with the same number of turns T, and the second transmission line 22 and the third transmission line 23 are also equivalent to the coupling of coils with the same number of turns T. For example, the number of turns T of the first transmission line 21, the second transmission line 22, and the third transmission line 23 are all equal to n.

[0124] Next, refer to Figure 17 as well as Figure 18 The definition of the number of turns T in this specification will be explained.

[0125] Figure 17 This is a diagram representing an example of a coil pattern. An orthogonal XY coordinate system is defined with the origin O at the outer edge of the coil pattern. The coil pattern travels from the origin O to the inner edge endpoint E via any path. Let L represent the path length to any point P0 on the coil pattern. Let D represent the Euclidean distance of point P0.

[0126] Figure 18 This is a graph showing the relationship between the path length L and the Euclidean distance D when moving along a coil pattern from the origin O to the endpoint E. Figure 17In the case of the coil pattern shown, the Euclidean distance D reaches its first maximum at point P11, then its minimum at point P12, and its second maximum at point P13, before reaching the endpoint E. The number of maxima appearing in the graph representing the relationship between the path length L and the Euclidean distance D is defined as the number of turns T of the coil pattern. Figure 17 The coil pattern shown has 2 turns T.

[0127] First, the alternating current flowing in the first transmission line 21, the second transmission line 22, and the third transmission line 23 will be explained. The current flowing from the first terminal 310 to the second terminal 320 first flows from the third end 21A to the fourth end 21B of the first transmission line 21, and then from the fifth end 22A to the sixth end 22B of the second transmission line 22. The magnitude of the alternating current flowing in the first transmission line 21 is equal to the magnitude of the alternating current flowing in the second transmission line 22. Due to the alternating current flowing in the first transmission line 21, an odd-mode current is induced in the third transmission line 23 from the first end 23A to the second end 23B, and due to the alternating current flowing in the second transmission line 22, an odd-mode current is induced in the third transmission line 23 from the first end 23A to the second end 23B. The direction of the odd-mode current induced in the third transmission line 23 is opposite to the direction of the alternating current flowing in the first transmission line 21 and the second transmission line 22. The odd-mode current caused by the current flowing in the first transmission line 21 and the odd-mode current caused by the current flowing in the second transmission line 22 are equal in magnitude and direction.

[0128] In the third transmission line 23, the odd-mode currents from the first transmission line 21 and the second transmission line 22 flow overlapping. Therefore, an odd-mode current twice the size of the current flowing in the series circuit formed by the first and second transmission lines 21 is induced in the third transmission line 23. If the magnitude of the current flowing from the first terminal 310 to the transmission line transformer 200 is represented by i, then a current of (1 / 3)i flows in the series circuit of the first and second transmission lines 21, and a current of (2 / 3)i flows in the third transmission line 23. The magnitude of the current output from the second terminal 320 is (1 / 3)i.

[0129] Next, the voltages will be explained. Let v1 represent the voltage at the first terminal 310, and v2 represent the voltage at the second terminal 320. The voltage at the third end 21A of the first transmission line 21 and the voltage at the first end 23A of the third transmission line 23 are both equal to the voltage v1 at the first terminal 310. The voltage at the sixth end 22B of the second transmission line 22 is equal to the voltage v2 at the second terminal 320. Let v3 represent the voltage at the fourth end 21B of the first transmission line 21. The voltage at the fifth end 22A of the second transmission line 22 is equal to the voltage v3 at the fourth end 21B of the first transmission line 21. The voltage at the second end 23B of the third transmission line 23 is 0V.

[0130] The potential difference between the third end 21A and the fourth end 21B of the first transmission line 21 is equal to the potential difference between the second end 23B and the first end 23A of the third transmission line 23. Therefore, v1 - v3 = 0 - v1 holds true. Similarly, between the second transmission line 22 and the third transmission line 23, v3 - v2 = 0 - v1 holds true. Solving this simultaneous equation yields 3 × v1 = v2. Thus, the voltage v2 at the second terminal 320 is three times the voltage v1 at the first terminal 310.

[0131] When a load with impedance R2 is connected to the second terminal 320, v2 = (1 / 3)i × R2 holds true. If the impedance observed from the first terminal 310 is represented by R1, then v1 = R1 × i holds true. Solving these equations, we get R1 = (1 / 9)R2. Thus, the impedance R1 observed from the first terminal 310 is (1 / 9) times the impedance R2 of the load connected to the second terminal 320. Conversely, if the load is connected to the first terminal 310, the impedance observed from the second terminal 320 is 9 times that of the load connected to the first terminal 310. Thus, the transmission line transformer 200 functions as an impedance conversion circuit with an impedance conversion ratio of 9.

[0132] Figure 15 This is a simplified three-dimensional diagram of the transmission line transformer 200. Figure 16 yes Figure 15 The sectional view on the section shown by the dashed line 1C.

[0133] In substrate 300 ( Figure 16The first transmission line 21 and the second transmission line 22 are arranged at different positions along the thickness direction of the substrate 300. For example, a magnetic insulator or a dielectric can be used in the substrate 300. Examples of substrates made of dielectric materials include resin substrates and ceramic substrates. Alternatively, an insulating layer formed on a semiconductor substrate can also be used as the substrate 300. A third transmission line 23 is arranged between the first transmission line 21 and the second transmission line 22. The first transmission line 21, the second transmission line 22, and the third transmission line 23 are composed of a spiral conductor pattern whose width dimension is larger than its thickness dimension. Furthermore, a lead-out line 24 and a ground conductor 35 are arranged on the substrate 300. Figure 15 ).

[0134] The third end 21A of the first transmission line 21, the first end 23A of the third transmission line 23, and the sixth end 22B of the second transmission line 22 are arranged in an overlapping position when viewed from above. The fourth end 21B of the first transmission line 21 and the fifth end 22A of the second transmission line 22 are also arranged in an overlapping position when viewed from above. A conductor pattern 29 is arranged in the same layer as the third transmission line 23, corresponding to the fourth end 21B of the first transmission line 21. A via conductor 25 connects the third end 21A of the first transmission line 21 and the first end 23A of the third transmission line 23. A via conductor 26 connects the fourth end 21B of the first transmission line 21 and the conductor pattern 29. A via conductor 27 connects the conductor pattern 29 and the fifth end 22A of the second transmission line 22. A via conductor 28 connects the sixth end 22B of the second transmission line 22 and the lead-out line 24. The third end 21A of the first transmission line 21 is connected to the first terminal 310, and the lead-out line 24 is connected to the second terminal 320. The second end 23B of the third transmission line 23 is connected to the grounding conductor 35.

[0135] Viewed from above, the first transmission line 21, starting from the third end 21A, extends in the first rotational direction (in... Figure 15 The third transmission line 23 extends in a counter-clockwise direction (from the first end 23A). The third transmission line 23 extends in a second rotational direction opposite to the first rotational direction (in the counter-clockwise direction). Figure 15 The second transmission line 22 extends in a clockwise direction. It starts from the fifth end 22A and extends in a first rotational direction.

[0136] A hypothetical periphery circuit 36 ​​is defined as a closed loop along the outer periphery of a roughly square when viewed from above. The third end 21A of the first transmission line 21, the first end 23A of the third transmission line 23, and the sixth end 22B of the second transmission line 22 are positioned at the same location on the periphery circuit 36 ​​when viewed from above. The fourth end 21B of the first transmission line 21, the conductor pattern 29, and the fifth end 22A of the second transmission line 22 are positioned at the same location inside the periphery circuit 36 ​​when viewed from above. Alternatively, these ends may be configured such that the third end 21A, the first end 23A, and the sixth end 22B partially overlap when viewed from above. Similarly, these ends may be configured such that the fourth end 21B, the conductor pattern 29, and the fifth end 22A partially overlap when viewed from above.

[0137] The first transmission line 21, after rotating approximately one revolution along the peripheral circuit 36 ​​in the first rotation direction from the third end 21A, extends towards the inside of the peripheral circuit 36 ​​to the fourth end 21B. The third transmission line 23, after rotating approximately one revolution along the peripheral circuit 36 ​​in the second rotation direction from the first end 23A, extends towards the outside of the peripheral circuit 36 ​​to the second end 23B. The second transmission line 22, after extending towards the peripheral circuit 36 ​​from the fifth end 22A located inside the peripheral circuit 36, rotates approximately one revolution along the peripheral circuit 36 ​​in the first rotation direction to the sixth end 22B. Thus, the first transmission line 21, the second transmission line 22, and the third transmission line 23 each form a coil pattern with approximately one turn.

[0138] The portions of the first transmission line 21, the second transmission line 22, and the third transmission line 23 along the peripheral circuit 36 ​​at least partially overlap when viewed from above. Therefore, the first transmission line 21 is capacitively coupled to the third transmission line 23, and the second transmission line 22 is also capacitively coupled to the third transmission line 23.

[0139] Next, the superior performance of using transmission line transformer 200 will be explained. In a transmission line transformer with a double-layer structure of first transmission line 21 and third transmission line 23, the impedance transformation ratio is approximately 4. In contrast, the impedance transformation ratio of transmission line transformer 200 is approximately 9, achieving a larger impedance transformation ratio than that of the double-layer transmission line transformer. This is because the third transmission line 23 is electromagnetically coupled to both the first transmission line 21 and the second transmission line 22, thereby multiplying the odd-mode current induced in the third transmission line 23.

[0140] Furthermore, the first transmission line 21, the second transmission line 22, and the third transmission line 23 are arranged to approximately overlap when viewed from above, so even if the impedance conversion ratio is increased, the area occupied by the transmission line transformer 200 within the substrate 300 will not increase. Therefore, compared to a structure that achieves a large impedance conversion ratio by connecting multiple transmission line transformers with smaller impedance conversion ratios, the transmission line transformer 200 can be miniaturized.

[0141] Next, the modified transmission line transformer will be described. In the transmission line transformer 200, the first transmission line 21, the second transmission line 22, and the third transmission line 23 are connected along the circuit 36 ​​( Figure 15 The outer perimeter of the circuit is set to be roughly the same as that of a square, but it can also be set to other shapes. For example, the outer perimeter of the circuit 36 ​​can also be set to be the same as that of a circle, ellipse, rectangle, or other polygons. In addition, in the transmission line transformer 200, the series circuit consisting of the first transmission line 21 and the second transmission line 22 extends in a counterclockwise direction, starting from the third end 21A, and the third transmission line 23 extends in a clockwise direction, but the rotation directions of the two can also be opposite.

[0142] In the transmission line transformer 200, the first transmission line 21, the second transmission line 22, and the third transmission line 23 are formed in a shape that rotates approximately one revolution along the peripheral circuit 36. However, the length of the portion of the first transmission line 21, the second transmission line 22, and the third transmission line 23 along the peripheral circuit 36 ​​may be shorter than one revolution. The number of turns T is defined in this specification as follows (…). Figure 17 , Figure 18 In this circuit, even if the length of the portion along the circumferential circuit 36 ​​is shorter than one circumference, the number of turns T can still be 1. To achieve sufficient electromagnetic coupling, it is preferable that the number of turns T of the first transmission line 21, the second transmission line 22, and the third transmission line 23 be 1 or more.

[0143] In the transmission line transformer 200, the widths of the conductor patterns constituting the first transmission line 21, the second transmission line 22, and the third transmission line 23 are approximately equal. Alternatively, the width of the conductor pattern in the third transmission line 23 can be greater than the widths of the conductor patterns in the first and second transmission lines 21 and 22, respectively. In this case, when viewed from above, the conductor patterns of the first and second transmission lines 21 and 22 are positioned inside the conductor pattern of the third transmission line 23 in the width direction of the conductor patterns. This configuration increases the capacitive coupling between the first and third transmission lines 21 and 23, as well as between the second and third transmission lines 22 and 23. Increasing the capacitive coupling reduces losses when induced with odd-mode currents in the third transmission line 23. As a result, improved insertion loss and an impedance switching ratio close to the theoretical switching ratio are achieved.

[0144] In the transmission line transformer 200, such as Figure 15 As shown, the lead-out line 24 is configured on a different layer than the second transmission line 22, and the second transmission line 22 and the second terminal 320 are connected via this lead-out line 24. However, the lead-out line 24 can also be configured on the same layer as the second transmission line 22. In this structure, the second transmission line 22 and the lead-out line 24 are formed with the same conductor pattern, so the sixth end 22B of the second transmission line 22 cannot be definitively determined. In this case, the portion of the second transmission line 22 that deviates from the peripheral circuit 36 ​​can be defined as the sixth end 22B.

[0145] In the transmission line transformer 200, such as Figure 15 As shown, the front end of the portion extending outward from the portion of the third transmission line 23 along the peripheral circuit 36 ​​is defined as the second end 23B. Figure 15 Alternatively, the end of the portion along the circumferential circuit 36 ​​can be defined as the second end 23B, and the portion extending from there to the grounding conductor 35 can be considered as part of the lead-out line.

[0146] Similarly, the end of the portion of the first transmission line 21 along the peripheral circuit 36 ​​can be defined as the fourth end 21B, and the portion extending from this point toward the inside of the peripheral circuit 36 ​​can be considered as wiring connecting the first transmission line 21 and the second transmission line 22. Likewise, the end of the portion of the second transmission line 22 along the peripheral circuit 36 ​​can be defined as the fifth end 22A, and the portion extending from this point toward the inside of the peripheral circuit 36 ​​can be considered as wiring connecting the first transmission line 21 and the second transmission line 22.

[0147] (Second harmonic termination circuit)

[0148] Reference can be used in the second harmonic terminating circuit 3. Figure 2 The series resonant circuit SC is described below. In this case, for example, in... Figure 2 In this circuit, the first terminal T1 is used as the third input terminal T31 of the higher harmonic terminating circuit 30, and the second terminal T2 is used as the third output terminal T30 of the higher harmonic terminating circuit 30. Multiple series resonant circuits SC can also be used. Additionally, a reference circuit can be used in the second harmonic terminating circuit 3. Figure 3 The parallel resonant circuit PC is described. In this case, for example, in... Figure 3 In this circuit, the first terminal T1 is used as the third input terminal T31 of the higher harmonic terminating circuit 30, and the second terminal T2 is used as the third output terminal T30 of the higher harmonic terminating circuit 30. Multiple parallel resonant circuits PC can also be used. Furthermore, the second harmonic terminating circuit 3 can use... Figure 19 The circuit shown. Figure 19 This is a diagram illustrating a structural example of the second harmonic termination circuit 3. Figure 19 The second harmonic terminal circuit 3 shown has a series resonant circuit SC1 formed by a capacitor Cnf01 and an inductor Lnf01 connected in series, and a parallel resonant circuit PC1 formed by a capacitor Cnf02 and an inductor Lnf02 connected in parallel. Figure 19 The second harmonic termination circuit 3 shown has a first terminal T1 and a second terminal T2 between the third input terminal T31 and the third output terminal T30. A series resonant circuit SC1 is provided between the first terminal T1 and the second terminal T2. One end of the series resonant circuit SC1 is connected to a reference potential, and the other end of the series resonant circuit SC1 is connected to both the first terminal T1 and the second terminal T2. One end of the parallel resonant circuit PC1 is connected to the third input terminal T31, and the other end of the parallel resonant circuit PC1 is connected to the third output terminal T30. Through the resonance of capacitor Cnf01 and inductor Lnf01 in the series resonant circuit SC1, and the resonance of capacitor Cnf02 and inductor Lnf02 in the parallel resonant circuit PC1, the second harmonic termination circuit 3 reflects at least a portion of the even and odd harmonics contained in the third high-frequency signal S3 input to the third input terminal T31.

[0149] (filter)

[0150] Figure 20 This is a diagram illustrating the structure of filter 4. Figure 20The filter 4 shown includes a unit filter circuit PC-1. The unit filter circuit PC-1 includes a parallel resonant circuit. The unit filter circuit PC-1 includes: a parallel resonant circuit comprising a capacitor CSR1 as a first capacitor and an inductor LSR1 as a first inductor, a first terminal T1, and a second terminal T2. The capacitor CSR1 as the first capacitor and the inductor LSR1 as the first inductor are connected in parallel between the first terminal T1 and the second terminal T2. Additionally, the unit filter circuit PC-1 includes: a second capacitor, CSH1, connected between the first terminal T1 and a reference potential, and a third capacitor, CSH2, connected between the second terminal T2 and the reference potential. Through the resonance of the capacitor CSR1 (first capacitor) and the inductor LSR1 (first inductor) included in the parallel resonant circuit, the unit filter circuit PC-1 attenuates at least a portion of the even and odd harmonics contained in the fifth high-frequency signal S5 input to the fourth input terminal T41 of the filter 4.

[0151] Filter 4 can also have a structure consisting of multiple cascaded unit filter circuits. Figure 21 This is a diagram representing filter 4, which includes N unit filter circuits PC-1, ..., PC-N. Figure 21 In this circuit, filter 4 comprises N cascaded unit filter circuits PC-1, ..., PC-N (N being a natural number). In each unit filter circuit PC-1, ..., PC-N, the output terminal of the preceding unit filter circuit is connected to the input terminal of the next stage unit filter circuit. The first terminal T1 of the primary unit filter circuit PC-1 is connected to the fourth input terminal T41. The second terminal T2 of the final unit filter circuit PC-N is connected to the fourth output terminal T40.

[0152] also, Figure 20 The structure of filter 4 is in Figure 21 This is equivalent to the case where "N=1". In the case where the unit filter circuit has one stage, i.e., "N=1", the primary unit filter circuit is the final stage unit filter circuit.

[0153] However, in two adjacent unit filter circuits, the third capacitor connected to the second terminal T2 of the preceding unit filter circuit and the first capacitor connected to the first terminal T1 of the following unit filter circuit can be combined into a single capacitor. In other words, a shared capacitor can be used in two adjacent unit filter circuits instead of separate capacitors.

[0154] Figure 22 This diagram illustrates the capacitors shared in two adjacent unit filter circuits. (Example) Figure 22As shown, the third capacitor connected to the second terminal T2 of the preceding unit filter circuit PC-1 and the first capacitor connected to the first terminal T1 of the subsequent unit filter circuit PC-2 can also be combined into a single capacitor CC. Similarly, when three unit filter circuits are cascaded (not shown), the third capacitor connected to the second terminal T2 of the preceding unit filter circuit and the first capacitor connected to the first terminal T1 of the subsequent unit filter circuit can also be combined into a single capacitor CC.

[0155] Figure 23 This is a diagram showing the other unit filter circuit PC'-1. Figure 23 The unit filter circuit PC'-1 shown includes a series resonant circuit. The unit filter circuit PC'-1 includes: a first terminal T1, a second terminal T2, a third terminal T3, an inductor LSR1 (as a first inductor), an inductor LSR2 (as a second inductor), and a series resonant circuit formed by connecting a capacitor CSH1 (as a first capacitor) and an inductor LSR3 (as a third inductor) in series. The first inductor LSR1 is connected between the first terminal T1 and the second terminal T2. The second inductor LSR2 is connected between the second terminal T2 and the third terminal T3. The first capacitor CSH1 and the third inductor LSR3 are connected between the second terminal T2 and a reference potential. Through the resonance of the capacitor CSH1 (as a first capacitor) and the third inductor LSR3 included in the series resonant circuit, the unit filter circuit PC'-1 attenuates at least a portion of the even and odd harmonics contained in the fifth high-frequency signal S5 input to the fourth input terminal T41 of the filter 4.

[0156] Filter 4 can also have a structure consisting of multiple cascaded unit filter circuits. Figure 24 This is a diagram representing filter 4, which includes N unit filter circuits PC'-1, ..., PC'-N. Figure 24 In this circuit, filter 4 comprises N cascaded unit filter circuits PC'-1, …, PC'-N (N is a natural number). In each unit filter circuit PC'-1, …, PC'-N, the output terminal of the preceding unit filter circuit is connected to the input terminal of the next stage unit filter circuit. The first terminal T1 of the primary unit filter circuit PC'-1 is connected to the fourth input terminal T41. The second terminal T2 of the final stage unit filter circuit PC'-N is connected to the fourth output terminal T40.

[0157] also, Figure 23 The structure of filter 4 is in Figure 24This is equivalent to the case where "N=1". In the case where the unit filter circuit has one stage, i.e., "N=1", the primary unit filter circuit is the final stage unit filter circuit.

[0158] However, in two adjacent unit filter circuits, the third inductor connected to the second terminal T2 of the preceding unit filter circuit and the first inductor connected to the first terminal T1 of the following unit filter circuit can be combined into a single inductor. In other words, a shared inductor can be used in two adjacent unit filter circuits instead of using separate inductors.

[0159] Figure 25 This diagram illustrates the inductor shared by two adjacent unit filter circuits. (Example) Figure 25 As shown, the third inductor connected to the second terminal T2 of the preceding unit filter circuit PC'-1 and the first inductor connected to the first terminal T1 of the subsequent unit filter circuit PC'-2 can also be combined into a single inductor LL. Similarly, when three unit filter circuits are cascaded (not shown), the third inductor connected to the second terminal T2 of the preceding unit filter circuit and the first inductor connected to the first terminal T1 of the subsequent unit filter circuit can also be combined into a single inductor LL.

[0160] Figure 26 The filter 4 shown is in Figure 22 In this circuit, the third capacitor connected to the second terminal T2 of the preceding unit filter circuit and the first capacitor connected to the first terminal T1 of the subsequent unit filter circuit are combined to form a single capacitor CSH2. Figure 26The filter 4 shown is positioned between the fourth input terminal T41 and the fourth output terminal T40. A first terminal T1 and a second terminal T2 exist between the fourth input terminal T41 and the fourth output terminal T40. The first terminal T1 is connected to the fourth input terminal T41. A parallel resonant circuit PC11 is positioned between the first terminal T1 and the second terminal T2. The parallel resonant circuit PC11 is a parallel resonant circuit formed by a capacitor CSR1 and an inductor LSR1 connected in parallel. A second terminal T2' exists between the fourth input terminal T41 and the fourth output terminal T40. The second terminal T2' is connected to the fourth output terminal T40. Parallel resonant circuits PC11 and PC12 are positioned between the first terminal T1 and the second terminal T2'. The parallel resonant circuit PC12 is a parallel resonant circuit formed by a capacitor CSR2 and an inductor LSR2 connected in parallel. Additionally, filter 4 includes: capacitor CSH2 connected between the connection point of parallel resonant circuits PC11 and PC12 and a reference potential; capacitor CSH1 connected between the first terminal T1 and the reference potential; and capacitor CSH3 connected between the second terminal T2' and the reference potential. In filter 4, the resonance of the capacitors and inductors included in parallel resonant circuits PC11 and PC12 attenuates at least a portion of the even and odd harmonics contained in the fifth high-frequency signal S5 input to the fourth input terminal T41. Figure 26 Filter 4 has two parallel resonant circuits, PC11 and PC12, but it can also have a single parallel resonant circuit, PC11. In this case, filter 4 has two capacitors, CSH1 and CSH2. Alternatively, filter 4 can have a series resonant circuit instead of a parallel resonant circuit.

[0161] Here, it is assumed that a second harmonic terminating circuit 3 for reflecting the second harmonic is set after the power amplifier circuit 1, and a first impedance matching circuit 2 is set after the second harmonic terminating circuit. In this circuit structure, the attenuation in the second harmonic terminating circuit 3 is large, the level of the reflected wave component becomes smaller, and good characteristics cannot be obtained in the signal input to the power amplifier circuit 1. Furthermore, the so-called second harmonic is a higher harmonic with a frequency twice that of the fundamental wave.

[0162] In contrast, Figure 5 In the circuit structure shown, a first impedance matching circuit 2 is set after the power amplifier circuit 1, and a second harmonic termination circuit 3 is set after it. Therefore, the level of the reflected wave component can be increased, resulting in good characteristics.

[0163] In addition, Figure 5In the first embodiment shown, a third harmonic terminating circuit (not shown) that reflects the third harmonic can also be provided after the second harmonic terminating circuit 3, so that the third harmonic coincides with the fundamental frequency, except for the second harmonic. If this is done, as... Figure 12 As shown in waveform P30, which is obtained by overlapping higher harmonics up to the third order, a waveform closer to a rectangular wave can be obtained, further reducing power loss. Furthermore, a terminal circuit reflecting even higher harmonics can be provided to overlap these higher harmonics. In this way, a waveform even closer to a rectangular wave can be obtained, further reducing power loss.

[0164] The higher the order of the harmonic, the lower the level. Therefore, in order to obtain a reflected wave component with a large amplitude, as mentioned above, it is preferable to set a first impedance matching circuit 2 after the power amplifier circuit 1, and a second harmonic termination circuit 3 after that.

[0165] (Summary of the first implementation method)

[0166] A first impedance matching circuit 2 is provided after the power amplifier circuit 1, and a second harmonic termination circuit 3 is provided after it. Thus, the component reflected by the second harmonic termination circuit 3 can be impedance-transformed by the first impedance matching circuit 2 with a small attenuation and input to the output stage of the power amplifier circuit 1.

[0167] (Second Implementation)

[0168] Figure 27 This is a diagram showing the structure of the power amplifier device 100B according to the second embodiment. (See diagram for example.) Figure 27 As shown, the power amplification device 100B according to the second embodiment includes a power amplification circuit 1, a first impedance matching circuit 2, and a second signal processing unit 34. Figure 27 In the power amplifier device 100B of the second embodiment shown, the overall Figure 5 The second signal processing unit 34 is formed by integrating the same integrated circuit that functions as the second harmonic termination circuit 3 and the filter 4 of the power amplifier 100A shown.

[0169] Figure 28 It means Figure 27 A diagram illustrating an example structure of the second signal processing unit 34. Figure 28 middle, Figure 28 The second signal processing unit 34 shown includes: a capacitor CSR1 and an inductor LSR1 connected in parallel, a capacitor CSR2 and an inductor LSR2 connected in parallel, a capacitor CSH2 connected between their connection point and a reference potential, a capacitor CSH1 and an inductor L2f01 connected in series between the input terminal and the reference potential, and a capacitor CSH3 connected between the output terminal and the reference potential.

[0170] In the second signal processing unit 34, the portion enclosed by the dashed line, namely the portion consisting of the capacitor CSR1 and inductor LSR1 connected in parallel, and the capacitor CSH1 and inductor L2f01 connected in series, has the same characteristics as the reference. Figure 19 The second harmonic termination circuit 3 described herein has the same function. Furthermore, in the second signal processing unit 34, the portion surrounded by the dashed line, excluding the inductor L2f01, has the same function as the referenced portion. Figure 26 The filter 4 described herein has the same function. Therefore, the second signal processing unit 34 has a reference. Figure 19 The functions of the second harmonic termination circuit 3 and the filter 4 will be explained. Capacitors CSR1 and CSH1, and inductor LSR1 are components of both the second harmonic termination circuit 3 and the filter 4. Since some components of the second harmonic termination circuit 3 and the filter 4 are identical, the circuit size of the second signal processing unit 34 can be reduced compared to having them installed separately.

[0171] (Third Implementation)

[0172] Figure 29 This is a diagram showing the structure of the power amplifier device 100C according to the third embodiment. (See diagram below.) Figure 29 As shown, the power amplifier device 100C according to the third embodiment includes: a power amplifier circuit 1, a first impedance matching circuit 2, a tunable second harmonic termination circuit 31, and a tunable filter 41.

[0173] Figure 30 This is a diagram illustrating a structural example of the tunable second harmonic termination circuit 31. Figure 30 The tunable second harmonic termination circuit 31 shown includes: a capacitor VCnf01 and an inductor VLnf01 connected in series between the input terminal RFInput and the reference potential; and a capacitor VCnf02 and an inductor VLnf02 connected in parallel between the input terminal RFInput and the output terminal RFOutput. The input terminal RFInput is equivalent to... Figure 29 The fourth input terminal T41. The output terminal RFOutput is equivalent to Figure 29The fourth output terminal T40 is used. Capacitor VCnf01 can change its capacitance. Inductor VLnf01 can change its inductance. Therefore, the resonant frequency of the series-connected capacitor VCnf01 and inductor VLnf01 can be set. Capacitor VCnf02 can change its capacitance. Inductor VLnf02 can change its inductance. Therefore, the resonant frequency of the parallel-connected capacitor VCnf02 and inductor VLnf02 can be set. Therefore, the tunable second harmonic termination circuit 31 has the function of adjusting the reflected frequency. The tunable second harmonic termination circuit 31 can adjust the reflected frequency, thus reflecting an appropriate second harmonic based on the fundamental frequency of the used frequency band (i.e., the frequency band). In other words, the tunable second harmonic termination circuit 31 can change the first phase or the second phase based on the frequency of the fundamental frequency.

[0174] Figure 31 This is a diagram illustrating a structural example of the tunable filter 41. Figure 31 The tunable filter 41 shown includes: a capacitor VCSR1 and an inductor LSR1 connected in parallel; a capacitor VCSR2 and an inductor LSR2 connected in parallel; a capacitor VCSH2 connected between their connection point and a reference potential; a capacitor VCSH1 connected between the input terminal RFInput and the reference potential; and a capacitor VCSH3 connected between the output terminal RFOutput and the reference potential. One end of the parallel capacitor VCSR1 and the inductor LSR1 is connected to the input terminal RFInput. One end of the parallel capacitor VCSR2 and the inductor LSR2 is connected to the output terminal RFOutput. The input terminal RFInput is equivalent to... Figure 29 The fourth input terminal T41. The output terminal RFOutput is equivalent to Figure 29 The fourth output terminal T40.

[0175] In the tunable filter 41, capacitors VCSR1, VCSR2, VCSH1, VCSH2, and VCSH3 have adjustable capacitance values. Therefore, the tunable filter 41 has the function of adjusting the attenuation frequency.

[0176] Figure 32 This diagram illustrates the function of the tunable filter 41. Figure 32 In the diagram, the horizontal axis represents frequency, and the vertical axis represents attenuation. Figure 32 The horizontal axis contains the fundamental frequency band f0 and the second harmonic frequency band 2f0. When the fundamental frequency is f01, its second harmonic is 2f01. When the fundamental frequency is f02, which is higher than f01, its second harmonic is 2f02.

[0177] Here, we consider the case where the attenuation characteristic FA is set by the tunable filter 41. If the fundamental frequency f01 is used, its second harmonic 2f01 is attenuated due to the set attenuation characteristic FA. When the fundamental frequency is changed to f02, its second harmonic 2f02 can also be attenuated due to the attenuation characteristic FA. However, when the fundamental frequency is f02, there is only slight attenuation in region FR due to the attenuation characteristic FA. Therefore, when the fundamental frequency is f02, attenuation based on the attenuation characteristic FA is not preferred.

[0178] Therefore, when using the fundamental frequency f02, the setting based on the tunable filter 41 is changed from the attenuation characteristic FA to the attenuation characteristic FB. According to the changed attenuation characteristic FB, no attenuation is achieved in the region FR, resulting in good characteristics. At this time, the second harmonic 2f02 is attenuated due to the attenuation characteristic FB. As described above, by using the tunable filter 41, the attenuation characteristic can be adjusted based on the fundamental frequency used. Therefore, appropriate attenuation characteristics can be obtained, resulting in good characteristics.

[0179] (Fourth Implementation)

[0180] Figure 33 This is a diagram showing the structure of the power amplifier device 100D according to the fourth embodiment. (See diagram for example.) Figure 33 As shown, the power amplifier device 100D according to the fourth embodiment includes a power amplifier circuit 1, a first impedance matching circuit 2, and a third signal processing unit 341. The third signal processing unit 341 has the functions of a tunable second harmonic termination circuit and a tunable filter.

[0181] Figure 34 It means Figure 33 A diagram illustrating the structure of the third signal processing unit 341. Figure 34 The third signal processing unit 341 shown includes: a capacitor VCSR1 and an inductor LSR1 connected in parallel; a capacitor VCSR2 and an inductor LSR2 connected in parallel; and a capacitor VCSH2 connected between their connection point and a reference potential. Additionally, the third signal processing unit 341 includes: a capacitor VCSH1 and an inductor L2f01 connected in series between the input terminal RFInput and the reference potential; and a capacitor VCSH3 connected between the output terminal RFOutput and the reference potential. One end of the parallel-connected capacitor VCSR1 and inductor LSR1 is connected to the input terminal RFInput. One end of the parallel-connected capacitor VCSR2 and inductor LSR2 is connected to the output terminal RFOutput. The input terminal RFInput is equivalent to... Figure 29 The fourth input terminal T41. The output terminal RFOutput is equivalent to Figure 29 The fourth output terminal T40.

[0182] In the third signal processing unit 341, the portion enclosed by the dashed line, namely the portion consisting of the capacitor VCR1 and inductor LSR1 connected in parallel, and the capacitor VCR1 and inductor L2f01 connected in series, has the same characteristics as the reference. Figure 30 The tunable second harmonic termination circuit 31 described herein has the same function. Furthermore, in the third signal processing unit 341, the portion surrounded by the dashed line has the same function as the referenced portion. Figure 31 The tunable filter 41 described herein has the same function. Therefore, the third signal processing unit 341 has a reference... Figure 30 and Figure 31 The functions of the tunable second harmonic termination circuit 31 and the tunable filter 41 are explained.

[0183] like Figure 34 As shown, in the third signal processing unit 341, capacitors VCSR1, VCSR2, VCSH1, VCSH2, and VCSH3 have adjustable capacitance values. Additionally, inductor L2f01 has adjustable inductance values. Capacitors VCSR1, VCSH1, and inductor LSR1 are components of the tunable second harmonic termination circuit 31 and also components of the tunable filter 41. Thus, since a portion of the components of the tunable second harmonic termination circuit 31 and the tunable filter 41 are identical, the circuit size of the third signal processing unit 341 can be reduced compared to having them installed separately.

[0184] (Fifth Implementation)

[0185] Figure 35 This is a diagram showing the structure of the power amplifier device 100E according to the fifth embodiment. (See diagram below.) Figure 35 As shown, the power amplifier device 100E according to the fifth embodiment includes: a power amplifier circuit 1, a first impedance matching circuit 2, a second signal processing unit 34, a bandwidth selection switch 5, and subsequent impedance matching circuits 61, 62, ..., 6. N (N is a natural number, and the same applies below), duplexers 71, 72, ..., 7 N Antenna switch 8 and antenna 9. Power amplifier circuit 1 is implemented as an integrated PAIC (Power Amplifier Integrated Circuit) 11. Band selection switch 5 has fifth input terminals T511, T512, ..., T51 N and the fifth output terminals T501, T502, ..., T50 N The subsequent impedance matching circuits 61, 62, ..., 6 serve as the subsequent stages of multiple second impedance matching circuits. NEach of the multiple fifth output terminals T50 corresponding to the frequency band selection switch 5 has a sixth input terminal T611, T612, ..., T61. N and the sixth output terminals T601, T602, ..., T60 N .

[0186] The second signal processing unit 34 is with Figure 27 The power amplifier device 100B of the second embodiment shown has the same structure. That is, the second signal processing unit 34 has Figure 5 The functions of the second harmonic termination circuit 3 and the filter 4 of the power amplifier 100A shown are illustrated. (Refer to...) Figure 28 As explained above, the second harmonic termination circuit 3 and the filter 4 constituting the second signal processing unit 34 share some of the same constituent elements. Therefore, compared to the case where they are installed separately, the circuit size of the second signal processing unit 34 can be reduced.

[0187] Frequency band selection switch 5 selects the subsequent impedance matching circuits 61, 62, ..., 6 based on the frequency band specified by the signal (not shown). N The appropriate circuitry. The subsequent impedance matching circuits 61, 62, ..., 6 selected by the band selection switch 5. N Impedance matching is performed on the output of the second signal processing unit 34. Subsequent impedance matching circuits 61, 62, ..., 6 N It is an impedance matching circuit that is set on the signal output side, i.e. the subsequent stage side, which is closer to the first impedance matching circuit 2.

[0188] duplexers 71, 72, ..., 7 N Each is connected to multiple subsequent impedance matching circuits 61, 62, ..., 6. N Correspondingly, each has a seventh input terminal T711, T712, ..., T71 N and the seventh output terminals T701, T702, ..., T70 N Input / output terminals T721, T722, ..., T72 N Duplexers 71, 72, ..., 7 N With subsequent impedance matching circuits 61, 62, ..., 6 N Correspondingly configured. Duplexers 71, 72, ..., 7 N This includes filters that use the transmitted signal's frequency band as the passband and filters that use the received signal's frequency band as the passband. Antenna switch 8 selects duplexers 71, 72, ..., 7. N Antenna switch 8 connects duplexers 71, 72, ..., 7 N The selected duplexer is electrically connected to antenna 9.

[0189] The seventh high-frequency signal S7 originates from the corresponding subsequent impedance matching circuits 61, 62, ..., 6. N Input to the seventh input terminal T711, T712, ..., T71 N Duplexers 71, 72, ..., 7 N From input / output terminals T721, T722, ..., T72 N The eighth high-frequency signal S8 is output. This eighth high-frequency signal S8 is transmitted from antenna 9 via antenna switch 8. Additionally, the signal received from antenna 9, i.e., the ninth high-frequency signal S9, is input to duplexers 71, 72, ..., 7. N Input / output terminals T721, T722, ..., T72 N Duplexers 71, 72, ..., 7 N Based on the frequency of the ninth high-frequency signal S9, from the seventh output terminals T701, T702, ..., T70 N The tenth high-frequency signal S10 is output. The tenth high-frequency signal S10 is input as signals Rx1, Rx2, ..., RxN to a receiving circuit (not shown).

[0190] In the power amplifier device 100E with the above structure, the signal output from the power amplifier circuit 1 is input to the first impedance matching circuit 2 for impedance matching. For the fundamental frequency, it is input to the subsequent impedance matching circuit selected by the frequency band selection switch 5 via the second signal processing unit 34 for impedance matching. Then, the fundamental frequency is transmitted from the antenna 9 via the duplexer and antenna switch 8 corresponding to the subsequent impedance matching circuit. In other words, the signal corresponding to the high-frequency input signal is transmitted.

[0191] On the other hand, the second harmonic is reflected in the second signal processing unit 34. The reflected wave component is input to the power amplifier circuit 1 via the first impedance matching circuit 2. In the power amplifier circuit 1, the traveling wave component and the reflected wave component are superimposed, and the superimposed signal is amplified in a switching mode. As described above, for the second harmonic, the amplitude of the composite wave formed by superimposing the traveling wave component and the reflected wave component is zero, so even if the composite wave is input to the output of the power amplifier circuit 1, it will not affect the fundamental frequency.

[0192] In addition, duplexers 71, 72, ..., 7 N The antenna is selected by antenna switch 8. The signal received in antenna 9 is input to duplexers 71, 72, ..., 7 via antenna switch 8. N The selected duplexer. Additionally, duplexers 71, 72, ..., 7 N The received signals are output as signals Rx1, Rx2, ..., RxN to a receiving circuit (not shown).

[0193] (Sixth Implementation Method)

[0194] Figure 36 This is a diagram showing the structure of the power amplifier device 100F according to the sixth embodiment. (See diagram below.) Figure 36 As shown, the power amplifier device 100F according to the sixth embodiment is based on... Figure 35 In the power amplifier device 100E described in the fifth embodiment, a second harmonic termination circuit 3 and a filter 4 are provided instead of the second signal processing unit 34. The other structures of the power amplifier device 100F are the same as those described above. Figure 35 The power amplifier device 100E described in the fifth embodiment is the same.

[0195] (Seventh Implementation)

[0196] Figure 37 This is a diagram showing the structure of the power amplifier device 100G according to the seventh embodiment. (See diagram below.) Figure 37 As shown, the power amplifier device 100G according to the seventh embodiment is based on... Figure 35 In the power amplifier device 100E described in the fifth embodiment, a third signal processing unit 341 is provided instead of the second signal processing unit 34, and a frequency band selection switch 51 is provided instead of the frequency band selection switch 5. Other structures of the power amplifier device 100G are the same as those described above. Figure 35 The power amplifier device 100E described in the fifth embodiment is the same.

[0197] Figure 38 This is a diagram showing an example of the structure of power amplifier circuit 1. In Figure 38 In this circuit, power amplifier circuit 1 is implemented by PAIC11.

[0198] The power amplifier circuit 1 includes transistor Q1, matching circuit MN1, bias circuit B1, capacitor C1, and resistor R10. The emitter of transistor Q1 is grounded, forming an emitter-grounded circuit.

[0199] The input signal to the input terminal Pain is applied to the base of transistor Q1 via the matching circuit MN1 and capacitor C1. Capacitor C1 functions as a DC cutoff capacitor. The signal after passing through capacitor C1 is supplied to the base of transistor Q1.

[0200] The bias circuit B1 is connected to the power supply voltage terminal VBATT and the control terminal PActrl1. Resistor R10 functions as a bias resistor to provide bias voltage (i.e., bias current or bias voltage) to the base of transistor Q1.

[0201] The collector of transistor Q1 is connected to the driver output terminal DRVout. A bias voltage Bias1 is applied to the driver output terminal DRVout. The bias voltage Bias1 is applied to the driver output terminal DRVout through a filter consisting of inductor LRFC1 and capacitor CB1.

[0202] Additionally, power amplifier circuit 1 includes transistor Q2, matching circuit MN2, bias circuit B2, capacitor C2, and resistor R20. The emitter of transistor Q2 is grounded, forming an emitter-grounded circuit.

[0203] The signal output from the collector of transistor Q1 is applied to the base of transistor Q2 via matching circuit MN2 and capacitor C2. Capacitor C2 functions as a DC cutoff capacitor. The signal after passing through capacitor C2 is then supplied to the base of transistor Q2.

[0204] The bias circuit B2 is connected to the power supply voltage terminal VBATT and the control terminal PActrl2. Resistor R20 functions as a bias resistor to provide bias voltage (i.e., bias current or bias voltage) to the base of transistor Q2.

[0205] The collector of transistor Q2 is connected to the output terminal PWRout. The output of the output terminal PWRout becomes the input to the input terminal IMin of the first impedance matching circuit 2. The structure and function of the first impedance matching circuit 2 are as follows: Figure 13 As explained above, the output terminal IMout of the first impedance matching circuit 2 is connected to the input terminal of the third signal processing unit 341.

[0206] In this disclosure, each transistor Q1 and Q2 is a bipolar transistor, but this disclosure is not limited thereto. A bipolar transistor has an emitter as a first terminal, a collector as a second terminal, and a base as a third terminal. An example of a bipolar transistor is a heterojunction bipolar transistor (HBT), but this disclosure is not limited thereto. Each transistor Q1 and Q2 can also be a field-effect transistor (FET), for example. In this case, the emitter is replaced with the source, the collector with the drain, and the base with the gate. Therefore, the first terminal can also be called the emitter or source, the second terminal can also be called the collector or drain, and the third terminal can also be called the base or gate. Each transistor Q1 and Q2 can also be a multifinite transistor consisting of multiple unit transistors (also called fingers) electrically connected in parallel. A unit transistor refers to the minimum structural design required to constitute a transistor.

[0207] Figure 39 It means Figure 37 A diagram illustrating the structure of the third signal processing unit 341. Figure 39 This also illustrates a structural example of the frequency band selection switch 51. Figure 39 In this embodiment, the third signal processing unit 341 includes: capacitor element groups GCSH1, GCSR1, GCSH2, GCSR2, and GCSH3, each composed of multiple capacitors; an inductor element group GL2f01; and inductors LSR1 and LSR2. Each capacitor element group GCSH1, GCSR1, GCSH2, GCSR2, and GCSH3 is composed of multiple capacitors having different capacitance values. The inductor element group GL2f01 is composed of inductors having different inductance values.

[0208] The frequency band selection switch 51 includes: switches SW1, ..., SW6 for selecting each element group in the third signal processing unit 341, switch SW7 for selecting output terminals BSSout1, BSSout2, BSSout3, ..., BSSoutN, and control circuit SWC for controlling the state of each switch SW1, ..., SW7.

[0209] The control circuit SWC includes, for example, at least one decoder and a switch controller. The control circuit SWC controls the state of each switch SW1, ..., SW7 based on control signals input to the control terminals BSSctrl1, BSSctrl2, BSSctrl3, ..., BSSctrlN. The control signals input to the control terminals BSSctrl1, BSSctrl2, BSSctrl3, ..., BSSctrlN are signals corresponding to the frequency band used. Therefore, the control circuit SWC controls the state of each switch SW1, ..., SW7 based on the frequency band used.

[0210] The operation of the third signal processing unit 341 and the frequency band selection switch 51 configured as described herein will be explained. The capacitor selected by switch SW1 in capacitor group GCSH1 and the inductor selected by switch SW2 in inductor group GL2f01 are connected in series. The capacitor selected by switch SW3 and inductor LSR1 in capacitor group GCSR1 are connected in parallel. One end of the capacitor selected by switch SW4 in capacitor group GCSH2 is connected to a reference potential. The capacitor selected by switch SW5 and inductor LSR2 in capacitor group GCSR2 are connected in parallel. One end of the capacitor selected by switch SW6 in capacitor group GCSH3 is connected to a reference potential. Thus, by selecting switches SW1 to SW6, the third signal processing unit 341 can perform the function of terminating second harmonics and acting as a filter. Furthermore, in this disclosure, switch SW2 is equivalent to the first switch, and switches SW1, SW3 to SW6 are equivalent to the second switches.

[0211] The input terminal BSSin is electrically connected to the output terminals selected by switch SW7 among the output terminals BSSout1, BSSout2, BSSout3, ..., BSSoutN. The input terminal BSSin is also connected to the output terminal HIout of the third signal processing unit 341. Therefore, the output signal of the third signal processing unit 341 is output to the subsequent impedance matching circuits 61, 62, ..., 6... N The impedance matching circuit is selected by the frequency band selection switch 51.

[0212] (Eighth Implementation Method)

[0213] Figure 40 This is a diagram showing the structure of the power amplifier device 100H according to the eighth embodiment. (See diagram below.) Figure 40 As shown, the power amplifier device 100H according to the eighth embodiment is based on... Figure 37 In the power amplifier device 100G of the seventh embodiment described herein, a tunable second harmonic termination circuit 31 and a tunable filter 41 are provided instead of the third signal processing unit 341. Control signals output from the band selection switch 5 are respectively input to the tunable second harmonic termination circuit 31 and the tunable filter 41. Other structures are similar to those described above. Figures 37-39 The power amplifier device 100G described in the seventh embodiment is the same.

[0214] (Ninth Implementation)

[0215] Figure 41This is a diagram showing the structure of the power amplifier device 100I according to the ninth embodiment. (See diagram below.) Figure 41 As shown, the power amplifier device 100I according to the ninth embodiment is based on the reference Figure 35 In the power amplifier device 100E of the fifth embodiment described herein, a fourth signal processing unit 341A is housed within the frequency band selection switch 52. The fourth signal processing unit 341A functions as a tunable second harmonic termination circuit and a tunable filter. Other structures of the power amplifier device 100E are similar to those described above. Figure 35 The power amplifier device 100E of the fifth embodiment described herein is the same. The fourth signal processing unit 341A is installed within the frequency band selection switch 52, thereby being similar to... Figure 35 Compared to the power amplifier 100E, the power amplifier 100I can be made smaller.

[0216] Figure 42 It means Figure 41 This diagram illustrates a structural example of the fourth signal processing unit 341A in the power amplifier device 100I of the ninth embodiment. (See diagram below.) Figure 42 As shown, the fourth signal processing unit 341A is installed inside the frequency band selection switch 52.

[0217] Fourth signal processing unit 341A and reference Figure 39 The third signal processing unit 341, as described herein, also includes capacitor element groups GCSH1, CSR1, CSH2, CSR2, and CSH3, each composed of multiple capacitors, an inductor element group GL2f01, an inductor LSR1, and an inductor LSR2. Each capacitor element group GCSH1, CSR1, CSH2, CSR2, and CSH3 is composed of multiple capacitors having different capacitance values. The inductor element group GL2f01 is composed of inductors having different inductance values. Furthermore, the fourth signal processing unit 341A includes switches SW1, ..., SW6 for selecting each element group. The output terminal MIout of the first impedance matching circuit 2 is connected to the input terminal HIin of the fourth signal processing unit 341A.

[0218] The frequency band selection switch 52 includes: a switch SW7 for selecting output terminals BSSout1, BSSout2, BSSout3, ..., BSSoutN; and a control circuit SWC for controlling the state of each switch SW1, ..., SW7. The fourth signal processing unit 341A and the operation and reference of the frequency band selection switch 52 are also included. Figure 39 The operation of the third signal processing unit 341 and the frequency band selection switch 51 described herein is the same.

[0219] (Tenth Implementation)

[0220] Figure 43This is a diagram showing the structure of the power amplifier device 100J according to the tenth embodiment. (See diagram below.) Figure 43 As shown, the power amplifier device 100J according to the tenth embodiment is based on... Figure 37 In the power amplifier device 100G of the seventh embodiment described herein, the first impedance matching circuit 2 and the fourth signal processing unit 341A are housed within the band selection switch 53. Other structures of the power amplifier device 100G are similar to those described above. Figure 37 The power amplifier device 100G of the seventh embodiment described herein is the same. The first impedance matching circuit 2 and the fourth signal processing unit 341A are integrated into the bandwidth selection switch 53, thereby achieving the same functionality as... Figure 35 Compared to the power amplifier 100E, the power amplifier 100J can be made smaller.

[0221] Figure 44 It means Figure 43 This diagram illustrates a structural example of the first impedance matching circuit 2 and the fourth signal processing unit 341A in the power amplifier device 100J of the tenth embodiment. Figure 44 As shown, the first impedance matching circuit 2 and the fourth signal processing unit 341A are disposed within the frequency band selection switch 53. In this example, the inductor LRFC2 and the capacitor CB2, which are part of the first impedance matching circuit 2, are disposed outside the frequency band selection switch 53. The inductor LRFC2 and the capacitor CB2 may also be disposed within the frequency band selection switch 53.

[0222] The structure and function of the first impedance matching circuit 2 are as follows: Figure 13 As explained above, the output terminal IMout of the first impedance matching circuit 2 is connected to the input terminal HIin of the third signal processing unit 341.

[0223] Operation and reference of the fourth signal processing unit 341A Figure 39 The operation of the third signal processing unit 341 described herein is the same. The operation of the frequency band selection switch 53 is the same as that described above. Figure 39 The operation of the frequency band selection switch 51 described herein is the same.

[0224] (Eleventh Implementation Method)

[0225] Figure 45 This is a diagram showing the structure of the power amplifier device 100K according to the eleventh embodiment. (See diagram below.) Figure 45 As shown, the power amplifier device 100K according to the eleventh embodiment is based on... Figure 35In the power amplifier device 100E of the fifth embodiment described herein, the first impedance matching circuit 2 and the power amplifier circuit 1 are implemented together as PAIC 12. That is, the power amplifier circuit 1 and the first impedance matching circuit 2 are housed in the same integrated circuit. Other structures of the power amplifier device 100K are similar to those described above. Figure 35 The power amplifier device 100E described in the fifth embodiment is the same.

[0226] In the power amplification device 100K of the eleventh embodiment, the power amplification circuit 1 and the first impedance matching circuit 2 are housed in the same integrated circuit, namely PAIC 12. As a result, the power loss caused by the transmission path between the first impedance matching circuit 2 and the power amplification circuit 1 is eliminated, and the amplitude of the reflected wave component can be maintained to a greater extent.

[0227] (Twelfth Implementation)

[0228] Figure 46 This is a diagram showing the structure of the power amplifier device 100L according to the twelfth embodiment. (See diagram below.) Figure 46 As shown, the power amplifier device 100L according to the twelfth embodiment is based on the reference Figure 41 In the power amplifier device 100I of the ninth embodiment described herein, the first impedance matching circuit 2 and the power amplifier circuit 1 are implemented together as PAIC 12. Other structures of the power amplifier device 100L are the same as those described above. Figure 41 The power amplifier device 100I described in the ninth embodiment is the same.

[0229] In the power amplification device 100L of the twelfth embodiment, the power amplification circuit 1 and the first impedance matching circuit 2 are housed in the same integrated circuit, namely PAIC 12. As a result, the power loss caused by the transmission path between the first impedance matching circuit 2 and the power amplification circuit 1 is eliminated, and the amplitude of the reflected wave component can be maintained to a greater extent.

[0230] (Thirteenth Implementation Method)

[0231] Figure 47 This is a diagram showing the structure of the power amplifier device 100M according to the thirteenth embodiment. (See diagram for example.) Figure 47 As shown, the power amplifier device 100M according to the thirteenth embodiment is based on... Figure 36 In the power amplifier device 100F of the sixth embodiment described herein, the first impedance matching circuit 2 and the power amplifier circuit 1 are implemented together as PAIC 12, and the third signal processing unit 341 is provided within the frequency band selection switch 52. Other structures of the power amplifier device 100M are similar to those described above. Figure 36 The power amplifier device 100F of the sixth embodiment described herein is the same.

[0232] In the power amplification device 100M of the thirteenth embodiment, the power amplification circuit 1 and the first impedance matching circuit 2 are housed in the same integrated circuit, namely PAIC 12. As a result, the power loss caused by the transmission path between the first impedance matching circuit 2 and the power amplification circuit 1 is eliminated, and the amplitude of the reflected wave component can be maintained to a greater extent.

[0233] Furthermore, in the power amplifier device 100M of the thirteenth embodiment, the third signal processing unit 341 is installed inside the frequency band selection switch 52, thereby interacting with... Figure 35 Compared to the power amplifier 100E, the power amplifier 100M can be made smaller.

[0234] (Fourteenth Implementation)

[0235] Figure 48 This is a diagram showing the structure of the power amplifier device 100N according to the fourteenth embodiment. (See diagram below.) Figure 48 As shown, the power amplifier device 100N according to the fourteenth embodiment is based on... Figure 35 In the fifth embodiment of the power amplifier device 100E described herein, the first impedance matching circuit 2 and the second signal processing unit 34 are implemented together with the power amplifier circuit 1 as PAIC 13. Other structures of the power amplifier device 100N are similar to those described above. Figure 35 The power amplifier device 100E described in the fifth embodiment is the same.

[0236] In the power amplification device 100N of the fourteenth embodiment, the power amplification circuit 1, the first impedance matching circuit 2, and the second signal processing unit 34 are housed in the same integrated circuit, namely PAIC 13. As a result, the power loss caused by the transmission path between the first impedance matching circuit 2 and the power amplification circuit 1, as well as the power loss caused by the transmission path between the second signal processing unit 34 and the first impedance matching circuit 2, is eliminated, and the amplitude of the reflected wave component can be maintained to a greater extent.

[0237] (Fifteenth Implementation)

[0238] Figure 49 This is a diagram showing the structure of the power amplifier device 100O according to the fifteenth embodiment. (See diagram below.) Figure 49 As shown, the power amplifier device 100O according to the fifteenth embodiment is based on the reference... Figure 35 In the power amplifier device 100E of the fifth embodiment described herein, the first impedance matching circuit 2 and the third signal processing unit 341 are implemented together with the power amplifier circuit 1 as PAIC 14. Other structures of the power amplifier device 100O are similar to those described above. Figure 35The power amplifier device 100E described in the fifth embodiment is the same.

[0239] In the power amplification device 100O of the fifteenth embodiment, the power amplification circuit 1, the first impedance matching circuit 2, and the third signal processing unit 341 are housed in the same integrated circuit, namely PAIC 14. As a result, the power loss generated by the transmission path between the first impedance matching circuit 2 and the power amplification circuit 1, and the power loss generated by the transmission path between the third signal processing unit 341 and the first impedance matching circuit 2, are eliminated, and the amplitude of the reflected wave component can be largely maintained.

[0240] (Sixteenth Implementation)

[0241] Figure 50 This is a diagram showing the structure of the power amplifier device 100P according to the sixteenth embodiment. (See diagram below.) Figure 50 As shown, the power amplifier 100P according to the sixteenth embodiment is a reference... Figure 35 The functions of the second signal processing unit 34 of the power amplifier device 100E described in the fifth embodiment are provided in the fifth signal processing units 611, 612, ..., 61 N The structure of the power amplifier 100P is similar to that of the reference. Figure 35 The power amplifier device 100E described in the fifth embodiment is the same.

[0242] Fifth signal processing units 611, 612, ..., 61 N It functions as a second harmonic termination circuit, a filter, and an impedance matching circuit, thus keeping costs lower compared to setting these functions separately.

[0243] (Seventeenth Implementation)

[0244] Figure 51 This is a diagram showing the structure of the power amplifier device 100Q according to the seventeenth embodiment. (See diagram below.) Figure 51 As shown, the power amplifier device 100Q according to the seventeenth embodiment is based on... Figure 50 In the power amplifier device 100P described in the sixteenth embodiment, the first impedance matching circuit 2 and the power amplifier circuit 1 are implemented together as PAIC 12. Other structures of the power amplifier device 100Q are similar to those described above. Figure 50 The power amplifier device 100P described herein is the same as that in the sixteenth embodiment.

[0245] In the power amplification device 100Q according to the seventeenth embodiment, the power amplification circuit 1 and the first impedance matching circuit 2 are housed in the same integrated circuit, namely PAIC 12. As a result, the power loss caused by the transmission path between the first impedance matching circuit 2 and the power amplification circuit 1 is eliminated, and the amplitude of the reflected wave component can be maintained to a greater extent.

[0246] In addition, the fifth signal processing units 611, 612, ..., 61 N It functions as a second harmonic termination circuit, a filter, and an impedance matching circuit, thus keeping costs lower compared to setting these functions separately.

[0247] (Eighteenth Implementation)

[0248] Figure 52 This is a diagram showing the structure of the power amplifier device 100R according to the eighteenth embodiment. (See diagram below.) Figure 52 As shown, the power amplifier device 100R according to the eighteenth embodiment is based on... Figure 50 In the power amplifier device 100P described in the sixteenth embodiment, the first impedance matching circuit 2 is incorporated within the bandwidth selection switch 54. Other structures of the power amplifier device 100R are similar to those described above. Figure 50 The power amplifier device 100P described herein is the same as that in the sixteenth embodiment.

[0249] The first impedance matching circuit 2 is set inside the frequency band selection switch 54, thereby connecting with... Figure 35 Compared to the power amplifier 100E, the power amplifier 100R can be made smaller.

[0250] In addition, the fifth signal processing units 611, 612, ..., 61 N It has the functions of a second harmonic termination circuit, a filter, and an impedance matching circuit, thus keeping costs lower compared to setting these functions separately.

[0251] (Nineteenth Implementation)

[0252] Figure 53 This is a diagram showing the structure of the power amplifier device 100S according to the nineteenth embodiment. (See diagram below.) Figure 53 As shown, the power amplifier device 100S according to the nineteenth embodiment is based on reference Figure 36 In the power amplifier device 100F of the sixth embodiment described herein, a sixth signal processing unit 621, 622, ..., 623 is provided, which functions as a second harmonic termination circuit 3. N The seventh signal processing units 711, 712, ..., 71, which have the functions of filter 4 and duplexer, NThe structure of the power amplifier 100S. Other structures and references. Figure 36 The power amplifier device 100F of the sixth embodiment described herein is the same. The seventh signal processing units 711, 712, ..., 713, which have a duplexer function, are also included. N The internal filter is set up to be compatible with... Figure 35 Compared to the power amplifier 100E, the power amplifier 100S can be made smaller.

[0253] In addition, the sixth signal processing units 621, 622, ..., 62 N It functions as a second harmonic terminating circuit and an impedance matching circuit, which can keep costs lower compared to setting these functions separately.

[0254] (Twentieth Implementation)

[0255] Figure 54 This is a diagram showing the structure of the power amplifier device 100T according to the twentieth embodiment. (See diagram below.) Figure 54 As shown, the power amplifier device 100T according to the twentieth embodiment is based on... Figure 53 In the power amplifier device 100S of the nineteenth embodiment described herein, the first impedance matching circuit 2 and the power amplifier circuit 1 are implemented together as PAIC 12. Other structures of the power amplifier device 100T are similar to those described above. Figure 53 The power amplifier device 100S described in the nineteenth embodiment is the same. The seventh signal processing units 711, 712, ..., 71, which have a duplexer function, are also included. N The internal filter is set up to be compatible with... Figure 35 Compared to the power amplifier 100E, the power amplifier 100T can be made smaller.

[0256] In the power amplification device 100T of the twentieth embodiment, the power amplification circuit 1 and the first impedance matching circuit 2 are housed in the same integrated circuit, namely PAIC 12. As a result, the power loss caused by the transmission path between the first impedance matching circuit 2 and the power amplification circuit 1 is eliminated, and the amplitude of the reflected wave component can be maintained to a greater extent.

[0257] (Twenty-first implementation method)

[0258] Figure 55 This is a diagram showing the structure of the power amplifier device 100U according to the twenty-first embodiment. (See diagram below.) Figure 55 As shown, the power amplifier device 100U according to the twenty-first embodiment is based on... Figure 53In the power amplifier device 100S of the nineteenth embodiment described herein, the first impedance matching circuit 2 is incorporated within the frequency band selection switch 55. Other structures of the power amplifier device 100S are similar to those described above. Figure 53 The power amplifier device 100S described in the nineteenth embodiment is the same. The seventh signal processing units 711, 712, ..., 71, which have a duplexer function, are also included. N The internal filter is set up to be compatible with... Figure 35 Compared to the power amplifier 100E, the power amplifier 100U can be made smaller.

[0259] (Modified Example)

[0260] In the above embodiments, at the first output terminal of the power amplifier circuit 1, the reflected wave component of the second harmonic, which is an even harmonic, is made to coincide with the traveling wave component of the second harmonic as being in opposite phase. However, instead, the third harmonic, which is an odd harmonic, can also be reflected. In this case, at the first output terminal of the power amplifier circuit 1, the reflected wave component of the third harmonic is made to coincide with the traveling wave component of the third harmonic as being in phase. It is also possible to limit it to the third harmonic and make the reflection of higher-order odd harmonics coincide with the traveling wave component as being in phase. That is, at least the odd harmonics containing the third harmonic relative to the fundamental wave can be reflected by the higher-order harmonic terminating circuit, and the reflected wave component of the odd harmonics reflected by the higher-order harmonic terminating circuit can be input to the output terminal of the power amplifier circuit 1 as being in phase, i.e., not canceling each other out. Furthermore, if it is a non-canceling phase, the phase difference may not be zero (i.e., in phase). For example, even if there is a small phase difference between the traveling wave component and the reflected wave component, the combined wave of the two can increase the amplitude of the fundamental wave.

[0261] Furthermore, the reflection of the second harmonic, which is an even harmonic, can be made to coincide with the traveling wave component in opposite phase, and the reflection of the third harmonic, which is an odd harmonic, can be made to coincide with the traveling wave component in phase. In other words, through a higher harmonic terminating circuit, at least the reflection of the even harmonic containing the second harmonic of the fundamental wave can be made to coincide with the traveling wave component in opposite phase, and the reflection of the odd harmonic containing the third harmonic of the fundamental wave can be made to coincide with the traveling wave component in phase.

[0262] Alternatively, some or all of the components of the aforementioned power amplifier devices can be implemented as surface mount devices (SMDs). For example, the first impedance matching circuit, the band selection switch, and the subsequent impedance matching circuit can also be implemented as surface mount devices. Alternatively, some or all of the components of the aforementioned power amplifier devices can be implemented using integrated circuits. For example, the band selection switch, duplexer, and antenna switch can also be implemented using integrated circuits.

[0263] (A variation for miniaturization)

[0264] The following describes the structure used to make the power amplifier device smaller. Figure 56 This is a diagram showing the structure of the power amplifier 100V according to the twenty-second embodiment. (See diagram for example.) Figure 56 As shown, the power amplifier device 100V according to the twenty-second embodiment includes a band selection switch 52A and a PAIC 11. The integrated circuit constituting the band selection switch 52A includes a first impedance matching circuit 2, a tunable second harmonic termination circuit 31, and a tunable filter 41. The electrical connection states of PAIC 11, the first impedance matching circuit 2, the tunable second harmonic termination circuit 31, and the tunable filter 41 are compared with reference to... Figure 41 The power amplifier device 100I described in the ninth embodiment is the same.

[0265] An integrated PAIC11 is mounted on the integrated circuit constituting the band selection switch 52A. The PAIC11 is manufactured using a different semiconductor process than the integrated circuit constituting the band selection switch 52A.

[0266] Furthermore, the integrated circuit constituting the band selection switch 52A may also include multiple first impedance matching circuits 2. The integrated circuit constituting the band selection switch 52A may also include multiple tunable second harmonic termination circuits 31. The integrated circuit constituting the band selection switch 52A may also include multiple tunable filters 41.

[0267] Next, for Figure 56 An example of implementing the 100V power amplifier shown will be explained. Figures 57A to 61 This is a diagram representing an implementation example of module 1111, which includes equivalent to Figure 56 The circuit element 103 of the power amplifier device 100V shown.

[0268] Figure 57A This is a top view of module 1111. Figure 57B yes Figure 57A A cross-sectional view of part XX. The module 1111 includes: a module substrate 190 having module substrate side electrodes 191 and 192 for component mounting; a first component 110 constituting a first circuit; a second component 120 constituting a second circuit; and molding resin 1100. The module substrate 190 is, for example, a PCB (Printed Circuit Board) made of glass or an epoxy-based substrate. The molding resin 1100 is, for example, an epoxy-based resin.

[0269] The first circuit includes, for example, the aforementioned band selection switch 52A, first impedance matching circuit 2, tunable second harmonic termination circuit 31, and tunable filter 41. This first circuit, including these components, is formed in the first component 110. The second circuit is, for example, the aforementioned PAIC 11. PAIC 11 is formed in the second component 120. The second component 120 is mounted on the first component 110, and the first component 110 is flip-chip bonded (mounted downwards) to the module substrate 190. Furthermore, a bias circuit may also be included. The bias circuit is formed in either the first component 110 or the second component 120.

[0270] The first component 110 and the second component 120 have inter-circuit connection wiring that electrically connects the circuits formed in the first component 110 and the circuits formed in the second component 120 without passing through the module substrate 190.

[0271] The first component 110 has a first component side electrode 112 and a first conductor post bump PB1, and the second component 120 has a second component side electrode 122 and a second conductor post bump PB2.

[0272] The first conductor post bump PB1 is composed of a conductor post 113 formed on the first component side electrode 112 of the first component 110 and a solder layer 114 applied to the front end of the conductor post 113. The second conductor post bump PB2 is composed of a conductor post 123 formed on the second component side electrode 122 of the second component 120 and a solder layer 124 applied to the front end of the conductor post 123. The conductor posts 113 and 123 are, for example, Cu-plated films, and the solder layers 114 and 124 are, for example, SnAg alloy films.

[0273] The first circuit formed on the first component 110 and the second circuit formed on the second component 120 are face-to-face with the electrode formation of the module substrate 190.

[0274] Module substrate side electrodes 191 and 192 are formed on the module substrate 190. The first conductor post bump PB1 of the first component 110 is connected to the module substrate side electrode 191 of the module substrate 190. In addition, the second conductor post bump PB2 of the second component 120 is connected to the module substrate side electrode 192 of the module substrate 190.

[0275] In this way, the first circuit formed in the first component 110 and the second circuit formed in the second component 120 are face-to-face with the electrodes of the module substrate 190, and are connected to the module substrate-side electrodes 191 and 192 of the module substrate 190 via the first conductor post bump PB1 and the second conductor post bump PB2, thereby minimizing the paths of the first circuit and the circuit on the module substrate 190 side, and the paths of the second circuit and the circuit on the module substrate 190 side, respectively. Therefore, the degradation of electrical characteristics in the signal path is suppressed.

[0276] After the power amplifier module (i.e. circuit element 103) including the first component 110 and the second component 120 is mounted on the module substrate 190, the surface of the module substrate 190 is molded with molding resin 1100.

[0277] Figure 58A , Figure 58B This is a diagram showing the manufacturing process of module 1111. Figure 58A This is a cross-sectional view showing the state before the circuit element 103, including the first component 110 and the second component 120, is mounted on the module substrate 190. Figure 58B This is a cross-sectional view showing the state in which circuit elements 103 are mounted on the module substrate 190.

[0278] The following describes the method of forming circuit element 103. A first conductor pillar bump PB1 and a second conductor pillar bump PB2 are formed on the lower surface of circuit element 103. The first conductor pillar bump PB1 and the second conductor pillar bump PB2 of circuit element 103 are aligned with the module substrate 190, and then formed by heating and pressurizing, such as... Figure 58B As shown, the solder layers 114 and 124 of the first conductor post bump PB1 and the second conductor post bump PB2 of the circuit element 103 are connected to the side electrodes 191 and 192 of the module substrate.

[0279] Figure 59 This is a diagram showing two heat conduction paths in module 1111, serving as heat dissipation paths from circuit elements formed in the second component 120. Figure 59 In the diagram, the dashed arrows indicate two heat conduction paths. The first heat conduction path is formed by the second component side electrode 122 and the second conductor post bump PB2. Heat generated by the circuit elements is dissipated and dissipated to the module substrate side electrode 192 and the module substrate 190 via this first heat conduction path. The second heat conduction path is from the second component 120 to the first component 110. Heat generated by the circuit elements is dissipated and dissipated via this second heat conduction path.

[0280] The second conductor post bump PB2 is disposed near the second component side electrode 122, which is part of the second circuit formed in the second component 120. Therefore, the heat dissipation and waste heat efficiency are high.

[0281] The height of the first conductor post bump PB1 is lower than the thickness of the first component 110. Therefore, compared with the case where the first component 110, on which the second component 120 is mounted, is connected to the module substrate 190 by mounting techniques such as wire bonding, the wiring length can be shortened and the toroidal inductance can be reduced.

[0282] Next, the manufacturing method of module 1111 will be illustrated. Figure 60This is a diagram showing the manufacturing method of circuit element 103. Figure 60 The diagrams from steps ST1 to ST7 are cross-sectional views of the intermediate stages of manufacturing circuit element 103, while step ST8 is a cross-sectional view of the completed circuit element 103. Actual manufacturing is carried out on a wafer-by-wafer basis, but... Figure 60 The diagram illustrates a single semiconductor device.

[0283] First, such as Figure 60 As shown in step ST1, a first component 110 made of a Si substrate is configured. Alternatively, a bonding layer may be formed on the surface of the first component 110 made of the Si substrate using conventional semiconductor processes, as needed. This bonding layer may be a metal film such as an Au film, an organic material film such as a polyimide (PI) film, a film of an organic material such as polybenzimidazole (PBO) or benzocyclobutene (BCB), or an insulator such as AlN, SiC, or diamond.

[0284] Next, as shown in step ST2, the second component 120 is joined to the first component 110. Circuit elements and electrodes have been formed on the second component 120 through other processes.

[0285] Next, as shown in step ST3, a second component side electrode 122 is formed on the second component 120 using a conventional semiconductor process, and a first component side electrode 112 is formed on the first component 110.

[0286] Next, as shown in step ST4, conductor pillars 113 and solder layers 114 should be formed. Figure 58A , Figure 58B An open resist film 185 is formed in the region of the resist film 185. Electrodes 112 and 122 are exposed within the openings of the resist film 185.

[0287] Then, as shown in steps ST5 and ST6, conductor pillars 113 and 123 and solder layers 114 and 124 are deposited on the electrodes 112 and 122 exposed within the openings of the resist film 185 by plating. The conductor pillars 113 and 123 are formed of Cu, with a thickness of, for example, 40 μm. This forms a CPB (Copper Pillar Bump). The solder layers 114 and 124 are formed of SnAg alloy, with a thickness of, for example, 30 μm.

[0288] Then, as shown in step ST7, the resist film 185 is removed. Finally, a reflow process is performed to melt the solder layers 114 and 124. Then, through curing, as shown in step ST8, the circuit element 103 is obtained.

[0289] Figure 61This diagram illustrates the manufacturing method of the second component 120 and the bonding method of the second component 120 relative to the first component 110; it is a perspective view of each process. Actual manufacturing is carried out on a wafer-by-wafer basis, but... Figure 61 The diagram illustrates a single semiconductor device.

[0290] like Figure 61 As shown in step ST11, firstly, a release layer 129 is formed on the mother substrate 1200, which serves as a compound semiconductor substrate. A semiconductor thin film is then formed on the upper part of this release layer 129 using an epitaxial growth method. Multiple circuit elements and electrodes connected to these circuit elements are formed on this semiconductor thin film. This part is the subsequent second component 120.

[0291] Next, as shown in step ST12, a process is performed to selectively etch the release layer 129, thereby peeling the second component 120 (semiconductor thin film) from the mother substrate 1200.

[0292] Then, as shown in step ST13, the second component 120 is bonded (joined) to the first component 110. That is, the semiconductor thin film is transferred from the mother substrate 1200 to the first component 110 to the second component 120. This bonding is performed by van der Waals bonding or hydrogen bonding. In addition, bonding can also be performed by electrostatic bonding, covalent bonding, eutectic alloy bonding, etc. Furthermore, in other processes, an Au film as a bonding layer can be formed on the first component 110, and the second component 120 can be pressed and tightly bonded to the surface of the bonding layer, thereby achieving eutectic bonding by the diffusion of Au from the bonding layer to the GaAs layer of the second component.

[0293] The formation of circuit elements and electrodes in the second component 120 is not only the stage shown in step ST11, as shown in step ST14, but can also be performed by a process (photolithography and etching process) for the second component 120 after the second component 120 is bonded to the first component 110.

[0294] As a method for peeling and transferring the aforementioned semiconductor thin film, such as Figure 61 As shown in step ST12, when the second component 120 (semiconductor thin film) is peeled from the mother substrate 1200, the second component 120 is peeled from the mother substrate 1200 in a state supported by a support. Additionally, as... Figure 61 As shown in step ST13, when the second component 120 is joined to the first component 110, it is done in a state supported by the aforementioned support body. Figure 61 In steps ST12 and ST13, the above-mentioned support body is omitted for the sake of clearly showing the second component 120.

[0295] The module 1111 constructed in this way achieves the following effect.

[0296] (a) The first component 110 is flip-mounted (mounted downwards) on the module substrate 190, so there is no need to configure the pads and space for the leads for lead bonding, and the whole can be miniaturized.

[0297] (b) In the first component 110 and the second component 120, the circuits formed in the first component 110 and the circuits formed in the second component 120 are electrically connected by inter-component connection conductors without passing through the module substrate 190. In addition, the first component 110 has a first conductor post bump PB1 connected to the electrode of the module substrate 190, and the second component 120 has a second conductor post bump PB2 connected to the electrode of the module substrate 190. Therefore, it is not necessary to form wiring for connecting the circuits formed in the first component 110 and the circuits formed in the second component 120 on the module substrate 190, which enables overall miniaturization.

[0298] (c) It can efficiently dissipate heat and waste heat generated by the high-frequency amplifier circuit formed in the second component 120, thus enabling the miniaturization of the circuit module that is not limited by heat dissipation, or the miniaturized circuit module with high heat dissipation.

[0299] By adopting the above structure, and referring to Figure 41 Compared to the power amplifier device 100I of the ninth embodiment described herein, the device can be made smaller. As a result, the wiring length between each circuit can be shortened, and the parasitic capacitance of the wiring can be reduced.

[0300] Figure 62 This diagram illustrates the structure of the 100W power amplifier according to the twenty-third embodiment. Figure 62 As shown, the power amplifier device 100W according to the twenty-third embodiment includes a band selection switch 52B and a PAIC 11P. The band selection switch 52B includes a first impedance matching circuit 2, a power amplifier circuit 1D, impedance matching circuits 2a and 2b, a tunable second harmonic termination circuit 31, a tunable filter 41, and a bias circuit B3. Figure 62 The power amplifier device 100W of the twenty-third embodiment shown is a structure in which the PAIC 11 of the power amplifier device 100V of the twenty-second embodiment is divided into a power amplifier circuit 1D as a driver stage and a PAIC 11P as a power stage. An impedance matching circuit 2a is provided in the front stage of the power amplifier circuit 1D. Furthermore, an impedance matching circuit 2b is provided between the power amplifier circuit 1D and the PAIC 11P. A first impedance matching circuit 2 is provided in the rear stage of the PAIC 11P. The power amplifier device 100W can be connected by referring to... Figures 57A to 61The first component 110 and the second component 120 are described below. In this case, the band selection switch 52B, the first impedance matching circuit 2, the tunable second harmonic termination circuit 31, the tunable filter 41, the impedance matching circuit 2b, the power amplifier circuit 1D as the drive stage, the impedance matching circuit 2a, and the bias circuit B3 within the power amplifier 100W are formed, for example, in the first component 110. Additionally, the PAIC 11P of the power stage within the power amplifier 100W is formed, for example, in the second component 120. Furthermore, the power amplifier 100W includes the bias circuit B3.

[0301] Impedance matching circuit 2a has an input terminal T21a and an output terminal T20a. Impedance matching circuit 2a converts the input impedance of the component connected to the output terminal T20a.

[0302] The power amplifier circuit 1D of the driver stage has an input terminal T11a and an output terminal T10a. The power amplifier circuit 1D amplifies the signal input to the input terminal T11a.

[0303] Impedance matching circuit 2b has an input terminal T21b and an output terminal T20b. The output signal S2b of power amplifier circuit 1D is input to the input terminal T21b of impedance matching circuit 2b. Impedance matching circuit 2b converts the input impedance of the component connected to the output terminal T20b.

[0304] The PAIC11P features a power amplifier circuit 1P with a power stage. The power amplifier circuit 1P has an input terminal T11 and an output terminal T10. The power amplifier circuit 1P amplifies the signal input to the input terminal T11.

[0305] The first impedance matching circuit 2 has a second input terminal T21 and a second output terminal T20. The second input terminal T21 is connected to the first output terminal T10 of the power amplifier circuit 1P. The first impedance matching circuit 2 outputs the second high-frequency signal S2, which is input to the second input terminal T21, as a third high-frequency signal S3 from the second output terminal T20. The first impedance matching circuit 2 converts the impedance of the second input terminal T21 and the second output terminal T20. That is, the first impedance matching circuit 2 converts the input impedance of the component connected to the second output terminal T20 of the first impedance matching circuit 2, providing load impedance to the power amplifier circuit 1P.

[0306] The tunable second harmonic termination circuit 31 and the tunable filter 41 have the above-described structure and perform the above-described operation. The bias circuit B3 supplies bias voltage to the power amplifier circuit 1D and the power amplifier circuit 1P.

[0307] In this example, an integrated PAIC11P is mounted on the integrated circuit constituting the band selection switch 52B. The PAIC11P is fabricated using a different semiconductor process than the integrated circuit constituting the band selection switch 52B.

[0308] In this example, an integrated PAIC11P is mounted on the integrated circuit constituting the band selection switch 52B. The PAIC11P is fabricated using a different semiconductor process than the integrated circuit constituting the band selection switch 52B.

[0309] Furthermore, the integrated circuit constituting the band selection switch 52B may also include multiple tunable second harmonic termination circuits 31. The integrated circuit constituting the band selection switch 52B may also include multiple tunable filters 41.

[0310] However, in Figure 62 In the reference circuit, impedance matching circuit 2b can also be formed. Figures 57A to 61 The second component 120 will be described. A power amplifier circuit 1D, serving as a driver stage, can also be formed in the second component 120. An impedance matching circuit 2a can also be formed in the second component 120. A bias circuit B3 can also be formed in the second component 120.

[0311] Figure 63 This is a diagram showing the structure of the power amplifier device 100X according to the twenty-fourth embodiment. (See diagram below.) Figure 63 As shown, the power amplifier device 100X according to the twenty-fourth embodiment includes a frequency band selection switch 52C, a switching switch SSW, two paths 11E1 and 11E2, and a bias circuit B3. The power amplifier device 100X can input a first high-frequency signal S1 to either path 11E1 or path 11E2 by switching the switching switch SSW. The switching switch SSW inputs the first high-frequency signal S1 to either path 11E1 or path 11E2 based on a signal from a control circuit (not shown).

[0312] Path 11E1, serving as the first path, includes IC11D1. IC11D1 includes power amplifier circuit 1D1, impedance matching circuits 2a1 and 2b1. These have reference... Figure 62 The parts described have the same function, so detailed explanations are omitted.

[0313] Additionally, path 11E1 includes a power amplifier circuit 1D1, impedance matching circuits 2a1 and 2b1, PAIC 11P1, a first impedance matching circuit 21, a tunable second harmonic termination circuit 311, and a tunable filter 411. These have similar characteristics to the reference... Figure 62 The parts described have the same function, so detailed explanations are omitted.

[0314] Path 11E2, serving as the second path, includes IC11D2. IC11D2 includes power amplifier circuit 1D2, impedance matching circuits 2a2 and 2b2. These have the same characteristics as the reference... Figure 62 The parts described have the same function, so detailed explanations are omitted.

[0315] Additionally, path 11E2 includes a power amplifier circuit 1D2, impedance matching circuits 2a2 and 2b2, PAIC 11P2, a first impedance matching circuit 22, a tunable second harmonic termination circuit 312, and a tunable filter 412. These have similar characteristics to the reference... Figure 62 The parts described have the same function, so detailed explanations are omitted.

[0316] Figure 63 The power amplifier device 100X shown is similar to the power amplifier device 100W in the twenty-third embodiment, and has a structure that is divided into a power amplifier circuit 1D1 as a driver stage and a power amplifier circuit 1P1 as a power stage, and into a power amplifier circuit 1D2 as a driver stage and a power amplifier circuit 1P2 as a power stage.

[0317] The power amplifier 100X can input the first high-frequency signal S1 to either path 11E1 or path 11E2 by switching the toggle switch SSW. In other words, it can switch between path 11E1 and path 11E2. Therefore, an appropriate path can be selected based on the power mode and frequency band. Thus, by selecting an appropriate path, the power amplifier 100X can achieve both broadband operation and low power consumption.

[0318] The power amplifier 100X can be referenced Figures 57A to 61 The first component 110 and the second component 120 are described below. In this case, the band selection switch 52C, the first impedance matching circuit 2, the tunable second harmonic termination circuit 31, the tunable filter 41, the impedance matching circuit 2b, the power amplifier circuit 1D as the drive stage, the impedance matching circuit 2a, and the bias circuit B3 within the power amplifier device 100X are formed, for example, in the first component 110. Furthermore, the PAIC 11P of the power stage within the power amplifier device 100X is formed, for example, in the second component 120.

[0319] Here, the second component 120 can also be referred to as follows. Figure 57B It can be explained as one, or it can be divided into multiple. Figure 64 It means Figure 63 A diagram illustrating an example implementation of the power amplifier device 100X. (See diagram for reference.) Figure 64As shown, module 1111a connects to two second components 120 via the first component 110. In the power amplifier device 100X, the second components 120 are mounted in two separate areas, thus increasing the degree of freedom in layout. This increased layout freedom allows for a reduction in the mounting area of ​​the second components 120, enabling module 1111a to be implemented in a smaller size. Consequently, manufacturing costs can be reduced.

[0320] Furthermore, the impedance matching circuit 2a1 in path 11E1 can also be formed in the second component 120. The impedance matching circuit 2a2 in path 11E2 can also be formed in the second component 120. The impedance matching circuit 2b1 in path 11E1 can also be formed in the second component 120. The impedance matching circuit 2b2 in path 11E2 can also be formed in the second component 120. The power amplifier circuit 1D1 in path 11E1 can also be formed in the second component 120. The power amplifier circuit 1D2 in path 11E2 can also be formed in the second component 120. The bias circuit B3 can also be formed in the second component 120. Each component in both paths can also be formed in a single second component 120. This reduces manufacturing costs.

[0321] Reference Figure 63 The power amplifier 100X described herein has two paths, 11E1 and 11E2, which can be switched between. Alternatively, three or more paths can be set and switched between them. By preparing more types of paths and selecting more appropriate paths, broadband and low power consumption can be achieved.

[0322] Figure 65 This is a diagram showing the structure of the power amplifier device 100Y according to the twenty-fifth embodiment. (See diagram below.) Figure 65 As shown, the power amplifier device 100Y according to the twenty-fifth embodiment includes IC11D, a bandwidth selection switch 52D, and a bias circuit B3. Furthermore, the power amplifier device 100Y according to the twenty-fifth embodiment has two paths 11F1 and 11F2. IC11D is included in both paths 11F1 and 11F2. IC11D includes a power amplifier circuit 1D, impedance matching circuits 2a and 2c. The power amplifier circuit 1D and impedance matching circuit 2a have the same characteristics as referenced... Figure 62 The functions of each part described are the same, so detailed explanations are omitted. Switching is performed within the impedance matching circuit 2c, allowing IC11D, which generates signals input to power amplifier circuits 1P1 and 1P2 as power stages, to be shared. Therefore, the same signals can be input to power amplifier circuits 1P1 and 1P2.

[0323] Path 11F1 includes PAIC11P1, a first impedance matching circuit 21, a tunable second harmonic termination circuit 311, and a tunable filter 411. These have the same characteristics as the reference... Figure 62 The parts described have the same function, so detailed explanations are omitted.

[0324] Path 11F2 includes PAIC11P2, a first impedance matching circuit 22, a tunable second harmonic termination circuit 312, and a tunable filter 412. These have the same characteristics as the reference. Figure 62 The parts described have the same function, so detailed explanations are omitted.

[0325] Figure 65 The power amplifier device 100Y shown is a structure in which the power amplifier circuit 1D, which serves as the driving stage, is shared, and the power stage is divided into power amplifier circuit 1P1 and power amplifier circuit 1P2.

[0326] In the power amplifier device 100Y, paths 11F1 and 11F2 can be selected. Path selection is achieved by applying a bias current to either PAIC11P1 or PAIC11P2, causing either PAIC11P1 or PAIC11P2 to operate. This allows the operation of individual components in either path 11F1 or path 11F2. The impedance matching circuit 2c may also include an SPnT (Single Pole N-Through) switch (not shown) connected to the power amplifier circuit 1P1 of PAIC11P1 and the power amplifier circuit 1P2 of PAIC11P2. By selecting the path containing the desired PAIC through the switch, either PAIC can be operated. This allows the operation of individual components in either path 11F1 or path 11F2.

[0327] The power amplifier 100Y can be referenced Figures 57A to 61 The first component 110 and the second component 120 are described below. In this case, the band selection switch 52D, the first impedance matching circuits 21 and 22, the tunable second harmonic termination circuits 311 and 312, the tunable filters 411 and 412, the impedance matching circuit 2c, the power amplifier circuit 1D as the drive stage, the impedance matching circuit 2a, and the bias circuit B3 within the power amplifier device 100Y are formed, for example, in the first component 110. Furthermore, the PAIC11P of the power stage within the power amplifier device 100Y is formed, for example, in the second component 120.

[0328] Here, the second component 120 can also be referred to as follows. Figure 57B To explain, that is one, or you can refer to... Figure 64 As explained, it can be divided into multiple parts. If the second component 120 is installed in two separate areas, the layout flexibility increases. This increased layout flexibility allows for a reduction in the installation area of ​​the second component 120, enabling the module to be implemented in a smaller size. Consequently, manufacturing costs can be reduced.

[0329] Furthermore, the impedance matching circuit 2a in path 11F1 can also be formed in the second component 120. The impedance matching circuit 2a in path 11F2 can also be formed in the second component 120. The impedance matching circuit 2c in path 11F1 can also be formed in the second component 120. The power amplifier circuit 1D in path 11F1 can also be formed in the second component 120. The power amplifier circuit 1D in path 11F2 can also be formed in the second component 120. The bias circuit B3 can also be formed in the second component 120.

[0330] Reference Figure 65 The power amplifier 100Y described herein has two paths, 11F1 and 11F2, which can be switched between. Alternatively, three or more paths can be set and switched between them. By preparing more types of paths and selecting more appropriate paths, broadband and low power consumption can be achieved.

[0331] Explanation of reference numerals in the attached figures

[0332] 1…Power amplifier circuit; 2…First impedance matching circuit; 3…Second harmonic termination circuit; 4…Filter; 5, 51, 52, 52A~52D, 53, 54, 55…Band selection switches; 61,…,6 N …subsequent impedance matching circuit; 71, …, 7 N …duplexer; 8…antenna switch; 9…antenna; 11, 12, 13, 14…PAIC; 20…impedance matching circuit; 21, 22, 23…transmission line; 24…lead line; 25, 26, 27, 28…via conductor; 29…conductor pattern; 30…high harmonic termination circuit; 31…tunable second harmonic termination circuit; 34…second signal processing unit; 35…ground conductor; 36…cycle circuit; 40…high harmonic removal filter; 41…tunable filter; 44…first signal processing unit; 100A, …, 100Y…power amplifier; 103…circuit element; 110…first component; 120…second component; 200…transmission line transformer; 300…board; 341…third signal processing unit; 341A…fourth signal processing unit; 611, …, 61 N …Fifth Signal Processing Unit; 621, …, 62 N …Sixth Signal Processing Unit; 711, …, 71 N …Seventh signal processing unit; B1, B2, B3… bias circuits; SW1, …, SW7… switches; SWC… control circuit.

Claims

1. A power amplifier device, comprising: A power amplifier circuit has a first input terminal and a first output terminal, amplifies a first high-frequency signal containing a fundamental wave that is input to the first input terminal, and outputs a second high-frequency signal containing a fundamental wave, even harmonics and odd harmonics from the first output terminal. The first impedance matching circuit has a second input terminal and a second output terminal. The second input terminal is connected to the first output terminal of the power amplifier circuit. The second high-frequency signal input to the second input terminal is output from the second output terminal as a third high-frequency signal, thereby converting the impedance of the second input terminal and the second output terminal. An adjustable high-order harmonic termination circuit has a third input terminal and a third output terminal. The third input terminal is connected to the second output terminal of the first impedance matching circuit. By reflecting at least a portion of the even and odd harmonics contained in the third high-frequency signal input to the third input terminal, it outputs a fourth high-frequency signal from the third input terminal. A fifth high-frequency signal containing the fundamental wave, the remaining even harmonics, and the odd harmonics is output from the third output terminal. The high-order harmonic termination circuit can change the first phase or the second phase based on the frequency of the fundamental wave. An adjustable filter has a fourth input terminal and a fourth output terminal, the fourth input terminal being connected to the third output terminal of the higher harmonic termination circuit, attenuating at least a portion of the even and odd harmonics contained in the fifth high-frequency signal input to the fourth input terminal, and outputting a sixth high-frequency signal containing the fundamental wave, the remaining even harmonics, and the odd harmonics from the fourth output terminal, having frequency characteristics including a first frequency range and a second frequency range, and being able to change the first frequency range and the second frequency range based on the fundamental wave, the first frequency range causing a portion of the fifth high-frequency signal to pass through the fourth output terminal, and the second frequency range causing a portion of the fifth high-frequency signal input to the fourth input terminal to be attenuated; A frequency band selection switch has a fifth input terminal and multiple fifth output terminals, the fifth input terminal being connected to the fourth output terminal of the filter, and the propagation path of a high-frequency signal is selected by connecting the fifth input terminal and at least one of the fifth output terminals based on the frequency of the fundamental wave; A plurality of second impedance matching circuits are provided corresponding to each of the plurality of fifth output terminals of the frequency band selection switch. Each of the plurality of second impedance matching circuits has a sixth input terminal and a sixth output terminal. The sixth input terminal is connected to the corresponding fifth output terminal and converts the impedance of the sixth input terminal and the sixth output terminal. as well as Multiple duplexers are provided, corresponding to each of the multiple second impedance matching circuits, and each has a seventh input terminal, a seventh output terminal, and an input / output terminal. The seventh input terminal is connected to the sixth output terminal of the corresponding second impedance matching circuit. Based on the frequency of a seventh high-frequency signal input to the seventh input terminal, an eighth high-frequency signal is output from the input / output terminal. Based on the frequency of a ninth high-frequency signal input to the input / output terminal, a tenth high-frequency signal is output from the seventh output terminal. The fourth high-frequency signal contains at least a second harmonic. The second harmonic reaches the first output terminal of the power amplifier circuit via the first impedance matching circuit at the first phase. The eighth high-frequency signal or the tenth high-frequency signal is output via the second impedance matching circuit connected to the propagation path selected by the frequency band selection switch and the duplexer.

2. The power amplifier device according to claim 1, wherein, The first impedance matching circuit includes a transmission line transformer. The transmission line transformer has the following features: A first transmission line and a second transmission line connected in series, wherein the first transmission line and the second transmission line are arranged at different positions in the thickness direction of the substrate; and A third transmission line is disposed between the first transmission line and the second transmission line in the thickness direction of the substrate. A first end of the third transmission line is connected to one end of the first transmission line, and a second end of the third transmission line is grounded. The first transmission line and the second transmission line are electromagnetically coupled to the third transmission line.

3. The power amplifier device according to claim 1 or 2, wherein, At least a portion of the power amplifier circuit and at least a portion of the first impedance matching circuit are housed in the same integrated circuit.

4. The power amplifier device according to claim 1 or 2, wherein, At least a portion of the filter and at least a portion of the higher harmonic termination circuit are housed in the same integrated circuit.

5. The power amplifier device according to claim 1 or 2, wherein, At least a portion of the first impedance matching circuit is configured in the frequency band selection switch.

6. The power amplifier device according to claim 1 or 2, wherein, At least a portion of the filter is configured by the frequency band selection switch.

7. The power amplifier device according to claim 1 or 2, wherein, The higher harmonic termination circuit also includes a first terminal and a second terminal disposed between the third input terminal and the third output terminal. Between the first terminal and the second terminal, at least one series resonant circuit or parallel resonant circuit is included, wherein the series resonant circuit or parallel resonant circuit includes a capacitor and an inductor. The series resonant circuit or parallel resonant circuit is connected to both the third input terminal and the third output terminal of the higher harmonic terminating circuit. At least a portion of the even and odd harmonics contained in the third high-frequency signal input to the third input terminal of the higher harmonic terminal circuit is reflected through the resonance of the capacitor and the inductor.

8. The power amplifier device according to claim 1 or 2, wherein, The filter includes a unit filter circuit cascaded in N stages between the fourth input terminal and the fourth output terminal, where N is a natural number. The unit filter circuit includes: First terminal; Second terminal; A parallel resonant circuit or a series resonant circuit, comprising capacitors and inductors, in the N-stage cascaded unit filter circuit, The first terminal of the primary unit filter circuit is connected to the fourth input terminal. The second terminal of the final stage unit filter circuit is connected to the fourth output terminal. The resonance of the capacitor and the inductor included in the parallel resonant circuit or the series resonant circuit causes at least a portion of the even and odd harmonics contained in the fifth high-frequency signal input to the fourth input terminal of the filter to be attenuated.

9. The power amplifier device according to claim 7, wherein, It also includes at least one of a first switch and a second switch: the first switch selects one of a plurality of capacitor elements having different capacitance values; The second switch selects one of a plurality of inductor elements having mutually different inductance values. The capacitor element selected by the first switch is used as the capacitor, or the inductor element selected by the second switch is used as the inductor.

10. The power amplifier device according to claim 1 or 2, comprising: A first substrate forms a first circuit, the first circuit including at least the frequency band selection switch; and The second substrate forms a second circuit, which includes at least the power amplifier circuit. The second substrate is mounted on the first substrate. The first substrate and the second substrate have inter-circuit connection wiring that electrically connects the first circuit and the second circuit. The first substrate has a first conductor post protrusion. The second substrate has a second conductor post bump.

11. A power amplifier device, comprising: A power amplifier circuit has a first input terminal and a first output terminal, amplifies a first high-frequency signal containing a fundamental wave that is input to the first input terminal, and outputs it as a second high-frequency signal containing a fundamental wave, even harmonics and odd harmonics from the first output terminal. The first impedance matching circuit has a second input terminal and a second output terminal. The second input terminal is connected to the first output terminal of the power amplifier circuit. The second high-frequency signal input to the second input terminal is output from the second output terminal as a third high-frequency signal, thereby converting the impedance of the second input terminal and the second output terminal. A frequency band selection switch has a fifth input terminal and multiple fifth output terminals. The fifth input terminal is connected to the output terminal of the first impedance matching circuit. The propagation path of the third high-frequency signal is selected by connecting the fifth input terminal and at least one of the fifth output terminals based on the frequency of the fundamental wave contained in the third high-frequency signal. Multiple high-order harmonic termination circuits are provided corresponding to each of the multiple fifth output terminals of the frequency band selection switch, each having a third input terminal and a third output terminal. The third input terminal is connected to the corresponding fifth output terminal. By reflecting at least a portion of the even and odd harmonics contained in the third high-frequency signal input to the third input terminal, a fourth high-frequency signal is output from the third input terminal. A fifth high-frequency signal containing the fundamental wave, the remaining even harmonics, and the odd harmonics is output from the third output terminal. Multiple filters are provided corresponding to each of the multiple higher harmonic termination circuits, each having a fourth input terminal and a fourth output terminal. The fourth input terminal is connected to the third output terminal of the corresponding higher harmonic termination circuit, causing at least a portion of the even and odd harmonics contained in the fifth high-frequency signal input to the fourth input terminal to be attenuated, and a sixth high-frequency signal containing the fundamental wave, the remaining even harmonics, and the odd harmonics to be output from the fourth output terminal. as well as Multiple duplexers are provided, corresponding to each of the multiple filters, and have a seventh input terminal, a seventh output terminal, and an input / output terminal. The seventh input terminal is connected to the fourth output terminal of the corresponding filter. Based on the frequency of a sixth high-frequency signal input to the seventh input terminal, an eighth high-frequency signal is output from the input / output terminal. Based on the frequency of a ninth high-frequency signal input to the input / output terminal, a tenth high-frequency signal is output from the seventh output terminal. The fourth high-frequency signal contains at least the second harmonic. The second harmonic reaches the first output terminal of the power amplifier circuit in a first phase via the first impedance matching circuit. The multiple high-order harmonic terminating circuits operate at different frequencies. The multiple filters operate at different frequencies. The multiple duplexers operate at different frequencies.

12. The power amplifier device according to claim 11, wherein, The first impedance matching circuit includes a transmission line transformer. The transmission line transformer has the following features: A first transmission line and a second transmission line connected in series, wherein the first transmission line and the second transmission line are arranged at different positions in the thickness direction of the substrate; and A third transmission line is disposed between the first transmission line and the second transmission line in the thickness direction of the substrate. A first end of the third transmission line is connected to one end of the first transmission line, and a second end of the third transmission line is grounded. The first transmission line and the second transmission line are electromagnetically coupled to the third transmission line.

13. The power amplifier device according to claim 11 or 12, wherein, At least a portion of the power amplifier circuit and at least a portion of the first impedance matching circuit are housed in the same integrated circuit.

14. The power amplifier device according to claim 11 or 12, wherein, At least a portion of the filter and at least a portion of the higher harmonic termination circuit are housed in the same integrated circuit.

15. The power amplifier device according to claim 11 or 12, wherein, At least a portion of the first impedance matching circuit is configured in the frequency band selection switch.

16. The power amplifier device according to claim 11 or 12, wherein, At least a portion of the filter is configured by the frequency band selection switch.

17. The power amplifier device according to claim 11 or 12, wherein, The higher harmonic termination circuit also includes a first terminal and a second terminal disposed between the third input terminal and the third output terminal. Between the first terminal and the second terminal, at least one series resonant circuit or parallel resonant circuit is included, wherein the series resonant circuit or parallel resonant circuit includes a capacitor and an inductor. The series resonant circuit or parallel resonant circuit is connected to both the third input terminal and the third output terminal of the higher harmonic terminating circuit. At least a portion of the even and odd harmonics contained in the third high-frequency signal input to the third input terminal of the higher harmonic terminal circuit is reflected through the resonance of the capacitor and the inductor.

18. The power amplifier device according to claim 11 or 12, wherein, The filter includes a unit filter circuit cascaded in N stages between the fourth input terminal and the fourth output terminal, where N is a natural number. The unit filter circuit includes: First terminal; Second terminal; Parallel resonant circuits or series resonant circuits include capacitors and inductors. In the N-stage cascaded unit filter circuit, The first terminal of the primary unit filter circuit is connected to the fourth input terminal. The second terminal of the final stage unit filter circuit is connected to the fourth output terminal. The resonance of the capacitor and the inductor included in the parallel resonant circuit or the series resonant circuit causes at least a portion of the even and odd harmonics contained in the fifth high-frequency signal input to the fourth input terminal of the filter to be attenuated.

19. The power amplifier device according to claim 17, wherein, It also includes at least one of a first switch and a second switch: the first switch selects one of a plurality of capacitor elements having different capacitance values; The second switch selects one of a plurality of inductor elements having mutually different inductance values. The capacitor element selected by the first switch is used as the capacitor, or the inductor element selected by the second switch is used as the inductor.

20. The power amplifier device according to claim 11 or 12, comprising: A first substrate forms a first circuit, the first circuit including at least the frequency band selection switch; and The second substrate forms a second circuit, which includes at least the power amplifier circuit. The second substrate is mounted on the first substrate. The first substrate and the second substrate have inter-circuit connection wiring that electrically connects the first circuit and the second circuit. The first substrate has a first conductor post protrusion. The second substrate has a second conductor post bump.

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