Three-phase grid voltage phase-locked loop of an APF control system

Abstract

The present invention provides a three-phase grid voltage phase-locked loop for an APF control system, which includes two cross-coupled phase-locked loop controllers. Each phase-locked loop controller includes a q-axis component conversion module and a PI algorithm module. The ratio K of the modulus of the q-axis component voltage Vq to the d-axis component voltage Vd is calculated by the q-axis component conversion module; and then the ratio K is sent to the PI algorithm module. By improving the three-phase grid voltage phase-locked loop in the prior art, the advantages of the present invention are as follows: it can lock the phase quickly and accurately, save computing resources, and has good performance.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronic control, and particularly to a three-phase grid voltage phase-locked loop for an APF control system. Background Art

[0002] In the control of power electronic devices such as active power filters (APFs) that need to be connected to the grid, obtaining the phase of the grid voltage is a prerequisite for system control. Generally, a phase-locked loop (PLL) is used to obtain the phase of the grid voltage. The phase-locked loop generally consists of a phase detector (PD), a loop filter (LF), and a voltage-controlled oscillator (VCO). The phase-locked loop is a phase feedback system. The phase detector compares the periodic input signal with the phase signal fed back by the VCO to obtain a phase error; the error is filtered by the loop filter, and the output of the loop filter is used as a control signal to be sent to the VCO to eliminate the phase difference between the input and output signals. Grid-connected inverters often face the following problems in engineering applications and have the following requirements for inverter performance:

[0003] (1) Grid voltage often experiences dynamic power quality problems such as voltage dips and flickers. Therefore, it is required that the inverter can respond quickly to the change of the grid voltage phase within the time of milliseconds, that is, it is required that the phase-locking method of the inverter has good dynamic performance to ensure that the phase-locking performance is not greatly affected when the voltage drops and surges.

[0004] (2) When the three-phase voltages are unbalanced, it is required that the phase-locking method of the power electronic device can capture the phase of the positive-sequence fundamental component and has a strong suppression effect on the three-phase unbalanced situation.

[0005] (3) The phase-locked loop should be able to quickly detect problems such as phase and frequency mutations of the grid voltage.

[0006] (4) It is required that the phase-locking method has a strong suppression effect on distorted voltages. Summary of the Invention

[0007] In view of the technical problems existing in the art, the present invention discloses a three-phase grid voltage phase-locked loop for an APF control system. The three-phase grid voltage phase-locked loop consists of two phase-locked loop controllers; each phase-locked loop controller includes: a q-axis component conversion module and a proportional-integral algorithm module;

[0008] Wherein, the q-axis component conversion module is configured to:

[0009] Obtain the d-axis component voltage Vd and the q-axis component voltage Vq;

[0010] Calculate the ratio K of the modulus of the q-axis component voltage Vq to the d-axis component voltage Vd;

[0011] Send the ratio K to the proportional-integral algorithm module;

[0012] The phase-locked loop controller uses a first Park module, a low-pass filter, a second Park module, and a voltage-controlled oscillator to perform feed-forward decoupling calculations on Vα and Vβ after Clark transformation, and outputs the amplitudes, phase angle θ, and angular frequency ω of the fundamental positive-sequence component and the fundamental negative-sequence component;

[0013] The feed-forward decoupling calculation includes the following steps:

[0014] Vα and Vβ undergo Park transformation by the first Park module to obtain the d-axis component voltage Vd and the q-axis component voltage Vq;

[0015] Vd and Vq respectively pass through the low-pass filter to filter out high-frequency harmonics, obtaining V'd and V'q, and are sent to the second Park module together;

[0016] The q-axis component voltage Vq and the ratio K are sent to the proportional-integral algorithm module together,

[0017] The proportional-integral algorithm module calculates the angular frequency ω and outputs it to the voltage-controlled oscillator;

[0018] The angular frequency ω undergoes integral processing by the voltage-controlled oscillator to obtain the phase angle θ;

[0019] The phase angle θ is sent as a feedback signal to the first Park module;

[0020] The phase angle θ is sent as a parameter to the second Park module;

[0021] The second Park module performs inverse Park transformation on V'd and V'q to obtain the amplitudes of the fundamental positive-sequence components on the α-axis and β-axis or the amplitudes of the fundamental negative-sequence components on the α-axis and β-axis.

[0022] Compared with the prior art, the advantages of the present invention are as follows: When the voltage undergoes frequency and phase mutations, it can quickly and accurately relock the phase; it can quickly filter out the low-order harmonics in the three-phase voltage, especially the second harmonic generated after dq transformation of the unbalanced grid voltage; when encountering a two-phase voltage dip fault, the present invention can quickly detect the amplitudes, phase angles, and angular frequencies of the positive-sequence and negative-sequence components of the grid voltage within a short time; it has good reliability in grid connection projects. Brief Description of the Drawings

[0023] Figure 1 、 one Schematics of some three-phase grid voltage phase-locked loops;

[0024] Figure 2 、 one Schematic diagram of a three - phase grid voltage phase - locked loop in some embodiments; where the input signals are Vα and Vβ respectively, and the output signals are the fundamental positive - sequence components Vαp, Vβp, and the fundamental negative - sequence components Vαn, Vβn

[0025] Figure 3 、 one Schematic diagram of a three - phase grid voltage phase - locked loop in some embodiments; where the input signals are Vα and Vβ respectively, and the output signals are the fundamental positive - sequence components Vαp, Vβp, and the fundamental negative - sequence components Vαn, Vβn

[0026] Figure 4 、 one Schematic diagram of a three - phase grid voltage phase - locked loop in some embodiments; where the input signals are Vα and Vβ respectively, and the output signals are the fundamental positive - sequence components Vαp, Vβp, and the fundamental negative - sequence components Vαn, Vβn

[0027] Figure 5 、 one Schematic diagram of a Butterworth filter based on the Sallen Key topology; where Ra and Rb represent the resistors in the filter, and Ca and Cb represent the filter capacitors;

[0028] Figure 6 、 one Open - loop frequency characteristic diagram (amplitude) of some embodiments, with Hz as the frequency unit and bd as the amplitude unit;

[0029] Figure 7 、 one Open - loop frequency characteristic diagram (phase) of some embodiments, with Hz as the frequency unit and deg as the phase unit;

[0030] Figure 8 、 one Grid voltage vector diagram under some grid operating conditions, where Vg is the grid voltage, Vs, Vr, Vt are the ABC - phase components of the grid voltage, Vd and Vq are the d - axis and q - axis components of the grid voltage, and θ is the phase angle;

[0031] Fig. 9 、 one Schematic diagram of the APF control system structure in some embodiments. Detailed implementation manners

[0032] The present invention will be explained below with reference to the accompanying drawings.

[0033] Some three - phase grid voltage phase - locked loops in related technologies include two phase - locked loop controllers; the principle of each phase - locked loop controller is as shown in Figure 1 and includes a q - axis component conversion module and a PI algorithm module; where the q - axis component conversion module is configured to:

[0034] Obtain the d-axis component voltage Vd and the q-axis component voltage Vq;

[0035] Calculate the ratio K of the modulus of the q-axis component voltage Vq to the d-axis component voltage Vd;

[0036] Send the ratio K to the PI algorithm module.

[0037] It should be noted that the calculation performed in the PI algorithm module is as follows:

[0038]

[0039] Among them, Kp represents the proportional gain and Ki represents the integral gain.

[0040] The three-phase grid voltage phase-locked loop of some embodiments is as Figure 2 shown, including two phase-locked loop controllers, and the first phase-locked loop controller is cross-coupled with the second phase-locked loop controller:

[0041] Among them, the first phase-locked loop controller is configured as:

[0042] The first park module processes the grid voltage signals Vα and Vβ through the positive-sequence park transformation algorithm to obtain the d-axis component voltage positive-sequence component Vdp and the q-axis component voltage positive-sequence component Vqp; the low-pass filter filters Vdp to obtain V’dp and filters Vqp to obtain V’qp; the second park module processes V’dp and V’qp through the positive-sequence park inverse transformation algorithm to obtain the α-axis voltage signal positive-sequence component Vαp and the β-axis voltage signal positive-sequence component Vβp;

[0043] The second phase-locked loop controller is configured as:

[0044] The first park module processes the grid voltage signals Vα and Vβ through the negative-sequence park transformation algorithm to obtain the d-axis component voltage negative-sequence component Vdn and the q-axis component voltage negative-sequence component Vqn; the low-pass filter filters Vdn to obtain V’dn and filters Vqn to obtain V’qn; the second park module processes V’dn and V’qn through the negative-sequence park inverse transformation algorithm to obtain the α-axis voltage signal negative-sequence component Vαn and the β-axis voltage signal negative-sequence component Vβn.

[0045] The three-phase grid voltage phase-locked loop of some embodiments is as Figure 3 shown, and is composed of two phase-locked loop controllers; each of the phase-locked loop controllers includes: a q-axis component conversion module and a proportional-integral algorithm module;

[0046] Among them, the q-axis component conversion module is configured as:

[0047] Obtain the d-axis component voltage Vd and the q-axis component voltage Vq;

[0048] Calculating a ratio K of the magnitude of the q-axis component voltage Vq relative to the d-axis component voltage Vd;

[0049] Sending the ratio K to the proportional integral algorithm module;

[0050] The phase-locked loop controller includes a first Park module, a low-pass filter, a second Park module, and a voltage-controlled oscillator, performs feedforward decoupling calculation on Vα and Vβ after Clark transformation, and outputs the amplitude, phase angle θ, and angular frequency ω of the fundamental positive sequence component and the fundamental negative sequence component.

[0051] In a more specific embodiment, in two phase-locked loop controllers:

[0052] The first phase-locked loop controller is used to output the amplitude, phase angle θ and angular frequency ω of the α-axis fundamental positive sequence component Vαp and the β-axis Vβp;

[0053] The second phase-locked loop controller is used to output the amplitude, phase angle θ and angular frequency ω of the α-axis fundamental negative sequence component Vαn and the β-axis Vβn.

[0054] The first phase-locked loop controller and the second phase-locked loop controller are cross-coupled, and the cross-coupling is carried out as follows:

[0055] The α-axis fundamental positive sequence component Vαp output by the first phase-locked loop controller is used as the first feedback signal of the second phase-locked loop controller.

[0056] The β-axis fundamental positive sequence component Vβp output by the first phase-locked loop controller serves as a second feedback signal of the second phase-locked loop controller;

[0057] The α-axis fundamental negative sequence component Vαn output by the second phase-locked loop controller serves as the first feedback signal of the first phase-locked loop controller.

[0058] The β-axis fundamental negative-sequence component Vβn output by the second phase-locked loop controller serves as a second feedback signal of the second phase-locked loop controller.

[0059] The feedforward decoupling calculation of some embodiments includes the following steps:

[0060] The Vα and Vβ are subjected to Park transformation by the first Park module to obtain a d-axis component voltage Vd and a q-axis component voltage Vq;

[0061] The Vd and Vq are respectively filtered out of high-frequency harmonics by the low-pass filter to obtain V′d and V′q, and are sent together to the second Park module;

[0062] The q-axis component voltage Vq and the ratio K are sent to the proportional-integral algorithm module together.

[0063] The proportional-integral algorithm module calculates the angular frequency ω and outputs it to the voltage-controlled oscillator.

[0064] The angular frequency ω undergoes integral processing by the voltage-controlled oscillator to obtain the phase angle θ.

[0065] The phase angle θ is sent as a feedback signal to the first Park module.

[0066] The phase angle θ is sent as a parameter to the second Park module.

[0067] The second Park module performs an inverse Park transformation on the V'd and V'q to obtain the fundamental positive-sequence component amplitudes of the α-axis and β-axis or the fundamental negative-sequence component amplitudes of the α-axis and β-axis.

[0068] The formula for calculating the K value by the q-axis component conversion module in some embodiments is as follows:

[0069]

[0070] Wherein, Vq represents the q-axis component voltage, Vd represents the d-axis component voltage, both Vq and Vd are vectors, and the modulus of Vd is taken; represents the difference in phase angles.

[0071] The three-phase grid voltage phase-locked loop in some embodiments is as Figure 4 , the input end includes a Clark module, and the Clark module obtains the Vα and Vβ by performing a simplified Clark transformation on the three-phase grid voltages Va, Vb, and Vc. The difference between the simplified Clark transformation and the Clark transformation is that when the q-axis component Vq approaches 0, the above formula can be further simplified:

[0072]

[0073] The phase difference between the Vα and the Vβ is used to replace the sine trigonometric function value of the phase difference. This simplified Clark transformation can ensure the operation speed in the case of a small phase difference.

[0074] Some embodiments include a first-order low-pass filter and a notch filter NF as shown in Figure 3-4 . According to the filter selection module in the APF control system, an instruction for controlling the on / off state of the low-pass filter and / or the notch filter is sent to the phase-locked loop controller, and then a processing step including any of the following methods is adopted: First, the high-order harmonics are filtered by the low-pass filter, and then the second-order harmonics are filtered by the second-order notch filter; filtering is performed using one of the low-pass filter or the second-order notch filter.

[0075] The configuration parameters of the proportional-integral algorithm module are: switching frequency is 30kHz; cut-off frequency is 30kHz; phase margin is 45deg.

[0076] The low-pass filter of some embodiments includes a first-order or higher-order Butterworth filter, wherein the first-order Butterworth filter has a cutoff frequency of 10 Hz.

[0077] Some embodiments of the first-order or higher-order Butterworth filter are as follows Figure 5 A Butterworth filter based on the Sallen-Key topology. The Sallen-Key filter is a simple active filter based on an op-amp stage. This configuration minimizes the filter's performance dependence on the op-amp's performance. Another advantage of this structure is the low ratio of the maximum resistor value to the minimum resistor value and the maximum capacitor value to the minimum capacitor value, which improves processability.

[0078] In some embodiments, the open-loop frequency characteristics are as follows Figure 6-7 .

[0079] It should be noted that fixed proportional-integral parameters (PI parameters) are difficult to achieve good control effects in all implementations, so variable PI parameters are preferably used. In some implementations that require a velocity loop (position servo system or velocity servo system), the current loop is only the innermost loop. Its PI parameters can generally be dynamically adjusted based on the velocity error (not the current error itself), increasing the PI parameters when the error is small and decreasing them when the error is large. In implementations with only one pure torque loop, the PI parameters can be dynamically adjusted based on the size of the torque command itself, decreasing the PI parameters when the torque command is large and increasing them when the torque command is small.

[0080] In a more specific implementation, a field programmable gate array (FPGA) is used to implement a three-phase grid voltage phase-locked loop, giving full play to the high performance of FPGA hardware. Based on converging the d-axis component of the grid voltage on the three-phase grid voltage integrated vector, the q-axis component of the grid voltage approaches 0; in view of the actual grid operating conditions, it is necessary to separate the positive sequence component and the negative sequence component in the grid voltage to achieve a phase-locked output angle that accurately reflects the fundamental positive sequence phase angle of the grid voltage. The vector diagram of the grid voltage is shown as follows: Figure 8 shown.

[0081] The signal definitions in the top-level entity of the FPGA grid voltage phase-locked loop module are shown in the following table:

[0082] Table 1. Signal definitions of the top-level entity of the FPGA grid voltage phase-locked loop module

[0083]

[0084] The phase-locked loop module mainly consists of a data acquisition module, a Clark transformation module, an error calculation module, and a PI algorithm module.

[0085] The APF control system of some embodiments has a structure as Fig. 9 , and includes any one of the phase-locked loop controllers in the above embodiments.

[0086] Embodiments and functional operations of the subject matter described in this specification can be implemented in: digital electronic circuits, tangibly implemented computer software or firmware, computer hardware, including the structures disclosed in this specification and their structural equivalents, or a combination of one or more of the above. A data processing apparatus includes all kinds of devices, apparatuses, and machines for processing data, and by way of example, includes programmable processors, computers, or multiple processors or multiple computers. The apparatus may include dedicated logic circuits, for example, FPGA (Field Programmable Gate Array) or ASIC (Application Specific Integrated Circuit). In addition to including hardware, the apparatus may also include code that creates an execution environment for the relevant computer program, such as code constituting processor firmware, protocol stacks, database management systems, operating systems, or a combination of one or more of them.

[0087] The processes and logical flows described in this specification can be executed by one or more programmable computers that execute one or more computer programs by operating on input data and generating output to perform functions. The processes and logical flows can also be executed by dedicated logic circuits, for example, FPGA (Field Programmable Gate Array) or ASIC (Application Specific Integrated Circuit), and the apparatus can also be implemented as dedicated logic circuits.

[0088] Although this specification contains many specific implementation details, these should not be construed as limitations on the scope of any invention or on the scope of what can be claimed, but rather as illustrations of features that can make a particular implementation of a particular invention specific. The specific features described in this specification in the context of separate embodiments can also be implemented in combination with a single embodiment. Conversely, the various features described in the context of a single embodiment can also be implemented independently in multiple embodiments, or in any suitable sub-combination. In addition, although the features can be described above as acting in combination and even initially claimed as such, one or more features from the claimed combination can in some cases be removed from the combination, and the claimed combination can be directed to a sub-combination or a variation of a sub-combination.

[0089] Similarly, although operations are depicted in the drawings in a particular order, it should not be understood that such operations are required to be performed in the particular order shown or in sequential order to achieve the desired result, or that all illustrated operations must be performed. In certain circumstances, multitasking and parallel processing may be advantageous. Additionally, the separation of various system modules and components in the above-described embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that program components and systems may generally be integrated in a single software product or packaged into multiple software products.

[0090] Particular embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. For example, the acts recited in the claims can be performed in a different order and still achieve the desired result. As one example, in order to achieve the desired result, the processes depicted in the figures are not necessarily required to be in the particular order shown or in sequential order. In certain implementations, multitasking and parallel processing may be advantageous.

Claims

1. A three-phase grid voltage phase-locked loop for an APF control system, characterized in that, The three-phase grid voltage phase-locked loop consists of two phase-locked loop controllers; Each of the phase-locked loop controllers includes: a q-axis component conversion module and a proportional-integral algorithm module; Among them, the q-axis component conversion module is configured to: Get the d-axis component voltage V d and the q-axis component voltage V q ; Calculate the q-axis component voltage V q with respect to the magnitude ratio K of the d-axis component voltage V d ; Send the ratio K to the proportional-integral algorithm module; The phase-locked loop controller further includes a first Park module, a low-pass filter, a second Park module, and a voltage-controlled oscillator, which perform feedforward decoupling calculations on V after Clark transformation α and V β to output the amplitudes, phase angle θ, and angular frequency ω of the fundamental positive-sequence component and the fundamental negative-sequence component; The feedforward decoupling calculation includes the following steps: The said V α and V β are subjected to Park transformation by the said first Park module to obtain the d-axis component voltage V d and the q-axis component voltage V q ; The said V d and V q respectively filter out high-frequency harmonics through the said low-pass filter to obtain V' d and V' q , and send them together to the said second Park module; The q-axis component voltage V q and the ratio K are sent to the proportional-integral algorithm module together, The proportional-integral algorithm module calculates the angular frequency ω and outputs it to the voltage-controlled oscillator; The angular frequency ω undergoes integral processing by the voltage-controlled oscillator to obtain the phase angle θ; The phase angle θ is sent as a feedback signal to the first Park module; The phase angle θ is sent as a parameter to the second Park module; The second Park module performs an inverse Park transformation on the V´ d and V´ q to obtain the fundamental positive sequence component amplitudes on the α-axis and β-axis or the fundamental negative sequence component amplitudes on the α-axis and β-axis.

2. The three-phase grid voltage phase-locked loop according to claim 1, wherein Among the two phase-locked loop controllers: The first phase-locked loop controller is used to output the amplitude, phase angle θ and angular frequency ω of the fundamental positive sequence component V of the α-axis αp and the fundamental positive sequence component V of the β-axis βp ; The second phase-locked loop controller is used to output the amplitude, phase angle θ, and angular frequency ω of the fundamental negative sequence component V of the α-axis αn and the fundamental negative sequence component V of the β-axis βn .

3. The three-phase grid voltage phase-locked loop according to claim 2, wherein, The first phase-locked loop controller and the second phase-locked loop controller are cross-coupled, and the cross-coupling method is: The positive sequence fundamental component V of the α-axis output by the first phase-locked loop controller αp is used as the first feedback signal of the second phase-locked loop controller, The positive sequence fundamental component V of the β axis output by the first phase-locked loop controller βp is used as the second feedback signal of the second phase-locked loop controller; The negative sequence fundamental component V of the α-axis output by the second phase-locked loop controller αn is used as the first feedback signal of the first phase-locked loop controller, The negative sequence fundamental component V of the β axis output by the second phase-locked loop controller βn serves as the second feedback signal of the second phase-locked loop controller.

4. The three-phase grid voltage phase-locked loop according to claim 3, wherein It further includes a Clark module, and the Clark module obtains the V a , V b , V c through a simplified Clark transformation to obtain the V α and V β . The difference between the simplified Clark transformation and the Clark transformation is that: the phase difference between the V α and the V β is used to replace the sine trigonometric function value of this phase difference.

5. The three-phase grid voltage phase-locked loop according to claim 3, characterized in that, The proportional-integral algorithm module is configured to: The switching frequency is 30 kHz; The cut-off frequency is 30 kHz; The phase margin is 45 deg.

6. The three-phase grid voltage phase-locked loop according to claim 1, wherein The low-pass filter includes a first-order or higher-order Butterworth filter, and the cut-off frequency of the first-order Butterworth filter is 10 Hz.

7. The three-phase grid voltage phase-locked loop according to claim 1, wherein The low-pass filter includes a notch filter.

8. The three-phase grid voltage phase-locked loop according to claim 6, wherein, The first-order or higher-order Butterworth filter is a Butterworth filter based on the Sallen Key topology structure.

9. An APF control system, characterized in that, The APF control system includes the three-phase grid voltage phase-locked loop according to any one of claims 1-8.

10. The APF control system according to claim 9, wherein, The APF control system further includes a filter selection module, and the filter selection module issues an instruction for controlling the on-off state of the low-pass filter to the phase-locked loop controller.

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