Storage Control Method and Device Applied to a Storage Device

Abstract

The present application provides a storage control method and apparatus applied to a storage device. In this embodiment, at least two heterogeneous controllers are adopted in the storage device. Through the differential design of the controllers, the abnormal conditions of each controller in the storage device at the same time are avoided, ensuring business continuity. Further, in this embodiment, any controller realizes the establishment of a data channel with the peer controller based on a controller configuration table and performs data transmission, without a complex pairwise negotiation process, improving scalability.

Description

Technical Field

[0001] This application relates to the field of storage, and particularly to a storage control method and device applied to a storage device. Background Art

[0002] In storage applications, in order to ensure the reliability of a storage device, generally, multiple controllers are provided in a storage device. When any one of the controllers fails, other controllers take over the services of the failed controller to ensure service continuity. The controllers in the storage device are mainly responsible for operations such as data transceiver, data storage, and data protection.

[0003] In specific implementation, each controller in the storage device usually adopts the same design scheme. And the same design scheme may cause each controller to have an abnormality at the same time, resulting in service interruption. Summary of the Invention

[0004] Embodiments of this application provide a storage control method and device applied to a storage device to avoid abnormalities of each controller in the storage device at the same time.

[0005] The technical solutions provided by the embodiments of this application include:

[0006] A storage control method applied to a storage device, the storage device includes N controllers, N>1, and at least two of the N controllers are heterogeneous controllers; the method includes:

[0007] When a first controller starts up, according to the device model of the storage device and the first controller slot where the first controller is located, find a target controller model from a configured controller configuration table; the first controller is any one of the controllers in the storage device;

[0008] When the model of the first controller matches the target controller model, detect whether there are other controllers that have been started in the storage device currently;

[0009] When the first controller detects that there is a second controller that has been started in the storage device currently, the second controller refers to any other controller that has been started in the storage device currently, then determine a target data channel type from the controller configuration table according to the device model, the first controller slot, and the second controller slot where the second controller is located, and check whether at least one target data channel that conforms to the target data channel type has been established between the first controller and the second controller;

[0010] If the target data channel has been established between the first controller and the second controller, after the first controller successfully completes startup, data is transmitted between the first controller and the second controller through the target data channel.

[0011] A storage device, the storage device includes N controllers, N is greater than 1, and at least two of the N controllers are heterogeneous controllers;

[0012] Any controller includes: a detection unit, an inspection unit, and a processing unit;

[0013] Wherein, the detection unit is used to, when the first controller where it is located starts up, find the target controller model from the configured controller configuration table according to the device model of the storage device and the first controller slot where the first controller is located, and when the model of the first controller is the same as the target controller model, detect whether there are other controllers that have been started in the storage device currently;

[0014] The inspection unit is used to, when the detection unit detects that there is a second controller that has been started in the storage device currently, where the second controller refers to any other controller that has been started in the storage device currently, determine the target data channel type from the controller configuration table according to the device model, the first controller slot, and the second controller slot where the second controller is located, and check whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller;

[0015] The processing unit is used to, when the inspection unit checks that the target data channel has been established between the first controller and the second controller, after the first controller successfully completes startup, transmit data between the first controller and the second controller through the target data channel.

[0016] It can be seen from the above technical solutions that in this embodiment, in the storage device, by adopting at least two heterogeneous controllers and through the differential design of the controllers, it is avoided that each controller in the storage device is abnormal at the same time, ensuring business continuity;

[0017] Furthermore, in this embodiment, any controller realizes establishing a data channel with the peer controller and transmitting data based on the controller configuration table, without a complex pairwise negotiation process, improving scalability. Description of the Drawings

[0018] Figure 1 is a schematic structural diagram of the storage device shown in the present application;

[0019] Figure 2 is a method flow chart shown in the present application;

[0020] Figure 3 is the flowchart of memory window determination shown in this application;

[0021] Figure 4 is the implementation flowchart of step 204 shown in this application

[0022] Figure 5 is the structural diagram of the storage device shown in this application. Detailed implementation manners

[0023] To enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention and make the above objects, features, and advantages of the embodiments of the present invention more obvious and understandable, the following further elaborates on the prior art solutions and the technical solutions in the embodiments of the present invention with reference to the accompanying drawings.

[0024] To avoid the anomalies of each controller in the storage device at the same time, the embodiments of this application propose a multi - controller storage device based on heterogeneous controllers. Here, a multi - controller storage device based on heterogeneous controllers refers to a storage device with N controllers, at least two of which are heterogeneous controllers, and N is greater than 1.

[0025] A so - called heterogeneous controller can be characterized by the differential design of the controller. For example, controllers with different design schemes are heterogeneous controllers.

[0026] As an embodiment, if at least two controllers use CPUs of the same architecture from different manufacturers, then these at least two controllers can be considered heterogeneous controllers. For example, for a dual - controller storage device (which includes two controllers: controller 1 and controller 2), if controller 1 and controller 2 in the dual - controller storage device respectively use CPUs of the same architecture such as the X86 architecture or the ARM architecture from different manufacturers, then controller 1 and controller 2 in the dual - controller storage device can be considered heterogeneous controllers. Another example is for a four - controller storage device (which includes four controllers: controller 1 to controller 4). If controller 1 and controller 3 in the four - controller storage device use the X86 - architecture CPUs of manufacturer A, and controller 3 and controller 4 use the X86 - architecture CPUs of manufacturer B, then it is considered that controller 1 and controller 3, or controller 1 and controller 4, or controller 2 and controller 3, or controller 2 and controller 4 are heterogeneous controllers; if controller 1 to controller 4 in the four - controller storage device use CPUs of different manufacturers with the X86 architecture or the ARM architecture, then controller 1 to controller 4 are heterogeneous controllers. And so on.

[0027] As another embodiment, if at least two controllers adopt CPUs with different architectures, these at least two controllers can be considered heterogeneous controllers. Taking the dual-controller storage device mentioned above as an example, if Controller 1 adopts a CPU with an X86 architecture and Controller 2 adopts a CPU with an ARM architecture, then at this time, Controller 1 and Controller 2 in the dual-controller storage device can be considered heterogeneous controllers. Taking the four-controller storage device mentioned above as an example again, if Controller 1 and Controller 2 adopt CPUs with an X86 architecture from manufacturer A, and Controller 3 and Controller 4 adopt CPUs with an ARM architecture from manufacturer B, then it is considered that Controller 1 and Controller 3, or Controller 1 and Controller 4, or Controller 2 and Controller 3, or Controller 2 and Controller 4 are heterogeneous controllers; if Controller 1 to Controller 4 in the four-controller storage device adopt CPUs with different architectures, then Controller 1 to Controller 4 are heterogeneous controllers. And so on.

[0028] The above gives examples to describe heterogeneous controllers, which is not a limitation. As long as this embodiment ensures that heterogeneous controllers with different design schemes are deployed in the multi-controller storage device and there are differences.

[0029] By setting at least two controllers in the storage device as heterogeneous controllers (such as through differential design of the controllers, etc.), the risk that all controllers cannot work due to the same exception can be avoided, thus ensuring business continuity.

[0030] In this embodiment, in addition to controllers, the storage device also includes a backplane. Among them, each controller of the storage device is respectively connected to the backplane. As Figure 1 shown in the example, storage device 100 includes: Controller 101, Controller 102, and backplane 103. Among them, Controller 101 and Controller 102 are respectively connected to backplane 103. By connecting each controller of the storage device to the backplane, at least one communicable data channel and at least one communicable management channel can be formed between the controllers. Here, the management channel is used to transmit control instructions; the data channel is used to transmit data.

[0031] As an embodiment, this embodiment will configure a corresponding controller configuration table according to the specific device model of the storage device. Tables 1 to 3 take a four-controller storage device as an example to illustrate the controller configuration table:

[0032]

[0033] Table 1

[0034]

[0035] Table 2

[0036]

[0037] Table 3

[0038] As shown in Tables 1 to 3, Tables 1 to 3 show information about each controller on the storage device, such as the controller slot, controller model, data channel type supported by the controller, and the starting address of the memory window corresponding to the controller. It should be noted that in Tables 1 to 3, the starting address of the memory window corresponding to any controller refers to the physical memory space reserved for use by the storage system software in this controller, and this part of the space cannot be used by the OS of this controller; however, as an embodiment, this part of the space can be used by the storage system software of this controller, such as for caching to temporarily store user data not yet written to the disk. As another embodiment, this part of the space can also be allowed to be accessed by other controllers other than this controller. For example, taking this controller as B and other controllers other than this controller as controller A, when controller A writes data to the cache of controller A (i.e., the memory window), controller A also needs to synchronously write the data to the caches of all other controllers other than controller A, such as the cache of controller B (i.e., the storage space starting from the starting address of the memory window corresponding to the above-mentioned controller B), to ensure that the data in the caches of all controllers is the same, so that when a controller takeover occurs, the data is kept consistent and the conditions for controller takeover can be met.

[0039] The starting address of the memory window of the controller needs to meet the requirements for direct access by other controllers. The specific value is determined by the CPU design requirements of this controller. When heterogeneous controllers are used, the starting addresses of the memory windows of controllers with different design schemes may be different. Therefore, the starting address of the memory window of the controller can be defined according to the controller model.

[0040] In this embodiment, any controller can install memory modules of different capacities. For example, a controller provides 4 memory slots. When 8GB memory modules are installed, the capacity is 32GB, and when 16GB memory modules are installed, the capacity is 64GB, etc. In addition, when heterogeneous controllers are used, the memory windows of controllers with different design schemes may also be different. It can be seen that the memory windows supported by the controller are jointly determined by factors such as the physical memory size and CPU design requirements. For example, for a controller using CPU1, when the physical memory size is 32GB, it only supports a 16GB memory window, but for a controller using CPU2, when the physical memory size is 32GB, it can support a 24GB memory window. To ensure that the same amount of user data can be stored in the memory windows of all controllers, the memory window sizes of all controllers need to be the same. Therefore, in this embodiment, a memory window configuration table can be configured according to the characteristics of each controller in the storage device to define the memory window sizes that all controllers in this storage device can use, and its value is the minimum of the memory window sizes actually supported by all controllers. Tables 4 to 6 exemplify the memory window configuration table.

[0041] For example, as shown in Table 4, when the physical memory of the controller is 32 GB, the memory window size that the controller allows other controllers to perform specified operations is 24 GB. When the physical memory of the controller is 64 GB, the memory window size that the controller allows other controllers to perform specified operations is 56 GB. The specified operations here, such as read operations, write operations, etc., are not specifically limited in this embodiment.

[0042]

[0043] Table 4

[0044]

[0045] Table 5

[0046]

[0047] Table 6

[0048] Based on the above description, the method provided by the embodiments of the present application is described below:

[0049] See Figure 2 , Figure 2 which is the flowchart of the method provided by the embodiments of the present application. This method is applied to the above storage device. As Figure 2 shown, the process may include the following steps:

[0050] Step 201, when the first controller starts up, according to the device model of the storage device and the first controller slot where the first controller is located, find the target controller model from the configured controller configuration table.

[0051] Here, the first controller is any controller in the storage device, and the first controller is just named for convenience of description.

[0052] As an embodiment, in this embodiment, each controller in the storage device stores the above controller configuration table locally. When a controller, such as the above first controller, starts up, it uses the device model of the current storage device and the slot where this controller is located as keywords, and finds the controller configuration table entry containing these keywords in the locally stored controller configuration table, and uses the controller model in the found controller configuration table entry as the target controller model.

[0053] Step 202, when the model of the first controller is the same as the target controller model, detect whether there are other controllers that have been started in the storage device currently.

[0054] After the first controller finds the target controller model through the above step 201, it will compare whether the model of this controller matches the target controller model (such as being the same, etc.). If so, it will continue to detect whether there are other controllers that have been started in the storage device currently. Of course, if it is found that the model of this controller does not match the target controller model, this controller can be directly shut down.

[0055] As an embodiment, there are many implementation methods for the first controller to detect whether there are other controllers that have been started in the storage device currently. For example, the connection state of the physical ports of the management channels established between the first controller and other controllers is used to detect whether there are other controllers that have been started in the storage device currently. There is a direct management channel between the first controller and any other controller (which is automatically established during the startup process of the first controller). If both the first controller and any other controller have been started, the connection states of the two physical ports belonging to the corresponding management channel both become connected. Therefore, the first controller can check the connection states of the physical ports used to establish the management channels between the controllers in sequence to determine which controllers have been started. This embodiment does not specifically limit the method for the first controller to detect whether there are other controllers that have been started in the storage device currently.

[0056] Step 203, when the first controller detects that there is a second controller that has been started in the storage device currently, it determines the target data channel type from the above controller configuration table according to the above device model, the first controller slot, and the second controller slot where the second controller is located, and checks whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller.

[0057] Here, the second controller refers to any other controller that has been started in the storage device currently. This naming is only for convenience of description in this embodiment and is not used for limitation.

[0058] In step 203, the first controller slot refers to the slot where the first controller is located. Optionally, in this embodiment, the device model and the first controller slot can be used as keywords to search for the first controller configuration table entry containing the keywords in the above controller configuration table, and the device model and the second controller slot can be used as keywords to search for the second controller configuration table entry containing the keywords in the above controller configuration table. At least one data channel type that exists in both the first controller configuration table entry and the second controller configuration table entry is used as the target data channel type. For example, in one embodiment, the data channel types in the first controller configuration table entry are: Peripheral Component Interconnect Express (PCIE) and Remote Direct Memory Access (RDMA), and the data channel type in the second controller configuration table entry is PCIE. Then, PCIE can be determined as the target data channel type. Another example, the data channel types in the first controller configuration table entry are: PCIE and RDMA, and the data channel types in the second controller configuration table entry are PCIE and RDMA. Then, one of PCIE and RDMA can be determined as the target data channel type, and it can also be determined that both PCIE and RDMA are the target data channel types, which is not limited in the present invention.

[0059] In this embodiment, after determining the target data channel type, the first controller will check whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller. Here, there are many implementation methods for the first controller to check whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller. For example, after the first controller and the second controller are started, the data channels defined according to the hardware design scheme between them will automatically negotiate and establish a connection. Therefore, the first controller can check the connection status of the physical port used to establish the target data channel with the second controller for judgment. Taking the target data channel type as PCIE as an example, the target data channel that conforms to the target data channel type can be a PCIE channel. Taking the target data channel type as RDMA as an example, the target data channel that conforms to the target data channel type can be an RDMA channel. Taking the target data channels as PCIE channel and RDMA channel as an example, the target data channels that conform to the target data channel type can be an RDMA channel and an RDMA channel.

[0060] As an embodiment, if it is found that the above target data channel has not been established between the first controller and the second controller, the first controller can be directly powered off.

[0061] In step 203, multiple other started controllers may be detected. Therefore, in this step, the first controller needs to check the data channels between the first controller and all other started controllers one by one.

[0062] Step 204, if the above-mentioned target data channel has been established between the first controller and the second controller, data transmission is performed through the target data channel and the second controller.

[0063] In this embodiment, there are many implementation manners for the first controller to perform data transmission through the target data channel and the second controller. Examples will be described below and will not be elaborated here for the time being.

[0064] So far. The Figure 2 described process is completed.

[0065] Through Figure 2 As can be seen from the process shown, in this embodiment, in the storage device, by adopting at least two heterogeneous controllers and through the differential design of the controllers, it is avoided that each controller in the storage device is abnormal at the same time, ensuring business continuity;

[0066] Furthermore, in this embodiment, any controller realizes the establishment of a data channel with the peer controller and performs data transmission based on the controller configuration table, without a complex pairwise negotiation process, improving scalability.

[0067] In this embodiment, for a storage device including heterogeneous controllers, the size of the memory window that can be divided on any controller is not only determined by the physical memory of the controller itself and the CPU design requirements, but also further determined by the size of the memory window (such as the minimum value) that can be supported by all other controllers that can be installed in the storage device when the physical memory is a certain value, so as to ensure that the memory windows in multiple controllers can store user data of the same size. Figure 3 An example shows how the first controller determines the memory window (denoted as the first memory window) that allows other controllers to access on this controller.

[0068] As Figure 3 shown, the process may include the following steps:

[0069] Step 301, the first controller looks up the starting address of the target memory window of the first controller from the configured controller configuration table according to the device model of the storage device and the first controller slot where the first controller is located.

[0070] Here, the first controller uses the device model of the current storage device and the first controller slot where this controller is located as keywords, looks up the controller configuration table entry containing these keywords in the locally stored controller configuration table, and determines the starting address of the memory window in this controller configuration table entry as the starting address of the target memory window of the first controller.

[0071] Step 302: The first controller looks up the target memory window size of the first controller from the configured memory window configuration table according to the device model of the storage device and the physical memory size of the first controller.

[0072] Here, the first controller uses the device model of the currently attached storage device and the physical memory size of this controller as keywords to find the memory window configuration table entry containing these keywords in the locally stored memory window configuration table, and determines the memory window size in this memory window configuration table entry as the target memory window size of the first controller.

[0073] Step 303: The first controller divides the first memory window from the physical memory according to the above target memory window start address and the above target memory window size.

[0074] Here, the first controller can divide the first memory window from the physical memory according to the target memory window start address and the target memory window size, so that the start address of the first memory window of the first controller in the physical memory is a predefined physical address (the above target memory window start address), and the size of the memory window is a predefined size (the above target memory window size), which can ensure that when multiple heterogeneous controllers configure the same size of physical memory, the sizes of the divided memory windows are also the same.

[0075] So far, the Figure 3 shown process is completed.

[0076] Through Figure 3 the shown process, it is realized how the first controller determines the first memory window that allows other controllers to access.

[0077] In specific implementation, due to reasons such as incorrect controller installation, there may be a situation where the physical memories between multiple controllers are inconsistent. For example, on one controller in the storage device BBBB, 32GB of physical memory is installed, and the memory window size is 16GB, while on another controller, 64GB of physical memory is installed, and the memory window size is 48GB.

[0078] In this case, as an embodiment, after checking that a target data channel conforming to the target data channel type has been established between the first controller and the second controller, it further includes: obtaining the second memory window that the second controller allows other controllers to access, and checking whether the second memory window and the first memory window that the first controller allows other controllers to access match (such as being consistent, etc.). If they match, then continue to execute the above step 204.

[0079] As another embodiment, before checking whether a target data channel conforming to the target data channel type has been established between the first controller and the second controller, the method further includes: obtaining a second memory window allowed by the second controller to be accessed by other controllers, and checking whether the second memory window matches (such as being consistent, etc.) the first memory window allowed by the first controller to be accessed by other controllers. If they match, continue to execute the step of checking whether a target data channel conforming to the target data channel type has been established between the first controller and the second controller.

[0080] As an embodiment, if the above check result is a mismatch, the first controller can be directly powered off.

[0081] As an embodiment, there are many implementation manners for the first controller to obtain the second memory window allowed by the second controller to be accessed by other controllers. For example, the first controller queries the second controller about the memory window size of the second controller. Optionally, if there is a management channel that has been established between the current first controller and the second controller, the first controller can send a query request to the second controller based on this management channel to query the second memory window allowed by the second controller to be accessed by other controllers; then, the first controller obtains the second memory window returned by the second controller through the established management channel between the first controller and the second controller. That is, finally, the first controller obtains the second memory window allowed by the second controller to be accessed by other controllers. As for how the second controller determines the second memory window allowed by it to be accessed by other controllers, please refer to the Figure 3 flow shown above, which will not be elaborated here.

[0082] As an embodiment, the above first controller (similarly for other controllers) can receive a first operation instruction. Here, the first operation instruction is just a naming for convenience of description and is not used for limitation.

[0083] As an embodiment, the front-end server can issue read and write commands for any LUN (Logic Unit Number) allocated to the server. After the storage device receives the read and write commands for a certain LUN, according to the existing processing flow, if the cache needs to be operated, a first operation instruction for the cache is generated. The first operation instruction is used to indicate a first specified operation such as read or write. The first operation instruction also indicates a first target address for performing the above first specified operation. As an embodiment, the first target address here is the cache address storing the user data of the LUN, which can be specifically considered as the relative cache address.

[0084] Optionally, after receiving the first operation instruction, when the first controller determines to perform the above-mentioned first specified operation on the cache corresponding to this controller according to the first operation instruction, if it is found that the starting address of the memory window corresponding to the first controller is empty, the starting addresses of the memory windows corresponding to all controllers under this device model are obtained from the controller configuration table according to the above-mentioned device model and saved in the local memory. By saving the starting addresses of the memory windows corresponding to each controller under the same storage device in the local memory, when the starting address of the memory window corresponding to any other controller is involved subsequently, it is no longer read from the above-mentioned controller configuration table, but directly obtained from the local memory, improving efficiency.

[0085] As an embodiment, in the above description, the starting address of the memory window corresponding to the first controller being empty means that no data is stored at the starting address of the memory window corresponding to the first controller.

[0086] Furthermore, in this embodiment, when the first controller determines to perform the above-mentioned first specified operation on the cache corresponding to this controller according to the first operation instruction, it also determines the first physical memory absolute address of the first controller based on the above-mentioned starting address of the memory window and the first target address carried by the first operation instruction; and performs the above-mentioned first specified operation on the first physical memory absolute address.

[0087] As an embodiment, there are many implementation manners for determining the first physical memory absolute address of the first controller based on the above-mentioned starting address of the memory window and the first target address carried by the first operation instruction. For example, using the first target address carried by the first operation instruction as the offset, adding this offset to the above-mentioned starting address of the memory window is the above-mentioned first physical memory absolute address. Specifically, it can refer to the following formula: First physical memory absolute address = starting address of the memory window + first target address (offset).

[0088] As an embodiment, in this embodiment, to ensure service reliability, the first controller can also perform the first specified operation on the caches of other controllers (still taking the second controller as an example) based on the above-mentioned first operation instruction. Specifically, refer to Figure 4 the process shown.

[0089] Refer to Figure 4 , Figure 4 which is the flowchart of step 204 provided by the embodiment of the present application. As Figure 4 shown, this process may include the following steps:

[0090] Step 401, when the first controller determines to perform a specified operation on the cache corresponding to the second controller according to the first operation instruction, determine the starting address of the memory window corresponding to the second controller.

[0091] Optionally, in this embodiment, based on the first controller described above saving the start addresses of the memory windows corresponding to each controller under the same storage device in the local memory, when applied to step 401, the first controller can find the start address of the memory window corresponding to the second controller from the local content, that is, finally the start address of the memory window corresponding to the second controller is determined.

[0092] Step 402, determine the second physical memory absolute address of the second controller according to the start address of the memory window corresponding to the second controller and the first target address carried in the first operation instruction.

[0093] For example, taking the first target address carried in the above first operation instruction as the offset, adding this offset on the basis of the start address of the memory window corresponding to the second controller above is the above second physical memory absolute address. Specifically, it can refer to the following formula: Second physical memory absolute address = the start address of the memory window corresponding to the second controller above + the first target address (offset).

[0094] Step 403, the first controller performs data transmission through a target data channel between the first controller and the second controller to execute the first specified operation indicated by the first operation instruction for the second physical memory absolute address.

[0095] Optionally, in this embodiment, if there is only one target data channel between the first controller and the second controller, directly select this target data channel to transmit data. If there are multiple target data channels between the first controller and the second controller, then a target data channel can be preferably selected through various selection algorithms such as cyclic selection, etc. This is not elaborated in detail in the present invention.

[0096] So far, the Figure 4 shown process is completed.

[0097] Correspondingly, in this embodiment, there may also be a situation where the second controller determines to perform a specified operation on the cache corresponding to the first controller based on the second operation instruction. In this case, the first controller performs data transmission through a target data channel between the first controller and the second controller to execute the second specified operation indicated by the second operation instruction for the third physical memory absolute address of the first controller; wherein, the third physical memory absolute address is determined based on the start address of the memory window corresponding to the first controller and the second target address carried in the second operation instruction; the operation instruction indicates the second target address, and the second target address is the cache relative address.

[0098] The method provided in the embodiments of the present application has been described above. Next, the device provided in the embodiments of the present application will be described:

[0099] See Figure 5, Figure 5 It is a structural diagram of the storage device provided by an embodiment of this application. The storage device includes N controllers, where N is greater than 1, and at least two of the N controllers are heterogeneous controllers;

[0100] As Figure 5 shown, any one of the controllers includes: a detection unit, an inspection unit, and a processing unit;

[0101] Among them, the detection unit is used to, when the first controller where it is located starts up, find the target controller model from the configured controller configuration table according to the device model of the storage device and the first controller slot where the first controller is located, and when the model of the first controller is the same as the target controller model, detect whether there are other controllers that have been started in the storage device currently;

[0102] The inspection unit is used to, when the detection unit detects that there is a second controller that has been started in the storage device currently, where the second controller refers to any other controller that has been started in the storage device currently, determine the target data channel type from the controller configuration table according to the device model, the first controller slot, and the second controller slot where the second controller is located, and check whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller;

[0103] The processing unit is used to, when the inspection unit checks that the target data channel has been established between the first controller and the second controller, after the first controller successfully completes startup, perform data transmission with the second controller through the target data channel.

[0104] Optionally, the at least two controllers being heterogeneous controllers means that: the at least two controllers use CPUs of the same architecture from different manufacturers, or the at least two controllers use CPUs of different architectures.

[0105] Optionally, before the inspection unit checks whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller, it further obtains a second memory window that the second controller allows other controllers to access; checks whether the second memory window matches the first memory window that the first controller allows other controllers to access, and if so, continues to check whether at least one target data channel that conforms to the target data channel type has been established between the first controller and the second controller.

[0106] Alternatively, after the checking unit checks that a target data channel conforming to the target data channel type has been established between the first controller and the second controller, it further obtains a second memory window allowed by the second controller to be accessed by other controllers; checks whether the second memory window matches the first memory window allowed by the first controller to be accessed by other controllers. If so, it triggers the processing unit to continue executing the step of data transmission through the target data channel and the second controller.

[0107] Optionally, the checking unit determines the first memory window allowed by the first controller to be accessed by other controllers through the following steps:

[0108] According to the device model of the storage device and the first controller slot where the first controller is located, find the starting address of the target memory window of the first controller from the configured controller configuration table;

[0109] According to the device model of the storage device and the physical memory size of the first controller, find the size of the target memory window of the first controller from the configured memory window configuration table;

[0110] Divide the first memory window from the physical memory according to the starting address of the target memory window and the size of the target memory window.

[0111] Optionally, the checking unit obtaining the second memory window allowed by the second controller to be accessed by other controllers includes:

[0112] Send a query request to the second controller through the established management channel between the first controller and the second controller to query the second memory window allowed by the second controller to be accessed by other controllers;

[0113] Obtain the second memory window returned by the second controller through the established management channel between the first controller and the second controller.

[0114] Optionally, the processing unit further receives a first operation instruction; the first operation instruction is used to indicate a first specified operation; and, when determining to perform the specified operation on the cache corresponding to the present controller according to the first operation instruction, if it is found that the starting address of the memory window corresponding to the first controller is empty, where the memory window starting address refers to the starting address of the memory window allowed by the first controller to perform the specified operation, then obtain the starting addresses of the memory windows corresponding to all controllers under this device model from the controller configuration table and save them in the local memory.

[0115] Optionally, the first operation instruction indicates a first target address, and the first destination address is a cache relative address;

[0116] When the processing unit further determines to perform the specified operation on the cache corresponding to the present controller according to the first operation instruction, it determines the first absolute physical memory address of the first controller according to the start address of the memory window and the target address carried by the operation instruction; and performs the first specified operation on the first absolute physical memory address.

[0117] Optionally, the data transmission between the processing unit and the second controller through the target data channel includes:

[0118] When it is determined to perform a specified operation on the cache corresponding to the second controller according to the first operation instruction, the start address of the memory window corresponding to the second controller is determined, and the second absolute physical memory address of the second controller is determined according to the start address of the memory window corresponding to the second controller and the first target address carried by the first operation instruction; the first operation instruction indicates the first target address, and the first target address is the relative cache address; data transmission is performed through a target data channel between the processing unit and the second controller to perform the first specified operation indicated by the first operation instruction on the second absolute physical memory address.

[0119] Alternatively, the data transmission between the processing unit and the second controller through the target data channel includes: the first controller performs data transmission through a target data channel between the first controller and the second controller to perform the second specified operation indicated by the second operation instruction on the third absolute physical memory address of the first controller; wherein, the third absolute physical memory address is determined by the second controller when it is determined to perform a specified operation on the cache corresponding to the first controller according to the second operation instruction, and the third absolute physical memory address is determined according to the start address of the memory window corresponding to the first controller and the second target address carried by the second operation instruction; the operation instruction indicates the second target address, and the second target address is the relative cache address.

[0120] Thus far, the Figure 5 structural description of the storage device shown is completed.

[0121] For the device embodiments, since they basically correspond to the method embodiments, the relevant parts can refer to the partial descriptions of the method embodiments. The device embodiments described above are only illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the present application. Those of ordinary skill in the art can understand and implement it without creative efforts.

[0122] The above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the scope of protection of the present application.

Claims

1. A storage control method applied to a storage device, characterized in that, The storage device includes N controllers, where N is greater than 1, and at least two of the N controllers are heterogeneous controllers; the method includes: When a first controller starts up, it looks up a target controller model from a configured controller configuration table according to the device model of the storage device and the slot of the first controller where the first controller is located; the first controller is any one of the controllers in the storage device; wherein, the controller configuration table also records the starting address of the memory window corresponding to each controller, and the starting address of the memory window corresponding to any controller refers to the physical memory space reserved for use by the storage system software in the controller, and the physical memory space is not allowed to be used by the operating system of the controller and is allowed to be accessed by a controller heterogeneous to the controller. When the model of the first controller matches the target controller model, the first controller detects whether there are other controllers that have been started in the storage device currently. When the first controller detects that there is a second controller that has been started in the storage device currently, the second controller refers to any other controller that has been started in the storage device currently, it determines a target data channel type from the controller configuration table according to the device model, the slot of the first controller, and the slot of the second controller where the second controller is located, and checks whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller. If the target data channel has been established between the first controller and the second controller, after the first controller successfully completes startup, it performs data transmission with the second controller through the target data channel.

2. The method according to claim 1, characterized in that, The at least two controllers being heterogeneous controllers means that: the at least two controllers use CPUs of the same architecture from different manufacturers, or the at least two controllers use CPUs of different architectures.

3. The method according to claim 1, wherein Before the first controller checks whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller, it further includes: obtaining a second memory window that allows other controllers to access the second controller; checking whether the second memory window matches the first memory window that allows other controllers to access the first controller, and if so, continuing to execute the step of checking whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller; or After the first controller checks that a target data channel that conforms to the target data channel type has been established between the first controller and the second controller, it further includes: obtaining a second memory window that allows other controllers to access the second controller; checking whether the second memory window matches the first memory window that allows other controllers to access the first controller, and if so, continuing to execute the step of performing data transmission with the second controller through the target data channel.

4. The method according to claim 3, wherein The first memory window that allows other controllers to access the first controller is determined through the following steps: Find the starting address of the target memory window of the first controller from the configured controller configuration table according to the device model of the storage device and the slot of the first controller where the first controller is located; Find the size of the target memory window of the first controller from the configured memory window configuration table according to the device model of the storage device and the physical memory size of the first controller; Divide the first memory window from the physical memory according to the starting address of the target memory window and the size of the target memory window.

5. The method according to claim 3, wherein The obtaining the second memory window that the second controller allows other controllers to access includes: Send a query request to the second controller through the established management channel between the first controller and the second controller to query the second memory window that the second controller allows other controllers to access; Obtain the second memory window returned by the second controller through the established management channel between the first controller and the second controller.

6. The method according to claim 1, wherein The method further includes: The first controller receives a first operation instruction; the first operation instruction is used to indicate to perform a first specified operation; When the first controller determines to perform the first specified operation on the cache corresponding to this controller according to the first operation instruction, if it is found that the starting address of the memory window corresponding to the first controller is empty, where the starting address of the memory window refers to the starting address of the memory window that the first controller allows to perform the specified operation, then obtain the starting addresses of the memory windows corresponding to all controllers under this device model from the controller configuration table and save them in the local memory.

7. The method according to claim 6, wherein The first operation instruction indicates a first target address, and the first target address is a cache relative address; The method further includes: When the first controller determines to perform the first specified operation on the cache corresponding to this controller according to the first operation instruction, determine the first physical memory absolute address of the first controller according to the starting address of the memory window and the first target address carried by the first operation instruction; Perform the first specified operation on the first physical memory absolute address.

8. The method according to claim 1 or 6 or 7, characterized in that The first controller performs data transmission with the second controller through the target data channel, including: When the first controller determines to perform the first specified operation on the cache corresponding to the second controller according to the first operation instruction, determine the starting address of the memory window corresponding to the second controller, and determine the second physical memory absolute address of the second controller according to the starting address of the memory window corresponding to the second controller and the first target address carried by the first operation instruction; the first operation instruction indicates a first target address, and the first target address is a cache relative address; The first controller performs data transmission through a target data channel between the first controller and the second controller to perform the first specified operation indicated by the first operation instruction on the second physical memory absolute address.

9. The method according to claim 1, wherein The first controller performs data transmission with the second controller through the target data channel, including: The first controller performs a second specified operation indicated by a second operation instruction on an absolute address of a third physical memory of the first controller through a target data channel between the first controller and the second controller; Wherein, the absolute address of the third physical memory is determined by the second controller when performing a specified operation on a cache corresponding to the first controller based on the second operation instruction, and the absolute address of the third physical memory is determined based on a memory window start address corresponding to the first controller and a second target address carried in the second operation instruction; the second operation instruction indicates the second target address, and the second target address is a cache relative address.

10. A storage device, characterized in that, The storage device includes N controllers, N>1, and at least two of the N controllers are heterogeneous controllers; Any controller includes: a detection unit, an inspection unit, and a processing unit; Wherein, the detection unit is configured to, when the first controller where it is located is started, find a target controller model from a configured controller configuration table according to the device model of the storage device and the slot of the first controller where it is located, and when the model of the first controller is the same as the target controller model, detect whether there are other controllers that have been started in the storage device currently; wherein, the controller configuration table also records the memory window start address corresponding to each controller, and the memory window start address corresponding to any controller refers to the physical memory space reserved for use by the storage system software in the controller, and the physical memory space is not allowed to be used by the operating system of the controller, and is allowed to be accessed by a controller heterogeneous to the controller; The inspection unit is configured to, when the detection unit detects that there is a second controller that has been started in the storage device currently, the second controller refers to any other controller that has been started in the storage device currently, then determine a target data channel type from the controller configuration table according to the device model, the slot of the first controller, and the slot of the second controller where the second controller is located, and check whether a target data channel that conforms to the target data channel type has been established between the first controller and the second controller; The processing unit is configured to, when the inspection unit checks that the target data channel has been established between the first controller and the second controller, after the first controller successfully completes startup, perform data transmission with the second controller through the target data channel.

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