Analog switch based flash switching system

Abstract

The application relates to a flash switching system based on analog switches, and solves the technical problems of the existing flash storage program system, that is, the damage of flash chips influences system operation, the replacement of flash causes system downtime and economic loss, the double-flash switching system and method are complex and high in cost, and the double-flash switching system and method do not support the switching of multiple flash chips. The system comprises a main control chip, a peripheral chip, an analog switch group, a power supply chip and at least two flash chips; the analog switch group comprises at least one analog switch; the peripheral chip and the analog switch group are interactively connected with the main control chip; the power supply chip is connected with the peripheral chip, the main control chip, the analog switch group and each flash chip respectively and is used for power supply; the analog switch group is used for selectively connecting the main control chip with each flash chip under the control of an external switching control signal; all signal connection ends of the flash chips are connected with the main control chip through the analog switch group.

Description

Technical Field

[0001] This invention relates to a flash chip switching system, and more specifically to a flash switching system based on an analog switch. Background Technology

[0002] With the development of information technology, embedded systems based on FPGA, DSP, ARM, and other main control chips are increasingly used in fields such as industrial controllers, camera systems, and drone systems. Embedded systems using FPGA, DSP, or ARM as the main control chip need to store the program in a flash chip and load the program from the flash chip after power-on. However, long-term use of flash chips may lead to an increase in bad blocks, causing the program to fail to load correctly. Replacing the flash chip or other components takes a considerable amount of time, and prolonged system downtime can result in economic losses or other damages.

[0003] Flash chips are divided into two types: NAND flash and NOR flash. NAND flash has the advantages of large capacity and fast programming speed, but its disadvantage is a higher number of bad blocks, which increases with prolonged use or storage. NOR flash has the advantages of high reliability and fewer bad blocks, but its disadvantage is longer programming time, which can lead to bad blocks with prolonged use or environmental factors (space conditions, high temperatures, etc.). Currently, FPGA, ARM, and DSP chips have small program sizes, and NOR flash is generally chosen due to its high reliability. The bad block problem caused by prolonged use or environmental factors in NOR flash affects the reliability of embedded systems. Embedded systems typically implement multiple functions, each requiring different programs. Repeated programming for function switching can affect efficiency and lifespan; therefore, a flash switching system is needed to improve efficiency and reliability.

[0004] The basic components of an embedded system are a main control chip, a power supply chip, peripheral chips, and a flash chip, such as... Figure 1 As shown. The main control chip controls the system, while peripheral chips include external cache chips, interface chips, crystal oscillators, etc. The flash chip stores the program, and the power chip provides power to the system. Since the system cannot boot due to flash damage, it can only be shut down to replace the flash chip and reprogram it, which affects system operation.

[0005] For systems with two or more flash memory, how can we ensure that they always boot from the working flash memory? If they boot from the default flash upon power-on and then switch flashes due to startup failures, it wastes a significant amount of time. Chinese invention patent CN113918389A discloses a dual-flash switching system and method for servers. This dual-flash switching system is applicable to the server field. The specified PCH southbridge chip is also a dedicated chip. The master flash chip and slave flash chip are connected to the target chip via a bus. The target chip CS is connected to the master flash chip and slave chip CS via a switch chip. The switch chip's SEL terminal is connected to the CPLD chip. The BMC module records and selects the available flash chip from the CPLD, ensuring that the system boots directly from the available flash memory each time, instead of from the default location, thus saving startup time. This patent: (1) uses CPLD and BMC modules, increasing system complexity and cost; (2) selects flash chips via CS signal, supporting only two flash chips and not switching between multiple flash chips; (3) except for the CS signal, all other signals of the two flash chips are directly connected to the main control chip, and an abnormal CS signal during startup will cause the target chip to switch between the two flash chips, making startup impossible. Furthermore, this patent is limited to the server field and includes dedicated chips such as the PCH southbridge chip. Summary of the Invention

[0006] The purpose of this invention is to solve the technical problems of existing flash memory storage systems where flash chip damage affects system operation, system downtime during flash replacement causes economic losses, and dual flash switching systems and methods are complex, costly, and do not support switching multiple flash chips. The invention proposes a flash switching system based on an analog switch.

[0007] The technical solution provided by this invention is as follows:

[0008] A flash switching system based on analog switches is characterized by comprising a main control chip, peripheral chips, an analog switch group, a power supply chip, and at least two flash chips.

[0009] The analog switch group includes at least one analog switch;

[0010] The peripheral chips and analog switch groups are all interconnected with the main control chip;

[0011] The power chip is connected to the peripheral chip, the main control chip, the analog switch group and each flash chip respectively, for power supply;

[0012] The analog switch group is used to enable the main control chip to selectively connect to each of the flash chips under the control of an external switching control signal;

[0013] All signal connection terminals of the flash chip are connected to the main control chip through an analog switch group.

[0014] Furthermore, the flash chip has a CS port, a CLK port, and multiple data ports for signal connection with the main control chip; the CS port, CLK port, and each data port of the flash chip are all electrically connected to the analog switch group.

[0015] The main control chip has a CS port, a CLK port, and multiple data ports for signal connection with the flash chip; the CS port, CLK port, and each data port of the main control chip are all electrically connected to the analog switch group.

[0016] Furthermore, it also includes a system external connector, which is equipped with a switching control circuit for generating the switching control signal;

[0017] The switching control circuit has a control switch group, which controls the switch states to cause the switching control circuit to generate different switching control signals.

[0018] Furthermore, the number of Flash chips is 2^n, where n ≥ 1;

[0019] Each Flash chip has a different program programmed into it, which is used to enable the main control chip to execute different program tasks;

[0020] Alternatively, each program can be burned into at least two Flash chips to enable the use of another Flash chip with the same program when one Flash chip fails.

[0021] Furthermore, the analog switch is a single-pole double-throw analog switch;

[0022] The single-pole double-throw analog switch is a multi-channel single-pole double-throw analog switch or a group of single-channel single-pole double-throw analog switches;

[0023] The switching control signal includes a switching control sub-signal corresponding to a single-pole double-throw analog switch, and the switching control sub-signal is used to be loaded onto the control terminal of the corresponding single-pole double-throw analog switch.

[0024] The control switches in the control switch group correspond one-to-one with the switching control sub-signals; a change in the state of any of the switching control sub-signals can switch the switching state of the corresponding control switch.

[0025] Furthermore, the analog switch group includes at least one cascaded switch layer, and each switch layer includes one or more single-pole double-throw analog switches;

[0026] The common terminal of the single-pole double-throw analog switch in the first layer of the switch layer is electrically connected to the main control chip; the selection terminal of the single-pole double-throw analog switch in the last layer of the switch layer is electrically connected to the flash chip.

[0027] Between two adjacent switch layers, the selector terminal of the single-pole double-throw analog switch of the previous switch layer is electrically connected to the common terminal of the single-pole double-throw analog switch of the next switch layer.

[0028] Furthermore, each of the single-pole double-throw analog switches in the same switching layer shares the same switching control sub-signal.

[0029] Furthermore, the switching control circuit includes a switching control sub-circuit corresponding one-to-one with each of the switching control sub-signals, and the switching control sub-circuit is used to generate the corresponding switching control sub-signal;

[0030] The switching control sub-circuit includes a control switch, a relay, a first resistor, and a second resistor;

[0031] The control switch is used to control the relay under the action of an external switching control signal, so that the relay can switch between a conducting state and a disconnected state.

[0032] A high-level signal is applied to the input terminal of the relay, and a first resistor and a second resistor are connected in series between the output terminal of the relay and the ground wire.

[0033] The output terminal of the switching control sub-circuit is located between the first resistor and the second resistor.

[0034] Furthermore, the formulas for calculating the resistance values ​​of the first resistor R1 and the second resistor R2 are as follows:

[0035]

[0036]

[0037] Where Ua is the high level applied to the input terminal of the relay, Ub is the voltage value of the switching control sub-signal, and P(R2) is the maximum power consumed by resistor R2.

[0038] Furthermore, the switching control circuit includes a switching control sub-circuit corresponding one-to-one with each of the switching control sub-signals, and the switching control sub-circuit is used to generate the corresponding switching control sub-signal;

[0039] The switching control sub-circuit includes a control switch, a relay, and a resistor;

[0040] The control switch is used to control the relay under the action of an external switching control signal, so that the relay can switch between a conducting state and a disconnected state.

[0041] The input terminal of the relay is loaded with a low-level signal, the output terminal of the relay is connected to one end of a resistor, and the other end of the resistor is connected to a high-level signal.

[0042] The output terminal of the switching control sub-circuit is located between the output terminal of the relay and the resistor.

[0043] The beneficial effects of this invention are:

[0044] 1. In this invention, all signal connection terminals of the flash chip are connected to the analog switch group, which in turn is connected to the main control chip. This ensures that the main control chip can only communicate with one flash chip at most, improving the anti-interference capability of the embedded system during startup and preventing the main control chip from switching between multiple flash chips and failing to start due to CS signal glitches or abnormal CS signals.

[0045] 2. The flash switching system based on analog switches provided by this invention is applicable to all systems that use flash chips, increasing the application scenarios of embedded systems and making it more versatile.

[0046] 3. This invention enables manual switching through the control switch group set by the switching control circuit of the system's external connector. The program in the flash chip is repeatedly burned into at least two flash chips. After switching, the damaged flash chip can be replaced without affecting the operation of the main control chip. This avoids the situation in the flash chip switching mode of existing embedded systems where it is impossible to update one of the flash chips without affecting the operation of the main control chip.

[0047] 4. In the flash switching system provided by this invention, each flash chip can be programmed with different programs, enabling the main control chip to switch between multiple program tasks. This avoids the impact of repeated program programming on work efficiency and service life during the use of embedded systems, and further improves the reliability of system operation. Attached Figure Description

[0048] Figure 1 For embedded systems with existing main control chips;

[0049] Figure 2 This is a schematic diagram of a single analog switch embodiment of the flash switching system based on analog switches according to the present invention. Figure 1 ;

[0050] Figure 3 This is a schematic diagram of an embodiment of the multi-channel single-pole double-throw analog switch in this invention;

[0051] Figure 4 This is a schematic diagram of a single analog switch embodiment of the flash switching system based on analog switches according to the present invention. Figure 2 ;

[0052] Figure 5 This is a schematic diagram of the switching control of one channel of the flash switching system based on analog switches according to the present invention (relay loaded with high level);

[0053] Figure 6 This is a schematic diagram of the switching control of one channel of the flash switching system based on analog switches according to the present invention (relay loaded with low level);

[0054] Figure 7 The diagram shows three analog switch embodiments of the flash switching system based on analog switches according to the present invention. Detailed Implementation

[0055] Example 1

[0056] See Figure 2 This embodiment provides a flash switching system based on an analog switch. The switching system includes a main control chip, peripheral chips, an analog switch, a power supply chip, two flash chips, and an external connector. The peripheral chips and the analog switch are interconnected with the main control chip. The power supply chip is connected to the peripheral chips, the main control chip, the analog switch, and the two flash chips respectively for power supply.

[0057] The analog switch is used to selectively connect the main control chip to one of two flash chips under the control of an external switching control signal. The flash chip selected is SPI Nor Flash, and a total of 6 control signal lines need to be connected to the main control chip. See also Figure 3The analog switch is a four-channel single-pole double-throw (SPD) analog switch. It's understood that a multi-channel SPD analog switch can also be replaced by a set of single-channel SPD analog switches. The four common terminals DA, DB, DC, and DD of the four-channel SPD analog switch are connected to the main control chip. The two select terminals of each channel of the four-channel SPD analog switch are connected to flash chip 1 and flash chip 2 respectively. Whether the four-channel SPD analog switch is connected to flash chip 1 or flash chip 2 depends on the levels of the enable and control terminals. Setting the enable terminal EN# simultaneously controls the switching of the common terminals DA, DB, DC, and DD. A low level is active for the enable terminal EN#. If EN# is high, the analog switch does not work, and none of the channels are connected. A high or low level at the control terminal IN selects different paths; for example, if the control terminal IN is high, S2 is on; if the control terminal IN is low, S1 is on. In practical applications, EN# can be directly grounded to pull it low, so that the analog switch chip is always in working state, or the EN# signal can be used as a control signal.

[0058] All signal connection terminals of the flash chip are connected to the main control chip through analog switches. Specifically, the flash chip has a CS port, a CLK port, and four data ports for signal connection with the main control chip; the CS port, CLK port, and each data port of the flash chip are electrically connected to the analog switch group; the main control chip has a CS port, a CLK port, and multiple data ports for signal connection with the flash chip; the CS port, CLK port, and each data port of the main control chip are electrically connected to the analog switch group.

[0059] like Figure 4 As shown, the embedded system control is completed by the main control chip, but the analog switch input control signal cannot be controlled by the main control chip because the main control chip cannot work before the flash program is loaded. To achieve continuous operation of the control system and complete the switching as quickly as possible, a system external connector is designed, and operation can be performed on the system external connector. The system external connector is equipped with a switching control circuit, which is used to generate switching control signals. The switching control circuit has a control switch group, which controls the switch states to cause the switching control circuit to generate different switching control signals. The switching control circuit includes switching control sub-circuits that correspond one-to-one with each switching control sub-signal, which are used to generate the corresponding switching control sub-signals. The switching control sub-signals correspond one-to-one with single-pole double-throw analog switches, and are used to load the control terminals of the corresponding single-pole double-throw analog switches. The control switches in the control switch group correspond one-to-one with the switching control sub-signals. A change in the state of any of the switching control sub-signals can switch the switching state of the corresponding control switch.

[0060] The switching control sub-circuit includes a control switch, a relay, and a resistor. Refer to [link / reference needed] for the level signal on the relay. Figure 5 When a high-level signal is applied to the input terminal of the relay, a first resistor and a second resistor are connected in series between the output terminal of the relay and the ground wire. The output terminal of the switching control sub-circuit is located between the first resistor R1 and the second resistor R2. When the control switch is open, the relay is not conducting. When the switching control sub-signal is low, the control switch is closed, the relay conducts. When the switching control sub-signal is high, it controls the conduction of the analog switch with flash chip 1 or flash chip 2. Specifically, the resistance values ​​of the first resistor R1 and the second resistor R2 are calculated using the following formula:

[0061]

[0062]

[0063] Where Ua is the high level applied to the input terminal of the relay, Ub is the minimum voltage value of the switching control sub-signal, and P(R2) is the maximum power consumed by resistor R2.

[0064] like Figure 6 As shown, when a low-level signal is applied to the input terminal of the relay, the output terminal of the relay is connected to a resistor, and the other end of the resistor is connected to a high-level signal; the output terminal of the switching control sub-circuit is located between the output terminal of the relay and the resistor; when the control switch is open, the relay is not conducting, and the high-level signal is transmitted to the analog switch through R, and the switching control sub-signal becomes a high-level signal; when the control switch is closed, the relay conducts, and the low-level signal is directly connected to the analog switch, and the switching control sub-signal becomes a low-level signal, thereby controlling the conduction of the analog switch with flash chip 1 or flash chip 2.

[0065] It is understood that in other embodiments, the device used to connect the main control chip to one of the two flash chips under the control of an external switching control signal is not limited to a single-pole double-throw analog switch chip, but can also be a multiplexer chip. The multiplexer chip selects one of the multiple channels, such as an 8-to-1 or a 16-to-1. Taking an 8-to-1 as an example, the common terminal selects one channel to connect according to the control command. If there are eight channels, there are three control signals, with eight binary values ​​from 000 to 111, each corresponding to a selection channel. The flash chip has six signals, and six 8-to-1 multiplexer chips can be used to achieve switching.

[0066] In this embodiment, flash chip 1 and flash chip 2 can be programmed with the same program. In this way, if one of the flash chips is damaged, the damaged flash chip can be repaired or replaced without closing the program.

[0067] Example 2

[0068] See Figure 7 The flash switching system based on analog switches provided in this embodiment achieves switching of four flash chips by cascading analog switch chips. It includes a main control chip, peripheral chips, analog switch group, power supply chip, four flash chips and system external connectors.

[0069] The analog switch group comprises three analog switches; the analog switch group includes two cascaded switch layers, each switch layer including one or two multi-channel single-pole double-throw (SPDT) analog switches. It is understood that the multi-channel SPDT analog switches can also be replaced by a group of single-channel SPDT analog switches. The common terminal of the multi-channel SPDT analog switches in the first switch layer is electrically connected to the main control chip; the selector terminal of the multi-channel SPDT analog switches in the last switch layer is electrically connected to the flash chips; between adjacent switch layers, the selector terminal of the multi-channel SPDT analog switches in the previous switch layer is electrically connected to the common terminal of the multi-channel SPDT analog switches in the next switch layer; each multi-channel SPDT analog switch in the same switch layer shares the same switching control sub-signal. In other embodiments, the analog switches are connected to the main control chip respectively. For example, the analog switch group consists of two analog switches, with the common terminal of the two analog switches directly connected to the main control chip, and the selector terminals of the two analog switches electrically connected to four flash chips respectively.

[0070] The control switches in the control switch group correspond one-to-one with the switching control sub-signals; switching the state of any control switch can change the state of the corresponding switching control sub-signal.

[0071] The peripheral chips and analog switch groups are all interconnected with the main control chip; the power supply chip is connected to the peripheral chips, the main control chip, the analog switch groups and four flash chips respectively, for power supply.

[0072] The system's external connector is equipped with a switching control circuit, which generates switching control signals. The switching control circuit has a control switch group, which controls the switch states to cause the switching control circuit to generate different switching control signals.

[0073] The analog switch group is used to selectively connect the main control chip to each flash chip under the control of an external switching control signal. All signal connection terminals of the flash chips are connected to the main control chip through the analog switch group. Specifically, the flash chip has a CS port, a CLK port, and multiple data ports for signal connection with the main control chip. The CS port, CLK port, and each data port of the flash chip are all electrically connected to the analog switch group. The main control chip has a CS port, a CLK port, and multiple data ports for signal connection with the flash chip. The CS port, CLK port, and each data port of the main control chip are all electrically connected to the analog switch group.

[0074] The switching control circuit includes switching control sub-circuits that correspond one-to-one with each switching control sub-signal. These sub-circuits generate the corresponding switching control sub-signals. Each switching control sub-circuit includes control switches, relays, and resistors. For example... Figure 5 As shown, if a high-level signal is applied to the input terminal of the relay, the switching control sub-circuit includes a control switch, a relay, a first resistor, and a second resistor. The control switch controls the relay, enabling it to switch between an on-state and an off-state. A first resistor and a second resistor are connected in series between the relay's output terminal and ground. The output terminal of the switching control sub-circuit is located between the first resistor and the second resistor. The formulas for calculating the resistance values ​​of the first resistor R1 and the second resistor R2 are as follows:

[0075]

[0076]

[0077] Where Ua is the high level applied to the input terminal of the relay, Ub is the voltage value of the switching control sub-signal, and P(R2) is the maximum power consumed by resistor R2; the value of Ub must be greater than or equal to the minimum voltage value of the switching control sub-signal.

[0078] like Figure 6 As shown, if a low-level signal is applied to the input terminal of the relay, the switching control sub-circuit includes a control switch, a relay, and a resistor; the control switch is used to control the relay, enabling the relay to switch between the on and off states; the output terminal of the relay is connected to the resistor, and the other end of the resistor is connected to a high-level signal; the output terminal of the switching control sub-circuit is located between the output terminal of the relay and the resistor.

[0079] Analog switch cascading can connect multiple flash chips. The following example illustrates a two-stage, three-analog-switch cascading configuration; multi-stage cascading follows the same principle. The two-stage, three-switch cascading diagram is shown below. Figure 7As shown, the control signal combination composed of switching control sub-signal 1, switching control sub-signal 2, and switching control sub-signal 3 has four states: 00x, 01x, 1x0, and 1x1. Taking the control signal being high (S2 is on) and low (S1 is on) as an example, the flash selection truth table is illustrated in Table 1. The three analog switches are A, B, and C. Switching control sub-signal 1 is the control signal for analog switch 1, switching control sub-signal 2 is the control signal for analog switch 2, and switching control sub-signal 3 is the control signal for analog switch 3.

[0080] Table 1

[0081] Serial Number control signals Flash Selection 1 00x flash chip 1 2 01x flash chip 2 3 1x0 flash chip 3 4 1x1 flash chip 4

[0082] If analog switches at the same level use the same switching control sub-signal, then switching control sub-signal 2 and switching control sub-signal 3 use the same switching control sub-signal. The corresponding truth table is shown in Table 2.

[0083] Table 2

[0084] Serial Number control signals Flash Selection 1 00 flash chip 1 2 01 flash chip 2 3 10 flash chip 3 4 11 flash chip 4

[0085] Flash switching systems can improve system reliability, but each flash chip needs to be programmed before operation. Four different programs can be programmed into the four flash chips, increasing the ease of task switching for the main control chip. Alternatively, the four flash chips can be divided into two groups, each with its own program. Compared to existing single-flash-chip systems, this increases the program tasks that the main control chip can manage, improves system stability, and allows for the adjustment and replacement of damaged flash chips without affecting system operation, thus improving system efficiency. Taking the programming of flash chip 1 and flash chip 2 as an example, flash chip 2 can be programmed first. After completion, power on and check if the system works normally. If it does, the programming was successful. Then, a relay control signal is given to switch to flash chip 1, the program is programmed into flash chip 1, and power on and check if the system works normally again. Systems using analog switches to switch flash chips do not increase the difficulty of programming. Alternatively, a programmer can be used to directly program the flash chips, which are then soldered onto the circuit board.

[0086] Similarly, in other embodiments, the main control chip can be connected to multiple flash chips through a multi-channel selection chip.

[0087] Many specific details have been set forth in the foregoing description in order to provide a full understanding of the invention. However, the invention may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0088] The term "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the invention. "Other embodiments" appearing in different places in this specification do not all refer to the same embodiment, nor are they isolated embodiments or selective embodiments that are mutually exclusive with other embodiments.

Claims

1. An analog switch based flash switching system, characterized by: The flash switching system based on analog switch comprises a master chip, a peripheral chip, an analog switch group, a power supply chip and at least two flash chips. The analog switch group comprises at least one analog switch. The peripheral chip and the analog switch group are both in interactive connection with the master chip. The power supply chip is connected with the peripheral chip, the master chip, the analog switch group and each flash chip respectively for power supply. The analog switch group is used for connecting the master chip with each flash chip selectively under the control of an external switching control signal. All signal connection ends of the flash chip are connected with the master chip through the analog switch group. The flash chip has a CS port, a CLK port and a plurality of data ports for signal connection with the master chip; the CS port, the CLK port and each data port of the flash chip are connected with the analog switch group. The master chip has a CS port, a CLK port and a plurality of data ports for signal connection with the flash chip; the CS port, the CLK port and each data port of the master chip are connected with the analog switch group. The system external connector is further provided with a switching control circuit for generating the switching control signal. The switching control circuit has a control switch group, which generates different switching control signals by controlling the switch state. The number of the flash chips is 2n, n≥1. The programs burned in each flash chip are different, which are used for making the master chip execute different program tasks; or each program is burned in at least two flash chips, which are used for enabling another flash chip with the same program when one flash chip is damaged.

2. The flash switching system based on analog switch according to claim 1, wherein: The analog switch is a single-pole double-throw analog switch. The single-pole double-throw analog switch is a multi-channel single-pole double-throw analog switch or a group of single-channel single-pole double-throw analog switches. The switching control signal comprises a switching control sub-signal corresponding to the single-pole double-throw analog switch, which is used for loading into the control end of the corresponding single-pole double-throw analog switch. The control switch in the control switch group corresponds to the switching control sub-signal one by one, and the state change of any switching control sub-signal can make the switch state of the corresponding control switch switch.

3. The flash switching system based on analog switch according to claim 2, wherein: The analog switch group comprises at least one cascaded switch layer, and each switch layer comprises one or more single-pole double-throw analog switches. The common end of the single-pole double-throw analog switch in the first switch layer is electrically connected with the master chip; and the gate end of the single-pole double-throw analog switch in the last switch layer is electrically connected with the flash chip. The gate terminal of the single-pole double-throw analog switch of the switch layer in the front layer is electrically connected with the common terminal of the single-pole double-throw analog switch of the switch layer in the rear layer.

4. The analog switch-based flash switching system according to claim 3, characterized in that: The single-pole double-throw analog switches in the same switch layer share the same switching control sub-signal.

5. The analog switch-based flash switching system according to claim 4, characterized in that: The switching control circuit comprises a switching control sub-circuit corresponding to each switching control sub-signal, and the switching control sub-circuit is configured to generate the corresponding switching control sub-signal; The switching control sub-circuit comprises a control switch, a relay, a first resistor and a second resistor; The control switch is configured to control the relay under the action of an external switching control signal, so that the relay can be switched between a conduction state and a circuit breaking state; The input terminal of the relay is loaded with a high-level signal, and the first resistor and the second resistor are arranged in series between the output terminal of the relay and the ground wire; The output terminal of the switching control sub-circuit is located between the first resistor and the second resistor.

6. The analog switch-based flash switching system according to claim 5, characterized in that: The resistance values of the first resistor R1 and the second resistor R2 are calculated according to the formula wherein Ua is the high-level signal loaded on the input terminal of the relay, Ub is the voltage value of the switching control sub-signal, and P(R2) is the maximum power consumption of the resistor R2.

7. The analog switch-based flash switching system according to claim 6, characterized in that: The switching control circuit comprises a switching control sub-circuit corresponding to each switching control sub-signal, and the switching control sub-circuit is configured to generate the corresponding switching control sub-signal; The switching control sub-circuit comprises a control switch, a relay and a resistor; The control switch is configured to control the relay under the action of an external switching control signal, so that the relay can be switched between a conduction state and a circuit breaking state; The input terminal of the relay is loaded with a low-level signal, the output terminal of the relay is connected with one end of the resistor, and the other end of the resistor is connected with a high-level signal; The output terminal of the switching control sub-circuit is located between the output terminal of the relay and the resistor.

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