A back side treatment method for passivated contact solar cell
By polishing the back of the TOPCon battery, the roughness of the back is increased, and the problems of poor adhesion of the back electrode and large series resistance are solved, and the photoelectric conversion efficiency and long-term reliability of the battery are improved.
Patent Information
- Application Number
- CN202211149060.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-21
- Publication Date
- 2025-04-18
- Estimated Expiration
- 2042-09-21
AI Technical Summary
The too flat structure of the back of the existing n-type passivation contact solar cell (TOPCon cell) affects the screen printing process, resulting in large series resistance of the battery, affecting the photoelectric conversion efficiency, and may cause the problem of unqualified adhesion of the electrode on the back.
In the back cleaning process, the back polishing is used to perform micro-filled treatment, and the small suede with a pyramid structure is grown to increase the roughness of the back side, thereby improving the adhesion of the back electrode and optimizing the series resistance of the battery.
Through micro-filled treatment, the adhesion of the electrode on the back of the TOPCon battery is improved, the series resistance of the battery is reduced, the photoelectric conversion efficiency is improved, and the long-term reliability of the product is improved.
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Figure CN115424925B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of solar cell preparation, in particular to a back surface processing method of a passivation contact solar cell. Background Art
[0002] With the development of crystalline silicon solar cell technology, the back of the n-type passivated contact solar cell (abbreviation of Tunnel Oxide Passivated Contact, tunnel oxide passivated contact, also known as TOPCon cell) uses ultra-thin silicon oxide and doped polysilicon layer for passivation. The tunnel oxide passivation contact structure can allow the majority carriers to pass through the oxide layer, blocking the minority carriers, effectively realizing the selective permeability of the carriers, thereby greatly reducing the recombination rate of the minority carriers and improving the efficiency of the cell. At present, the conversion efficiency of TOPCon cells in mass production exceeds 24%, becoming a highly competitive next-generation cell after PERC cells.
[0003] The structure of n-type Topcon solar cell is based on n-type silicon wafer. The p+ doped layer is obtained by boron diffusion on the front side, and the tunnel oxide layer and polysilicon are deposited on the back side. The n+ doped layer is obtained by in-situ phosphorus doping or intrinsic phosphorus diffusion. AlO is deposited on the front side. x Layer, SiN deposition on the front and back x The corresponding metal electrode is usually obtained by screen printing, with silver-aluminum paste used on the front and silver paste used on the back. The usual process flow chart is as follows Figure 1 As shown, including: texturing, boron diffusion, etching, back cleaning, deposition of tunnel oxide layer and polysilicon, back phosphorus doping, annealing, cleaning, front AlO x 、SiN on the front and back x , screen printing and sintering, classification inspection and packaging.
[0004] In order to improve the passivation effect of the ultra-thin silicon oxide and doped polysilicon layer on the back side, the back side of the silicon wafer needs to be polished in the "back side cleaning process". However, an overly flat back surface will affect the sintering effect of the slurry in the screen printing process, resulting in a large series resistance of the battery, affecting the battery's photoelectric conversion efficiency. It is also easy for the adhesion of the battery's back electrode to be unqualified, affecting the long-term reliability of the product. Summary of the invention
[0005] To this end, the present invention proposes a back side processing method for passivated contact solar cells based on the "back side cleaning treatment" process, which realizes micro-texturing of a smaller structure on the back side of the silicon wafer, thereby improving the adhesion of the back electrode, optimizing the battery series resistance, and improving the battery's photoelectric conversion efficiency.
[0006] In order to solve the above technical problems, the present invention provides a back surface treatment method of a passivated contact solar cell, comprising the following steps:
[0007] S1. Pre-cleaning: using a mixed solution of 0.2-1% alkali and 1-2% hydrogen peroxide to clean the surface of the silicon wafer;
[0008] S2, first water washing: immerse the silicon wafer in deionized water while keeping the deionized water overflowing;
[0009] S3, back side polishing: etching the back side of the silicon wafer and polishing the back side of the silicon wafer to form a back side polishing structure of the silicon wafer;
[0010] S4, second water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing;
[0011] S5, first alkali cleaning: using a mixed solution of 0.2-1% alkali and 1%-2% hydrogen peroxide to clean the surface of the silicon wafer;
[0012] S6, third water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing;
[0013] S7, micro-texturing: using 0.3-0.8% alkali and 0.2-0.5% texturing additive to corrode the back of the silicon wafer, grow a small velvet surface with a pyramid structure on the polished structure on the back, and increase the roughness of the back;
[0014] S8, fourth water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing;
[0015] S9, second alkali washing: using a mixed solution of 0.2-1% alkali and 1%-2% hydrogen peroxide to clean the surface of the silicon wafer;
[0016] S10, fifth water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing;
[0017] S11, first pickling: using hydrochloric acid solution to clean the surface of the silicon wafer;
[0018] S12, sixth water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing;
[0019] S13, second pickling: using hydrofluoric acid solution to remove the oxide layer on the back of the silicon wafer;
[0020] S14, seventh water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing;
[0021] S15, drying: drying the silicon wafer.
[0022] In one embodiment of the present invention, the washing time in step S2, step S4, step S6, step S8, step S10, step S12 and step S14 is 100 to 200 seconds.
[0023] In one embodiment of the present invention, in step S3, a base with a mass concentration of 1 to 3% and a surfactant with a mass concentration of 0.5 to 1.5% are used to etch the back side of the silicon wafer.
[0024] In one embodiment of the present invention, the alkali in step S1, step S5, step S7 and step S9 is sodium hydroxide or potassium hydroxide.
[0025] In one embodiment of the present invention, the reaction time in step S1, step S5 and step S9 is 100 to 200 seconds.
[0026] In one embodiment of the present invention, in step S11, a hydrochloric acid solution with a mass concentration of 1 to 3% is used to clean the surface of the silicon wafer.
[0027] In one embodiment of the present invention, the cleaning time using the hydrochloric acid solution is 100 to 200 seconds.
[0028] In one embodiment of the present invention, in step S13, a hydrofluoric acid solution with a concentration of 0.1-0.2% is used to clean and remove the oxide layer on the back side of the silicon wafer.
[0029] In one embodiment of the present invention, the cleaning time using the hydrofluoric acid solution is 50 to 100 seconds.
[0030] In one embodiment of the present invention, in step S15, the drying temperature is 80-90° C., and the drying time is 600-900 s.
[0031] The above technical solution of the present invention has the following advantages compared with the prior art:
[0032] The back side processing method of the passivated contact solar cell described in the present invention can achieve the requirements of balancing the TOPCon cell on the back side structure of the silicon wafer. After the back side is polished, a micro-texturing treatment is performed to obtain a back side structure with a reflectivity of 31-34%, thereby improving the tension of the back side electrode of the TOPCon cell and improving the cell efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] In order to make the content of the present invention more clearly understood, the present invention is further described in detail below according to specific embodiments of the present invention in conjunction with the accompanying drawings, wherein
[0034] Figure 1 This is a process flow chart for preparing existing n-type Topcon cells.
[0035] Figure 2 It is a flow chart of the back side processing method of the passivated contact solar cell of the present invention.
[0036] Figure 3 This is a microscope picture of the back side morphology of a silicon wafer after back side polishing.
[0037] Figure 4 This is a microscope picture of the back side morphology of the silicon wafer after micro-texturing. DETAILED DESCRIPTION
[0038] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention.
[0039] Reference Figure 2 As shown, a back side processing method of a passivated contact solar cell is used for a silicon wafer after etching, where a p+ doping layer has been obtained on the front side of the silicon wafer, and the back side oxide layer has been removed. Before a tunnel oxide layer and polysilicon are deposited on the back side, the back side of the silicon wafer is polished and micro-textured, as follows:
[0040] The silicon wafers are placed in a basket and placed in a tank cleaning machine, and pass through the following tanks in sequence to perform the following steps:
[0041] S1. Pre-cleaning
[0042] The surface of the silicon wafer is cleaned with a mixed solution of 0.2-1% alkali and 1-2% hydrogen peroxide for 100-200 seconds. The purpose is to clean the residual acid (etching process residue) and dust on the surface of the silicon wafer. The alkali is preferably sodium hydroxide or potassium hydroxide.
[0043] S2, first washing
[0044] The silicon wafer is immersed in deionized water while maintaining the deionized water overflow state for 100 to 200 seconds in order to dilute the residual alkali and hydrogen peroxide on the silicon wafer.
[0045] S3, back polishing
[0046] The back of the silicon wafer is etched by using a base with a mass concentration of 1 to 3% and a surfactant with a mass concentration of 0.5 to 1.5%, and the back of the silicon wafer is polished to form a polished structure on the back of the silicon wafer. The base is preferably sodium hydroxide or potassium hydroxide.
[0047] After this process, taking a silicon wafer with a size of 182*182mm and a weight of 11-12g before back polishing as an example, its weight loss is 0.25-0.4g, the corrosion weight loss ratio is 0.2-0.4%, and the back reflectivity is 35-36%.
[0048] S4, second washing
[0049] The silicon wafer is immersed in deionized water while maintaining the deionized water overflow state for 100 to 200 seconds in order to dilute the residual alkali and surfactant on the silicon wafer.
[0050] S5, first alkaline washing
[0051] The surface of the silicon wafer is cleaned with a mixed solution of 0.2-1% alkali and 1-2% hydrogen peroxide for 100-200 seconds to remove the residual surfactant on the surface of the silicon wafer. The alkali is preferably sodium hydroxide or potassium hydroxide.
[0052] S6, third washing
[0053] Soak the silicon wafer in deionized water while keeping the deionized water overflowing for 100 to 200 seconds in order to dilute the residual alkali and hydrogen peroxide on the silicon wafer.
[0054] S7, micro-texturing
[0055] The back of the silicon wafer is etched by using 0.3-0.8% alkali and 0.2-0.5% texturing additive to grow a small velvet surface with a pyramid structure on the polished structure on the back, thereby increasing the roughness of the back. The alkali is preferably sodium hydroxide or potassium hydroxide.
[0056] After this step, the reflectivity of the back side of the silicon wafer is between 31% and 34%.
[0057] S8, the fourth washing
[0058] Soak the silicon wafer in deionized water while keeping the deionized water overflowing for 100s to 200s to dilute the residual alkali and hydrogen peroxide on the silicon wafer.
[0059] S9, second alkaline washing
[0060] The surface of the silicon wafer is cleaned with a mixed solution of 0.2-1% alkali and 1%-2% hydrogen peroxide for 100-200 seconds to clean the residual texturing additives on the surface of the silicon wafer. The alkali is preferably sodium hydroxide or potassium hydroxide.
[0061] S10, fifth washing
[0062] Soak the silicon wafer in deionized water while keeping the deionized water overflowing for 100 to 200 seconds to dilute the residual alkali and hydrogen peroxide on the silicon wafer.
[0063] S11, first pickling
[0064] Use a hydrochloric acid solution with a concentration of 1 to 3% for 100 to 200 seconds to clean the residual alkali on the silicon wafer.
[0065] S12, the sixth washing
[0066] Soak the silicon wafer in deionized water while keeping the deionized water overflowing for 100 to 200 seconds to dilute the residual hydrochloric acid on the silicon wafer.
[0067] S13, second pickling
[0068] A hydrofluoric acid solution with a concentration of 0.1 to 0.2% is used for 50 to 100 seconds to clean and remove the oxide layer on the back of the silicon wafer. This step requires the surface of the silicon wafer to be in a dehydrated state.
[0069] S14, seventh washing
[0070] The silicon wafer is immersed in deionized water while keeping the deionized water overflowing, in order to remove the residual hydrofluoric acid on the surface of the silicon wafer; the residual water on the surface of the silicon wafer is reduced by slowly lifting the flower basket with cold water.
[0071] S15, Drying
[0072] The flower basket carrying the silicon wafers is passed through a drying tank to dry the silicon wafers at a drying temperature of 80 to 90°C for a drying time of 600 to 900 seconds.
[0073] like Figure 3 , Figure 4 The following is a comparison of the microscopic images of the back surface of the silicon wafer before and after micro-texturing. Figure 3 The back of the silicon wafer is smooth and polished before micro-texturing. Figure 4 The dark dots after micro-velveting are velvet surfaces with smaller structures.
[0074] As shown in Table 1, the same back busbar slurry was used to compare the back busbar tension of TOPCon cells with polished back and micro-textured back. It can be seen that the busbar tension of the micro-textured back cell is better than that of the polished back cell, and the qualified rate is also significantly improved (qualified requires each solder joint to be greater than 1N).
[0075] Table 1: Comparison of the tension of the back main grid between the back polished and back micro-textured
[0076] type Average back main grid tension force / N Pass rate Back polishing 2.85 87.14% Micro-velvet on the back 4.24 99.15%
[0077] As shown in Table 2, each group of 1000 cells adopts the micro-texturing scheme and the back polishing scheme respectively, and the electrical performance of the two groups of cells is compared. (In the table, Uoc is the open circuit voltage, Isc is the short circuit current, Rser is the series resistance, Rshunt is the parallel resistance, FF is the fill factor, Eff is the photoelectric conversion efficiency, and IRev2 is the leakage current under the reverse bias voltage of 14V)
[0078] Table 2: Comparison of electrical properties between backside polishing and backside microtexturing
[0079] Uoc / V Isc / A Rser / Ω Rshunt / Ω FF / % Eff / % IRev2 / A Micro-velvet on the back 0.709 13.60 0.00114 3573 82.93 24.252 0.164 Polished back surface 0.711 13.58 0.00145 3232 82.30 24.104 0.108
[0080] It can be seen from the battery electrical performance that the TOPCon battery with a back micro-textured structure has a lower series connection (Rser) and improved conversion efficiency (Eff).
[0081] Finally, it should be noted that the above specific implementation methods are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to examples, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.
Claims
1. A back surface treatment method for a passivated contact solar cell, characterized in that: The steps include: S1. Pre-cleaning: Use a mixed solution of 0.2~1% alkali and 1~2% hydrogen peroxide to clean the surface of the silicon wafer; S2, first water washing: immerse the silicon wafer in deionized water while keeping the deionized water overflowing; S3, back side polishing: etching the back side of the silicon wafer and polishing the back side of the silicon wafer to form a back side polishing structure of the silicon wafer; S4, second water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing; S5. First alkaline cleaning: Use a mixed solution of 0.2-1% alkali and 1-2% hydrogen peroxide to clean the surface of the silicon wafer; S6, third water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing; S7, micro-texturing: Use 0.3~0.8% alkali and 0.2~0.5% texturing additive to corrode the back of the silicon wafer, grow a small velvet surface with a pyramid structure on the polished structure on the back, and increase the roughness of the back; S8, fourth water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing; S9, second alkaline washing: using a mixed solution of 0.2~1% alkali and 1%~2% hydrogen peroxide to clean the surface of the silicon wafer; S10, fifth water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing; S11, first pickling: using hydrochloric acid solution to clean the surface of the silicon wafer; S12, sixth water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing; S13, second pickling: using hydrofluoric acid solution to remove the oxide layer on the back of the silicon wafer; S14, seventh water washing: immersing the silicon wafer in deionized water while keeping the deionized water overflowing; S15, drying: drying the silicon wafer; In step S3, a base having a mass concentration of 1 to 3% and a surfactant having a mass concentration of 0.5 to 1.5% are used to etch the back of the silicon wafer; The alkali in step S1, step S5, step S7 and step S9 is sodium hydroxide or potassium hydroxide; The reaction time in step S1, step S5 and step S9 is 100-200 s; In step S11, a hydrochloric acid solution with a mass concentration of 1-3% is used to clean the surface of the silicon wafer; The cleaning time using hydrochloric acid solution is 100~200s; In step S13, a hydrofluoric acid solution with a concentration of 0.1-0.2% is used to clean and remove the oxide layer on the back of the silicon wafer; The cleaning time using hydrofluoric acid solution is 50~100s.
2. A back side processing method of a passivated contact solar cell according to claim 1, characterized in that: The washing time in step S2, step S4, step S6, step S8, step S10, step S12 and step S14 is 100-200 seconds.
3. A back side processing method of a passivated contact solar cell according to claim 1, characterized in that: In step S15, the drying temperature is 80-90°C, and the drying time is 600-900s.
Citation Information
Patent Citations
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