Method for manufacturing a semiconductor structure and semiconductor structure
By forming an amorphous layer on the substrate and converting it into a metal nitride layer, the lattice mismatch problem of AlN epitaxial layers on Si substrates was solved, a high-quality metal nitride layer was achieved, and the fabrication process of the resonator was simplified.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-04-26
- Publication Date
- 2026-03-27
AI Technical Summary
The fabrication of high-quality AlN epitaxial layers on Si substrates suffers from lattice mismatch and low surface mobility, which affects the crystal quality of subsequent epitaxial layers.
An amorphous layer is formed on a substrate, and a metal nitride layer is formed on it. The polycrystalline film is converted into a monocrystalline film through patterning and annealing processes. The amorphous layer is removed to form a cavity. Finally, the substrate is removed to form a self-supporting high-quality metal nitride layer.
It improves the quality of the metal nitride layer, reduces dislocation density, improves the performance of the semiconductor structure, and simplifies the fabrication process of the resonator.
Smart Images
Figure CN115428120B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of semiconductor, in particular to a method for manufacturing a semiconductor structure and the semiconductor structure. BACKGROUND
[0002] GaN has a wide application prospect as a wide band gap semiconductor material, but it is difficult to prepare a high-quality GaN epitaxial layer. For example, in the preparation of a GaN epitaxial layer on a commonly used Si substrate, there is a back-melting reaction between Ga and the Si substrate at high temperature, which destroys the epitaxial layer. Therefore, a metal nitride layer, such as an AlN layer, needs to be prepared first. However, there is a large lattice mismatch between the AlN layer and the Si substrate, and the surface mobility of Al atoms is low. Therefore, how to realize a high-quality AlN epitaxial layer on the Si substrate is crucial to the crystal quality of the subsequent epitaxial layer. SUMMARY
[0003] The present application provides a method for manufacturing a high-quality semiconductor structure and the semiconductor structure.
[0004] The present application provides a method for manufacturing a semiconductor structure, comprising: providing a substrate; forming an amorphous layer on the substrate, the amorphous layer comprising a plurality of patterns to expose part of the substrate; forming a metal nitride layer on the amorphous layer; removing the amorphous layer to form a plurality of cavities between the substrate and the metal nitride layer; and removing the substrate.
[0005] Further, the step of forming a metal nitride layer on the amorphous layer comprises: forming a metal nitride film layer on the amorphous layer; and converting a polycrystalline film layer of the metal nitride film layer into a single-crystal film layer to form the metal nitride layer; wherein the metal nitride film layer comprises a single-crystal film layer in contact with the substrate and a polycrystalline film layer in contact with the amorphous layer.
[0006] Further, the polycrystalline film layer is converted into a single-crystal film layer by an annealing process.
[0007] Further, the amorphous layer is removed by an etching process.
[0008] Further, the amorphous layer is separated from the substrate and the metal nitride layer in a lateral direction after etching, and the lateral direction is perpendicular to the arrangement direction of the substrate and the metal nitride layer.
[0009] Further, the patterns are convex patterns, and the orthographic projection of the patterns on the substrate is a rectangle, a triangle, a polygon, or a circle.
[0010] Further, the material of the amorphous layer comprises SiO2.
[0011] Furthermore, the substrate is a single-crystal substrate, which is a sapphire substrate, a silicon substrate, or a silicon carbide substrate.
[0012] Furthermore, the material of the metal nitride layer includes AlN-based materials.
[0013] The present invention also provides a semiconductor structure, including a plurality of main body portions and a plurality of support portions, wherein the support portions connect two adjacent main body portions, and the main body portions and the two adjacent support portions form a cavity.
[0014] In this invention, by forming an amorphous layer on a substrate and then forming a metal nitride layer on the amorphous layer, the amorphous layer can suppress slip or dislocations during epitaxial growth, thereby improving the quality of the metal nitride layer and enhancing the performance of the semiconductor structure. Attached Figure Description
[0015] Figure 1 This is a flowchart illustrating one embodiment of the semiconductor structure fabrication method of the present invention.
[0016] Figure 2 yes Figure 1 This diagram illustrates the fabrication method in which an amorphous layer is formed on a substrate.
[0017] Figure 3 yes Figure 1 This diagram illustrates the process of forming a metal nitride layer on an amorphous layer in the fabrication method shown.
[0018] Figure 4 yes Figure 1 The diagram shows a structural schematic of removing the amorphous layer in the fabrication method shown.
[0019] Figure 5 Through Figure 1 A schematic diagram of the semiconductor structure fabricated using the method shown. Detailed Implementation
[0020] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of apparatuses consistent with some aspects of the invention as detailed in the appended claims.
[0021] The terminology used in the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The articles "a", "an", and "the" as used herein are to be construed to mean "at least one" or "one or more", unless otherwise indicated to the contrary. As used herein, the terms "first", "second", and the like do not imply any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the terms "one", "another", and the like do not preclude the existence of more than one, unless otherwise indicated to the contrary. The terms "comprise", "comprises", and the like are to be construed as open-ended terms (i.e., meaning "including, but not limited to", "including", and the like) unless otherwise indicated to the contrary. The terms "connected" and "coupled" as used herein are intended to be construed as having a broad meaning, including, but not limited to, a direct connection or coupling between elements, and an indirect connection or coupling between elements in which one or more additional elements are disposed between the elements being connected or coupled. The terms "a", "an", and "the" as used herein are to be construed to mean "at least one" or "one or more", unless otherwise indicated to the contrary. As used herein, the terms "first", "second", and the like do not imply any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the terms "one", "another", and the like do not preclude the existence of more than one, unless otherwise indicated to the contrary. The terms "comprise", "comprises", and the like are to be construed as open-ended terms (i.e., meaning "including, but not limited to", "including", and the like) unless otherwise indicated to the contrary. The terms "connected" and "coupled" as used herein are intended to be construed as having a broad meaning, including, but not limited to, a direct connection or coupling between elements, and an indirect connection or coupling between elements in which one or more additional elements are disposed between the elements being connected or coupled. The terms "a", "an", and "the" as used herein are to be construed to mean "at least one" or "one or more", unless otherwise indicated to the contrary. As used herein, the terms "first", "second", and the like do not imply any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the terms "one", "another", and the like do not preclude the existence of more than one, unless otherwise indicated to the contrary. The terms "comprise", "comprises", and the like are to be construed as open-ended terms (i.e., meaning "including, but not limited to", "including", and the like) unless otherwise indicated to the contrary. The terms "connected" and "coupled" as used herein are intended to be construed as having a broad meaning, including, but not limited to, a direct connection or coupling between elements, and an indirect connection or coupling between elements in which one or more additional elements are disposed between the elements being connected or coupled. The terms "a", "an", and "the" as used herein are to be construed to mean "at least one" or "one or more", unless otherwise indicated to the contrary. As used herein, the terms "first", "second", and the like do not imply any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the terms "one", "another", and the like do not preclude the existence of more than one, unless otherwise indicated to the contrary. The terms "comprise", "comprises", and the like are to be construed as open-ended terms (i.e., meaning "including, but not limited to", "including", and the like) unless otherwise indicated to the contrary. The terms "connected" and "coupled" as used herein are intended to be construed as having a broad meaning, including, but not limited to, a direct connection or coupling between elements, and an indirect connection or coupling between elements in which one or more additional elements are disposed between the elements being connected or coupled.
[0022] The present application provides a method for manufacturing a semiconductor structure, comprising: providing a substrate; forming an amorphous layer on the substrate, the amorphous layer comprising a plurality of patterns; forming a metal nitride layer on the amorphous layer; removing the amorphous layer, a plurality of cavities being formed between the substrate and the metal nitride layer.
[0023] Please refer to Figures 1 to 5 The present application provides a method for manufacturing a semiconductor structure, comprising:
[0024] Step S10: providing a substrate 1.
[0025] Step S20: forming an amorphous layer 2 on the substrate 1, the amorphous layer 2 comprising a plurality of patterns 21, so as to expose part of the substrate;
[0026] Step S30: forming a metal nitride layer 3 on the amorphous layer 2.
[0027] Step S40: removing the amorphous layer 2, a plurality of cavities 30 being formed between the substrate 1 and the metal nitride layer 3, the cavities 30 corresponding to the spaces occupied by the patterns 21 in step S20.
[0028] Step S50: removing the substrate 1.
[0029] Optionally, the step S20 includes: firstly forming an amorphous film layer on the substrate 1, and then performing a patterning process on the amorphous film layer to form the patterns 21, and the recesses 22 between adjacent patterns 21. The patterning process is, for example, a photolithography process. The projection of the pattern 21 on the substrate 1 can be rectangular, triangular, polygonal (understood as pentagonal and closed patterns with more sides) or circular. The pattern 21 can inhibit the generation of slip or dislocation during the growth of the metal nitride layer 3, thereby reducing the dislocation density and improving the quality of the metal nitride layer 3. In the present embodiment, the pattern 21 is a convex pattern, i.e. the pattern 21 extends upwardly; in other embodiments, a plurality of upwardly facing notches are formed on the substrate 1, and the pattern 21 is formed in the notches, in which case the pattern 21 corresponds to a recessed pattern.
[0030] Optionally, the step S30 includes: forming a metal nitride film layer on the amorphous layer 2, the part of the metal nitride film layer in direct contact with the substrate 1 (i.e. located in the recesses 22) being a single-crystal film layer, and the part in direct contact with the amorphous layer 2 being a polycrystalline film layer; and converting the polycrystalline film layer of the metal nitride film layer into a single-crystal film layer to form the metal nitride layer. Since the metal nitride film layer has a part in single-crystal structure, the single-crystal structure can be transferred to the polycrystalline structure part through an annealing process, so that the polycrystalline structure gradually changes into a single-crystal structure, i.e. the metal nitride film layer eventually becomes a single-crystal structure. By patterning the amorphous layer 2 and combining the annealing process, a high-quality single-crystal metal nitride thin film can be obtained.
[0031] Optionally, in the step S40, the amorphous layer 2 is removed by an etching process, and the amorphous layer 2 is separated from the substrate 1 and the metal nitride layer 3 in a transverse direction after etching, so that the metal nitride layer is not damaged in the etching process. The transverse direction is perpendicular to the arrangement direction of the substrate 1 and the metal nitride layer 3.
[0032] Optionally, in the step S50, the substrate 1 is removed by a lift-off technology. Since the step of removing the substrate 1 is after the step of removing the amorphous layer 2, the substrate 1 can still support the metal nitride layer 3 well when the amorphous layer 2 is removed, so that the metal nitride layer 3 is not deformed in this step.
[0033] Optionally, the substrate 1 is a single crystal substrate, which can be a sapphire substrate, a silicon substrate or a silicon carbide substrate; the material of the amorphous layer 2 includes SiO2 and other silicon oxides; the material of the metal nitride layer 3 includes AlN-based materials, and in the embodiment, AlN-based materials are selected, which can be AlN, AlGaN, InAlN, ScAlN and other materials.
[0034] Please refer to Figure 5 The semiconductor structure (actually the metal nitride layer 3) manufactured by the manufacturing method of any one of the foregoing embodiments includes a plurality of main body parts 31 and a plurality of support parts 32, the support parts 32 connect two adjacent main body parts 31, and the main body parts 31 and the support parts 32 are at least partially staggered, so that the main body part 31 and the two adjacent support parts 32 enclose a cavity 30. In the embodiment, one side of the cavity 30 is open. Only a part of the semiconductor structure is shown in the figure, so that the cavities on both sides are different from the cavity in the middle, and the actual structure is the same. The semiconductor structure 3 can be self-supporting, which means that it can maintain its shape and will not cause defects during processing. At the same time, the dislocation density of the metal nitride layer of the semiconductor structure is small, and the quality is high, which is beneficial to further manufacture high-quality GaN structures.
[0035] On the other hand, the application also provides a resonator including the semiconductor structure of any one of the foregoing embodiments. Generally, a resonator needs to form a cavity structure on its base, and the semiconductor structure manufactured by the foregoing manufacturing method has a plurality of cavities 30, which can replace the cavity structure of the base, so that the semiconductor structure can be directly used to manufacture the resonator, and there is no need to form a cavity on the base of the resonator through other processes, thereby facilitating the simplification of the manufacturing process and the reduction of the manufacturing cost.
[0036] In other embodiments, the semiconductor structure can also be used to manufacture an LED chip.
[0037] In the application, by forming an amorphous layer on a substrate and forming a metal nitride layer on the amorphous layer, the amorphous layer can inhibit slip or dislocation during epitaxial growth, thereby improving the quality of the metal nitride layer and the performance of the semiconductor structure, and at the same time, the metal nitride layer can be self-supporting. The semiconductor structure can be directly used to manufacture a resonator, thereby facilitating the simplification of the manufacturing process of the resonator.
[0038] The above merely describes the preferred embodiments of the present application, and is not intended to limit the present application in any form. Although the present application has been disclosed with the preferred embodiments as above, it is not intended to limit the present application, and any person skilled in the art can make some changes or modifications to the above disclosed technical contents to obtain equivalent embodiments with equivalent changes, as long as the changes or modifications do not depart from the technical solution of the present application. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application still belong to the scope of the technical solution of the present application.
Claims
1. A method of fabricating a semiconductor structure, the method comprising: The method comprises: providing a substrate (1); forming an amorphous layer (2) on the substrate, the amorphous layer (2) comprising a plurality of patterns (21) to expose part of the substrate, wherein each of the patterns (21) is formed to extend upward from the substrate (1), the projection of the pattern (21) on the substrate (1) is a closed pattern with a plurality of edges, and the plurality of patterns (21) are spaced apart from each other; forming a metal nitride layer (3) on the amorphous layer (2); removing the amorphous layer to form a plurality of cavities between the substrate (1) and the metal nitride layer (3) to form a semiconductor structure, the metal nitride layer (3) comprising a plurality of main portions (31) and a plurality of support portions (32), the support portions (32) connecting two adjacent main portions (31), and the main portions (31) and two adjacent support portions (32) surrounding the cavities (30), and the positions of the plurality of cavities correspond to the spaces occupied by the plurality of patterns (21).
2. The method of fabricating a semiconductor structure of claim 1, wherein, After the step of removing the amorphous layer, the substrate (1) is further removed to form the semiconductor structure.
3. The method of fabricating a semiconductor structure according to claim 1 or 2, wherein The step of forming the metal nitride layer (3) on the amorphous layer (2) comprises: forming a metal nitride film layer on the amorphous layer (2), the metal nitride film layer comprising a single-crystal film layer in contact with the substrate (1) and a polycrystal film layer in contact with the amorphous layer (2); converting the polycrystal film layer into a single-crystal film layer to form the metal nitride layer (3).
4. The method of fabricating a semiconductor structure of claim 3, wherein, The polycrystal film layer of the metal nitride film layer is converted into a single-crystal film layer by an annealing process.
5. The method of fabricating a semiconductor structure according to claim 1 or 2, wherein The amorphous layer (2) is removed by an etching process.
6. The method of fabricating a semiconductor structure of claim 5, wherein, After etching, the amorphous layer (2) is separated from the substrate (1) and the metal nitride layer (3) in a transverse direction, which is perpendicular to the arrangement direction of the substrate (1) and the metal nitride layer (3).
7. The method of fabricating a semiconductor structure according to claim 1 or 2, wherein The pattern (21) is a convex pattern, and the orthographic projection of the pattern (21) on the substrate (1) is a polygon or a circle.
8. The method of fabricating a semiconductor structure according to claim 1 or 2, wherein The material of the amorphous layer (2) comprises SiO2.
9. The method of fabricating a semiconductor structure according to claim 1 or 2, wherein The substrate (1) is a single-crystal substrate, which is a sapphire substrate, a silicon substrate, or a silicon carbide substrate.
10. The method of fabricating a semiconductor structure of claim 1 or 2, wherein, The material of the metal nitride layer (3) comprises an AlN-based material.
11. A semiconductor structure, characterized by The semiconductor structure comprises a substrate (1) and a metal nitride layer (3), the metal nitride layer (3) comprising a plurality of main portions (31) and a plurality of support portions (32), the support portions (32) connecting two adjacent main portions (31), and the main portions (31) and two adjacent support portions (32) surrounding a cavity (30), wherein the projection of each of the cavities on the substrate (1) is a closed pattern with a plurality of edges, and the plurality of cavities are spaced apart from each other.
12. The semiconductor structure of claim 11, wherein, The material of the metal nitride layer (3) comprises an AlN-based material.
Citation Information
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