High current active matrix pixel architecture

Abstract

The pixel circuit operates by operating the drive transistor in the triode region to output a large drive current for high current display applications. In order to keep the drive transistor operating in the triode region in a stable manner, the source-drain voltage dependence of the output current of the drive transistor is compensated by a bias transistor, which keeps the drain voltage of the drive transistor constant at a target drain voltage. The bias transistor is controlled by an operational amplifier (Opamp) running a negative feedback loop to ensure that a fixed target voltage appears at the drain of the drive transistor. To configure the negative feedback loop, the op amp output terminal is connected to the gate of the bias transistor, the negative terminal is connected to the drain of the drive transistor, and the positive terminal is connected to a voltage source line that provides the target voltage.

Description

Technical Field

[0001] The present application relates to the design and operation of electronic circuits for delivering electric current to elements in a display device, such as organic light emitting diodes (OLEDs) in pixels of an active matrix OLED (AMOLED) display device. Background Art

[0002] Organic light-emitting diodes (OLEDs) generate light through the recombination of electrons and holes, and emit light when a bias is applied between the anode and cathode so that current passes between them. The brightness of the light is related to the magnitude of the current. If there is no current, there is no light emission, so OLED technology is a technology that is capable of absolute black and achieves almost "infinite" contrast between pixels when used in display applications. Similar display technologies can employ other types of light-emitting devices, including, for example, micro-LEDs and quantum dot LEDs.

[0003] Several methods are taught in the prior art for a pixel thin film transistor (TFT) circuit to deliver current to an element of a display device, such as an organic light emitting diode (OLED), through a p-type drive transistor. In one example, an input signal such as a low "SCAN" signal is used to switch transistors in the circuit to allow a data voltage VDAT to be stored at a storage capacitor during a programming phase. When the SCAN signal is high and the switching transistor isolates the circuit from the data voltage, the VDAT voltage is held by the capacitor and applied to the gate of the drive transistor. When the drive transistor has a threshold voltage V TH In the case of , the relationship between the current flowing to the OLED and the voltage on the gate of the driving transistor is:

[0004]

[0005] Where V DD is the power supply connected to the source of the drive transistor.

[0006] TFT device characteristics, especially TFT threshold voltage V TH , may vary over time or between similar devices, for example, due to manufacturing processes or stress and aging of the TFT device during operation. As a result, at the same VDAT voltage, the amount of current delivered by the driver TFT may vary by a significant amount due to this threshold voltage variation. As a result, for a given VDAT value, the pixels in the display may exhibit non-uniform brightness.

[0007] Therefore, traditionally, OLED pixel circuits have a high tolerance range for changes in the threshold voltage and / or carrier mobility of the driving transistor by using a circuit that compensates for the mismatch of the driving transistor characteristics. For example, US7414599 (Chung et al., published on August 19, 2008) describes a method that describes a circuit in which the driving TFT is configured as a diode-connected device during programming, and the data voltage is applied to the source of the driving transistor. The threshold compensation time is determined by the characteristics of the driving transistor, which may require a longer compensation time to obtain high compensation accuracy. For the data programming time, the RC constant time required to charge the programming capacitor is a determining factor in the programming time. As noted in the art, a horizontal (1H) time is the time it takes to program a row of data. In some configurations, such as in the circuit configuration of US7414599, data is programmed while the threshold voltage of the driving transistor is compensated.

[0008] In certain display configurations, such as high power applications and other display configurations that may use certain types of LEDs as light emitting devices, relatively high operating currents are required to drive the light emitting devices. The amount of current that can drive a conventional light emitting pixel is a function of the saturation voltage of the drive transistor, the voltage of the light emitting device used to emit light, and the drive supply voltage. For very high operating currents, the saturation voltage of the drive transistor increases to a point where the power generated by the current passing through the drive transistor is primarily consumed in the drive transistor itself. As a result, the current supplied to the light emitting device becomes limited, which is undesirable for high current applications because the drive current of the light emitting device is insufficient to achieve peak performance. Therefore, due to the limitations caused by the saturation voltage of the drive transistor, conventional pixel circuit configurations have proven to be unsuitable for high current display applications. Summary of the invention

[0009] The present application relates to pixel circuits that can output relatively high drive currents for high current display applications compared to conventional pixel circuit configurations. This provides enhanced performance in display applications that require higher drive or operating currents. As described above, the amount of current that can drive a conventional light-emitting pixel is a function of the saturation voltage of the drive transistor, the voltage of the light-emitting device used to emit light, and the drive power supply voltage. For high current applications, the saturation voltage of the drive transistor will increase to a point where the power generated by the current through the drive transistor is primarily consumed in the drive transistor itself. As a result, the current supplied to the light-emitting device becomes limited, which is undesirable for high current applications because the drive current of the light-emitting device is insufficient to achieve peak performance.

[0010] The circuit configuration described in the current application reduces undesirable power dissipation in the drive transistor by operating the drive transistor in the triode region, where the drive transistor acts more like a voltage-controlled resistor, whereby the current through the drive transistor is substantially linearly proportional to the source-drain voltage across the drive transistor. By operating the drive transistor in the triode region, the saturation limitations of conventional configurations are avoided, resulting in much lower power dissipation in the drive transistor at higher operating currents. In this way, more power is directed toward driving the light-emitting device for emitting light, which provides enhanced performance for high current display applications.

[0011] When the drive transistor is operated in the triode region, the interdependence of the current through the drive transistor and the source-drain voltage on the drive transistor creates a problem. This interdependence may cause current fluctuations in the light-emitting device, which can disrupt the light emission. In order to keep the drive transistor operating in a stable manner in the triode region, the source-drain voltage dependence of the drive transistor output current is compensated by a bias transistor, which keeps the drain voltage value of the drive transistor constant at a target drain voltage value. The bias transistor is controlled by an operational amplifier (Opamp) running a negative feedback loop to ensure that a fixed target voltage appears at the drain of the drive transistor. An operational amplifier can be shared between multiple pixels, or an operational amplifier can be provided separately in each pixel circuit.

[0012] Therefore, one aspect of the present invention is a pixel circuit for a display device and a related circuit operation method, which is improved for high current display applications by operating a driving transistor in a triode region. In an exemplary embodiment, the pixel circuit includes: a driving transistor, which is configured to control the amount of current flowing to a light-emitting device according to a voltage applied to a gate of the driving transistor during an emission phase, the driving transistor having a first terminal and a second terminal, and during the emission phase, the first terminal of the driving transistor is electrically connected to a first voltage supply line; a light-emitting device, which is electrically connected to the second terminal of the driving transistor at the first terminal and connected to a second voltage supply line at the second terminal during the emission phase; a bias transistor, which has a first terminal connected to the second terminal of the driving transistor and a second terminal electrically connected to the first terminal of the light-emitting device during the emission phase; and an operational amplifier (Opamp), which has an output terminal connected to the gate of the bias transistor, and the operational amplifier is connected in a negative feedback loop configuration to fix the voltage at the second terminal of the driving transistor to a target voltage during the emission phase.

[0013] Performing an emission phase of emitting light from the light emitting device includes: operating the operational amplifier in a negative feedback loop to fix the voltage at the second terminal of the driving transistor to the target voltage; electrically connecting the first terminal of the driving transistor to the first voltage supply line to apply the first voltage supply to the first terminal of the driving transistor; and electrically connecting the first terminal of the light emitting device to the second terminal of the driving transistor via the bias transistor to apply the first voltage supply to the light emitting device. The first terminal of the driving transistor may be a source of the driving transistor, and the second terminal of the driving transistor may be a drain of the driving transistor.

[0014] To achieve the above and related purposes, the present invention includes the features fully described below and particularly pointed out in the claims. The following description and the accompanying drawings set forth in detail certain illustrative embodiments of the present invention. However, these embodiments represent only a few of the various ways in which the principles of the present invention can be employed. Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a diagram depicting a circuit configuration according to an embodiment of the present application.

[0016] Figure 2 It is depicted with Figure 1 FIG. 1 is a diagram of a timing diagram associated with the operation of a circuit. DETAILED DESCRIPTION

[0017] Embodiments of the present application will now be described with reference to the accompanying drawings, wherein like reference numerals are used to refer to like elements throughout. It should be understood that these drawings are not necessarily drawn to scale.

[0018] Figure 1 is a diagram depicting a pixel circuit configuration 10 according to an embodiment of the present application, Figure 2 is with Figure 1 1 is a timing diagram associated with the operation of the pixel circuit configuration 10. In this example, the pixel circuit 10 is configured as a thin film transistor (TFT) circuit, which includes a plurality of p-type transistors TB, TD, T1, T2, T3, T4, T5, T6, a storage capacitor Cst and an operational amplifier (Opamp). The circuit elements drive a light emitting device, such as an organic light emitting diode (OLED) device. The light emitting device (OLED) has an associated internal capacitance, which is represented in the circuit diagram as C oled Furthermore, although the embodiments are primarily described in conjunction with OLEDs as light emitting devices, similar principles may be used for display technologies employing other types of light emitting devices, including, for example, micro-LEDs and quantum dot LEDs.

[0019] More specifically, Figure 1 A TFT pixel circuit 10 configured with a plurality of p-MOS or p-type TFTs is depicted. The transistor TD is a driving transistor as an analog TFT, and the first to sixth transistors T1-T6 are digital switching TFTs. Figure 1 As shown, the driving transistor has a drain terminal, a gate terminal and a source terminal, wherein the corresponding drain terminal, gate terminal and source terminal are Figure 1 In the figure, they are marked as V D 、V G and V S Transistor TB is called a bias transistor and is an analog TFT used as a variable resistor. As described in further detail below, the operational amplifier outputs a bias voltage V bias , which controls the drain voltage at the drain of the drive transistor through the resistance of the bias transistor TB. As mentioned above, Cst and C oled is a capacitor, Cst is also called a storage capacitor. oled is the internal capacitance of the OLED device (i.e., C oled Not a separate component, but intrinsic to the OLED). The OLED is also connected to a voltage supply line that supplies an input voltage ELVSS as conventionally.

[0020] The OLED and pixel circuit 10, including transistors, capacitors and connecting lines, can be manufactured using conventional TFT manufacturing processes in the art. It should be understood that similar manufacturing processes can be used to manufacture the TFT circuit according to any embodiment.

[0021] For example, the TFT circuit 10 may be disposed on a substrate such as a glass, plastic or metal substrate. Each TFT may include a gate electrode, a gate insulating layer, a semiconductor layer, a first electrode and a second electrode. The semiconductor layer is disposed on the substrate. The gate insulating layer is disposed on the semiconductor layer, and the gate electrode may be disposed on the insulating layer. The first electrode and the second electrode may be disposed on the insulating layer and connected to the semiconductor layer using a through hole. The first electrode and the second electrode may be commonly referred to as the "source electrode" and the "drain electrode" of the TFT, respectively. Each capacitor may include a first electrode, an insulating layer and a second electrode, whereby the insulating layer forms an insulating barrier between the first electrode and the second electrode. The wiring between the components in the circuit and the wiring for introducing signals into the circuit (e.g., SCAN, EMI, VINI and VDAT) may include metal wires or doped semiconductor materials. For example, a metal wire may be disposed between the substrate and the gate electrode of the TFT and connected to the electrode using a through hole. The semiconductor layer may be deposited by chemical vapor deposition, and the metal layer may be deposited by thermal evaporation technology.

[0022] The OLED device may be disposed above the TFT circuit. The OLED device may include: a first electrode (e.g., an anode of the OLED), connected to transistors T5 and T6 in this example; one or more layers for injecting or transporting charges (e.g., holes) to the emission layer; an emission layer; one or more layers for injecting or transporting charges (e.g., electrons) to the emission layer; and a second electrode (e.g., a cathode of the OLED), connected to a voltage source ELVSS in this example. The injection layer, the transport layer, and the emission layer may be organic materials, the first electrode and the second electrode may be metals, and all of these layers may be deposited by thermal evaporation techniques.

[0023] Combination Figure 2 Timing diagram reference Figure 1 The TFT pixel circuit 10 operates to perform three phases: an initialization phase, a combined threshold compensation and data programming phase, and an emission phase for emitting light. For this example and related embodiments, pixels are displayed by row and column addressing. The current row is the nth row. The previous row is the n-1th row, and the previous second row is n-2. The next row is the n+1th row, the row after that is the n+2th row, and so on, because they are associated with the corresponding control signals identified in the figure. Therefore, for example, SCAN(n) refers to the scan signal of the nth row, SCAN(n-1) refers to the scan signal of the n-1th row, and so on. EMI(n) refers to the emission signal of the nth row, and so on, and various control signals are deduced by analogy. In this way, for various embodiments, the input signal corresponds to the indicated row.

[0024] like Figure 1 As shown in the circuit configuration of FIG. 1 , the driving transistor TD has a first terminal (eg, source) and a second terminal (eg, drain) opposite to the first terminal, and the first terminal and the second terminal are respectively represented as source V S and drain V D The gate of the driver transistor is represented by V G .like Figure 2 As shown in the timing diagram of , in the previous emission phase, the EMI(n) signal has a low voltage value, so the switching transistors T3 and T5 are in the on state, and the light emission is driven by the input drive voltage ELVDD electrically connected to the first terminal of the drive transistor TD through T3, so that the actual current applied to the OLED is determined by the voltage between the gate and source of the drive transistor. As further described below, the current applied to the OLED is also determined by the source-drain voltage of the drive transistor, and the bias transistor TB sets the drain voltage of the drive transistor to a fixed target voltage value to ensure that a constant and stable current flows through the drive transistor and flows to the OLED. Also from the previous emission phase, the SCAN signal level of the applicable row initially has a high voltage value, so the switching transistors T1, T2, T4 and T6 are all in the off state.

[0025] The initialization phase is performed to initialize various circuit voltages, such as the voltage at the storage capacitor and the driving transistor, to eliminate the influence of the previous frame. At the beginning of the initialization phase, the EMI (n) signal level changes from a low voltage value to a high voltage value, so that the switching transistors T3 and T5 are in a cut-off state. The first terminal of the switching transistor T3 is connected to the input voltage source line, which provides the input drive voltage ELVDD, and the second terminal is connected to the first terminal (source) of the driving transistor. The first terminal of the switching transistor T5 is connected to the bias transistor, and the first terminal is electrically connected to the second terminal (drain) of the driving transistor during the emission phase, and the second terminal of the switching transistor T5 is connected to the first terminal of the light-emitting device. When transistors T3 and T5 are turned off, the driving transistor is disconnected from the electrical connection with the driving voltage source ELVDD and disconnected from the electrical connection with the light-emitting device OLED.

[0026] Also in the initialization phase, the SCAN (n-1) signal level changes from a high voltage value to a low voltage value, which places the switch transistor T1 in a conducting state. As for the circuit components, the first plate of the storage capacitor Cst is connected to the input voltage source line providing the input drive voltage ELVDD, and the second plate is connected to the gate of the drive transistor. The first terminal of the switch transistor T1 is connected to the gate of the drive transistor and the second plate of the storage capacitor, and the second terminal is connected to the initialization voltage source line providing the initialization voltage VINI. As the switch transistor T1 is turned on, VINI is applied to the gate of the drive transistor and the second plate of the storage capacitor through T1. Therefore, the gate voltage of the drive transistor from the previous frame (also the voltage at the second plate of the storage capacitor) is reset, and the drive transistor is initialized to the low gate voltage required for the subsequent combined threshold compensation and data programming phase. Near the end of the initialization phase, the signal SCAN (n-1) changes from a low voltage value to a high voltage value, which places the switch transistor T1 in a cut-off state to isolate the gate of the drive transistor from the initialization voltage source line.

[0027] The pixel circuit can then operate in a combined threshold compensation and data programming phase, during which the threshold voltage of the drive transistor is compensated and the data voltage value for emitting light is programmed into the pixel circuit. The signal SCAN (n) changes from a high voltage value to a low voltage value, which places the switching transistors T2, T4 and T6 in a conducting state. The first terminal of the switching transistor T6 is connected to an initialization voltage source line that provides an initialization voltage VINI, and the second terminal is connected to the first terminal of the light emitting device. As T6 is turned on, VINI is applied to the first terminal of the light emitting device through T6, which resets or initializes the voltage of the light emitting device to eliminate any effects of the previous frame.

[0028] The first terminal of the switching transistor T2 is connected to the gate of the driving transistor, and is also connected to the second plate of the storage capacitor, and the second terminal is connected to the second terminal (drain) of the driving transistor. When the transistor T2 is turned on, the gate and the second terminal (drain) of the driving transistor TD are electrically connected to each other through the switching transistor T2, and the driving transistor TD becomes a diode connection. Diode connection refers to the operation of the driving transistor TD when its gate and another terminal (for example, source or drain) are electrically connected to each other, so that the current flows in one direction. In addition, the first terminal of the switching transistor T4 is connected to the data voltage source line that provides the data voltage VDAT, and the second terminal is connected to the first terminal (source) of the driving transistor. When the transistor T4 is turned on, the data voltage source line is electrically connected to the first terminal (source) of the driving transistor, so the data voltage value VDAT is applied to the first terminal of the driving transistor through T4. Through such operation, the source-gate voltage of the driving transistor is:

[0029] V SG =V DAT -V VINI

[0030] Since the gate node V of the driving transistor G is floating, so the driver transistor TD will be at node V G The current is injected until the gate voltage of the drive transistor is high enough to turn off the drive transistor, thereby allowing the threshold voltage of the drive transistor to be compensated. The voltage V on the gate node of the drive transistor used for compensation G , which also corresponds to the second plate of the storage capacitor Cst, becomes:

[0031] V G =V DAT -V TH

[0032] Where V TH is the threshold voltage of the driving transistor TD. In this way, the threshold voltage of the driving transistor and the data voltage value are effectively stored by the storage capacitor Cst.

[0033] Preferably, in order to effectively perform voltage threshold compensation on the driving transistor TD, the initial voltage difference between the gate and the source of the driving transistor should be:

[0034] V DAT -V VINI >|V TH |+ΔV

[0035] Where ΔV is a voltage large enough to generate a high initial current to charge the storage capacitor within the allocated threshold compensation time. The value of ΔV will depend on the characteristics of the transistor. For example, for exemplary IGZO and LTPS thin film transistor processes, ΔV will be at least 3 volts. The voltages ELVDD and VINI are set to meet this voltage requirement. The voltage stored in the storage capacitor C st The voltage on is:

[0036] V Cst =V ELVDD -V DAT +V TH

[0037] Therefore, the threshold voltage and the data voltage value of the driving transistor are effectively stored again by the storage capacitor Cst.

[0038] At the end of the combined threshold compensation and data programming phase, the signal SCAN(n) changes from a low voltage value to a high voltage value, which places the switching transistors T2, T4 and T6 in a cut-off state. With these transistors turned off, the drive transistor TD is no longer diode-connected and the source of the drive transistor is electrically isolated from the data voltage supply line VDAT, and the light-emitting device is electrically isolated from the initialization voltage supply line VINI.

[0039] The pixel circuit can then be operated in the emission phase of the light emitting device. Generally speaking, in order to improve the use in high current applications, the driving transistor TD is operated in the triode region, where the driving transistor functions more like a voltage-controlled resistor, so that the current through the driving transistor is substantially linearly proportional to the source-drain voltage on the driving transistor. By operating the driving transistor in the triode region, the saturation limit of the traditional configuration is avoided, and a higher current can be provided to the light emitting device for light emission. However, as described above, when the driving transistor is operated in the triode region, the mutual dependence of the current through the driving transistor and the source-drain voltage on the driving transistor will cause problems. This mutual dependence may cause the current flowing to the light emitting device to fluctuate, which will destroy the light emission. In order to keep the driving transistor operating in the triode region in a stable manner without current fluctuations, the source-drain voltage dependence of the output current of the driving transistor is compensated by the bias transistor TB, thereby keeping the drain voltage of the driving transistor constant at the target drain voltage value. The bias transistor TB is controlled by an operational amplifier (Opamp) connected in a negative feedback loop configuration to ensure that a fixed target voltage appears at the drain of the driving transistor. One operational amplifier may be shared among a plurality of pixels, or a separate operational amplifier may be provided in each pixel circuit.

[0040] refer to Figure 1In the pixel circuit configuration 10, the first terminal of the bias transistor TB is connected to the second terminal (drain) of the driving transistor, and the second terminal is connected to the first terminal of the switching transistor T5. As further described below, in the emission phase, the second terminal of the bias transistor is electrically connected to the first terminal of the light-emitting device through T5 to provide current to the light-emitting device for emitting light. As described above, the pixel circuit also includes an operational amplifier (Opamp), and the gate of the bias transistor TB is connected to the output terminal of the operational amplifier. The positive input terminal of the operational amplifier is connected to a fixed input voltage supply line, which supplies a fixed voltage corresponding to the target drain voltage value of the driving transistor, which target drain voltage value is referred to as V D-target . V D-target A suitable voltage value of may be a voltage close to ELVDD, such as ELVDD-1V or a comparable voltage value. D-target The voltage value is higher than VDAT, or ELVSS plus the voltage on the light emitting device (ELVSS+V OLED ) is appropriate.

[0041] The negative terminal of the op amp is connected to the second terminal (drain) of the drive transistor TD. When current flows through the drive transistor, a negative feedback loop operates by outputting the op amp via the bias transistor TB to pull the drive transistor drain terminal V D The drain voltage at the second terminal (drain) of the driving transistor is fixed to the target voltage value V D-target By fixing the drain voltage of the driving transistor to the target drain voltage value V D-target , the voltage on the driving transistor is stabilized, and the driving transistor can be operated in triode mode without any current fluctuation tendency.

[0042] In the emission phase, the signal EMI(n) changes from a low voltage value to a high voltage value, which turns the transistors T3 and T5 into an on state. When the transistors T3 and T5 are turned on, the first terminal (source) of the driving transistor is electrically connected to the input voltage source line providing the input driving voltage ELVDD through T3, and the first terminal of the light emitting device is electrically connected to the second terminal (drain) of the driving transistor through T5 and the bias transistor TB. Therefore, the driving current is provided to the light emitting device through the transistors T3, TD, TB and T5 via ELVDD. Therefore, the gate-source voltage of the driving transistor is the same as the voltage stored on the storage capacitor Cst, that is:

[0043] V SG =V Cst =V ELVDD -V DATA +V TH

[0044] In this configuration, the source gate voltage of the drive transistor is selected so that the drive transistor operates in the triode region as described above.For the drive transistor operating in the triode region, the following relationship is satisfied.

[0045] V SG -V TH >V SD

[0046]

[0047]

[0048] The target drain voltage can be set for triode region operation using bias transistor TB if the following relationship holds:

[0049] V ELVDD -V ELVSS -V OLED >V SD

[0050]

[0051]

[0052] By satisfying the above relationship, the drive transistor operates in triode mode, and the drive transistor now provides current to the light emitting device from the positive supply rail to the negative supply rail. The amount of current provided by the drive transistor to the light emitting device is:

[0053]

[0054]

[0055] in

[0056] C ox is the capacitance of the gate oxide layer of the driver transistor;

[0057] W is the width of the driver transistor channel;

[0058] L is the length of the drive transistor channel (ie, the distance between the source and drain); and

[0059] μ n is the carrier mobility of the drive transistor.

[0060] Therefore, the current flowing to the OLED does not depend on the threshold voltage of the driving transistor TD, so the current I flowing to the OLED device OLEDUnaffected by variations in the threshold voltage of the drive transistor. In this way, any variations in the threshold voltage of the drive transistor are compensated for. Furthermore, by operating the drive transistor in the triode region, significantly higher operating currents can be provided for operation of the pixel circuit compared to conventional configurations limited by drive transistor saturation, which provides improved operation for high current display applications.

[0061] exist Figure 1 and Figure 2 In the example of FIG. 1 , the transistors including the driving transistor TD, the bias transistor TB and the digital switching transistors T1-T6 are as follows Figure 1 In an alternative embodiment, the pixel circuit can be similarly configured using n-type transistors instead of p-type transistors. As is known in the art, the driving characteristics of an OLED or other type of light emitting device may be more suitable for one or the other of p-type and n-type transistors, and the principles of the present application are applicable to either type of configuration. Figure 2 The control signal levels depicted in the timing diagrams of are substantially similar for an n-type transistor configuration, except that the high and low voltage values ​​are modified in accordance with the operation of n-type transistors rather than p-type transistors.

[0062] Although the present invention has been shown and described with respect to one or more embodiments, it is apparent that equivalent changes and modifications will occur to others skilled in the art upon reading and understanding this specification and the accompanying drawings. In particular, with respect to the various functions performed by the above-described elements (components, assemblies, devices, compositions, etc.), the terms used to describe these elements (including references to "devices") are intended to correspond (unless otherwise specified) to any element that performs the specified function of the described element (i.e., is functionally equivalent), even if structurally not identical to the structures described as performing the functions in one or more exemplary embodiments of the present invention shown herein. In addition, although specific features of the present invention may have been described above with respect to only one or more of several illustrated embodiments, such features may be combined with one or more other features of other embodiments, which may be necessary and advantageous for any given or particular application.

[0063] Industrial Applicability

[0064] Embodiments of the present invention are applicable to many display devices to allow high resolution display devices with effective threshold voltage compensation and true black performance. Examples of such devices include televisions, mobile phones, personal digital assistants (PDAs), tablet computers and laptop computers, desktop monitors, digital cameras, and similar devices that require high resolution displays.

[0065] Reference numerals list

[0066] T1-T6 – Switching transistors

[0067] TD – Driver Transistor

[0068] TB – Bias transistor

[0069] OLED – Organic Light Emitting Diode (or light emitting device in general)

[0070] Cst – Storage capacitor

[0071] Coled – Internal capacitance of OLED

[0072] V G – Gate of the drive transistor in the pixel circuit

[0073] V S – The source of the drive transistor in the pixel circuit

[0074] V D – The drain of the drive transistor in the pixel circuit

[0075] VDAT – Data voltage power line or data voltage

[0076] ELVSS – Voltage Source

[0077] ELVDD – Voltage source

[0078] VINI – Initialization voltage source line or initialization voltage

[0079] V D-target – Target drain voltage source line or target drain voltage

[0080] SCAN / EMI–Control Signal

Claims

1. A pixel circuit for a display device, include: a driving transistor configured to control the amount of current flowing to the light emitting device according to a voltage applied to a gate of the driving transistor during an emission phase, the driving transistor having a first terminal and a second terminal, and the first terminal of the driving transistor being electrically connected to a first voltage supply line during the emission phase; a light emitting device electrically connected at a first terminal to the second terminal of the drive transistor and at a second terminal to a second voltage supply line during the emission phase; a bias transistor having a first terminal connected to the second terminal of the drive transistor and a second terminal electrically connected to the first terminal of the light emitting device during the emission phase; as well as an operational amplifier (Opamp) having an output terminal connected to the gate of the bias transistor and connected in a negative feedback loop configuration to fix the voltage at the second terminal of the drive transistor to a target voltage during the emission phase, A negative terminal of the operational amplifier is connected to the second terminal of the driving transistor, and a positive terminal of the operational amplifier is connected to an input voltage source line that provides the target voltage, The pixel circuit further comprises a storage capacitor having a first plate connected to the first voltage supply line and a second plate connected to the gate of the drive transistor, wherein during a combined threshold compensation and data programming phase, a threshold voltage and a data voltage of the drive transistor are stored by the storage capacitor, The pixel circuit further includes a first switch transistor, The first switching transistor has a first terminal connected to the gate of the driving transistor and the second plate of the storage capacitor, and a second terminal connected to an initialization voltage supply line providing an initialization voltage, When the first switch transistor is in the on state, the gate of the drive transistor and the second plate of the storage capacitor are electrically connected to the initialization voltage supply line through the first switch transistor. The pixel circuit further includes a second switch transistor, The second switching transistor has a first terminal connected to the gate of the driving transistor, and a second terminal connected to the second terminal of the driving transistor and the negative terminal of the operational amplifier. When the second switching transistor is in an on state, the driving transistor becomes diode-connected, and the gate and the second terminal of the driving transistor are electrically connected to each other through the second switching transistor. 2 . The pixel circuit according to claim 1 , wherein the first terminal of the drive transistor is a source of the drive transistor, and the second terminal of the drive transistor is a drain of the drive transistor.

3. The pixel circuit according to claim 1 further includes a third switching transistor, wherein the third switching transistor has a first terminal connected to the first voltage supply line and a second terminal connected to the first terminal of the driving transistor, wherein when the third switching transistor is in an on state, the first terminal of the driving transistor is electrically connected to the first voltage supply line through the third switching transistor.

4. The pixel circuit according to claim 3 further includes a fourth switching transistor, wherein the fourth switching transistor has a first terminal connected to a data voltage source line providing the data voltage and a second terminal connected to the first terminal of the driving transistor, wherein when the fourth switching transistor is in an on state, the first terminal of the driving transistor is electrically connected to the data voltage source line through the fourth switching transistor.

5. The pixel circuit according to claim 4 further includes a fifth switching transistor, wherein the fifth switching transistor has a first terminal connected to the second terminal of the bias transistor and a second terminal connected to the first terminal of the light-emitting device, wherein when the fifth switching transistor is in an on state, the first terminal of the light-emitting device is electrically connected to the bias transistor through the fifth switching transistor.

6. The pixel circuit according to claim 5 further includes a sixth switching transistor, wherein the sixth switching transistor has a first terminal connected to an initialization voltage supply line providing the initialization voltage and a second terminal connected to the first terminal of the light-emitting device, wherein when the sixth switching transistor is in an on state, the first terminal of the light-emitting device is electrically connected to the initialization voltage supply line through the sixth switching transistor.

7. The pixel circuit according to claim 1 or 2, wherein the transistor is a p-type transistor.

8. The pixel circuit according to claim 1 or 2, wherein the light emitting device is one of an organic light emitting diode, a micro light emitting diode (LED), or a quantum dot LED.

9. A method of operating a pixel circuit for a display device, The following steps are involved: The pixel circuit is provided, and the pixel circuit comprises: a driving transistor configured to control the amount of current flowing to the light emitting device according to a voltage applied to a gate of the driving transistor during an emission phase, the driving transistor having a first terminal and a second terminal, and the first terminal of the driving transistor being electrically connectable to a first voltage supply line; a light emitting device electrically connectable at a first terminal to a second terminal of the drive transistor and connected at a second terminal to a second voltage supply line; a bias transistor having a first terminal connected to the second terminal of the drive transistor and a second terminal electrically connectable to the first terminal of the light emitting device; and an operational amplifier (Opamp) having an output terminal connected to the gate of the bias transistor, a negative terminal connected to the second terminal of the drive transistor, and a positive terminal connected to an input voltage supply line providing a target voltage; and Performing the emission phase of emitting light from the light emitting device comprises: operating the operational amplifier in a negative feedback loop to fix the voltage at the second terminal of the drive transistor to the target voltage; electrically connecting the first terminal of the driving transistor to the first voltage supply line to apply a first voltage supply to the first terminal of the driving transistor; and electrically connecting a first terminal of the light emitting device to a second terminal of the driving transistor via the bias transistor so that the first voltage source is applied to the light emitting device, The pixel circuit further includes a storage capacitor having a first plate connected to the first voltage supply line and a second plate connected to the gate of the drive transistor; The method further includes performing a combined threshold compensation and data programming phase, the combined threshold compensation and data programming phase including storing a threshold voltage and a data voltage of the drive transistor by the storage capacitor, The pixel circuit also includes a first switching transistor, the first switching transistor having a first terminal connected to the gate of the drive transistor and the second plate of the storage capacitor, and a second terminal connected to an initialization voltage supply line providing an initialization voltage, the method also includes performing an initialization phase, the initialization phase including placing the first switching transistor in a conductive state to apply the initialization voltage to the gate of the drive transistor and the second plate of the storage capacitor through the first switching transistor, the pixel circuit also includes a second switching transistor, the second switching transistor having a first terminal connected to the gate of the drive transistor, and a second terminal connected to the second terminal of the drive transistor and the negative terminal of the operational amplifier, The combined threshold compensation and data programming phase also includes placing the second switch transistor in a conductive state so that the gate and the second terminal of the drive transistor are electrically connected to each other through the second switch transistor and the drive transistor becomes diode-connected.

10. The method of operating a pixel circuit according to claim 9, wherein the pixel circuit further comprises a third switch transistor having a first terminal connected to the first voltage supply line and a second terminal connected to the first terminal of the drive transistor; The emission phase further includes placing the third switch transistor in a conductive state so as to apply the first voltage source to the first terminal of the driving transistor through the third switch transistor.

11. The method of operating a pixel circuit according to claim 10, wherein the pixel circuit further comprises a fourth switch transistor having a first terminal connected to a data voltage source line providing the data voltage and a second terminal connected to the first terminal of the driving transistor; The combined threshold compensation and data programming phase further includes placing the fourth switch transistor in a conductive state to apply the data voltage to the first terminal of the drive transistor through the fourth switch transistor.

12. The method of operating a pixel circuit according to claim 11, wherein the pixel circuit further comprises a fifth switch transistor having a first terminal connected to the second terminal of the bias transistor and a second terminal connected to the first terminal of the light emitting device; The emission phase further includes placing the fifth switch transistor in a conductive state to electrically connect the first terminal of the light emitting device to the bias transistor through the fifth switch transistor.

13. The method for operating a pixel circuit according to claim 12, wherein the pixel circuit further comprises a sixth switch transistor having a first terminal connected to the initialization voltage supply line providing the initialization voltage and a second terminal connected to the first terminal of the light emitting device; The combined threshold compensation and data programming phase further includes placing the sixth switch transistor in a conductive state to apply the initialization voltage to the first terminal of the light emitting device through the sixth switch transistor.

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