A method for preparing a Micro-LED device

Abstract

The present invention application discloses a method for preparing a Micro-LED device, which grows an epitaxial structure by an epitaxial growth method, and prepares a Micro-LED array after growing a first target layer by lateral epitaxial growth, and prepares a HEMT array after growing a second target layer, thereby causing side wall damage to the device and not introducing a large number of dangling bonds, thereby reducing the dislocation density; by aligning and bonding the Micro-LED array and the HEMT array, the effect of flip-chip bonding is achieved, and the signal delay problem caused by wire bonding is solved; by electrochemical wet etching, the damage to the epitaxial structure during the stripping process is reduced, and the surface flatness and uniformity of the device after stripping are improved; the present invention also realizes the mass transfer of Micro-LEDs, providing a basis for the mass production of Micro-LED devices.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for preparing a Micro-LED device. Background Art

[0002] III-V compounds such as gallium nitride (GaN), aluminum nitride (AlN), indium gallium nitride (InGaN), etc., as representatives of the third generation of semiconductor materials, have excellent physical and chemical properties. Among them, gallium nitride, as the most widely studied III-V nitride, has the characteristics of wide bandgap, high temperature resistance, high saturation electron rate, high breakdown field strength and high chemical stability. With these excellent properties, III-V nitrides can be used to produce ultraviolet and visible light emitting devices, ultraviolet detectors, high temperature and high frequency high power electronic devices with excellent performance, and are widely used in LED lighting and display, ultraviolet detection, radio frequency microwave and other fields.

[0003] At present, dry etching is the mainstream method for preparing gallium nitride-based Micro-LEDs. During the dry etching process, plasma is generated, including a large number of charged particles and a small number of uncharged particles. These plasmas are jointly directed to the unobstructed gallium nitride surface for physical bombardment and chemical etching, which will inevitably produce non-determined sidewall damage at the edge of the device and introduce a large number of dangling bonds on the sidewall surface, thereby affecting the performance of the Micro-LED device. In addition, the preparation process of gallium nitride-based Micro-LED generally adopts the electrical interconnection method of wire bonding. In the wire bonding of high I / O numbers of 100 to 500, the minimum center distance of the pad of the IC chip is 35μm, and wire bonding will increase signal delay. Therefore, the electrical interconnection method of wire bonding limits the preparation of high-resolution Micro-LED devices; in the preparation process of Micro-LED devices, due to the relatively serious lattice mismatch and thermal mismatch between the substrate and the epitaxial film, high-density defects and large stress will be introduced during the epitaxial growth process, which seriously limits the performance improvement of III-V nitride devices. Therefore, after growing the nitride epitaxial array film on the sapphire substrate, it is usually necessary to remove the growth substrate. The current mainstream growth substrate removal method is to use a laser to peel the epitaxial film from the growth substrate, but laser peeling will damage the epitaxial structure, and the peeled surface flatness and uniformity are poor, which seriously affects the performance of the device made on the epitaxial structure; in addition, the current Micro-LED device preparation method is difficult to achieve mass production of Micro-LED devices. Summary of the invention

[0004] In order to solve the above technical problems, an embodiment of the present invention provides a method for preparing a Micro-LED device.

[0005] The technical solution adopted in the embodiment of the present invention is:

[0006] A method for preparing a Micro-LED device comprises the following steps:

[0007] cleaning the first substrate and the second substrate;

[0008] Growing a first epitaxial layer on the first substrate by an epitaxial growth method, and growing a second epitaxial layer on the second substrate by the epitaxial growth method, wherein the epitaxial growth method includes any one of metal organic chemical vapor deposition, molecular beam epitaxy and hydride vapor phase epitaxy;

[0009] A first sacrificial layer of a preset pattern array is grown on a side of the first epitaxial layer away from the first substrate, and a second sacrificial layer of the preset pattern array is grown on a side of the second epitaxial layer away from the second substrate, wherein the first sacrificial layer and the second sacrificial layer are heavily doped N-type GaN layers;

[0010] Growing a first target layer on a side of the first sacrificial layer away from the first epitaxial layer by lateral epitaxial growth, and growing a second target layer on a side of the second sacrificial layer away from the second epitaxial layer by lateral epitaxial growth, wherein the first target layer and the second target layer are arrayed umbrella-shaped structures, and the umbrella-shaped structures are isolated from each other;

[0011] Preparing a Micro-LED array on the first target layer, and preparing a HEMT array on the second target layer;

[0012] Aligning and bonding the Micro-LED array and the HEMT array to generate an integrated device array;

[0013] The integrated device array is subjected to electrochemical wet etching to remove the first substrate, the first epitaxial layer and the first sacrificial layer, thereby completing the preparation of the Micro-LED device.

[0014] As an optional implementation, the first epitaxial layer includes a first nucleation layer, a current spreading layer, a blocking layer and a third sacrificial layer, the first nucleation layer is an undoped GaN layer, the current spreading layer is an N-type doped GaN layer, the blocking layer is an undoped GaN layer, and the third sacrificial layer is a low-doped N-type GaN layer;

[0015] The step of growing a first epitaxial layer on the first substrate using an epitaxial growth method comprises:

[0016] growing the first nucleation layer on the first substrate;

[0017] growing the current spreading layer on a side of the first nucleation layer away from the first substrate;

[0018] Growing the blocking layer on a side of the current spreading layer away from the first nucleation layer;

[0019] Growing the third sacrificial layer on a side of the blocking layer away from the current spreading layer;

[0020] The second epitaxial layer includes a second nucleation layer and a fourth sacrificial layer, the second nucleation layer is an undoped GaN layer, and the fourth sacrificial layer is a low-doped N-type GaN layer;

[0021] The step of growing a second epitaxial layer on the second substrate using an epitaxial growth method comprises:

[0022] growing the second nucleation layer on the second substrate;

[0023] The fourth sacrificial layer is grown on a side of the second nucleation layer away from the second substrate.

[0024] As an optional implementation manner, the step of growing a first sacrificial layer of a preset pattern array on a side of the first epitaxial layer away from the first substrate includes:

[0025] Depositing a first dielectric layer on a side of the first epitaxial layer away from the first substrate;

[0026] Performing patterning on the first dielectric layer according to the preset pattern array to generate a first growth window, wherein the first growth window exposes a surface of the first epitaxial layer;

[0027] Growing the first sacrificial layer in the first growth window using a metal organic chemical vapor deposition system, wherein the thickness of the first sacrificial layer is less than the thickness of the first dielectric layer;

[0028] The step of growing the second sacrificial layer of the preset pattern array on a side of the second epitaxial layer away from the second substrate comprises:

[0029] Depositing a second dielectric layer on a side of the second epitaxial layer away from the second substrate;

[0030] Performing patterning on the second dielectric layer according to the preset pattern array to generate a second growth window, wherein the second growth window exposes a surface of the second epitaxial layer;

[0031] The second sacrificial layer is grown in the second growth window by using a metal organic chemical vapor deposition system, and the thickness of the second sacrificial layer is less than the thickness of the second dielectric layer.

[0032] As an optional implementation manner, the patterning of the first dielectric layer according to the preset pattern array to generate a first growth window includes:

[0033] Spin coating a first photoresist on a side of the first dielectric layer away from the first epitaxial layer;

[0034] Forming the preset pattern array on the first photoresist through an exposure and development process;

[0035] After etching the exposed area of ​​the first photoresist by dry etching, the remaining first photoresist is removed and cleaned by acetone to generate the first growth window.

[0036] As an optional implementation manner, the patterning of the second dielectric layer according to the preset pattern array to generate a second growth window includes:

[0037] Spin coating a second photoresist on a side of the second dielectric layer away from the second epitaxial layer;

[0038] Forming the preset pattern array on the second photoresist through an exposure and development process;

[0039] After etching the exposed area of ​​the second photoresist by dry etching, the remaining second photoresist is removed and cleaned by acetone to generate the second growth window.

[0040] As an optional implementation manner, the step of growing the first target layer on a side of the first sacrificial layer away from the first epitaxial layer by using lateral epitaxial growth includes:

[0041] Growing a first nitride epitaxial structure on a side of the first sacrificial layer away from the first epitaxial layer, and performing lateral epitaxial growth on a portion of the first nitride epitaxial structure that is higher than the first growth window;

[0042] Stopping the growth before the first nitride epitaxial structures touch and connect with each other, and etching the first dielectric layer to obtain the first target layer;

[0043] The step of growing the second target layer on a side of the second sacrificial layer away from the second epitaxial layer by lateral epitaxial growth comprises:

[0044] Growing a second nitride epitaxial structure on a side of the second sacrificial layer away from the second epitaxial layer, and performing lateral epitaxial growth on a portion of the second nitride epitaxial structure that is higher than the second growth window;

[0045] The growth of the second nitride epitaxial structures is stopped before they touch and connect with each other, and the second dielectric layer is etched to obtain the second target layer.

[0046] As an optional implementation manner, the preparing a Micro-LED array on the first target layer includes:

[0047] Forming N-region steps and P-regions on each array unit of the first target layer by photolithography and etching processes;

[0048] Preparing an ITO film on the P region;

[0049] Depositing a nickel / gold layer on the ITO film and on the N-region step;

[0050] Preparing a passivation layer on the nickel / gold layer to complete the preparation of the Micro-LED array;

[0051] The step of preparing a HEMT array on the second target layer comprises:

[0052] A source electrode, a drain electrode and a gate electrode are formed on each array unit of the second target layer to complete the preparation of the HEMT array.

[0053] As an optional implementation, aligning and bonding the Micro-LED array and the HEMT array to generate an integrated device array includes:

[0054] Depositing a bonding metal layer on the Micro-LED array and on the source and drain electrodes of each array unit of the HEMT array;

[0055] The Micro-LED array and the HEMT array are aligned and bonded via the bonding metal layer to generate the integrated device array.

[0056] As an optional implementation, before the step of depositing a bonding metal layer on the Micro-LED array and on the source and drain of each array unit of the HEMT array, the method for preparing a Micro-LED device further includes:

[0057] Disposing a shielding layer at a surface edge of the first target layer;

[0058] A protective layer is covered on the surface of the shielding layer that does not contact the first target layer, and the protective layer includes any one of photoresist and raw tape.

[0059] As an optional implementation manner, the step of performing electrochemical wet etching on the integrated device array to remove the first substrate, the first epitaxial layer and the first sacrificial layer to complete the preparation of the Micro-LED device includes:

[0060] removing the protective layer, and etching the shielding layer by an etching process until the first sacrificial layer is exposed;

[0061] Depositing an electrode layer on the first sacrificial layer exposed by the shielding layer, wherein the electrode layer is made of silver;

[0062] The integrated device array after the electrode layer is deposited is arranged on the anode of an electrochemical wet etching device, the anode is contacted with the electrode layer, and the integrated device array outside the electrode layer and the cathode of the electrochemical wet etching device are immersed in a corrosion electrolyte, and the cathode is a platinum sheet electrode;

[0063] The electrochemical wet etching device is powered on to perform electrochemical wet etching on the integrated device array. After the first sacrificial layer is corroded, the first substrate and the first epitaxial layer are automatically released to complete the preparation of the Micro-LED device.

[0064] The preparation method of the Micro-LED device of the embodiment of the present invention adopts an epitaxial growth method to grow a first epitaxial layer on a first substrate, grows a second epitaxial layer on a second substrate, and then grows a first sacrificial layer on the first epitaxial layer, grows a second sacrificial layer on the second epitaxial layer, and adopts lateral epitaxial growth to grow a first target layer on the first sacrificial layer to prepare a Micro-LED array, and grows a second target layer on the second sacrificial layer to prepare a HEMT array. During the preparation process, no sidewall damage will be caused to the device, and no large number of dangling bonds will be introduced, thereby reducing the dislocation density; by aligning and bonding the Micro-LED array with the HEMT array, the effect of flip-chip bonding is achieved, and the signal delay problem caused by the use of wire bonding to achieve electrical interconnection in the traditional method is solved; by removing the first substrate, the first epitaxial layer and the first sacrificial layer by electrochemical wet etching, the damage to the epitaxial structure during the stripping process is reduced, and the surface flatness and uniformity of the device after stripping are improved; by aligning and bonding the Micro-LED array with the HEMT array and the electrochemical wet etching process, the mass transfer of Micro-LED is achieved, which provides a basis for the mass production of Micro-LED devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] Figure 1 Flow chart of the method for preparing a Micro-LED device according to an embodiment of the present invention

[0066] Figure 2 Schematic diagram of the structure of the first epitaxial layer and the first dielectric layer of the Micro-LED device according to an embodiment of the present invention;

[0067] Figure 3 This is a schematic diagram of a first growth window of a Micro-LED device according to an embodiment of the present invention;

[0068] Figure 4 A schematic diagram of an etching area on a first dielectric layer of a method for preparing a Micro-LED device according to an embodiment of the present invention;

[0069] Figure 5 This is a schematic diagram of the structure of the first sacrificial layer of the Micro-LED device according to an embodiment of the present invention;

[0070] Figure 6 Schematic diagram of the growth of the first target layer of the method for preparing a Micro-LED device according to an embodiment of the present invention;

[0071] Figure 7 Schematic diagram of the structure of a Micro-LED array and a HEMT array of a Micro-LED device according to an embodiment of the present invention;

[0072] Figure 8 Schematic diagram of the structure of the bonding metal layer of the Micro-LED device according to an embodiment of the present invention;

[0073] Fig. 9 Schematic diagram of the structure of an integrated device array of Micro-LED devices according to an embodiment of the present invention;

[0074] Fig.10 A schematic diagram of an electrochemical wet etching device for a method for preparing a Micro-LED device according to an embodiment of the present invention;

[0075] Fig.11 Schematic diagram of the structure of a Micro-LED device according to an embodiment of the present invention.

[0076] Figure numerals: 201, first substrate; 202, first nucleation layer; 203, current spreading layer; 204, blocking layer; 205, third sacrificial layer; 206, first dielectric layer; 501, first sacrificial layer; 601, first target layer; 701, Micro-LED array; 702, HEMT array; 801, bonding metal layer. DETAILED DESCRIPTION

[0077] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0078] The terms "first", "second", "third" and "fourth" etc. in the specification and claims of the present application and the drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0079] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0080] At present, dry etching is the mainstream method for preparing gallium nitride-based Micro-LEDs. During the dry etching process, plasma is generated, including a large number of charged particles and a small number of uncharged particles. These plasmas are jointly directed to the unobstructed gallium nitride surface for physical bombardment and chemical etching, which will inevitably produce non-determined sidewall damage at the edge of the device and introduce a large number of dangling bonds on the sidewall surface, thereby affecting the performance of the Micro-LED device. In addition, the preparation process of gallium nitride-based Micro-LED generally adopts the electrical interconnection method of wire bonding. In the wire bonding of high I / O numbers of 100 to 500, the minimum center distance of the pad of the IC chip is 35μm, and wire bonding will increase signal delay. Therefore, the electrical interconnection method of wire bonding limits the preparation of high-resolution Micro-LED devices; in the preparation process of Micro-LED devices, due to the relatively serious lattice mismatch and thermal mismatch between the substrate and the epitaxial film, high-density defects and large stress will be introduced during the epitaxial growth process, which seriously limits the performance improvement of III-V nitride devices. Therefore, after growing the nitride epitaxial array film on the sapphire substrate, it is usually necessary to remove the growth substrate. The current mainstream growth substrate removal method is to use a laser to peel the epitaxial film from the growth substrate, but laser peeling will damage the epitaxial structure, and the peeled surface flatness and uniformity are poor, which seriously affects the performance of the device made on the epitaxial structure; in addition, the current Micro-LED device preparation method is difficult to achieve mass production of Micro-LED devices. To this end, an embodiment of the present invention proposes a method for preparing a Micro-LED device, which uses an epitaxial growth method to grow a first epitaxial layer on a first substrate, grows a second epitaxial layer on a second substrate, and then grows a first sacrificial layer on the first epitaxial layer, grows a second sacrificial layer on the second epitaxial layer, and uses lateral epitaxial growth to grow a first target layer on the first sacrificial layer to prepare a Micro-LED array, and grows a second target layer on the second sacrificial layer to prepare a HEMT array. During the preparation process, no sidewall damage will be caused to the device, and no large number of dangling bonds will be introduced, thereby reducing the dislocation density; by aligning and bonding the Micro-LED array with the HEMT array, the effect of flip-chip bonding is achieved, and the signal delay problem caused by the use of wire bonding to achieve electrical interconnection in the traditional method is solved; by removing the first substrate, the first epitaxial layer and the first sacrificial layer by electrochemical wet etching, the damage to the epitaxial structure during the stripping process is reduced, and the surface flatness and uniformity of the device after stripping are improved; by aligning and bonding the Micro-LED array with the HEMT array and the electrochemical wet etching process, the mass transfer of Micro-LEDs is achieved, which provides a basis for the mass production of Micro-LED devices.

[0081] like Figure 1As shown, the embodiment of the present invention provides a method for preparing a Micro-LED device, and the preparation method includes the following steps S101-S107:

[0082] S101, cleaning the first substrate 201 and the second substrate;

[0083] In the embodiment of the present invention, the first substrate 201 and the second substrate include any one of a sapphire substrate, a GaN substrate, a Si substrate and a SiC substrate.

[0084] Optionally, in one embodiment of the present invention, the first substrate 201 and the second substrate are sapphire substrates.

[0085] S102, growing a first epitaxial layer on the first substrate 201 by using an epitaxial growth method, and growing a second epitaxial layer on the second substrate by using an epitaxial growth method;

[0086] The epitaxial growth method includes any one of metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) and hydride vapor phase epitaxy (HVPE).

[0087] Optionally, in one embodiment of the present invention, sapphire substrates (first substrate and second substrate) treated with a standard cleaning process are placed in a metal organic chemical vapor deposition system reaction chamber, and MOCVD is used to grow a first epitaxial layer on the first substrate, and a second epitaxial layer is grown on the second substrate.

[0088] Specifically, refer to Figure 2 In an embodiment of the present invention, the first epitaxial layer includes a first nucleation layer 202, a current spreading layer 203, a barrier layer 204 and a third sacrificial layer 205, wherein the first nucleation layer 202 is an undoped GaN layer, the current spreading layer 203 is an N-type doped GaN layer, the barrier layer 204 is an undoped GaN layer, and the third sacrificial layer 205 is a low-doped N-type GaN layer. Growing the first epitaxial layer on the first substrate using an epitaxial growth method specifically includes the following steps:

[0089] 1) growing a first nucleation layer 202 on a first substrate 201;

[0090] Optionally, the thickness of the first nucleation layer 202 is 0.3 μm to 2 μm.

[0091] 2) growing a current spreading layer 203 on a side of the first nucleation layer 202 away from the first substrate 201;

[0092] Optionally, the thickness of the current spreading layer 203 is 0.2 μm to 4.5 μm, wherein the doping concentration of the N-type doped GaN layer is 3×10 18 cm -3~7×10 18 cm -3 , the doping atom is Si.

[0093] 3) growing a barrier layer 204 on a side of the current spreading layer 203 away from the first nucleation layer 202;

[0094] Optionally, the barrier layer 204 has a thickness of 0.24 μm to 0.5 μm.

[0095] 4) A third sacrificial layer 205 is grown on a side of the blocking layer 204 away from the current spreading layer 203 .

[0096] Optionally, the thickness of the third sacrificial layer 205 is 500 nm, and the doping concentration of the low-doped N-type GaN layer is 1×10 19 cm -3 .

[0097] Specifically, in an embodiment of the present invention, the second epitaxial layer includes a second nucleation layer and a fourth sacrificial layer, the second nucleation layer adopts an undoped GaN layer, and the fourth sacrificial layer adopts a low-doped N-type GaN layer. Growing the second epitaxial layer on the second substrate using an epitaxial growth method specifically includes the following steps:

[0098] 1) growing a second nucleation layer on a second substrate;

[0099] Optionally, the thickness of the second nucleation layer is 0.3 μm to 2 μm.

[0100] 2) growing a fourth sacrificial layer on a side of the second nucleation layer away from the second substrate.

[0101] Optionally, the thickness of the fourth sacrificial layer is 500 nm, and the doping concentration of the low-doped N-type GaN layer is 1×10 19 cm -3 .

[0102] S103, growing a first sacrificial layer 501 of a preset pattern array on a side of the first epitaxial layer away from the first substrate 201, and growing a second sacrificial layer of a preset pattern array on a side of the second epitaxial layer away from the second substrate;

[0103] The first sacrificial layer 501 and the second sacrificial layer are made of heavily doped N-type GaN layers.

[0104] In the embodiment of the present invention, by providing the first sacrificial layer 501 and the second sacrificial layer with a preset pattern array, the rate of electrochemical wet etching in subsequent steps is increased, which is beneficial for current to preferentially etch the first sacrificial layer 501 (and the second sacrificial layer).

[0105] Optionally, the doping concentration of the heavily doped N-type GaN layer used in the first sacrificial layer 501 and the second sacrificial layer is 2×10 19 cm -3 , the doping atom is Si.

[0106] Specifically, in an embodiment of the present invention, growing a first sacrificial layer 501 of a preset pattern array on a side of the first epitaxial layer away from the first substrate specifically includes the following steps:

[0107] 1) depositing a first dielectric layer on a side of the first epitaxial layer away from the first substrate;

[0108] Specifically, refer to Figure 2 A first dielectric layer 206 is deposited on the side of the first epitaxial layer away from the first substrate. Optionally, the material of the first dielectric layer 206 is SiO 2 and SiN x Any one of .

[0109] Optionally, the first dielectric layer 206 is deposited by any one of plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD) and magnetron sputtering deposition, and the thickness of the first dielectric layer 206 is 0.2 μm to 2 μm.

[0110] Optionally, in one embodiment of the present invention, PECVD is used to deposit 1.2 μm of SiO on the side of the first epitaxial layer away from the first substrate 201. 2 As the first dielectric layer 206 .

[0111] 2) performing patterning on the first dielectric layer 206 according to a preset pattern array to generate a first growth window;

[0112] Specifically, refer to Figure 3 , the first dielectric layer is patterned according to a preset pattern array, a portion of the first dielectric layer is removed, so that the first growth window exposes the surface of the first epitaxial layer, and a first growth window of a preset pattern array is formed on the first dielectric layer.

[0113] Optionally, the preset pattern array adopts periodically arranged circles, the diameter of the circles is 5 μm to 100 μm, and the spacing between the circles is 5 μm to 50 μm.

[0114] In an embodiment of the present invention, generating the first growth window includes the following steps:

[0115] a. Spin-coating a first photoresist on one side of the first dielectric layer 206 away from the first epitaxial layer;

[0116] Specifically, the first photoresist is spin-coated on a side of the first dielectric layer away from the first epitaxial layer by a coating machine.

[0117] b. forming a preset pattern array on the first photoresist by an exposure and development process;

[0118] Optionally, in one embodiment of the present invention, the diameter of the circles in the preset pattern array is 50 μm, and the spacing between the circles is 10 μm. After the photolithography is completed, a developer is used for processing to expose the exposure area of ​​the first photoresist.

[0119] c. After etching the exposed area of ​​the first photoresist by dry etching, the remaining first photoresist is removed and cleaned by acetone to generate a first growth window.

[0120] Optionally, in the embodiment of the present invention, an inductively coupled plasma (ICP) etching system is used to etch the exposed area of ​​the first photoresist, with an etching depth of 1.2 μm, so that the first growth window exposes the surface of the first epitaxial layer. Figure 4 An etched region 401 according to an embodiment of the present invention is shown.

[0121] Specifically, after etching is completed, acetone is used to remove the remaining first photoresist and diluted HCl is used for cleaning to generate a first growth window, such as Figure 3 shown.

[0122] 3) A metal organic chemical vapor deposition system is used to grow a first sacrificial layer 501 in the first growth window.

[0123] Among them, refer to Figure 5 , the thickness of the first sacrificial layer 501 is less than the thickness of the first dielectric layer 206. Optionally, the thickness of the first sacrificial layer 501 is 10 nm.

[0124] It can be understood that by making the thickness of the first sacrificial layer 501 smaller than the thickness of the first dielectric layer 206, the first sacrificial layer 501 is made into periodically arranged cylinders, while the first dielectric layer 206 still retains periodically arranged graphical growth windows to facilitate the subsequent growth of the arrayed umbrella-shaped structured first target layer 601.

[0125] Specifically, in an embodiment of the present invention, growing a second sacrificial layer of a preset pattern array on a side of the second epitaxial layer away from the second substrate specifically includes the following steps:

[0126] 1) depositing a second dielectric layer on a side of the second epitaxial layer away from the second substrate;

[0127] Specifically, a second dielectric layer is deposited on a side of the second epitaxial layer away from the second substrate. Optionally, the material of the second dielectric layer is SiO 2 and SiN x Any one of .

[0128] Optionally, the second dielectric layer is deposited by any one of plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD) and magnetron sputtering deposition, and the thickness of the second dielectric layer is 0.2 μm to 2 μm.

[0129] Optionally, in one embodiment of the present invention, PECVD is used to deposit 1.2 μm of SiO on the side of the second epitaxial layer away from the second substrate. 2 as the second dielectric layer.

[0130] 2) performing patterning on the second dielectric layer according to a preset pattern array to generate a second growth window;

[0131] Specifically, the second dielectric layer is patterned according to a preset pattern array, a portion of the second dielectric layer is removed, so that the second growth window exposes the surface of the second epitaxial layer, and a second growth window of the preset pattern array is formed on the second dielectric layer.

[0132] Optionally, the preset pattern array adopts periodically arranged circles, the diameter of the circles is 5 μm to 100 μm, and the spacing between the circles is 5 μm to 50 μm.

[0133] In an embodiment of the present invention, generating the second growth window comprises the following steps:

[0134] a. Spin-coating a second photoresist on the side of the second dielectric layer away from the second epitaxial layer;

[0135] Specifically, the second photoresist is spin-coated on a side of the second dielectric layer away from the second epitaxial layer by a coating machine.

[0136] b. forming a preset pattern array on the second photoresist by an exposure and development process;

[0137] Optionally, in one embodiment of the present invention, the diameter of the circles in the preset pattern array is 50 μm, and the spacing between the circles is 10 μm. After the photolithography is completed, a developer is used for processing to expose the exposure area of ​​the second photoresist.

[0138] c. After etching the exposed area of ​​the second photoresist by dry etching, the remaining second photoresist is removed and cleaned by acetone to generate a second growth window.

[0139] Optionally, in the embodiment of the present invention, an inductively coupled plasma (ICP) etching system is used to etch the exposed area of ​​the second photoresist, with an etching depth of 1.2 μm, so that the second growth window exposes the surface of the second epitaxial layer.

[0140] Specifically, after etching is completed, acetone is used to remove the remaining second photoresist and diluted HCl is used for cleaning to generate a second growth window.

[0141] 3) A metal organic chemical vapor deposition system is used to grow a second sacrificial layer in the second growth window.

[0142] The thickness of the second sacrificial layer is less than the thickness of the second dielectric layer. Optionally, the thickness of the second sacrificial layer is 10 nm.

[0143] It can be understood that by making the thickness of the second sacrificial layer smaller than that of the second dielectric layer, the second sacrificial layer is made into periodically arranged cylinders, while the second dielectric layer still retains periodically arranged graphic growth windows to facilitate the subsequent growth of the second target layer of the arrayed umbrella structure.

[0144] S104, growing a first target layer 601 on a side of the first sacrificial layer 501 away from the first epitaxial layer by using lateral epitaxial growth, and growing a second target layer on a side of the second sacrificial layer away from the second epitaxial layer by using lateral epitaxial growth;

[0145] The first target layer 601 and the second target layer are arrayed umbrella-shaped structures, and the umbrella-shaped structures are isolated from each other.

[0146] Optionally, MOCVD is used to grow the first target layer 601 on a side of the first sacrificial layer 501 away from the first epitaxial layer, and MOCVD is used to grow the second target layer on a side of the second sacrificial layer away from the second epitaxial layer.

[0147] Specifically, during the growth of the first target layer 601 and the second target layer, the anisotropy of crystal growth is utilized and the process parameters are controlled so that the first target layer 601 grows only on the first sacrificial layer 501 and the second target layer grows only on the second sacrificial layer. At the same time, the nucleation of the first target layer 601 on the surface of the first dielectric layer 206 is suppressed and the nucleation of the second target layer on the surface of the second dielectric layer is suppressed. By controlling the growth conditions, the first target layer 601 and the second target layer are laterally epitaxial to form mutually isolated arrayed umbrella structures, that is, each umbrella structure is an island.

[0148] Reference Figure 6 In an embodiment of the present invention, growing the first target layer 601 on a side of the first sacrificial layer 501 away from the first epitaxial layer by lateral epitaxial growth specifically includes the following steps:

[0149] 1) growing a first nitride epitaxial structure on a side of the first sacrificial layer 501 away from the first epitaxial layer, and performing lateral epitaxial growth on a portion of the first nitride epitaxial structure that is higher than the first growth window;

[0150] 2) Stop the growth before the first nitride epitaxial structures touch and connect with each other, and etch the first dielectric layer 206 to obtain the first target layer 601.

[0151] In an embodiment of the present invention, growing the second target layer on a side of the second sacrificial layer away from the second epitaxial layer by lateral epitaxial growth specifically includes the following steps:

[0152] 1) growing a second nitride epitaxial structure on a side of the second sacrificial layer away from the second epitaxial layer, and performing lateral epitaxial growth on a portion of the second nitride epitaxial structure that is higher than the second growth window;

[0153] 2) Stop the growth before the second nitride epitaxial structures touch and connect with each other, and etch the second dielectric layer to obtain a second target layer.

[0154] Optionally, in one embodiment of the present invention, the thickness of the first target layer and the second target layer is 2.2 μm.

[0155] It can be understood that the lower part of the first target layer 601 and the second target layer (such as the part with a growth thickness lower than 1.1 μm in one embodiment of the present invention) is a periodically arranged cylinder, and the upper part (such as the part with a growth thickness higher than 1.1 μm in one embodiment of the present invention) is an array of holes with a diameter larger than the diameter of the first growth window and the second growth window, such as Figure 6 shown.

[0156] In an embodiment of the present invention, a hydrofluoric acid (HF) solution or a buffered oxide etch (BOE) solution is used to etch the first dielectric layer and the second dielectric layer.

[0157] S105, preparing a Micro-LED array 701 on the first target layer 601, and preparing a HEMT array 702 on the second target layer;

[0158] Specifically, in an embodiment of the present invention, preparing the Micro-LED array 701 on the first target layer 601 specifically includes the following steps:

[0159] 1) Forming N-region steps and P-regions on each array unit of the first target layer 601 by photolithography and etching processes;

[0160] 2) Preparing an ITO film on the P region;

[0161] Specifically, an ITO thin film is prepared on the P region by electron beam evaporation or magnetron sputtering, and then annealing is performed.

[0162] 3) depositing a nickel / gold layer on the ITO film and on the N-region steps;

[0163] Specifically, Ni (10 nm) / Au (30 nm) is deposited on the P region and the N region by electron beam evaporation or thermal evaporation to serve as an ohmic contact.

[0164] 4) A passivation layer is prepared on the nickel / gold layer to complete the preparation of the Micro-LED array 701.

[0165] Alternatively, PECVD is used to prepare SiO 2 as a passivation layer.

[0166] Specifically, in an embodiment of the present invention, preparing a HEMT array 702 on the second target layer specifically includes the following steps:

[0167] A source electrode, a drain electrode and a gate electrode are formed on each array unit of the second target layer to complete the preparation of the HEMT array 702 .

[0168] Figure 7 The micro-LED array 701 and the HEMT array 702 prepared in the embodiment of the present invention are shown. S106, aligning and bonding the micro-LED array and the HEMT array to generate an integrated device array;

[0169] Specifically, in the embodiment of the present invention, AuSn alloy is used as bonding metal to complete the metal eutectic bonding (bonding metal layer 801) of the Micro-LED array and the HEMT array.

[0170] The specific steps include:

[0171] 1) Depositing a bonding metal layer 801 on the Micro-LED array and on the source and drain electrodes of each array unit of the HEMT array;

[0172] Specifically, refer to Figure 8 , using vacuum thermal evaporation equipment, Ti with a thickness of 50nm (ranging from 10nm to 100nm) and AuSn alloy with a thickness of 2μm (ranging from 2μm to 15μm) are deposited on the Micro-LED array 701 (the N region and P region of each array unit) and the source and drain of each array unit of the HEMT array 702. Among them, the deposited metal is used as the bonding metal layer 801 in the bonding process. The reflection effect of the bonding metal layer 801 on light can improve the light extraction efficiency of the Micro-LED after transfer bonding, and the high thermal conductivity of the bonding metal can also improve the heat dissipation efficiency of the Micro-LED and HEMT.

[0173] 2) Align and bond the Micro-LED array 701 and the HEMT array 702 through the bonding metal layer 801 to generate an integrated device array.

[0174] in, Fig. 9It is understood that in one embodiment of the present invention, active addressing or passive addressing can be achieved by designing the mask of the Micro-LED epitaxial structure and the HEMT epitaxial structure.

[0175] Specifically, bonding is performed at a temperature of 400° C. and a pressure of 0.98 MPa for 30 minutes to complete alignment and bonding of the Micro-LED array 701 and the HEMT array 702 to generate an integrated device array.

[0176] In an embodiment of the present invention, before depositing the bonding metal layer 801, the following steps are also included:

[0177] 1) a shielding layer is provided at the surface edge of the first target layer 601, wherein the shielding layer is used to achieve a shielding effect in the subsequent step of electrochemical wet etching (step S107);

[0178] 2) A protective layer is covered on the surface of the shielding layer that does not contact the first target layer 601 , wherein the protective layer includes any one of photoresist and raw tape.

[0179] S107 , electrochemically wet-etching the integrated device array to remove the first substrate 201 , the first epitaxial layer and the first sacrificial layer 501 , thereby completing the preparation of the Micro-LED device.

[0180] Specifically, the integrated device array is electrochemically wet-etched to etch the first sacrificial layer 501, so that the Micro-LED array 701 and the structure above are released from the first substrate 201, the first epitaxial layer and the first sacrificial layer 501, thereby achieving the peeling of the Micro-LED array epitaxial film.

[0181] In an embodiment of the present invention, step S107 specifically includes the following steps:

[0182] 1) removing the protective layer, and etching the shielding layer by an etching process until the first sacrificial layer 501 is exposed;

[0183] 2) depositing an electrode layer on the first sacrificial layer 501 exposed by the shielding layer, wherein the electrode layer is made of silver;

[0184] 3)Reference Fig.10 , placing the integrated device array after depositing the electrode layer on the anode of the electrochemical wet etching device, contacting the anode with the electrode layer, and immersing the integrated device array outside the electrode layer and the cathode of the electrochemical wet etching device in a corrosion electrolyte, wherein the cathode adopts a platinum sheet electrode to improve the stability of the electrochemical wet etching process;

[0185] 4) Powering on the electrochemical wet etching device, electrochemically wet etching the integrated device array, automatically releasing the first substrate 201 and the first epitaxial layer after etching the first sacrificial layer 501, and completing the preparation of the Micro-LED device.

[0186] The corrosion electrolyte is H 2 C 2 O 4 Solution, EDTA-4Na solution, HNO 3 Solution and K 2 SO 4 Any of the solutions is selected according to the alignment bonding process. The corrosion voltage used in the corrosion process is 10 to 30 V, and the corrosion time is 0.5 h to 9 h.

[0187] Optionally, in one embodiment of the present invention, the electrolyte is 0.3M H 2 C 2 O 4 Solution solution, corrosion voltage is 16V, corrosion time is 0.5h.

[0188] Fig.11 The Micro-LED device prepared according to the embodiment of the present invention is shown.

[0189] It is understandable that the second substrate of the Micro-LED device can also be stripped by electrochemical wet etching, and the Micro-LED device after the second substrate is stripped can be bonded to other heterogeneous substrates.

[0190] In summary, the method for preparing a Micro-LED device in an embodiment of the present invention adopts an epitaxial growth method to grow a first epitaxial layer on a first substrate, grows a second epitaxial layer on a second substrate, and then grows a first sacrificial layer on the first epitaxial layer, grows a second sacrificial layer on the second epitaxial layer, and adopts lateral epitaxial growth to grow a first target layer on the first sacrificial layer to prepare a Micro-LED array, and grows a second target layer on the second sacrificial layer to prepare a HEMT array. During the preparation process, no sidewall damage will be caused to the device, and no large number of dangling bonds will be introduced, thereby reducing the dislocation density; by aligning and bonding the Micro-LED array with the HEMT array, the effect of flip-chip bonding is achieved, and the signal delay problem caused by the use of wire bonding to achieve electrical interconnection in the traditional method is solved; by removing the first substrate, the first epitaxial layer and the first sacrificial layer by electrochemical wet etching, the damage to the epitaxial structure during the stripping process is reduced, and the surface flatness and uniformity of the device after stripping are improved; by aligning and bonding the Micro-LED array with the HEMT array and the electrochemical wet etching process, the mass transfer of Micro-LED is achieved, which provides a basis for the mass production of Micro-LED devices.

[0191] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the described embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A method for preparing a Micro-LED device, characterized in that: The following steps are involved: cleaning the first substrate and the second substrate; Growing a first epitaxial layer on the first substrate by an epitaxial growth method, and growing a second epitaxial layer on the second substrate by the epitaxial growth method, wherein the epitaxial growth method includes any one of metal organic chemical vapor deposition, molecular beam epitaxy and hydride vapor phase epitaxy; A first sacrificial layer of a preset pattern array is grown on a side of the first epitaxial layer away from the first substrate, and a second sacrificial layer of the preset pattern array is grown on a side of the second epitaxial layer away from the second substrate, wherein the first sacrificial layer and the second sacrificial layer are heavily doped N-type GaN layers; Growing a first target layer on a side of the first sacrificial layer away from the first epitaxial layer by lateral epitaxial growth, and growing a second target layer on a side of the second sacrificial layer away from the second epitaxial layer by lateral epitaxial growth, wherein the first target layer and the second target layer are arrayed umbrella-shaped structures, and the umbrella-shaped structures are isolated from each other; Preparing a Micro-LED array on the first target layer, and preparing a HEMT array on the second target layer; Aligning and bonding the Micro-LED array and the HEMT array to generate an integrated device array; Performing electrochemical wet etching on the integrated device array to remove the first substrate, the first epitaxial layer and the first sacrificial layer, and completing the preparation of the Micro-LED device; The step of growing a first sacrificial layer of a preset pattern array on a side of the first epitaxial layer away from the first substrate comprises: Depositing a first dielectric layer on a side of the first epitaxial layer away from the first substrate; Performing patterning on the first dielectric layer according to the preset pattern array to generate a first growth window, wherein the first growth window exposes a surface of the first epitaxial layer; Growing the first sacrificial layer in the first growth window using a metal organic chemical vapor deposition system, wherein the thickness of the first sacrificial layer is less than the thickness of the first dielectric layer; The step of growing the second sacrificial layer of the preset pattern array on a side of the second epitaxial layer away from the second substrate comprises: Depositing a second dielectric layer on a side of the second epitaxial layer away from the second substrate; Performing patterning on the second dielectric layer according to the preset pattern array to generate a second growth window, wherein the second growth window exposes a surface of the second epitaxial layer; Growing the second sacrificial layer in the second growth window using a metal organic chemical vapor deposition system, wherein the thickness of the second sacrificial layer is less than the thickness of the second dielectric layer; The step of growing the first target layer on a side of the first sacrificial layer away from the first epitaxial layer by lateral epitaxial growth comprises: Growing a first nitride epitaxial structure on a side of the first sacrificial layer away from the first epitaxial layer, and performing lateral epitaxial growth on a portion of the first nitride epitaxial structure that is higher than the first growth window; Stopping the growth before the first nitride epitaxial structures touch and connect with each other, and etching the first dielectric layer to obtain the first target layer; The step of growing the second target layer on a side of the second sacrificial layer away from the second epitaxial layer by lateral epitaxial growth comprises: Growing a second nitride epitaxial structure on a side of the second sacrificial layer away from the second epitaxial layer, and performing lateral epitaxial growth on a portion of the second nitride epitaxial structure that is higher than the second growth window; Stopping the growth of the second nitride epitaxial structures before they touch and connect with each other, and etching the second dielectric layer to obtain the second target layer; The corrosion electrolyte used in the electrochemical wet corrosion is any one of H2C2O4 solution, EDTA-4Na solution, HNO3 solution and K2SO4 solution.

2. The method for preparing a Micro-LED device according to claim 1, characterized in that: The first epitaxial layer includes a first nucleation layer, a current spreading layer, a blocking layer and a third sacrificial layer, the first nucleation layer is an undoped GaN layer, the current spreading layer is an N-type doped GaN layer, the blocking layer is an undoped GaN layer, and the third sacrificial layer is a low-doped N-type GaN layer; The step of growing a first epitaxial layer on the first substrate using an epitaxial growth method comprises: growing the first nucleation layer on the first substrate; growing the current spreading layer on a side of the first nucleation layer away from the first substrate; Growing the blocking layer on a side of the current spreading layer away from the first nucleation layer; Growing the third sacrificial layer on a side of the blocking layer away from the current spreading layer; The second epitaxial layer includes a second nucleation layer and a fourth sacrificial layer, the second nucleation layer is an undoped GaN layer, and the fourth sacrificial layer is a low-doped N-type GaN layer; The step of growing a second epitaxial layer on the second substrate using an epitaxial growth method comprises: growing the second nucleation layer on the second substrate; The fourth sacrificial layer is grown on a side of the second nucleation layer away from the second substrate.

3. The method for preparing a Micro-LED device according to claim 1, characterized in that: The step of patterning the first dielectric layer according to the preset pattern array to generate a first growth window includes: Spin coating a first photoresist on a side of the first dielectric layer away from the first epitaxial layer; Forming the preset pattern array on the first photoresist through an exposure and development process; After etching the exposed area of ​​the first photoresist by dry etching, the remaining first photoresist is removed and cleaned by acetone to generate the first growth window.

4. The method for preparing a Micro-LED device according to claim 1, characterized in that: The step of patterning the second dielectric layer according to the preset pattern array to generate a second growth window includes: Spin coating a second photoresist on a side of the second dielectric layer away from the second epitaxial layer; Forming the preset pattern array on the second photoresist through an exposure and development process; After etching the exposed area of ​​the second photoresist by dry etching, the remaining second photoresist is removed and cleaned by acetone to generate the second growth window.

5. The method for preparing a Micro-LED device according to claim 1, characterized in that: The step of preparing a Micro-LED array on the first target layer comprises: Forming N-region steps and P-regions on each array unit of the first target layer by photolithography and etching processes; Preparing an ITO film on the P region; Depositing a nickel / gold layer on the ITO film and on the N-region step; Preparing a passivation layer on the nickel / gold layer to complete the preparation of the Micro-LED array; The step of preparing a HEMT array on the second target layer comprises: A source electrode, a drain electrode and a gate electrode are formed on each array unit of the second target layer to complete the preparation of the HEMT array.

6. The method for preparing a Micro-LED device according to claim 5, characterized in that: The step of aligning and bonding the Micro-LED array and the HEMT array to generate an integrated device array comprises: Depositing a bonding metal layer on the Micro-LED array and on the source and drain electrodes of each array unit of the HEMT array; The Micro-LED array and the HEMT array are aligned and bonded via the bonding metal layer to generate the integrated device array.

7. The method for preparing a Micro-LED device according to claim 6, characterized in that: Before the step of depositing a bonding metal layer on the Micro-LED array and on the source and drain of each array unit of the HEMT array, the method for preparing a Micro-LED device further includes: Disposing a shielding layer at a surface edge of the first target layer; A protective layer is covered on the surface of the shielding layer that does not contact the first target layer, and the protective layer includes any one of photoresist and raw tape.

8. The method for preparing a Micro-LED device according to claim 7, characterized in that: The step of performing electrochemical wet etching on the integrated device array to remove the first substrate, the first epitaxial layer and the first sacrificial layer to complete the preparation of the Micro-LED device includes: removing the protective layer, and etching the shielding layer by an etching process until the first sacrificial layer is exposed; Depositing an electrode layer on the first sacrificial layer exposed by the shielding layer, wherein the electrode layer is made of silver; The integrated device array after the electrode layer is deposited is arranged on the anode of an electrochemical wet etching device, the anode is contacted with the electrode layer, and the integrated device array outside the electrode layer and the cathode of the electrochemical wet etching device are immersed in a corrosion electrolyte, and the cathode is a platinum sheet electrode; The electrochemical wet etching device is powered on to perform electrochemical wet etching on the integrated device array. After the first sacrificial layer is corroded, the first substrate and the first epitaxial layer are automatically released to complete the preparation of the Micro-LED device.

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