Vehicle-mounted radar, communication base station, high-power radio frequency device and manufacturing method thereof

Abstract

The present invention provides an in-vehicle radar, a communication base station, a high-power radio frequency device and a manufacturing method thereof. The high-power radio frequency device includes: a high-power radio frequency semiconductor structure, a metal interconnection layer, a second dielectric layer, a ground pad, an input pad and an output pad; the high-power radio frequency semiconductor structure includes: a first region of a substrate and a first electrode, a second electrode and a third electrode located on the first region; the metal interconnection layer includes a first dielectric layer, a ground electrode, an input electrode and an output electrode, the ground electrode is electrically connected to the second electrode, the input electrode is electrically connected to the first electrode, and the output electrode is electrically connected to the third electrode; the second dielectric layer covers the metal interconnection layer, the dielectric constant of the second dielectric layer is less than that of the first dielectric layer, and the thermal conductivity is greater than that of the substrate; the ground pad is located on the second dielectric layer; the input pad and the output pad are located on the back surface of the substrate. While ensuring the high-frequency performance of the device, a lower device thermal resistance can be obtained.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to an in-vehicle radar, a communication base station, a high-power radio frequency device, and a manufacturing method thereof. Background Art

[0002] High-power radio frequency devices, such as radio frequency power amplifiers, are important components of various wireless transmitters. In a transmitting system, the output power of a radio frequency power amplifier can be as large as several hundred watts. Therefore, the heat dissipation effect of the radio frequency power amplifier determines the reliability and cost of the entire amplifier operation.

[0003] In related technologies, high-quality third-generation semiconductor gallium nitride materials can be directly grown and deposited on a silicon substrate, and the manufacturing cost of gallium nitride devices can be significantly reduced by means of large-size, low-cost silicon wafers and their automated process lines. However, due to the poor thermal conductivity of silicon, even if the gallium nitride wafer based on a silicon substrate is thinned as much as possible, its thermal resistance will still be relatively large, and it is difficult to obtain excellent heat dissipation performance. In addition, due to the large lattice mismatch between the silicon substrate lattice and the gallium nitride lattice, the thinning degree of the gallium nitride wafer based on a silicon substrate is limited, which results in that the gallium nitride radio frequency power amplifier chip based on a silicon substrate is difficult to be used in radio frequency power amplifiers for a new generation of wireless communication base stations due to the problem of poor heat dissipation. Summary of the Invention

[0004] The invention object of the present invention is to provide an in-vehicle radar, a communication base station, a high-power radio frequency device, and a manufacturing method thereof, which can obtain a lower device thermal resistance while ensuring the high-frequency performance of the device.

[0005] To achieve the above object, a first aspect of the present invention provides a high-power radio frequency device, including:

[0006] A high-power radio frequency semiconductor structure, including: a first region of a substrate and a first electrode, a second electrode, and a third electrode located on the first region, the second electrode and the third electrode being located on both sides of the first electrode;

[0007] A metal interconnection layer, located on the high-power radio frequency semiconductor structure and a second region of the substrate; the metal interconnection layer includes a first dielectric layer, a ground electrode, an input electrode, and an output electrode; the ground electrode is electrically connected to the second electrode, the input electrode is electrically connected to the first electrode, and the output electrode is electrically connected to the third electrode;

[0008] A second dielectric layer, covering the metal interconnection layer; the dielectric constant of the second dielectric layer is less than the dielectric constant of the first dielectric layer, and the thermal conductivity of the second dielectric layer is greater than the thermal conductivity of the substrate; and

[0009] A ground pad, located on a side of the second dielectric layer away from the substrate and electrically connected to the ground electrode; an input pad and an output pad, located on a side of the substrate away from the metal interconnect layer, the input pad being electrically connected to the input electrode and the output pad being electrically connected to the output electrode.

[0010] Optionally, the high-power radio frequency semiconductor structure is an LDMOS structure or a HEMT structure, the first electrode is a gate electrode, the second electrode is a source electrode, and the third electrode is a drain electrode.

[0011] Optionally, the high-power radio frequency semiconductor structure is an HBT structure, the first electrode is a base electrode, the second electrode is a collector electrode, and the third electrode is an emitter electrode.

[0012] Optionally, the substrate includes at least one of single-crystalline silicon, single-crystalline diamond, silicon carbide, gallium nitride, and sapphire; and / or the material of the first dielectric layer is at least one of silicon dioxide, silicon nitride, and silicon oxynitride; and / or the material of the second dielectric layer is at least one of polycrystalline diamond, amorphous diamond, polycrystalline silicon carbide, and amorphous silicon carbide.

[0013] Optionally, the thickness range of the second dielectric layer is 5 μm to 20 μm.

[0014] Optionally, the orthographic projections of the input electrode and the output electrode on the plane where the substrate is located are in the second region.

[0015] Optionally, the ground electrode is electrically connected to the second electrode through the metal interconnect layer, the input electrode is electrically connected to the first electrode through the metal interconnect layer, and the output electrode is electrically connected to the third electrode through the metal interconnect layer.

[0016] Optionally, the ground pad is connected to the ground electrode through a first through hole formed in the second dielectric layer.

[0017] Optionally, the input pad is connected to the input electrode through a second through hole formed in the substrate and the metal interconnect layer; the output pad is connected to the output electrode through a third through hole formed in the substrate and the metal interconnect layer.

[0018] Optionally, the high-power radio frequency device further includes: a passivation layer, located on a side of the second dielectric layer away from the substrate; the ground pad is located on a side of the passivation layer away from the substrate; the thickness ratio of the passivation layer to the second dielectric layer ranges from 0.025 to 0.3.

[0019] Optionally, the ground pad is connected to the ground electrode through a first through hole formed in the passivation layer and the second dielectric layer.

[0020] Optionally, the passivation layer is a single-layer structure, and the material of the single-layer structure is silicon nitride; or the passivation layer is a laminated structure, and in the direction away from the second dielectric layer, the laminated structure sequentially includes a silicon dioxide layer and a silicon nitride layer.

[0021] Optionally, the high-power radio frequency device further includes: a package case, the ground pad is assembled on the package case, and the input pad and the output pad are led out of the package case through metal leads.

[0022] The second aspect of the present invention provides a manufacturing method of a high-power radio frequency device, including:

[0023] Providing a semiconductor intermediate structure, the semiconductor intermediate structure includes:

[0024] A high-power radio frequency semiconductor structure, including: a first region of a substrate and a first electrode, a second electrode, and a third electrode located on the first region, the second electrode and the third electrode being located on both sides of the first electrode; and

[0025] A metal interconnection layer, located on the high-power radio frequency semiconductor structure and a second region of the substrate; the metal interconnection layer includes a first dielectric layer, a ground electrode, an input electrode, and an output electrode; the ground electrode is electrically connected to the second electrode, the input electrode is electrically connected to the first electrode, and the output electrode is electrically connected to the third electrode;

[0026] Covering a second dielectric layer on the metal interconnection layer, the dielectric constant of the second dielectric layer is less than the dielectric constant of the first dielectric layer, and the thermal conductivity of the second dielectric layer is greater than the thermal conductivity of the substrate;

[0027] Forming a ground pad on a side of the second dielectric layer away from the substrate, the ground pad being electrically connected to the ground electrode; forming an input pad and an output pad on a side of the substrate away from the metal interconnection layer, the input pad being electrically connected to the input electrode, and the output pad being electrically connected to the output electrode.

[0028] Optionally, the high-power radio frequency semiconductor structure is an LDMOS structure or an HEMT structure, the first electrode is a gate electrode, the second electrode is a source electrode, and the third electrode is a drain electrode.

[0029] Optionally, the high-power radio frequency semiconductor structure is an HBT structure, the first electrode is a base electrode, the second electrode is a collector electrode, and the third electrode is an emitter electrode.

[0030] Optionally, the dielectric constant of the second dielectric layer is less than the dielectric constant of the substrate.

[0031] Optionally, the substrate includes at least one of single-crystalline silicon, single-crystalline diamond, silicon carbide, gallium nitride, and sapphire; and / or the material of the first dielectric layer is at least one of silicon dioxide, silicon nitride, and silicon oxynitride; and / or the material of the second dielectric layer is at least one of polycrystalline diamond, amorphous diamond, polycrystalline silicon carbide, and amorphous silicon carbide.

[0032] Optionally, the thickness range of the second dielectric layer is 5 μm to 20 μm.

[0033] Optionally, the second dielectric layer is formed by at least one of microwave plasma chemical vapor deposition, inductively coupled plasma chemical vapor deposition, pulsed laser deposition, and electron cyclotron resonance chemical vapor deposition, and the deposition temperature is less than or equal to 400°C.

[0034] Optionally, the positive projections of the input electrode and the output electrode on the plane where the substrate is located are located in the second region.

[0035] Optionally, the ground electrode is electrically connected to the second electrode through the metal interconnection layer, the input electrode is electrically connected to the first electrode through the metal interconnection layer, and the output electrode is electrically connected to the third electrode through the metal interconnection layer.

[0036] Optionally, forming the ground pad includes: opening a first through hole in the second dielectric layer, and the first through hole exposes the ground electrode; filling the first through hole and forming a ground pad on the side of the second dielectric layer away from the substrate.

[0037] Optionally, forming the input pad and the output pad includes: opening a second through hole and a third through hole in the substrate and the metal interconnection layer respectively, the second through hole exposes the input electrode, and the third through hole exposes the output electrode; filling the second through hole and the third through hole and forming an input pad and an output pad on the side of the substrate away from the metal interconnection layer respectively, the input pad is connected to the input electrode, and the output pad is connected to the output electrode.

[0038] Optionally, before the step of forming the input pad and the output pad, the substrate is thinned.

[0039] The third aspect of the present invention provides a high-power radio frequency amplifier, including: the high-power radio frequency device described in any one of the above.

[0040] The fourth aspect of the present invention provides a communication base station, including: the high-power radio frequency device described in any one of the above.

[0041] The fifth aspect of the present invention provides a vehicle-mounted radar, including: the high-power radio frequency device described in any one of the above.

[0042] Compared with the prior art, the beneficial effects of the present invention are as follows: The second dielectric layer is made of a material with a large thermal conductivity and a small dielectric constant. The large thermal conductivity can greatly improve the heat dissipation performance of the heat dissipation path on the front side of the device from the substrate, overcoming the defect of the large thermal resistance of the substrate and the poor heat dissipation performance of the heat dissipation path on the back side of the substrate. In addition, due to the large thermal conductivity of the second dielectric layer, its thickness can be relatively thick. Combining with the small dielectric constant, the parasitic capacitance can be reduced, thus ensuring the high-frequency performance of the device. It is particularly suitable for high-frequency power semiconductor devices and radio frequency / millimeter-wave monolithic integrated circuits with strict requirements for heat dissipation capacity and parasitic electrical parameters. Description of the Drawings

[0043] Figure 1 is a schematic cross-sectional structure diagram of a high-power radio frequency device according to the first embodiment of the present invention;

[0044] Figure 2 is Figure 1 a flowchart of the manufacturing method of the high-power radio frequency device in

[0045] Figures 3 to 5 is Figure 2 a schematic intermediate structure diagram corresponding to the manufacturing method of

[0046] Figure 6 is a schematic cross-sectional structure diagram of a high-power radio frequency device according to the second embodiment of the present invention;

[0047] Figure 7 is a schematic cross-sectional structure diagram of a high-power radio frequency device according to the third embodiment of the present invention.

[0048] For the convenience of understanding the present invention, all the reference numerals appearing in the present invention are listed below:

[0049] Substrate 10, First region 10a

[0050] Second region 10b, High-power radio frequency semiconductor structure 101

[0051] First electrode, Gate 101a, Second electrode, Source 101b

[0052] Third electrode, Drain 101c, Heterojunction structure 101d

[0053] P-type semiconductor layer 101e, Metal interconnection layer 11

[0054] First dielectric layer 111, Ground electrode 112

[0055] Input electrode 113, Output electrode 114

[0056] Second dielectric layer 12, Ground pad 13

[0057] Input pad 14, output pad 15

[0058] First via hole 161, second via hole 162

[0059] Third via hole 163, passivation layer 17

[0060] Package housing 20, high-power RF devices 1, 2, 3 Detailed implementation manner

[0061] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following describes in detail the specific embodiments of the present invention with reference to the accompanying drawings.

[0062] Figure 1 It is a schematic cross-sectional structure diagram of a high-power RF device according to the first embodiment of the present invention.

[0063] Refer to Figure 1 As shown, the high-power RF device 1 includes:

[0064] A high-power RF semiconductor structure 101, including: a first region 10a of the substrate 10 and a first electrode 101a, a second electrode 101b, and a third electrode 101c located on the first region 10a, and the second electrode 101b and the third electrode 101c are located on both sides of the first electrode 101a;

[0065] A metal interconnection layer 11, located on the high-power RF semiconductor structure 101 and the second region 10b of the substrate 10; the metal interconnection layer 11 includes a first dielectric layer 111, a ground electrode 112, an input electrode 113, and an output electrode 114; the ground electrode 112 is electrically connected to the second electrode 101b, the input electrode 113 is electrically connected to the first electrode 101a, and the output electrode 114 is electrically connected to the third electrode 101c;

[0066] A second dielectric layer 12, covering the metal interconnection layer 11; the dielectric constant of the second dielectric layer 12 is less than the dielectric constant of the first dielectric layer 111, and the thermal conductivity of the second dielectric layer 12 is greater than the thermal conductivity of the substrate 10; and

[0067] A ground pad 13, located on the side of the second dielectric layer 12 away from the substrate 10 and electrically connected to the ground electrode 112; an input pad 14 and an output pad 15, located on the side of the substrate 10 away from the metal interconnection layer 11, the input pad 14 is electrically connected to the input electrode 113, and the output pad 15 is electrically connected to the output electrode 114.

[0068] The material of the substrate 10 can be materials such as single-crystal silicon, single-crystal diamond, sapphire, silicon carbide, or gallium nitride.

[0069] Refer to Figure 1As shown, the substrate 10 includes a first region 10a and a second region 10b, and the second region 10b can be disposed around the first region 10a.

[0070] The high-power radio frequency semiconductor structure 101 is formed in the first region 10a. In this embodiment, the high-power radio frequency semiconductor structure 101 is an LDMOS structure or a HEMT structure. Correspondingly, the first electrode 101a is the gate electrode, the second electrode 101b is the source electrode, and the third electrode 101c is the drain electrode.

[0071] Taking the HEMT semiconductor structure as an example, a heterojunction structure 101d can be formed on the first region 10a. The heterojunction structure 101d can include a channel layer close to the substrate 10 and a barrier layer away from the substrate 10. A two-dimensional electron gas can be formed at the interface between the channel layer and the barrier layer. The materials of both the channel layer and the barrier layer can be GaN-based materials, and the bandgap of the barrier layer is greater than that of the channel layer. The material of the barrier layer can be AlGaN, and the material of the channel layer can be GaN.

[0072] The heterojunction structure 101d includes a gate region, and a source region and a drain region on both sides of the gate region. A P-type semiconductor layer 101e can be provided on the gate region to consume the excess two-dimensional electron gas in the channel and form an enhancement-mode HEMT device. A gate 101a can be provided on the side of the P-type semiconductor layer 101e away from the substrate 10 to control the turn-off or turn-on of the channel region.

[0073] The source electrode 101b contacts the source region of the heterojunction structure, and the drain electrode 101c contacts the drain region of the heterojunction structure. The source electrode 101b and the drain electrode 101c can contact the channel layer of the heterojunction structure.

[0074] In other embodiments, the high-power radio frequency semiconductor structure 101 can also be an HBT structure. Correspondingly, the first electrode 101a is the base electrode, the second electrode 101b is the collector electrode, and the third electrode 101c is the emitter electrode. In addition, in some embodiments, the high-power radio frequency semiconductor structure 101 can also be two or more of an HEMT structure, an LDMOS structure, and an HBT structure.

[0075] In this embodiment, the metal interconnect layer 11 includes a first dielectric layer 111. The ground electrode 112, the input electrode 113, and the output electrode 114 are located on the side of the metal interconnect layer 11 away from the substrate 10. The ground electrode 112 is electrically connected to the source electrode 101b through the metal interconnect layer 11, the input electrode 113 is electrically connected to the gate electrode 101a through the metal interconnect layer 11, and the output electrode 114 is electrically connected to the drain electrode 101c through the metal interconnect layer 11.

[0076] In this embodiment, the grounding electrode 112, the input electrode 113, and the output electrode 114 are located on one side of the high-power radio frequency semiconductor structure 101. In other embodiments, the grounding electrode 112, the input electrode 113, and the output electrode 114 may also be disposed around the high-power radio frequency semiconductor structure 101.

[0077] In this embodiment, the orthographic projections of the input electrode 113 and the output electrode 114 on the plane of the substrate 10 are located in the second region 10b. In other embodiments, on the premise of not affecting the performance of the high-power radio frequency semiconductor structure 101, the orthographic projections of the input electrode 113 and the output electrode 114 on the plane of the substrate 10 may also partially overlap with the first region 10a.

[0078] The first dielectric layer 111 may include a pre-metal dielectric layer (PMD) and an interlayer dielectric layer (ILD). The material of the pre-metal dielectric layer may be silicon nitride or silicon oxynitride. The material of the interlayer dielectric layer may be silicon dioxide.

[0079] The dielectric constant of the second dielectric layer 12 is less than that of the first dielectric layer 111, and the thermal conductivity of the second dielectric layer 12 is greater than that of the substrate 10. Compared with the case where the second dielectric layer 12 and the first dielectric layer 111 have the same material, it is possible to obtain a lower device thermal resistance while ensuring the high-frequency performance of the device 1. The reason is that: due to the large thermal resistance of the substrate 10, the heat dissipation performance of the heat dissipation path from the back surface of the substrate 10 is poor, so the heat dissipation path from the front surface of the substrate 10 is considered for heat dissipation; this requires the second dielectric layer 12 to have a thinner thickness to reduce the thermal resistance, but a thinner thickness will increase the parasitic capacitance, limiting the high-frequency performance of the device; the second dielectric layer 12 is made of a material with a large thermal conductivity and a small dielectric constant. A large thermal conductivity can greatly improve the heat dissipation performance of the device, so the thickness can be thicker. Combined with a small dielectric constant, the parasitic capacitance can be reduced.

[0080] When the dielectric constant of the second dielectric layer 12 is less than that of the substrate 10, the parasitic capacitance can be further reduced.

[0081] The material of the second dielectric layer 12 that satisfies the above conditions may be one or a combination of polycrystalline diamond, amorphous diamond, polycrystalline silicon carbide, and amorphous silicon carbide, or the second dielectric layer 12 is a laminated structure composed of the above different material layers.

[0082] The thickness range of the second dielectric layer 12 is 5 μm to 20 μm, preferably 10 μm to 20 μm. The numerical range in this embodiment includes the end point values.

[0083] In this embodiment, the ground pad 13 is connected to the ground electrode 112 through a first through hole formed in the second dielectric layer 12; the input pad 14 is connected to the input electrode 113 through a second through hole formed in the substrate 10 and the metal interconnection layer 11; the output pad 15 is connected to the output electrode 114 through a third through hole formed in the substrate 10 and the metal interconnection layer 11. The above connection method is simple and can simplify the structure of the high-power RF device. In other embodiments, the ground pad 13 can also be electrically connected to the ground electrode 112, the input pad 14 can be electrically connected to the input electrode 113, and the output pad 15 can be electrically connected to the output electrode 114 through other corresponding structures.

[0084] In other embodiments, other semiconductor devices, such as MOS transistors, Schottky junction barrier transistors, etc., can also be formed in the second region 10b of the substrate 10.

[0085] This embodiment also provides Figure 1 a manufacturing method of the high-power RF device in Figure 2 which is a flowchart of the manufacturing method. Figures 3 to 5 is Figure 2 a schematic diagram of an intermediate structure corresponding to the manufacturing method.

[0086] First, referring to Figure 2 step S1 in Figure 3 and as shown in

[0087] a semiconductor intermediate structure is provided, and the semiconductor intermediate structure includes:

[0088] a high-power RF semiconductor structure 101, including: a first region 10a of the substrate 10 and a first electrode 101a, a second electrode 101b, and a third electrode 101c located on the first region 10a, with the second electrode 101b and the third electrode 101c on both sides of the first electrode 101a; and

[0089] Referring to Figure 3 as shown, the substrate 10 includes a first region 10a and a second region 10b, and the second region 10b can be disposed around the first region 10a.

[0090] The high-power radio-frequency semiconductor structure 101 is formed in the first region 10a. In this embodiment, the high-power radio-frequency semiconductor structure 101 is an LDMOS structure or a HEMT structure. Correspondingly, the first electrode 101a is the gate electrode, the second electrode 101b is the source electrode, and the third electrode 101c is the drain electrode.

[0091] In this embodiment, the metal interconnect layer 11 includes a first dielectric layer 111. The ground electrode 112, the input electrode 113, and the output electrode 114 are located on the side of the metal interconnect layer 11 away from the substrate 10. The ground electrode 112 is electrically connected to the source electrode 101b through the metal interconnect layer 11, the input electrode 113 is electrically connected to the gate electrode 101a through the metal interconnect layer 11, and the output electrode 114 is electrically connected to the drain electrode 101c through the metal interconnect layer.

[0092] In other embodiments, the high-power radio-frequency semiconductor structure 101 can also be an HBT structure. Correspondingly, the first electrode 101a is the base, the second electrode 101b is the collector, and the third electrode 101c is the emitter. The ground electrode 112 is electrically connected to the collector through the metal interconnect layer 11, the input electrode 113 is electrically connected to the base through the metal interconnect layer 11, and the output electrode 114 is electrically connected to the emitter through the metal interconnect layer.

[0093] In addition, in some embodiments, the high-power radio-frequency semiconductor structure 101 can also be two or more of HEMT structure, LDMOS structure, and HBT structure.

[0094] The first dielectric layer 111 may include a pre-metal dielectric layer (PMD) and an interlayer dielectric layer (ILD). The material of the pre-metal dielectric layer can be silicon nitride or silicon oxynitride. The material of the interlayer dielectric layer can be silicon dioxide.

[0095] Next, referring to Figure 2 steps S2 in Figure 4 and as shown in

[0096] a second dielectric layer 12 is covered on the metal interconnect layer 11. The dielectric constant of the second dielectric layer 12 is less than that of the first dielectric layer 111, and the thermal conductivity of the second dielectric layer 12 is greater than that of the substrate 10.

[0097] The material of the second dielectric layer 12 can be at least one of polycrystalline diamond, amorphous diamond, polycrystalline silicon carbide, and amorphous silicon carbide, and is formed by using one or a combination of physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), and inductively coupled plasma chemical vapor deposition (ICP-CVD). Preferably, it is formed by using one or a combination of microwave plasma chemical vapor deposition (MPCVD), inductively coupled plasma chemical vapor deposition (ICP-CVD), pulsed laser deposition (PLD), and electron cyclotron resonance chemical vapor deposition (ECR-CVD). The deposition temperature of the above processes can be relatively low, for example, less than or equal to 400 °C, without affecting the performance of the high-power radio frequency semiconductor structure 101.

[0098] After that, referring to Figure 2 the steps S3 in Figure 1 as shown, a ground pad 13 is formed on the side of the second dielectric layer 12 away from the substrate 10, and the ground pad 13 is electrically connected to the ground electrode 112; an input pad 14 and an output pad 15 are formed on the side of the substrate 10 away from the metal interconnection layer 11, the input pad 14 is electrically connected to the input electrode 113, and the output pad 15 is electrically connected to the output electrode 114.

[0099] In this embodiment, forming the ground pad 13 may include: referring to Figure 5 as shown, a first through hole 161 is opened in the second dielectric layer 12, and the first through hole 161 exposes the ground electrode 112; the first through hole 161 is filled and the ground pad 13 is formed on the side of the second dielectric layer 12 away from the substrate 10.

[0100] The first through hole 161 can be formed by dry etching. The ground pad 13 can be formed by physical vapor deposition or electroplating, and the material can be a metal such as Au, Ag, Cu, or Al, and the thickness can be greater than or equal to 3 μm.

[0101] Forming the input pad 14 and the output pad 15 may include: referring to Figure 5 as shown, a second through hole 162 and a third through hole 163 are respectively opened in the substrate 10 and the metal interconnection layer 11, the second through hole 162 exposes the input electrode 113, and the third through hole 163 exposes the output electrode 114; the second through hole 162 and the third through hole 163 are filled and the input pad 14 and the output pad 15 are respectively formed on the side of the substrate 10 away from the metal interconnection layer 11, the input pad 14 is connected to the input electrode 113, and the output pad 15 is connected to the output electrode 114.

[0102] The second through-hole 162 and the third through-hole 163 can be formed by dry etching. The input pad 14 and the output pad 15 can be formed by physical vapor deposition or electroplating, and the material can be a metal such as Au, Ag, Cu, or Al, and the thickness can be greater than or equal to 3 μm.

[0103] When the substrate 10 is a non-insulating semiconductor material, such as doped single-crystalline silicon, non-insulating silicon carbide, or non-insulating gallium nitride and other materials, before forming the second through-hole 162 and the third through-hole 163, an insulating layer can be formed on the side of the substrate 10 away from the metal interconnection layer 11, that is, on the back surface of the substrate 10. The material of the insulating layer can be silicon nitride or silicon dioxide, and the thickness can be greater than or equal to 0.5 μm. The input pad 14 and the output pad 15 are formed on the insulating layer.

[0104] When the substrate 10 is an insulating material, such as single-crystalline diamond, sapphire and other materials, the production of the insulating layer can be omitted, and the input pad 14 and the output pad 15 are directly formed on the back surface of the substrate 10.

[0105] Preferably, before the steps of forming the input pad 14 and the output pad 15, the substrate 10 can be thinned. The thinner the thickness of the substrate 10, the better the heat dissipation performance, but if the thickness is too thin, the substrate 10 will be broken in the processes of etching through-holes and depositing metal layers. For example, when the substrate 10 is a single-crystalline silicon substrate, it is preferably thinned to 200 μm - 300 μm.

[0106] Figure 6 It is a schematic cross-sectional structure diagram of a high-power radio frequency device according to the second embodiment of the present invention.

[0107] Refer to Figure 6 As shown, the high-power radio frequency device and its manufacturing method in the second embodiment are substantially the same as those in the first embodiment, except that: the high-power radio frequency device 2 further includes: a passivation layer 17, located on the side of the second dielectric layer 12 away from the substrate 10; a ground pad 13 is located on the side of the passivation layer 17 away from the substrate 10; the thickness ratio range of the passivation layer 17 to the second dielectric layer 12 is 0.025 - 0.3. The numerical range in this embodiment includes the end point values.

[0108] In this embodiment, the passivation layer 17 is a single-layer structure, and the material of the single-layer structure is silicon nitride. In other embodiments, the passivation layer 17 can also be a laminated structure, and in the direction away from the second dielectric layer 12, the laminated structure sequentially includes a silicon dioxide layer and a silicon nitride layer. The passivation layer 17 can prevent the invasion of chemical substances such as water vapor, salt spray, and metal ions that may cause chip failure.

[0109] In this embodiment, the ground pad 13 is connected to the ground electrode 112 through a first through-hole 161 opened in the passivation layer 17 and the second dielectric layer 12.

[0110] The passivation layer 17 is formed by physical vapor deposition or chemical vapor deposition correspondingly.

[0111] Figure 7 It is a schematic cross-sectional structure diagram of a high-power radio frequency device according to the third embodiment of the present invention.

[0112] Referring to Figure 7 As shown, the high-power radio frequency device and its manufacturing method in the third embodiment are substantially the same as those in the first and second embodiments, and the difference lies only in that: the high-power radio frequency device 3 further includes: a packaging case 20, a grounding pad 13 is assembled on the packaging case 20, and the input pad 14 and the output pad 15 are led out of the packaging case 20 through metal leads (not marked).

[0113] The packaging of the high-power radio frequency device 3 can be in the form of ceramic packaging, metal packaging, plastic packaging, etc.

[0114] The grounding pad 13 can be connected to the packaging case 20 by a bonding method or a soldering method. The soldering material can be materials such as SnAu, SnAg, PbSnAg or SnAgCu.

[0115] In the high-power radio frequency device 3 of this embodiment, the material selection of the second dielectric layer 12 can reduce the thermal resistance Tjc from the device junction region to the packaging case 20, significantly improve the heat dissipation capacity of the multi-layer structure on the front side of the substrate, and thus enable the device to have a higher output power level and higher reliability.

[0116] Based on the above high-power radio frequency devices 1, 2, and 3, the embodiments of the present invention further provide a high-power radio frequency amplifier, a communication base station, and a vehicle-mounted radar including any one of the above high-power radio frequency devices 1, 2, and 3.

[0117] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A high-power radio frequency device, characterized in that, Comprising: A high-power radio-frequency semiconductor structure, comprising: a first region of a substrate and a first electrode, a second electrode, and a third electrode located on the first region, with the second electrode and the third electrode located on both sides of the first electrode; the high-power radio-frequency semiconductor structure is an LDMOS structure or a HEMT structure, the first electrode is a gate electrode, the second electrode is a source electrode, and the third electrode is a drain electrode; or the high-power radio-frequency semiconductor structure is an HBT structure, the first electrode is a base electrode, the second electrode is a collector electrode, and the third electrode is an emitter electrode; A metal interconnection layer located on the high-power radio-frequency semiconductor structure and a second region of the substrate; the metal interconnection layer includes a first dielectric layer, a ground electrode, an input electrode, and an output electrode; the ground electrode is electrically connected to the second electrode, the input electrode is electrically connected to the first electrode, and the output electrode is electrically connected to the third electrode; A second dielectric layer covering the metal interconnection layer; the dielectric constant of the second dielectric layer is less than that of the first dielectric layer, and the thermal conductivity of the second dielectric layer is greater than that of the substrate; the first electrode, the second electrode, and the third electrode are all located between the second dielectric layer and the substrate; the orthographic projections of the first electrode, the second electrode, and the third electrode on the substrate respectively overlap with the orthographic projection of the second dielectric layer on the substrate; and A ground pad located on the side of the second dielectric layer away from the substrate and electrically connected to the ground electrode; an input pad and an output pad located on the side of the substrate away from the metal interconnection layer, the input pad being electrically connected to the input electrode, and the output pad being electrically connected to the output electrode.

2. The high-power radio frequency device according to claim 1, characterized in that The dielectric constant of the second dielectric layer is less than that of the substrate.

3. The high-power radio frequency device according to claim 1 or 2, characterized in that, The substrate includes at least one of single-crystalline silicon, single-crystalline diamond, silicon carbide, gallium nitride, and sapphire; and / or the material of the first dielectric layer is at least one of silicon dioxide, silicon nitride, and silicon oxynitride; and / or the material of the second dielectric layer is at least one of polycrystalline diamond, amorphous diamond, polycrystalline silicon carbide, and amorphous silicon carbide.

4. The high-power radio frequency device according to claim 1 or 2, characterized in that, The thickness range of the second dielectric layer is 5 μm to 20 μm.

5. The high-power radio frequency device according to claim 1 or 2, characterized in that, The orthographic projections of the input electrode and the output electrode on the plane of the substrate are located in the second region.

6. The high-power radio frequency device according to claim 1 or 2, characterized in that The ground electrode is electrically connected to the second electrode through the metal interconnection layer, the input electrode is electrically connected to the first electrode through the metal interconnection layer, and the output electrode is electrically connected to the third electrode through the metal interconnection layer; and / or the ground pad is connected to the ground electrode through a first through hole formed in the second dielectric layer; and / or the input pad is connected to the input electrode through a second through hole formed in the substrate and the metal interconnection layer; the output pad is connected to the output electrode through a third through hole formed in the substrate and the metal interconnection layer.

7. The high-power radio frequency device according to claim 1 or 2, characterized in that Further comprising: A passivation layer, located on a side of the second dielectric layer away from the substrate; the ground pad is located on a side of the passivation layer away from the substrate; a thickness ratio range of the passivation layer to the second dielectric layer is 0.025 to 0.

3.

8. The high-power radio frequency device according to claim 7, characterized in that, The ground pad is connected to the ground electrode through a first through hole formed in the passivation layer and the second dielectric layer.

9. The high-power radio frequency device according to claim 1 or 2, wherein Further comprising: A package case, the ground pad is assembled in the package case, and the input pad and the output pad are led out of the package case through metal leads.

10. A manufacturing method of a high-power radio frequency device, characterized in that, Comprising: Providing a semiconductor intermediate structure, the semiconductor intermediate structure comprising: A high-power radio frequency semiconductor structure, comprising: a first region of a substrate and a first electrode, a second electrode, and a third electrode located on the first region, the second electrode and the third electrode being located on both sides of the first electrode; the high-power radio frequency semiconductor structure is an LDMOS structure or a HEMT structure, the first electrode is a gate electrode, the second electrode is a source electrode, and the third electrode is a drain electrode; or the high-power radio frequency semiconductor structure is an HBT structure, the first electrode is a base electrode, the second electrode is a collector electrode, and the third electrode is an emitter electrode; and A metal interconnection layer, located on the high-power radio frequency semiconductor structure and a second region of the substrate; the metal interconnection layer comprises a first dielectric layer, a ground electrode, an input electrode, and an output electrode; the ground electrode is electrically connected to the second electrode, the input electrode is electrically connected to the first electrode, and the output electrode is electrically connected to the third electrode; Covering a second dielectric layer on the metal interconnection layer, a dielectric constant of the second dielectric layer is less than a dielectric constant of the first dielectric layer, and a thermal conductivity coefficient of the second dielectric layer is greater than a thermal conductivity coefficient of the substrate; the first electrode, the second electrode, and the third electrode are all located between the second dielectric layer and the substrate; a positive projection of the first electrode, the second electrode, and the third electrode on the substrate respectively overlaps with a positive projection of the second dielectric layer on the substrate; Forming a ground pad on a side of the second dielectric layer away from the substrate, the ground pad is electrically connected to the ground electrode; forming an input pad and an output pad on a side of the substrate away from the metal interconnection layer, the input pad is electrically connected to the input electrode, and the output pad is electrically connected to the output electrode.

11. The manufacturing method of the high-power radio frequency device according to claim 10, wherein The dielectric constant of the second dielectric layer is less than the dielectric constant of the substrate.

12. The manufacturing method of the high-power radio frequency device according to claim 10 or 11, characterized in that, The substrate comprises at least one of single crystal silicon, single crystal diamond, silicon carbide, gallium nitride, and sapphire; and / or the material of the first dielectric layer is at least one of silicon dioxide, silicon nitride, and silicon oxynitride; and / or the material of the second dielectric layer is at least one of polycrystalline diamond, amorphous diamond, polycrystalline silicon carbide, and amorphous silicon carbide.

13. The manufacturing method of the high-power radio frequency device according to claim 10 or 11, characterized in that, The second dielectric layer is formed by at least one of microwave plasma chemical vapor deposition, inductively coupled plasma chemical vapor deposition, pulsed laser deposition, and electron cyclotron resonance chemical vapor deposition, and a deposition temperature is less than or equal to 400 °C.

14. The manufacturing method of the high-power radio frequency device according to claim 10 or 11, characterized in that, The positive projections of the input electrode and the output electrode on the plane where the substrate is located are located in the second region.

15. The manufacturing method of the high-power radio frequency device according to claim 10 or 11, characterized in that, The ground electrode is electrically connected to the second electrode through the metal interconnect layer, the input electrode is electrically connected to the first electrode through the metal interconnect layer, and the output electrode is electrically connected to the third electrode through the metal interconnect layer; and / or The formation of the ground pad includes: opening a first through hole in the second dielectric layer, the first through hole exposing the ground electrode; filling the first through hole and forming a ground pad on the side of the second dielectric layer away from the substrate; and / or The formation of the input pad and the output pad includes: respectively opening a second through hole and a third through hole in the substrate and the metal interconnect layer, the second through hole exposing the input electrode, and the third through hole exposing the output electrode; filling the second through hole and the third through hole and respectively forming an input pad and an output pad on the side of the substrate away from the metal interconnect layer, the input pad being connected to the input electrode, and the output pad being connected to the output electrode.

16. The manufacturing method of the high-power radio frequency device according to claim 10 or 11, characterized in that Before the step of forming the input pad and the output pad, thin the substrate.

17. A communication base station, characterized in that, Including the high-power radio frequency device according to any one of claims 1 to 9.

18. A vehicle-mounted radar, characterized in that, Including the high-power radio frequency device according to any one of claims 1 to 9.

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