Display substrate, manufacturing method thereof, and display device
During the manufacturing process of the OLED display substrate, the mask plate is used to etch the barrier structure with a wide upper and narrow upper bottom, which solves the problem of collapse or fracture of the Rib structure, improves the water vapor barrier effect and product yield, simplifies the process flow and reduces costs.
Patent Information
- Application Number
- CN202211201204.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-29
- Publication Date
- 2025-08-26
- Estimated Expiration
- 2042-09-29
AI Technical Summary
The Rib structure of existing OLED display substrates is prone to collapse or fracture, resulting in low water vapor barrier reliability and poor product yield.
The first etching process is performed using a mask plate to form a first insulating layer and a first metal layer, and the second etching process is performed under the obstruction of the complex layer to form a barrier structure with a wide upper and a narrower upper surface, simplifying the process flow and improving the reliability of the barrier structure.
The yield of the barrier structure is improved, the reliable barrier capability to external water vapor is enhanced, the manufacturing process is simplified, and the cost is reduced.
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Figure CN115440783B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate and a manufacturing method thereof, and a display device. Background Art
[0002] Organic light emitting diode (OLED) display substrates are widely used in various display devices due to their advantages such as self-luminescence, wide viewing angle and fast response speed.
[0003] In related technologies, an OLED display substrate typically includes a substrate with a display area and a non-display area, multiple pixels located in the display area, and a barrier (rib) structure located in the non-display area. The rib structure typically has an I-shaped cross-section with a sharp corner. The rib structure serves to block and isolate the pixels, preventing moisture from entering the display area and damaging them due to cutting or other factors.
[0004] However, due to the current manufacturing process of the Rib structure, the formed Rib structure is prone to collapse or fracture, which results in low reliability in blocking water vapor and poor product yield. Summary of the Invention
[0005] Provided are a display substrate, a manufacturing method thereof, and a display device, which can solve the problem in the related art that the Rib structure formed is prone to collapse or breakage, resulting in low reliability in blocking water vapor.
[0006] The technical solution is as follows:
[0007] In one aspect, a method for manufacturing a display substrate is provided, the method comprising:
[0008] providing a substrate having an isolation region;
[0009] In the isolation region, a metal film layer and an insulating film layer are formed, which are located on one side of the substrate and are stacked in sequence in a direction away from the substrate;
[0010] Using a mask, performing a first etching process on a portion of the insulating film layer and the metal film layer in a direction close to the substrate to form a first insulating layer, a first metal layer, and a complex layer covering sidewalls of the first insulating layer and sidewalls of the first metal layer belonging to the portion of the film layer, wherein the thickness of the portion of the metal film layer is less than the thickness of the remaining film layers except the portion of the film layer;
[0011] Using the complex layer as a shielding portion, performing a second etching process on the first metal layer to form a second metal layer, wherein the width of the second metal layer close to the first insulating layer is greater than the width of the second metal layer away from the first insulating layer, and is smaller than the width of the first insulating layer;
[0012] The complex layer is removed to obtain a barrier structure, wherein the barrier structure includes the second metal layer and the first insulating layer.
[0013] Optionally, performing a first etching process on a portion of the insulating film layer and the metal film layer includes:
[0014] Using a first etching gas to perform dry etching on the insulating film layer;
[0015] Using a second etching gas to dry-etch a portion of the metal film layer;
[0016] Wherein, the first etching gas and the second etching gas are different etching gases.
[0017] Optionally, the first etching gas includes sulfur hexafluoride and oxygen; the second etching gas includes boron trichloride and chlorine; and the complex layer includes a chlorine complex layer.
[0018] Optionally, performing a second etching process on the first metal layer includes:
[0019] The first metal layer is wet-etched using an etching solution.
[0020] Optionally, the etching solution includes: 10% to 20% acetic acid, 1% to 2.5% nitric acid, and 50% to 60% phosphoric acid.
[0021] Optionally, the metal film layer includes: a first metal film layer, a second metal film layer, and a third metal film layer stacked in a direction away from the substrate;
[0022] The material of the first metal film layer and the material of the third metal film layer are the same, and both are different from the material of the second metal film layer; and the thickness of the first metal film layer and the thickness of the third metal film layer are both smaller than the thickness of the second metal film layer;
[0023] The partial film layer includes the third metal film layer and a partial metal film layer of the second metal film layer, and in the second metal film layer, the thickness of the partial metal film layer is less than the thickness of the remaining metal film layers except the partial metal film layer.
[0024] Optionally, in the metal film layer, the thickness of the partial film layer is 1 / 5 to 1 / 4 of the total thickness of the metal film layer; in the second metal film layer, the thickness of the partial metal film layer is 1 / 5 to 1 / 4 of the total thickness of the second metal film layer.
[0025] Optionally, the substrate further has a display area, and the isolation area at least partially surrounds the display area; the method further includes:
[0026] forming a buffer layer located on one side of the substrate in the display area and the isolation area;
[0027] In the display area, a pixel is formed on a side of the buffer layer away from the substrate, the pixel comprising: an active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second gate metal layer, an interlayer defining layer, a first source-drain metal layer, a first planarizing layer, a first passivation layer, a second source-drain metal layer, a second passivation layer, a second planarizing layer, an anode layer, and a pixel defining layer stacked in sequence in a direction away from the substrate;
[0028] In the isolation region, a second insulating layer, a third insulating layer, a fourth insulating layer, a third metal layer, and a fifth insulating layer are formed between the buffer layer and the second metal layer and sequentially stacked in a direction away from the substrate;
[0029] Among them, the second insulating layer and the first gate insulating layer are located in the same layer, the third insulating layer and the second gate insulating layer are located in the same layer, the fourth insulating layer and the interlayer defining layer are located in the same layer, the third metal layer and the first source-drain metal layer are located in the same layer, the fifth insulating layer and the first passivation layer are located in the same layer, the second metal layer and the second source-drain metal layer are located in the same layer, and the first insulating layer and the second passivation layer are located in the same layer.
[0030] In another aspect, a display substrate is provided. The display substrate is obtained by the method described in the above aspect. The display substrate comprises:
[0031] a substrate having an isolation region;
[0032] a barrier structure located in the isolation area;
[0033] In which, the blocking structure includes: a second metal layer and a first insulating layer stacked in sequence in a direction away from the substrate, the width of the second metal layer, the width of the part of the second metal layer close to the first insulating layer is greater than the width of the part away from the first insulating layer, and is smaller than the width of the first insulating layer.
[0034] In another aspect, a display device is provided, comprising: a power supply component, and the display substrate as described in the above another aspect;
[0035] Wherein, the power supply component is electrically connected to the display substrate and is used to supply power to the display substrate.
[0036] In summary, the beneficial effects brought about by the technical solutions provided by the embodiments of the present disclosure may include at least:
[0037] Provided are a display substrate, a manufacturing method thereof, and a display device. In this method, a metal film layer and an insulating film layer stacked in sequence in a direction away from the substrate can first be formed in an isolation region. Then, a mask plate can be used to perform a first etching process on the insulating film layer and a portion of the metal film layer to form a first insulating layer, a first metal layer, and a complex layer covering the sidewalls of the first insulating layer and a portion of the first metal layer. Then, a second etching process can be performed on the first metal layer directly using the complex layer as a shielding portion to obtain a barrier structure that is wide at the top and narrow at the bottom with a sharp angle. Because only a portion of the metal film layer with a smaller thickness is etched during the first etching process, the complex layer is formed only on a portion of the sidewalls of the first metal layer. This allows the first metal layer to be reliably etched for a second time without using a mask plate, resulting in a barrier structure with a good yield and reliable blocking of external water vapor. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0039] Figure 1 is a flow chart of a method for manufacturing a display substrate provided by an embodiment of the present disclosure;
[0040] Figure 2 is a flow chart of a manufacturing process of a display substrate provided by an embodiment of the present disclosure;
[0041] Figure 3 is a schematic cross-sectional view of a display substrate provided by an embodiment of the present disclosure;
[0042] Figure 4 is a cross-sectional schematic diagram of another display substrate provided by an embodiment of the present disclosure;
[0043] Figure 5 is a cross-sectional schematic diagram of another display substrate provided by an embodiment of the present disclosure;
[0044] Figure 6 is a cross-sectional schematic diagram of another display substrate provided by an embodiment of the present disclosure;
[0045] Figure 7is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure;
[0046] Figure 8 It is a structural schematic diagram of a display device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION
[0047] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.
[0048] With the development of display technology, a series of customized OLEDs that break the traditional OLEDs have emerged. Among them, traditional OLEDs mostly refer to OLEDs with a mainstream rectangular light-emitting shape, and customized OLEDs mostly refer to OLEDs with a customized non-rectangular (such as circular, triangular or elliptical) light-emitting shape. The light-emitting shape is generally reflected in the shape of the anode in the OLED. For this reason, if a customized OLED is to be formed, a cutting process is required in the process of preparing the display substrate to obtain the required customized OLED, and the cutting process will inevitably increase the way for external water vapor to invade the display substrate, causing the light-emitting layer (emissive layer, EL) and / or cathode (cathode) in the OLED to be damaged. Among them, the cathode can be formed by evaporation or printing. Based on this, as described in the background technology, a Rib structure is often set in the non-display area of the substrate to increase the way to block water vapor invasion and improve packaging reliability.
[0049] However, due to process limitations, the currently formed Rib structure is prone to collapse or fracture. Furthermore, to prevent this, multiple masks and multiple processes are required, resulting in a complex, inefficient, and costly process.
[0050] Based on the above problems, the embodiments of the present disclosure provide a new manufacturing method. The Rib structure manufactured by this method is less likely to collapse or break, and has a good yield. In addition, the manufacturing method provided by the embodiments of the present disclosure has a simple process, high efficiency, and low cost. Figure 1 This is a flow chart of a method for manufacturing a display substrate provided by an embodiment of the present disclosure. Figure 1 As shown, the method includes:
[0051] Step 101: Provide a substrate.
[0052] For example, Figure 2 FIG1 shows a schematic structural diagram of a provided substrate 01. Figure 2 The substrate 01 provided in the embodiment of the present disclosure may have an isolation area A1, which belongs to the non-display area.
[0053] Optionally, in the embodiment of the present disclosure, the material of the substrate 01 provided may include: glass or a flexible material such as polyimide (PI). That is, the substrate 01 may be a glass substrate (also referred to as a glass substrate) or a flexible substrate (also referred to as a flexible substrate).
[0054] Step 102: In the isolation region, a metal film layer and an insulating film layer are formed, which are located on one side of the substrate and are stacked in sequence in a direction away from the substrate.
[0055] Optional, combined Figure 2 In the embodiment of the present disclosure, first, a metal material can be deposited on one side of the substrate 01 in the isolation region A1 to form a metal film layer 02. Then, an insulating material can be deposited on the side of the metal film layer 02 away from the substrate 01 to form an insulating film layer 03. In this way, a structure such as Figure 2-2 As shown in a, the metal film layer 02 and the insulating film layer 03 are located in the isolation area A1 and are stacked in sequence in a direction away from the substrate 01.
[0056] For example, the metal materials used to form the metal film layer 02 may include titanium (Ti) and aluminum (Al). The insulating materials used to form the insulating film layer 03 may include inorganic materials such as silicon nitride (SiNx) and / or silicon oxide (SiOx).
[0057] Step 103: Using a mask plate, perform a first etching process on the insulating film layer and part of the metal film layer in a direction close to the substrate to form a first insulating layer, a first metal layer, and a complex layer covering the side walls of the first insulating layer and the side walls of the first metal layer belonging to the part of the film layer.
[0058] Optional, continue combining Figure 2 In the embodiment of the present disclosure, a mask plate Mask can be used to sequentially perform a first etching process on a portion of the film layers in the insulating film layer 03 and the metal film layer 02, thereby forming Figure 2 2b shows the first insulating layer 031, the first metal layer 021, and the complex layer 04. The complex layer 04 is a sidewall attachment formed by the first etching process, and the complex layer 04 can also be called a coordination compound.
[0059] Furthermore, the thickness of the portion of the metal film layer 02 that is subjected to the first etching process may be smaller than the thickness of the remaining film layers. In other words, the depth of the first etching process may be smaller than the total thickness of the metal film layer 02. In other words, in this step, the first etching process may be performed on only a small portion of the metal film layer 02 that contacts the insulating film layer 03, without performing the first etching process on the entire metal film layer 02, thereby obtaining the following: Figure 2b shows the first metal layer 021. It should be noted that, in combination with Figure 2 The thickness direction / depth direction recorded in the embodiments of the present disclosure may refer to the direction perpendicular to the supporting surface of the substrate 01.
[0060] In the embodiment of the present disclosure, only a small portion of the metal film layer 02 is subjected to the first etching process. Figure 2-2 As shown in FIG. 2 b, the formed complex layer 04 can cover the sidewalls of the first insulating layer 031 and the sidewalls of the first metal layer 021 that is a partial film layer, but does not cover the entire sidewalls of the first metal layer 021. In other words, the complex layer 04 can semi-protect the first metal layer 021. The first metal layer 021 that is a partial film layer refers to the portion of the first metal layer 021 obtained by the first etching process of the metal film layer 02.
[0061] In addition, etching is actually one of the steps in the patterning process. A patterning process can include: coating, exposure, development and etching. Figure 2 It can also be seen that before the first etching process, a photoresist (PR), also known as a photoresist, is applied to the side of the insulating film layer 03 facing away from the substrate 01. During the first etching process, the photoresist PR can be used as a shield to etch portions of the insulating film layer 03 and the metal film layer 02. Furthermore, the portions of each film layer covered by the photoresist PR can be retained without being etched, while the portions not covered by the photoresist PR can be reliably etched and removed.
[0062] Step 104 : Using the complex layer as a shielding portion, perform a second etching process on the first metal layer to form a second metal layer.
[0063] Optional, continue combining Figure 2 In the embodiment of the present disclosure, since only a portion of the metal film layer 02 is etched during the first etching process, and the entire metal film layer 02 is not etched, the formed complex layer 04 can only cover the sidewall of the portion of the first metal layer 021 that belongs to the partial film layer, as described in the above embodiment. In this way, after the first etching process, there is no need to remove the complex layer 04 and provide another mask to perform the second etching process on the first metal layer 021 (i.e., the metal film layer 02 after the first etching process). Instead, the complex layer 04 can be directly used as a shielding portion to reliably perform the second etching process on the first metal layer 021, forming a structure as shown in FIG. Figure 2 The second metal layer 022 shown in FIG2 c is not easily broken or collapsed.
[0064] Moreover, since the sidewalls of the lower half of the first metal layer 021 are not covered by the complex layer 04, more of the metal layer 021 is removed after the second etching process; and since the sidewalls of the upper half of the first metal layer 021 are covered by the complex layer 04, less of the metal layer 021 is removed after the second etching process. Figure 2-2 As can be seen from Figure c, the width of the second metal layer 022 formed near the first insulating layer 031 can be greater than the width of the portion away from the first insulating layer 031, and can be smaller than the width of the first insulating layer 031. That is, under the protection of the complex layer 04, the second metal layer 022 formed can have a cross-section perpendicular to the supporting surface of the substrate 01 in the shape of a "T" with two protruding tip angles as shown in the figure, which has a better blocking effect. It should be noted that, combined with Figure 2 The width direction recorded in the embodiment of the present disclosure may refer to a direction parallel to the supporting surface of the substrate 01.
[0065] Step 105: remove the complex layer to obtain a barrier structure.
[0066] Optional, continue combining Figure 2 In the embodiment of the present disclosure, after the second etching process, the complex layer 04 attached to the side wall of the film layer can be removed by etching or other stripping processes. At the same time, the photoresist PR coated on the side of the insulating film layer 03 away from the substrate 01 needs to be removed, so as to obtain the following Figure 2-2 d shows the barrier Rib structure 05. Specifically, the barrier structure 05 may include a second metal layer 022 and a first insulating layer 031. Furthermore, because the maximum width of the second metal layer 022 is still smaller than that of the first insulating layer 031, the first insulating layer 031 can be considered to have two protruding tip corners relative to the second metal layer 022. This embodiment of the present disclosure provides a high yield for the barrier structure 05, and accordingly, effectively blocks water vapor intrusion, thereby ensuring a high product yield.
[0067] Furthermore, as described in the above embodiments, the present disclosure can complete the preparation of the barrier structure 05 using only one mask, eliminating the need for an additional mask for the formation of the complex layer 04. This can save costs, simplify the process, and improve manufacturing efficiency.
[0068] It should also be noted that the reference Figure 2 In the embodiment of the present disclosure, a plurality of barrier structures 05 ( Figure 2Two barrier structures (05) are schematically shown to further enhance the ability to block water and oxygen intrusion, thereby enhancing the ability to block water and oxygen from invading the cathode, referred to as the cathode blocking effect. Accordingly, multiple photoresists (PR) corresponding to and spaced apart from each other are pre-formed on the side of the insulating film layer (03) facing away from the substrate (01). These multiple photoresists can be formed through a single patterning process.
[0069] In summary, the embodiments of the present disclosure provide a method for manufacturing a display substrate. In this method, first, a metal film layer and an insulating film layer stacked in sequence in a direction away from the substrate can be formed in the isolation region. Then, a mask plate can be used to perform a first etching process on the insulating film layer and part of the metal film layer to form a first insulating layer, a first metal layer and a complex layer covering the first insulating layer and part of the first metal layer sidewalls. Then, the first metal layer can be directly subjected to a second etching process using the complex layer as a shielding portion to obtain a barrier structure that is wide at the top and narrow at the bottom with a sharp angle. Because only a portion of the metal film layer with a smaller thickness is etched during the first etching process, the complex layer is formed only on a portion of the sidewalls of the first metal layer, thereby making it possible to perform a reliable second etching process on the first metal layer without using a mask plate, thereby obtaining a barrier structure with a better yield, thereby achieving reliable blocking of external water vapor.
[0070] Optional, combined Figure 2 In the metal film layer 02, the thickness of the portion of the film layer that undergoes the first etching treatment may be 1 / 5 to 1 / 4 of the total thickness of the metal film layer 02. Accordingly, the thickness of the remaining film layers other than this portion of the film layer may be 3 / 4 to 4 / 5 of the total thickness of the metal film layer 02. That is, in the embodiment of the present disclosure, the first etching treatment may be performed only on 1 / 5 to 1 / 4 of the metal film layer 02, while the first etching treatment may not be performed on the remaining 3 / 4 to 4 / 5 of the film layer. Accordingly, the complex layer 04 formed after the first etching treatment may only cover the sidewalls of the metal film layer 02 that has undergone the first etching treatment.
[0071] For example, in the embodiment of the present disclosure, the thickness of the portion of the film layer subjected to the first etching process may be 1 / 5 of the total thickness of the metal film layer 02. Based on this, the thickness of the remaining film layers other than this portion of the film layer may be 4 / 5 of the total thickness of the metal film layer 02. In other words, the first etching process may be performed only on 1 / 5 of the metal film layer 02, while the remaining 4 / 5 may not be subjected to the first etching process.
[0072] Optional, reference Figure 2 As shown in the enlarged partial view, the metal film layer 02 described in the embodiment of the present disclosure may include: a first metal film layer 02 - 1 , a second metal film layer 02 - 2 and a third metal film layer 02 - 3 stacked in a direction away from the substrate 01 .
[0073] Furthermore, the material of the first metal film layer 02-1 and the material of the third metal film layer 02-3 can be the same, and both can be different from the material of the second metal film layer 02-2. Furthermore, the thickness of the first metal film layer 02-1 and the thickness of the third metal film layer 02-3 can both be less than the thickness of the second metal film layer 02-2.
[0074] For example, the material of the first metal film layer 02-1 and the material of the third metal film layer 02-3 can both be titanium Ti, and the thickness can both be 300 angstroms. to If it can be The material of the second metal film layer 02-2 can be: metal aluminum Al, and the thickness can be to If it can be That is, the metal film layer 02 described in the embodiment of the present disclosure may be composed of a three-layer stacked metal film layer of Ti-Al-Ti.
[0075] On this basis, in the embodiment of the present disclosure, in the metal film layer 02, the portion of the film layer that is subjected to the first etching process may include the third metal film layer 02-3 and the portion of the second metal film layer 02-2. Moreover, in the second metal film layer 02-2, the thickness of the portion of the metal film layer 02-2 may be less than the thickness of the remaining metal film layer 02-2 except for the portion of the metal film layer 02-2. That is, the first etching process can be performed on the third metal film layer 02-3 and a small portion of the second metal film layer 02-2 in a direction close to the substrate 01. On the basis that the metal film layer 02 is composed of a three-layer stack of Ti-Al-Ti metal film layers, it can be considered that the first etching process is performed on the Ti (belonging to the third metal film layer 02-3) and the portion of Al (belonging to the second metal film layer 02-2) on the side away from the substrate 01.
[0076] For example, in the second metal film layer 02, the thickness of the portion of the metal film layer 02 that is subjected to the first etching process may be 1 / 5 to 1 / 4 of the total thickness of the second metal film layer 02. On this basis, assuming that the material of the second metal film layer 02-2 is Al and the thickness is It can be seen that in the embodiment of the present disclosure, the thickness of to The Al is subjected to a first etching process.
[0077] Optionally, in the embodiment of the present disclosure, due to the influence of the material, the first etching process (i.e., the above-mentioned step 103) is performed on part of the insulating film layer 03 and the metal film layer 02, which may include:
[0078] First, a first etching gas is used to dry etch (DE) the insulating film layer 03. Then, a second etching gas is used to dry etch a portion of the metal film layer 02. That is, the first etching process described in the embodiment of the present disclosure may refer to a dry etching process.
[0079] The first etching gas and the second etching gas may be different etching gases.
[0080] For example, the first etching gas may include sulfur hexafluoride (SF6) and oxygen (O2), that is, the first etching gas may be a mixed gas consisting of SF6+O2. The second etching gas may include boron trichloride (BCl3) and chlorine (Cl2), that is, the second etching gas may be a mixed gas consisting of BCl3+Cl2. Accordingly, in the embodiment of the present disclosure, the formed complex layer 04 may include a chlorine (Cl) complex layer.
[0081] Optionally, in the embodiment of the present disclosure, performing a second etching process on the first metal layer 021 (ie, the above-mentioned step 105 ) may include:
[0082] The first metal layer 021 is subjected to a wet etching (WE) process using an etching solution. That is, the second etching process described in the embodiment of the present disclosure may refer to a wet etching process.
[0083] For example, the etching solution may include 10% to 20% acetic acid (CH3COOH), 1% to 2.5% nitric acid (HNO3), and 50% to 60% phosphoric acid (H3PO4). That is, the etching solution may be a mixture of CH3COOH, HNO3, and H3PO4. This etching solution may also be referred to as a metal molybdenum (Mo) etching solution.
[0084] Since wet etching generally has isotropic characteristics, Figure 2-2 c It can be seen that when the first metal layer 021 is subjected to the second etching process, the first metal layer 021 can be etched with the same width in all directions parallel to the supporting surface of the substrate 01, that is, part of the first metal layer 021 is removed in all directions, thereby forming a barrier structure 05 of the shape shown in the figure.
[0085] Isotropy can refer to the property that the physical or chemical properties of an object do not change depending on the orientation. Isotropic etching involves etching with the same width in all directions; the orientation of the film does not affect how the etching solution removes material.
[0086] In addition, in the embodiment of the present disclosure, under the shielding of the complex layer 04, the second etching treatment (i.e., wet etching treatment) of the first metal layer 021 actually refers to: etching the portion of the sidewall of the first metal layer 021 that is not covered by the complex layer 04, that is, etching the remaining film layers (belonging to the lower film layer) in the metal film layer 02 except for the portion of the film layer (belonging to the upper film layer) that has been subjected to the first etching treatment. Due to the fluidity of the etching solution, the etching solution will inevitably flow to the portion of the sidewall covered by the complex layer 04, causing wet etching of this portion. Therefore, in the embodiment of the present disclosure, it is directly stated that the second etching treatment is performed on the first metal layer 021.
[0087] The difference is that the combination Figure 2 During the second etching process, the upper metal film layer 02 is obscured by the complex layer 04, resulting in a smaller lateral etch width in all directions. This results in a smaller lateral etch depth (also known as indentation). The lower metal film layer, however, is not obscured by the complex layer 04, resulting in a larger lateral etch depth in all directions. This results in the formation of the second metal layer 022, which is wider at the top and narrower at the bottom, with a stepped appearance, as shown in the figure.
[0088] For example, in the metal film layer 02, the lateral etching amount of the upper film layer blocked by the complex layer 04 can generally be 0.1 micrometers (μm) to 0.2 μm, for example, 0.15 μm. The lateral etching amount of the lower film layer not blocked by the complex layer 04 is generally 0.3 μm to 0.5 μm, for example, 0.4 μm. Figure 2 The Ti-Al-Ti three-layer metal film shown in the partial enlarged diagram, and the thickness of each metal film layer meets the thickness range recorded in the above embodiment, can form a step difference of to Thickness steps.
[0089] Optional, reference Figure 3 In the embodiment of the present disclosure, the provided substrate 01 may further include a display area A2, and the isolation area A1 may at least partially surround the display area A2. For example, the isolation area A1 and the display area A2 may both be rectangular, and the isolation area A1 may surround the display area A2. Figure 3 Only the partial isolation area A1 adjacent to the display area A2 is schematically shown, and the partial isolation area A1 is located on the right side of the display area A2. Figures 3 to 6 As can be seen from the schematic cross-sectional view of the display substrate shown, the manufacturing method provided by the embodiment of the present disclosure may further include:
[0090] First, a buffer layer BUF can be formed on one side of the substrate O1 in the display area and the isolation area A2 A1.
[0091] Optionally, a material for forming a buffer layer BUF can be deposited on one side of the substrate 01 to obtain a buffer layer BUF. For example, the materials deposited here may include silicon nitride SiNx and / or silicon oxide SiOx. For example, when the deposited materials include silicon nitride SiNx and silicon oxide SiOx, the buffer layer BUF formed by deposition may include a silicon nitride SiNx film layer and a silicon oxide SiOx film layer stacked in sequence. In addition, the thickness of the silicon nitride SiNx film layer may be 0.3 μm to 0.7 μm, for example, 0.5 μm. The thickness of the silicon oxide SiOx film layer may be 1 μm to 1.2 μm, for example, 1 μm.
[0092] Then, a pixel P1 located on a side of the buffer layer BUF away from the substrate 01 may be formed in the display area A2 .
[0093] Among them, combined Figures 3 to 6 It can be seen that the pixel P1 may include: an active layer Ac1, a first gate insulation (GI) layer GI1, a first gate metal layer G1, a second gate insulation layer GI2, a second gate metal layer G2, an inter-level dielectric (ILD) layer, a first source and drain (SD) metal layer SD1, a first planarization (PLN) layer PLN1, a first passivation (PVX) layer PVX1, a second source and drain metal layer SD2, a second passivation layer PVX2, a second planarization layer PLN2, an anode layer An1 and a pixel defining layer (PDL) stacked in sequence along the direction away from the substrate 01.
[0094] Optionally, when applied to a reflective display substrate, the anode layer An1 may be a reflective anode layer, and the materials of the reflective anode layer may include: indium tin oxide (ITO) and silver (Ag). For example, the formed reflective anode layer may include three layers of ITO-Ag-ITO stacked in sequence.
[0095] Furthermore, the formed first source / drain metal layer SD1 can overlap the second gate metal layer G2 via vias extending through the interlayer defining layer PDL, and can overlap the active layer Ac1 via vias extending through the interlayer defining layer PDL, the second gate insulating layer GI2, and the first gate insulating layer GI1. The formed second source / drain metal layer SD2 can overlap the first source / drain metal layer SD1 via vias extending through the first passivation layer PVX1 and the first planar layer PLN1. The anode layer An1 can overlap the second source / drain metal layer SD2 via vias extending through the second planar layer PLN2 and the second passivation layer PVX2. With these overlapping conditions met, the anode layer An1 can be charged, and a voltage differential can be formed between the anode layer An1 and the cathode layer, thereby illuminating the light-emitting layer sandwiched between the anode layer An1 and the cathode layer, causing the pixel P1 to emit light. It should be noted that, while multiple pixels P1 can generally be formed in the display area A2, the figures in the disclosed embodiments only schematically illustrate a single pixel P1.
[0096] And, combined Figures 2 to 6 In the isolation region A1, a second insulating layer 06, a third insulating layer 07, a fourth insulating layer 08, a third metal layer 09 and a fifth insulating layer 10 can be formed between the buffer layer BUF and the second metal layer 022 and sequentially stacked in a direction away from the substrate 01.
[0097] Among them, the second insulating layer 06 can be located in the same layer as the first gate insulating layer GI1, the third insulating layer 07 can be located in the same layer as the second gate insulating layer GI2, the fourth insulating layer 08 can be located in the same layer as the interlayer definition layer ILD, the third metal layer 09 can be located in the same layer as the first source and drain metal layer SD1, the fifth insulating layer 10 can be located in the same layer as the first passivation layer PVX1, the second metal layer 022 can be located in the same layer as the second source and drain metal layer SD2, and the first insulating layer 031 can be located in the same layer as the second passivation layer PVX2.
[0098] On this basis, it can be seen that the barrier structure 05 provided in the embodiment of the present disclosure can actually include other film layers in addition to the second metal layer 022 and the first insulating layer 031, such as the third metal layer 09 and the fifth insulating layer 10. Since the third metal layer 09 and the fifth insulating layer 10 are not etched, Figure 2-2 d and Figure 6 As shown, the barrier structure 05 formed in the embodiment of the present disclosure can also be considered to be in the shape of an “I”.
[0099] It should be noted that being located in the same layer can refer to: a film layer for forming a specific pattern is formed using the same film-forming process, and then the film layer is patterned using the same mask through a single patterning process to form a layer structure. Depending on the specific pattern, a single patterning process includes multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure can be continuous or discontinuous. In other words, multiple elements, components, structures, and / or parts located in the "same layer" are made of the same material and are formed through the same patterning process. In this way, manufacturing processes and manufacturing costs can be saved, and manufacturing efficiency can be improved.
[0100] exist Figures 2 to 6 Based on the structure shown, the method flow for manufacturing a display substrate according to the embodiment of the present disclosure is described as follows:
[0101] (1) First, a material for forming the active layer Ac1, such as amorphous silicon (a-Si) material, can be deposited on the side of the buffer layer BUF away from the substrate 01. Then, an excimer laser annealing (ELA) process can be used to convert the amorphous silicon material into a polysilicon material. Then, a digital exposure machine or mask can be used to form a silicon island mask, and the polysilicon material can be dry-etched. The etching gas used here can include carbon tetrafluoride (CF4) and oxygen (O2), that is, a mixed gas composed of CF4+O2. Then, a wet stripping method can be used to remove the photoresist used in the dry etching to form a silicon island pattern. Furthermore, a non-capacitive area mask can be formed for ion implantation, and the polysilicon in the capacitor area can be doped to achieve conductorization. The doping material can be phosphine or borane. In addition, the portion that is subsequently overlapped with the first source and drain metal layer SD1 can also be doped to achieve conductorization. The doping material can also be phosphine or borane, thereby obtaining the required active layer Ac1. Optionally, the thickness of the formed active layer Ac1 may be 0.05 μm.
[0102] It should be noted that before the patterning process is performed to form the active layer Ac1, a dehydrogenation treatment can be performed to avoid hydrogen explosion during excimer laser annealing (ELA) and improve process reliability. For example, the process temperature during the dehydrogenation treatment can be 300 degrees Celsius (°C) to 350°C. After the dehydrogenation is completed, the ELA process can be performed. And, as described in the above embodiment, the active layer Ac1 can be formed only in the display area A2 of the substrate 01.
[0103] (2) After forming the active layer Ac1, materials can be further deposited on the side of the active layer Ac1 away from the substrate 01 to form a first gate insulating layer GI1. Optionally, the materials deposited here may include: silicon nitride SiNx and / or silicon oxide SiOx. For example, it may include silicon nitride SiNx and silicon oxide SiOx. And wherein, the thickness of the silicon oxide SiOx deposited here may be 0.03μm to 0.06μm, for example, it may be 0.05μm. The thickness of the deposited silicon nitride SiNx may be 0.05μm to 0.09μm, for example, it may be 0.06μm. And, as described in the above embodiment, the first gate insulating layer GI1 may be formed simultaneously and synchronously in the display area A2 and the isolation area A1 of the substrate 01.
[0104] (3) After forming the first gate insulating layer GI1, a material may be further deposited on the side of the first gate insulating layer GI1 away from the substrate 01 to form a first gate metal layer G1. Optionally, the material deposited here may be molybdenum Mo, a metal with strong conductivity, and the deposition thickness may be 0.25 μm to 0.3 μm, such as 0.28 μm. Then, a digital exposure machine or mask may be used to form a gate mask, and the deposited metal material may be dry-etched using the gate mask to obtain the first gate metal layer G1. The etching gas used for dry etching may also be a mixed gas consisting of CF4+O2. The flow rate of carbon tetrafluoride CF4 may be 2000 sccm to 2500 sccm, such as 2200 sccm, where sccm is a unit of volume flow. The flow rate of oxygen O2 may be 1000 sccm to 1500 sccm, such as 1300 sccm. Furthermore, as described in the above embodiment, the first gate metal layer G1 can be simultaneously formed only in the display area A2 of the substrate 01 .
[0105] Optionally, after forming the first gate metal layer G1, a gate self-alignment process can be used to dope the portion of the active layer Ac1 that overlaps the first source / drain metal layer SD1 to achieve conductivity. Subsequently, a wet stripping method is used to remove the photoresist used in the dry etching process, followed by annealing to repair the polysilicon material and inorganic film layers damaged by ion doping. The inorganic film layers here may include the first gate insulation layer GI1. Optionally, the annealing temperature can be 500°C to 600°C, for example, 550°C.
[0106] (4) After forming the first gate metal layer G1, material can be further deposited on the side of the first gate metal layer G1 away from the substrate 01 to form a second gate insulating layer GI2. Optionally, the material used to form the second gate insulating layer GI2 and the thickness of the second gate insulating layer GI2 can refer to the description of the formation of the first gate insulating layer GI1 in point (2) above, and will not be repeated here. In addition, as described in the above embodiment, the second gate insulating layer GI2 can be formed simultaneously and synchronously in the display area A2 and the isolation area A1 of the substrate 01.
[0107] (5) After forming the second gate insulating layer GI2, materials may be further deposited on the side of the second gate insulating layer GI2 away from the substrate 01 to form an interlayer definition layer ILD. Here, the material deposited to form the interlayer definition layer ILD may also include silicon nitride SiNx and / or silicon oxide SiOx. For example, it may include silicon nitride SiNx and silicon oxide SiOx. And wherein, the thickness of the deposited silicon oxide SiOx may be 0.2 μm to 0.5 μm, for example, it may be 0.3 μm. The thickness of the deposited silicon nitride SiNx may be 0.2 μm to 0.3 μm, for example, it may be 0.25 μm.
[0108] After forming the interlayer defining layer ILD, a via hole (also called a CNT via hole) pattern can be formed using a photolithography process. Based on the formed via hole pattern, the interlayer defining layer ILD, the second gate insulating layer GI2, and the first gate insulating layer GI1 located in the display area A2 are dry-etched once, thereby forming a CNT via hole that penetrates the interlayer defining layer ILD, the second gate insulating layer GI2, and the first gate insulating layer GI1. This allows the subsequently formed first source and drain metal layer SD1 to overlap the active layer Ac1 through the CNT via hole. Here, the etching gas used can be a mixture of CF4 and O2.
[0109] (6) Then, metal materials can be further deposited on the side of the interlayer definition layer ILD away from the substrate 01, and a digital exposure machine or mask is used to form an SD1 mask, and the deposited metal material is dry-etched using the SD1 mask to form a first source-drain metal layer SD1. In addition, due to the influence of the process, the first source-drain metal layer SD1 formed is generally steep. Optionally, the metal materials deposited here may include: titanium Ti, aluminum Al and titanium Ti. Accordingly, the first source-drain metal layer SD1 formed may also include: Ti-Al-Ti film layers stacked in sequence. And wherein, the thickness of the Ti film layer can be to If it can be The thickness of the Al film can be to If it can be The etching gas used for dry etching can be a mixed gas of BCl 3 + Cl 2 . Also, as described in the above embodiment, the first source / drain metal layer SD1 can be formed simultaneously in the display area A2 and the isolation area A1 of the substrate 01 .
[0110] (7) After forming the first source-drain metal layer SD1, materials can be further deposited on the side of the first source-drain metal layer SD1 away from the substrate 01 to form a first flat layer PLN1 for flattening the steeply sloped first source-drain metal layer SD1. Optionally, the materials deposited here can also include inorganic materials such as silicon nitride SiNx and / or silicon oxide SiOx. The thickness of the formed first flat layer PLN1 can be 1.5 μm to 2 μm, for example, 1.8 μm. In addition, a series of processes such as coating, exposure, development and post-baking can be performed in sequence to form a via hole penetrating the first flat layer PLN1, so that the second source-drain metal layer SD2 formed subsequently can overlap with the first source-drain metal layer SD1 through the via hole. And, as described in the above embodiment, the first flat layer PLN1 can be formed only in the display area A2 of the substrate 01.
[0111] (8) After forming the first flat layer PLN1, materials may be further deposited on the side of the first flat layer PLN1 away from the substrate 01 to form a first passivation layer PVX1. Optionally, the materials deposited here may also include inorganic materials such as silicon nitride SiNx and / or silicon oxide SiOx. The thickness of the formed first passivation layer PVX1 may be 0.1 μm to 0.2 μm, for example, 0.15 μm. In addition, a PVX1 mask may be formed using digital exposure or a mask, and the first passivation layer PVX1 may be dry-etched using the PVX1 mask to form a via hole penetrating the first passivation layer PVX1, so that the second source / drain metal layer SD2 formed subsequently can be reliably connected to the first source / drain metal layer SD1 through the via hole. Furthermore, as described in the above embodiment, the first passivation layer PVX1 may be formed simultaneously and synchronously in the display area A2 and the isolation area A1 of the substrate 01.
[0112] (9) After forming the first passivation layer PVX1, metal material can be deposited on the side of the first passivation layer PVX1 away from the substrate 01, and a digital exposure machine or mask can be used to form an SD2 mask. The metal material deposited here is dry-etched using the SD2 mask to form a second source-drain metal layer SD2. Affected by the process, the formed first source-drain metal layer SD1 is generally continuously inclined. Optionally, the metal material deposited here may include: titanium Ti, aluminum Al and titanium Ti. Accordingly, the formed first source-drain metal layer SD2 may also include Ti-Al-Ti film layers stacked in sequence. And wherein the thickness of the Ti film layer can be to If it can be The thickness of the Al film can be to If it can be The etching gas used in the dry etching here can be a mixed gas consisting of BCl3+Cl2.
[0113] It should be noted that, here, only the metal material deposited in the display area A2 can be dry-etched to form the second source / drain metal layer SD2 in the display area A2, without first processing the metal material deposited simultaneously in the isolation area A1. Figure 3 As shown, at this time, the metal material located in the isolation area A1 and located in the same layer as the second source / drain metal layer SD2 formed in the display area A2 has not been etched yet.
[0114] (10) Then, the material can be deposited on the side of the second source-drain metal layer SD2 away from the substrate 01 to form a second passivation layer PVX2. Optionally, the material used to form the second passivation layer PVX2 and the thickness of the formed second passivation layer PVX2 can refer to the description of the formation of the first passivation layer PVX1 in the above point (8), and will not be repeated here. Afterwards, a PVX2 mask can be formed using digital exposure or a mask, and then the PVX2 mask can be used to dry-etch the second passivation layer PVX2 located in the display area A2 to form a via hole penetrating the second passivation layer PVX2, so that the subsequently formed anode layer An1 and the second source-drain metal layer SD2 can be reliably overlapped. In addition, as described in the above embodiment, the second passivation layer PVX2 can be formed simultaneously and synchronously in the display area A2 and the isolation area A1 of the substrate 01.
[0115] (11) Then, the material can be deposited on the side of the second source-drain metal layer SD2 away from the substrate 01 to form a second flat layer PLN2 for flattening the steeply sloped first source-drain metal layer SD1. Optionally, the material used to form the second flat layer PLN2 and the thickness of the formed second flat layer PLN2 can refer to the description of the formation of the first flat layer PLN1 in point (7) above, and will not be repeated here. In addition, a series of processes such as coating, exposure, development and post-baking can be used to form a via hole that penetrates the second flat layer PLN2, so that the anode layer An1 formed subsequently can be reliably overlapped with the second source-drain metal layer SD2. And, as described in the above embodiment, the second flat layer PLN2 can be formed only in the display area A2 of the substrate 01.
[0116] (12) Then, material can be deposited on the side of the second planar layer PLN2 away from the substrate 01. A digital exposure machine or mask is used to form an anode mask. The deposited material is wet-etched using the anode mask to form an anode layer An1. The anode layer An1 is then overlapped with the second source / drain metal layer SD2. Furthermore, as described in the above embodiment, the anode layer An1 can be formed only in the display area A2 of the substrate 01.
[0117] It should be noted that the formation of the second passivation layer PVX2 prevents corrosion of the second source / drain metal layer SD2 during development of the second planar layer PLN2. Furthermore, the formation of the anode layer An1 by wet etching prevents corrosion of the second source / drain metal layer SD2. In other words, the provision of the second passivation layer PVX2 ensures reliable protection of the second source / drain metal layer SD2.
[0118] (13) Then, glue can be applied to the side of the anode layer An1 away from the substrate 01 to form a pixel definition layer PDL. Because the embodiment of the present disclosure first performs dry etching on a portion of the metal film layer 02 and then wet etching on the remaining film layer 02 (method 1), rather than first dry etching the entire metal film layer 02 and then wet etching the remaining film layer after dry etching (method 2), the minimum width of the formed barrier structure 05 can be smaller than the maximum width. In this way, when applying glue to form the pixel definition layer PDL, the amount of glue filled into the isolation area A1 can be reduced, that is, without affecting the process reliability, the glue loss can be reduced, thereby improving the feasibility of the manufacturing process.
[0119] For example, based on the dry etching treatment of only 1 / 5 to 1 / 4 of the metal film layer 02, the amount of glue applied when forming the pixel defining layer PDL in method 1 provided in the embodiment of the present disclosure is only 3 / 4 to 4 / 5 of the amount of glue applied when forming the pixel defining layer PDL in method 2 described above, effectively reducing the loss of glue applied.
[0120] Recombination Figures 1 to 3 It can be seen that after the above (13), the preparation of the metal film layer 02 and the insulating film layer 03 is completed. Then, the above steps 103 to 105 can be performed in sequence to form the barrier structure 05. Figure 4 Schematically illustrates the structure formed in the isolation region A1 after step 103; Figure 5 Schematically illustrates the structure formed in the isolation region A1 after step 104; Figure 6 The structure formed in the isolation area A1 after step 103 is schematically shown, and at this time, the blocking structure 05 is obtained.
[0121] Optional, combined Figures 3 to 6Before executing step 103, the maximum width of the film layer formed in isolation region A1 (which may be referred to as a Rib Line Mask) may be 8 μm to 15 μm, for example, 10 μm. Then, the 8 μm to 15 μm film layer may be processed through steps 103 to 105 to form one or more barrier structures 05.
[0122] As can be seen from the above-mentioned embodiments, on the one hand, the disclosed embodiments can form the barrier structure 05 using only one mask, thus simplifying the process and saving costs. On the other hand, by first dry-etching a portion of the metal film layer 02, then retaining the complex layer 04, and only wet-etching the remaining film layers once, the disclosed embodiments can form a barrier structure 05 with two tip angles and a good yield. This also reduces the amount of glue applied when forming the pixel definition layer (PDL), ensuring good process feasibility.
[0123] It should be noted that the etching process, material selection, and thickness setting described in the above embodiments of the present disclosure can be flexibly adjusted according to actual needs, and the embodiments of the present disclosure are not limited thereto. In addition, the order of the method steps provided in the embodiments of the present disclosure can be appropriately adjusted, and the steps can also be increased or decreased accordingly according to the circumstances. Any method that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present disclosure should be covered within the scope of protection of the invention, and therefore will not be described in detail.
[0124] In summary, the embodiments of the present disclosure provide a method for manufacturing a display substrate. In this method, first, a metal film layer and an insulating film layer stacked in sequence in a direction away from the substrate can be formed in the isolation region. Then, a mask plate can be used to perform a first etching process on the insulating film layer and part of the metal film layer to form a first insulating layer, a first metal layer and a complex layer covering the first insulating layer and part of the first metal layer sidewalls. Then, the first metal layer can be directly subjected to a second etching process using the complex layer as a shielding portion to obtain a barrier structure that is wide at the top and narrow at the bottom with a sharp angle. Because only a portion of the metal film layer with a smaller thickness is etched during the first etching process, the complex layer is formed only on a portion of the sidewalls of the first metal layer, thereby making it possible to perform a reliable second etching process on the first metal layer without using a mask plate, thereby obtaining a barrier structure with a better yield, thereby achieving reliable blocking of external water vapor.
[0125] Figure 7 FIG. 1 is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure. The display substrate can be obtained by using the method described in the above embodiment. Figure 7 As shown, the display substrate may include:
[0126] The substrate 01 may include an isolation region A1 and a barrier structure 05 located in the isolation region A1 .
[0127] And, combined with Figure 2 and Figure 6 It can be seen that the formed barrier structure 05 may include: a second metal layer 022, a first insulating layer 031, and a second metal layer 022 stacked sequentially in a direction away from the substrate 01. Furthermore, the width of the portion of the second metal layer 022 close to the first insulating layer 031 may be greater than the width of the portion away from the first insulating layer 031, and may be less than the width of the first insulating layer 031.
[0128] Optional, Figure 7 The diagram schematically shows two barrier structures 05 located in the isolation area A1 and the display area A2. Figure 7 It can be seen that in some embodiments, the isolation area A1 can surround the display area A2. In the display substrate provided by the embodiment of the present disclosure, the barrier structure 05 formed has a good yield and a good effect of blocking water vapor intrusion.
[0129] Figure 8 Schematic diagram of a display device provided by an embodiment of the present disclosure. Figure 8 As shown, the display device may include: a power supply component J1, and Figure 7 The display substrate 00 is shown.
[0130] The power supply component J1 may be electrically connected to the display substrate 00 and used to supply power to the display substrate 00 .
[0131] Optionally, the display device may be any product or component with a display function, such as an OLED display device, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame or a navigator.
[0132] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it may be the only layer between the two layers or elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.
[0133] Furthermore, the terms used in the embodiments of the present disclosure are only used to explain the embodiments of the present disclosure and are not intended to limit the present disclosure. Unless otherwise defined, the technical or scientific terms used in the embodiments of the present disclosure should have the common meanings understood by people with ordinary skills in the field to which the present disclosure belongs.
[0134] For example, in the embodiments of the present disclosure, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The term "plurality" refers to two or more than two, unless otherwise clearly defined.
[0135] Likewise, the words “a” or “an” and the like do not denote a limitation of quantity, but rather denote the presence of at least one.
[0136] Words such as “include” or “comprising” mean that the elements or objects preceding “include” or “comprising” include the elements or objects listed after “include” or “comprising” and their equivalents, and do not exclude other elements or objects.
[0137] "Up," "down," "left," or "right" are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly. "Connected" or "coupled" refers to an electrical connection.
[0138] "And / or" indicates that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally indicates that the related objects are in an "or" relationship.
[0139] The above description is merely an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the scope of protection of the present disclosure.
Claims
1. A method for manufacturing a display substrate, characterized in that: The method comprises: providing a substrate having an isolation region; In the isolation region, a metal film layer and an insulating film layer are formed, which are located on one side of the substrate and are stacked in sequence in a direction away from the substrate; In a direction close to the substrate, a mask is used to sequentially perform the following dry etching process on the insulating film layer and a portion of the metal film layer: using a first etching gas, the insulating film layer is dry-etched to form a first insulating layer; using a second etching gas, the portion of the metal film layer is dry-etched to form a first metal layer and a complex layer covering the sidewalls of the first insulating layer and the sidewalls of the portion of the film layer belonging to the first metal layer, wherein the thickness of the portion of the metal film layer is less than the thickness of the remaining film layers except the portion of the film layer; Directly using the complex layer as a shielding portion, wet-etching the first metal layer with an etching solution to form a second metal layer, wherein the width of the second metal layer close to the first insulating layer is greater than the width of the second metal layer away from the first insulating layer, and is smaller than the width of the first insulating layer; The complex layer is removed to obtain a barrier structure, wherein the barrier structure includes the second metal layer and the first insulating layer.
2. The method according to claim 1, characterized in that The first etching gas includes sulfur hexafluoride and oxygen; the second etching gas includes boron trichloride and chlorine; and the complex layer includes a chlorine complex layer.
3. The method according to claim 1, characterized in that The etching solution includes 10% to 20% acetic acid, 1% to 2.5% nitric acid, and 50% to 60% phosphoric acid.
4. The method according to any one of claims 1 to 3, characterized in that: The metal film layer comprises: a first metal film layer, a second metal film layer and a third metal film layer stacked in a direction away from the substrate; The material of the first metal film layer and the material of the third metal film layer are the same, and both are different from the material of the second metal film layer; and the thickness of the first metal film layer and the thickness of the third metal film layer are both smaller than the thickness of the second metal film layer; The partial film layer includes the third metal film layer and a partial metal film layer of the second metal film layer, and in the second metal film layer, the thickness of the partial metal film layer is less than the thickness of the remaining metal film layers except the partial metal film layer.
5. The method according to claim 4, characterized in that In the metal film layer, the thickness of the partial film layer is 1 / 5 to 1 / 4 of the total thickness of the metal film layer; in the second metal film layer, the thickness of the partial metal film layer is 1 / 5 to 1 / 4 of the total thickness of the second metal film layer.
6. The method according to any one of claims 1 to 3, characterized in that: The substrate further comprises a display area, and the isolation area at least partially surrounds the display area; the method further comprises: forming a buffer layer located on one side of the substrate in the display area and the isolation area; In the display area, a pixel is formed on a side of the buffer layer away from the substrate, the pixel comprising: an active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second gate metal layer, an interlayer defining layer, a first source-drain metal layer, a first planarizing layer, a first passivation layer, a second source-drain metal layer, a second passivation layer, a second planarizing layer, an anode layer, and a pixel defining layer stacked in sequence in a direction away from the substrate; In the isolation region, a second insulating layer, a third insulating layer, a fourth insulating layer, a third metal layer, and a fifth insulating layer are formed between the buffer layer and the second metal layer and sequentially stacked in a direction away from the substrate; Among them, the second insulating layer and the first gate insulating layer are located in the same layer, the third insulating layer and the second gate insulating layer are located in the same layer, the fourth insulating layer and the interlayer defining layer are located in the same layer, the third metal layer and the first source-drain metal layer are located in the same layer, the fifth insulating layer and the first passivation layer are located in the same layer, the second metal layer and the second source-drain metal layer are located in the same layer, and the first insulating layer and the second passivation layer are located in the same layer.
7. A display substrate, characterized in that: The display substrate is obtained by the method according to any one of claims 1 to 6; The display substrate comprises: a substrate having an isolation region; a barrier structure located in the isolation area; The barrier structure includes: a second metal layer and a first insulating layer stacked in sequence in a direction away from the substrate, the width of the second metal layer close to the first insulating layer is greater than the width of the part away from the first insulating layer, and is smaller than the width of the first insulating layer.
8. A display device, characterized in that: The display device comprises: a power supply component, and the display substrate according to claim 7; Wherein, the power supply component is electrically connected to the display substrate and is used to supply power to the display substrate.
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