Solar cell, method for manufacturing the same, and photovoltaic module

By setting the doping concentration gradient in the emitter of the solar cell and optimizing the curvature of the secondary gate, the problems of low electron collection efficiency and photoelectric conversion efficiency in the prior art are solved, and higher electron collection efficiency and photoelectric conversion efficiency are achieved.

CN115440843BActive Publication Date: 2025-07-01ZHEJIANG JINKO SOLAR CO LTD +1
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Patent Information

Application Number
CN202110610996.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-06-01
Publication Date
2025-07-01
Estimated Expiration
2041-06-01

AI Technical Summary

Technical Problem

Existing solar cells have challenges in improving electron collection efficiency and photoelectric conversion efficiency, especially due to problems with doping concentration and contact resistance of the emitter.

Method used

A solar cell is designed, wherein the emitter includes a first emitter at an edge position and a second emitter at an intermediate position. The doping concentration of the second emitter is greater than the doping concentration of the first emitter. By setting the curvature and width of the secondary gate, the electron collection area and carrier recombination rate are optimized.

Benefits of technology

By optimizing the doping concentration of the emitter and the curvature of the secondary gate, the electron collection efficiency and photoelectric conversion efficiency are improved, and the carrier recombination rate of the solar cell is reduced.

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Abstract

An embodiment of the present invention provides a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a substrate and an emitter, the emitter is located on a first surface of the substrate, the emitter includes a first emitter and a second emitter, the doping concentration of the second emitter is greater than that of the first emitter, the second emitter includes a plurality of first emitter portions arranged along a first direction, and in the first direction, the width of the first emitter portion located at an edge position of the substrate is greater than the width of another first emitter portion located at a middle position of the substrate; a first electrode, the first electrode includes a plurality of sub-grids arranged along the first direction, the sub-grids are located on the first emitter portions, and in the first direction, the curvature of the sub-grid located at the edge position is greater than the curvature of another sub-grid located at the middle position. The embodiment of the present invention is beneficial to improving the photoelectric conversion efficiency of the solar cell.
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Description

Technical Field

[0001] Embodiments of the present invention relate to the field of photovoltaics, and particularly to a solar cell, a manufacturing method thereof, and a photovoltaic module. Background Art

[0002] A solar cell generally includes a substrate and an emitter located on the light-receiving surface of the substrate. The contact surface between the substrate and the emitter forms a PN junction. When sunlight is incident on the surface of the substrate, the excited electrons and holes move towards the n-type semiconductor (such as the emitter) and the p-type semiconductor (such as the substrate) respectively. The electrons moving into the emitter are collected by a first electrode connected to the emitter and then transmitted to an external load.

[0003] The collection efficiency of electrons is related to the doping concentration of the emitter. The lower the doping concentration of the emitter, the smaller the recombination probability of electrons and holes, and the greater the contact resistance between the emitter and the first electrode. The higher the doping concentration of the emitter, the greater the recombination probability of electrons and holes, and the smaller the contact resistance between the emitter and the first electrode. How to improve the collection efficiency of electrons to improve the photoelectric conversion efficiency of solar cells has become a key research topic at present. Summary of the Invention

[0004] Embodiments of the present invention provide a solar cell, a manufacturing method thereof, and a photovoltaic module, which are beneficial to improving the electron collection efficiency and photoelectric conversion efficiency of solar cells.

[0005] To solve the above problems, embodiments of the present invention provide a solar cell, including: a substrate and an emitter, the emitter is located on the first surface of the substrate, the emitter includes a first emitter and a second emitter, the doping concentration of the second emitter is greater than that of the first emitter, the second emitter includes a plurality of first emitting portions arranged along a first direction, and in the first direction, the width of the first emitting portion located at the edge position of the substrate is greater than the width of the other first emitting portion located at the middle position of the substrate; a first electrode, the first electrode includes a plurality of sub-grids arranged along the first direction, the sub-grids are located on the first emitting portions, and in the first direction, the curvature of the sub-grid located at the edge position is greater than the curvature of the other sub-grid located at the middle position.

[0006] In addition, in the direction perpendicular to the first surface, the orthographic projection of the sub-grid is located within the orthographic projection of the corresponding first emitting portion.

[0007] In addition, in the first direction, the maximum curvature of the sub-grid located at the edge position is greater than the maximum curvature of the other sub-grid located at the middle position.

[0008] In addition, the auxiliary gate has a center point, and the distances from the center point to the opposite ends of the auxiliary gate are the same. The curvature at the center point of the auxiliary gate is denoted as the center curvature. In the first direction, the center curvature of the auxiliary gate located at the edge position is greater than the center curvature of the other auxiliary gate located at the middle position.

[0009] In addition, in the first direction, the arc length of the auxiliary gate located at the edge position is greater than the arc length of the other auxiliary gate located at the middle position.

[0010] In addition, in the direction from the middle position towards the edge position and parallel to the first direction, the widths of different first emission portions increase in sequence.

[0011] In addition, the width of the first emission portion located at the middle position is not greater than 1 / 2 of the width of the other first emission portion located at the edge position.

[0012] In addition, in the first direction, the curvature of the first emission portion located at the edge position is greater than the curvature of the other first emission portion located at the middle position.

[0013] In addition, the curvature of each first emission portion is equal to the curvature of the corresponding auxiliary gate located on the first emission portion.

[0014] In addition, the second emitter further includes: a plurality of second emission portions arranged along a second direction, the second emission portions are electrically connected to the first emission portions, the main gate is located on the second emission portions. In the second direction, the width of the second emission portion located at the edge position is greater than the width of the other second emission portion located at the middle position; the first electrode further includes: a plurality of main gates arranged along the second direction, the main gates are electrically connected to the auxiliary gates. In the second direction, the curvature of the main gate located at the edge position is greater than the curvature of the other main gate located at the middle position.

[0015] In addition, in the direction perpendicular to the first surface, the orthographic projection of the main gate is located within the orthographic projection of the corresponding second emission portion.

[0016] In addition, the second emitter includes a doped silicon layer and a tunneling layer arranged in a stacked manner. The doping concentration of the doped silicon layer is greater than the doping concentration of the first emitter, and the tunneling layer is located between the doped silicon layer and the first electrode.

[0017] In addition, the doped silicon layer includes a doped polysilicon layer, and the tunneling layer includes an oxide layer; or, the doped silicon layer includes a doped amorphous silicon layer, and the tunneling layer includes an intrinsic amorphous silicon layer.

[0018] Accordingly, an embodiment of the present invention further provides a photovoltaic module, including: a battery string formed by connecting a plurality of the solar cells described in any one of the above; an encapsulation adhesive film for covering the surface of the battery string; and a cover plate for covering the surface of the encapsulation adhesive film facing away from the battery string.

[0019] Accordingly, an embodiment of the present invention further provides a method for manufacturing a solar cell, including: providing a substrate and an emitter, the emitter being located on a first surface of the substrate, the emitter including a first emitter and a second emitter, the doping concentration of the second emitter being greater than that of the first emitter, the second emitter including a plurality of first emitter portions arranged along a first direction, and in the first direction, the width of the first emitter portion located at an edge position of the substrate being greater than the width of another first emitter portion located at a middle position of the substrate; forming a first electrode, the first electrode including a plurality of sub-grids arranged along the first direction, the sub-grids being located on the first emitter portions, and in the first direction, the curvature of the sub-grid located at the edge position being greater than the curvature of another sub-grid located at the middle position.

[0020] In addition, the steps of providing the substrate, the emitter, and the first electrode include: providing a substrate; doping a first surface layer of the substrate to form a first doped region, and the region of the substrate other than the first doped region being used as the substrate; forming a first layout covering the surface of the first doped region, the first layout having a pattern opening exposing the surface of the first doped region, and in a direction perpendicular to the surface of the substrate, a part of the first doped region that is projected and misaligned with the pattern opening being used as the first emitter, the pattern opening including a plurality of first pattern openings arranged along the first direction; performing screen printing on the first layout to form a plurality of intrinsic silicon portions filling the first pattern openings, and in the first direction, the curvature of the intrinsic silicon portion located at the edge position being greater than the curvature of another intrinsic silicon portion located at the middle position; doping at least a part of the intrinsic silicon portions to form the first emitter portions; forming a second layout covering the surface of the first layout and the surface of the first emitter portions, the second layout having a plurality of second pattern openings arranged along the first direction, the second pattern openings exposing a part of the surface of the first emitter portions; performing screen printing on the second layout to form a plurality of the sub-grids filling the second pattern openings, and in the first direction, the curvature of the sub-grid located at the edge position being greater than the curvature of another sub-grid located at the middle position; and removing the first layout and the second layout.

[0021] Compared with the prior art, the technical solution provided by the embodiment of the present invention has the following advantages:

[0022] In the above technical solution, the curvature of the auxiliary gate at the edge position is relatively large. By setting the width of the first emitting portion at the edge position to be relatively wide, it is beneficial to ensure effective contact between the bottom surface of the auxiliary gate at the edge position and the top surface of the first emitting portion, ensuring that the auxiliary gate has a large electron collection area, thereby improving the electron collection efficiency. At the same time, since the doping concentration of the second emitter to which the first emitting portion belongs is relatively large, when effectively contacting the second emitter with the first electrode, setting the width of the first emitting portion at the middle position to be relatively narrow is beneficial to reducing the area ratio of the second emitter, thereby reducing the carrier recombination rate of the solar cell to improve the photoelectric conversion efficiency of the solar cell.

[0023] In addition, setting the curvature of the first emitting portion at the edge position to be greater than the curvature at the middle position is beneficial to making the curvature of the first emitting portion at the edge position close to the curvature of the auxiliary gate at the edge position. Compared with using a rectangular first emitting portion to contact the auxiliary gate with curvature, using a first emitting portion with curvature to contact the auxiliary gate with curvature is beneficial to reducing the cross-sectional area of the first emitting portion, reducing the area ratio of the second emitter, thereby reducing the carrier recombination rate of the solar cell and improving the photoelectric conversion efficiency of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplary illustrations do not limit the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the drawings in the figures do not constitute a proportional limitation.

[0025] Figures 1 to 7 It is a schematic structural diagram of the solar cell provided by the embodiment of the present invention;

[0026] Figures 8 to 11 It is a schematic cross-sectional view corresponding to each step of the manufacturing method of the solar cell provided by the embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be described in detail below with reference to the drawings. However, those of ordinary skill in the art can understand that in the embodiments of the present invention, many technical details are provided to help the reader better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions required to be protected by the present application can still be implemented.

[0028] Refer to Figures 1 to 3 , Figures 1 to 3 which is a schematic structural diagram of the solar cell provided by the embodiment of the present invention. Among them, Figure 2 is Figure 1 a cross-sectional view of the structure shown along the first cross-sectional direction AA1,Figure 3 for Figure 1 A top view of the sub-gate and emitter in the structure shown; at the same time, for the simplicity of the diagram, Figure 1 The structure shown does not indicate that the widths of different first emitting parts are different, nor does it indicate that the secondary grid has a curvature. For the law of width variation of the first emitting part and the law of curvature variation of the secondary grid, please refer to Figure 2 and Figure 3 ; In addition, for the sake of clarity, Figure 3 Two different fillings are used to illustrate the first emitter and the second emitter respectively.

[0029] refer to Figures 1 to 3 The solar cell includes: a substrate 10 and an emitter 11, the emitter 11 is located on the first surface of the substrate 10, the emitter 11 includes a first emitter 111 and a second emitter 112, the doping concentration of the second emitter 112 is greater than the doping concentration of the first emitter 111, the second emitter 112 includes a plurality of first emitter portions 112a arranged along a first direction X, in the first direction X, the width of the first emitter portion 112a located at the edge of the substrate 10 is greater than the width of another first emitter portion 112a located at the middle of the substrate 10; a first electrode 13, the first electrode 13 includes a plurality of sub-grids 131 arranged along the first direction X, the sub-grids 131 are located on the first emitter portion 112a, in the first direction X, the curvature of the sub-grid 131 located at the edge is greater than the curvature of another sub-grid 131 located at the middle.

[0030] The substrate 10 has a first surface and a second surface opposite to each other. In some embodiments, the first surface is a light-receiving surface, and the second surface is another surface of the substrate opposite to the first surface. In some embodiments, the first surface of the substrate 10 is referred to as a front surface, and the second surface of the substrate 10 is referred to as a rear surface. Further, for a monofacial cell, the first surface is a light-receiving surface, and the second surface is a backlight surface; for a bifacial cell, both the first surface and the second surface can be light-receiving surfaces.

[0031] In some embodiments, the substrate 10 is a silicon substrate material, which may include one or more of single crystal silicon, polycrystalline silicon, amorphous silicon or microcrystalline silicon; in other embodiments, the substrate material may also be a single carbon substance, an organic material or a multi-component compound. The multi-component compound may include, but is not limited to, perovskite, gallium arsenide, cadmium telluride, copper indium selenide and the like.

[0032] The base 10 and the emitter 11 form a PN junction. For example, the base 10 includes N-type doping elements (such as phosphorus, arsenic, etc.), and the emitter 11 includes P-type doping elements (such as boron, gallium, etc.). In some embodiments, the emitter 11 can be regarded as a part of the base 10, or rather, as an extension of the base 10. In addition, the surface of the emitter 11 can be set as a pyramid texture to reduce the reflection of light on the surface of the emitter 11, increase the absorption and utilization rate of light, and improve the conversion efficiency of the solar cell.

[0033] The solar cell further includes a first passivation structure 12 and a second passivation structure 14. The first passivation structure 12 covers the surface of the emitter 11. The first electrode 13 penetrates through the first passivation structure 12 and is electrically connected to the emitter 11. The second passivation structure 14 covers the second surface of the base 10. A second electrode (not shown) penetrates through the second passivation structure 14 and is electrically connected to the base 10. If the solar cell is a PERC cell, the base is P-type, and the second passivation structure 14 usually includes a stacked alumina layer and a hydrogenated silicon nitride layer in sequence, with the alumina layer located between the base 10 and the doped silicon nitride layer; if the solar cell is a TOPCON cell, the base is N-type, and the second passivation structure 14 includes an interface passivation layer, a field passivation layer, and an antireflection layer stacked in sequence in the direction away from the base 10.

[0034] Among them, the first passivation structure 12 can be a single-layer structure or a stacked structure. The material of the first passivation structure 12 can be one or more of materials such as silicon nitride, silicon oxynitride, carbon oxynitride, titanium oxide, hafnium oxide, alumina, etc. The interface passivation layer can be an oxide layer or an intrinsic semiconductor layer, such as silicon dioxide or intrinsic amorphous silicon. The field passivation layer can be a doped polysilicon layer. The material of the antireflection layer can include one or more of materials such as silicon nitride, silicon oxynitride, carbon oxynitride, etc.; the first electrode 13 can be a silver-aluminum electrode, and the second electrode can be a silver electrode.

[0035] In some embodiments, the top surface of the second emitter 112 is higher than the top surface of the first emitter 111. The fact that the doping concentration of the second emitter 112 is greater than that of the first emitter 111 means that the average doping concentration of the surface layer of the second emitter 112 facing away from the base 10 is greater than the average doping concentration of the surface layer of the first emitter 111 facing away from the base 10. As for the average doping concentration of the surface facing the base 10, the second emitter 112 can be greater than or equal to the first emitter 111; in some embodiments, the top surface of the second emitter is flush with the top surface of the first emitter, or rather, in the case of a textured surface, the second emitter and the first emitter have a continuous top surface.

[0036] In some embodiments, refer to Figure 4, the emitter 11 is a single-layer structure integrated as a whole. Specifically, the second emitter 112 includes a parallel portion 112c and a protruding portion 112d. The parallel portion 112c is located between adjacent first emitters 111. The bottom surface of the protruding portion 112d is flush with the top surface of the first emitter 111. The material of the parallel portion 112c is the same as that of the first emitter 111, and the material of the parallel portion 112c is the same as that of the protruding portion 112d.

[0037] In some other embodiments, referring to Figure 5 , the emitter is a stacked structure. Specifically, the material of the parallel portion 212c is the same as that of the first emitter 211, the material of the parallel portion 212c is different from that of the protruding portion 212d, the doping concentration of the protruding portion 212d is greater than that of the parallel portion 212c, and the protruding portion 212d can be a single-layer structure or a stacked structure.

[0038] Furthermore, the protruding portion 212d may include a doped silicon layer 212e and a tunneling layer 212f arranged in a stacked manner. The doping concentration of the doped silicon layer 212e is greater than that of the parallel portion 212c and the first emitter 211. The tunneling layer 212f is located between the doped silicon layer 212e and the first electrode, and the tunneling layer 212f is used to passivate the surface defects of the surface of the doped silicon layer 212e facing the first electrode. Among them, the doped silicon layer 212e includes a doped polysilicon layer, and the tunneling layer 212f includes an oxide layer, such as a silicon dioxide layer; or, the doped silicon layer 212e includes a doped amorphous silicon layer, and the tunneling layer 212f includes an intrinsic amorphous silicon layer.

[0039] In some embodiments, the second emitter 112 includes a plurality of first emitter portions 112a arranged along the first direction X and a plurality of second emitter portions 112b arranged along the second direction Y. The first emitter portions 112a and the second emitter portions 112b partially overlap and are electrically connected. The first electrode 13 includes a plurality of sub-gates 131 arranged along the first direction X and a plurality of main gates 132 arranged along the second direction Y. The sub-gates 131 and the main gates 132 partially overlap, and the main gate 132 is mainly used to collect the current collected by the sub-gates 131; wherein, the sub-gates 131 are located on the first emitter portions 112a, the main gates 132 are located on the second emitter portions 112b, and the first direction X and the second direction Y can be perpendicular or obliquely intersecting.

[0040] It should be noted that in some embodiments, the top surface of the second emitter 112 is higher than the top surface of the first emitter 111, and the first emitter portion 112a and the second emitter portion 112b refer to the protruding portions where the second emitter 112 protrudes relative to the first emitter 111; in other embodiments, the first emitter portion 112a and the second emitter portion 112b refer to a combination of a protruding portion and a parallel portion, that is, the second emitter 112 is composed of the first emitter portion 112a and the second emitter portion 112b.

[0041] In some embodiments, referring to Figure 3 , in the first direction X (referring to Figure 1 ), the curvature of the auxiliary gate 131 located at the edge position of the substrate 10 is greater than the curvature of another auxiliary gate 131 located at the middle position of the substrate 10 (referring to Figure 1 ). In the second direction Y (referring to Figure 1 ), the curvature of the main gate 132 (referring to Figure 1 ) located at the edge position of the substrate 10 is greater than the curvature of another main gate 132 located at the middle position of the substrate 10. The cause of this curvature difference includes layout deformation during the formation process of the first electrode 13. Specifically, during the process of forming the first electrode 13 by screen printing, the four corners of the layout are fixed, and the squeegee continuously applies a force towards the substrate 10 to the layout, causing deformation of the layout. When the squeegee moves to the center position of the layout, the deformation of the layout is the largest. At this time, the center position of the layout mainly shows compressive deformation, and the edge position of the layout mainly shows tensile deformation, that is, it shows bending from the edge position towards the middle position. The farther away from the middle position, the greater the degree of bending and the greater the curvature. The deformation of the pattern opening of the layout is the same as the deformation of the first electrode 13 filled in the pattern opening.

[0042] Among them, the edge position of the substrate 10 is defined by the single deformation region of the first electrode 13. In the first surface, the orthographic projection of the edge position of the substrate 10 coincides with the edge position of the single deformation region of the first electrode 13. The single deformation region may be smaller than or equal to the overall region of the first electrode 13. For example, if the first electrode 13 is formed by multiple sequentially spliced layouts, each layout corresponds to a single deformation region, and the sum of all single deformation regions constitutes the overall region of the first electrode 13; at the same time, exemplarily, if the single deformation region is rectangular, the single deformation region has opposite first and second edges, and opposite third and fourth edges. The direction from the first edge towards the second edge is the arrangement direction of the auxiliary gates 131, and the direction from the third edge towards the fourth edge is the extension direction of the auxiliary gates 131. The auxiliary gates 131 at the edge position refer to the auxiliary gates 131 closest to the first edge or the second edge, and the main gates 132 at the edge position refer to the main gates 132 closest to the third edge or the fourth edge.

[0043] The first electrode 13 is formed by multiple layout patterns, which is beneficial to reducing the width of a single layout pattern in the first direction X and / or the second direction Y, that is, reducing the distance from the center to the edge of a single layout pattern, thereby reducing the deformation caused by the compressive stress applied to the center position of the layout pattern to the edge position, further reducing the curvature of the auxiliary gate 131 and the main gate 132 located at the edge position, reducing the widths of the first emitter 112a connected to the auxiliary gate 131 and the second emitter 112b connected to the main gate 132, reducing the area ratio of the second emitter 112, and reducing the carrier recombination rate of the solar cell, so as to improve the photoelectric conversion efficiency of the solar cell.

[0044] Correspondingly, the middle position of the substrate 10 is defined by the single deformation region of the first electrode 13. In the plane where the surface of the substrate 10 is located, the positive projection of the middle position of the substrate 10 coincides with the middle position of the single deformation region of the first electrode 13. The auxiliary gate 131 at the middle position refers to the auxiliary gate 131 close to or at the middle position of the single deformation region, rather than the auxiliary gate 131 with the middle value number, and the main gate 132 is similar. Specifically, when an auxiliary gate 131 is exactly at the middle position of the single deformation region, this auxiliary gate 131 is used as the auxiliary gate 131 at the middle position; if no auxiliary gate 131 is at the middle position of the single deformation region, the auxiliary gate 131 closest to the middle position of the single deformation region is used as the auxiliary gate 131 at the middle position; if there are two auxiliary gates 131 closest to the middle position of the single deformation region, these two auxiliary gates 131 are used as the auxiliary gates 131 at the middle position.

[0045] In some embodiments, the fact that the curvature of the auxiliary gate 131 located at the edge position is greater than the curvature of the auxiliary gate 131 located at the middle position means that the curvature of any point of the auxiliary gate 131 located at the edge position is greater than the curvature of the corresponding point of the auxiliary gate 131 located at the middle position. For example, the auxiliary gate 131 located at the edge position has a point A1, and the auxiliary gate 131 located at the middle position has a point A2. Point A2 corresponds to point A1, and the curvature of point A1 is greater than the curvature of point A2. Point A1 can be at any position of the auxiliary gate 131.

[0046] Regarding the corresponding manner of point A1 and point A2, point A1 and point A2 can be on the same straight line parallel to the arrangement direction of the sub-grid 131, or the distance from point A1 to the extreme of the corresponding sub-grid 131 is equal to the distance from point A2 to the extreme of the corresponding sub-grid 131; wherein, if the corresponding sub-grid 131 is a straight line, the "distance" refers to the straight-line distance, and if the corresponding sub-grid 131 is an arc, the "distance" refers to the arc distance, and the arc represented by the arc distance passes through point A1 (or point A2) and is parallel to the side of the corresponding sub-grid 131. Specifically, the sub-grid 131 has an extending direction perpendicular to the arrangement direction. In the extending direction, if the lengths of the sub-grids 131 at different positions are equal, the corresponding relationship between point A1 and point A2 can be selected to be on the same straight line parallel to the arrangement direction; correspondingly, if the lengths of the sub-grids 131 in the extending direction decrease successively from the middle position to the edge position, the same distance from the extreme of the corresponding sub-grid 131 can be selected as the corresponding manner.

[0047] Each pattern opening of the layout has two opposite extremes, and the relative direction of the two extremes is the extending direction of the corresponding sub-grid 131 or main grid 132. Theoretically, before the layout for forming the sub-grid 131 is bent, the lengths of different pattern openings for filling the sub-grid 131 are the same in the extending direction. During the deformation process of the layout, if the opposite extremes of the pattern opening are fixed, the length of the sub-grid 131 or main grid 132 is stretched. In the first direction X, the arc length of the sub-grid 131 at the edge position is greater than the arc length of the sub-grid 131 at the middle position, and in the second direction Y, the arc length of the main grid 132 at the edge position is greater than the arc length of the main grid 132 at the middle position; if the opposite extremes of the pattern opening are not fixed, the positions of the extremes move with the deformation of the pattern opening, and the arc length of the sub-grid 131 at the edge is equal to the arc length of the sub-grid 131 at the middle position. Among them, the arc used to measure the arc length is the central arc, and the central arc is parallel to the two opposite side edges of the grid line in the arrangement direction and passes through the center point of the grid line.

[0048] In some embodiments, the curvature of the sub-grid 131 at the edge position being greater than the curvature of the sub-grid 131 at the middle position means that the maximum curvature of the sub-grid 131 at the edge position is greater than the maximum curvature of the sub-grid 131 at the middle position, and the maximum curvature generally appears at the position where the grid line starts to deform earliest. In other embodiments, the curvature of the sub-grid 131 at the edge position being greater than the curvature of the sub-grid 131 at the middle position means that the central curvature of the sub-grid 131 at the edge position is greater than the central curvature of the sub-grid 131 at the middle position; wherein, the sub-grid 131 has a center point, such as point B, and the distances from the center point to the two opposite ends of the sub-grid 131 are the same, and the curvature at the center point of the sub-grid 131 is denoted as the central curvature.

[0049] In some embodiments, since the spacing between adjacent main gates 132 is generally greater than the spacing between adjacent sub - gates 131 in their respective arrangement directions, in the second direction Y in which the main gates 132 are arranged, the layout between adjacent pattern openings is wider. The bending resistance of the layout in the second direction Y is greater than that of the layout in the first direction X. As a result, the curvature change of the subsequently formed main gates 132 is smaller than that of the sub - gates 131. Further, to ensure effective contact between the bottom surface of the main gate 132 and the top surface of the second emitter 112b, the width of the second emitter 112b at the edge position needs to be increased adaptively. Correspondingly, since the curvature change of the main gate 132 is smaller, the widening amplitude of the second emitter 112b at the edge position should be less than the widening amplitude of the first emitter 112a at the edge position. That is to say, the width range difference of the second emitter 112b at different positions is less than the width range difference of the first emitter 112a at different positions.

[0050] Since the bending degree of the first electrode 13 gradually increases from the middle position towards the edge position, it is possible to set the widths of different first emitters 112a to increase in sequence in the direction from the middle position towards the edge position and parallel to the first direction X, and the widths of different second emitters 112b to increase in sequence in the direction from the middle position towards the edge position and parallel to the first direction Y, so that in the direction perpendicular to the first surface, the orthographic projection of the sub - gate 131 is located within the corresponding first emitter 112a, and the orthographic projection of the main gate 132 is located within the orthographic projection of the corresponding second emitter 112b. In this way, it is beneficial to reduce the area ratio of the second emitter 112, reduce the carrier recombination rate of the solar cell, and improve the photoelectric conversion efficiency of the solar cell.

[0051] In some embodiments, the width of the first emitter 112a at the middle position is not greater than 1 / 2 of the width of another first emitter 112a at the edge position. Specifically, the width of the first emitter 112a at the middle position is 50 - 150 um, such as 70 um, 100 um or 120 um, the width of another first emitter 112a at the edge position is 80 - 200 um, such as 100 um, 130 um or 170 um, and the spacing between them is 70 - 120 mm, such as 80 mm, 95 mm or 110 mm.

[0052] In some embodiments, refer to Figure 6, in the first direction X, the curvature of the first emission part 312a located at the edge position is greater than the curvature of the other first emission part 312a located at the middle position. Setting the curvature of the first emission part 312a at the edge position to be greater than the curvature of the first emission part 312a at the middle position is beneficial to making the curvature of the first emission part 312a at the edge position close to the curvature of the auxiliary grid 331 at the edge position. Compared with using a rectangular first emission part 312a in contact with the auxiliary grid 331 with curvature, using a first emission part 312a with curvature in contact with the auxiliary grid 331 with curvature is beneficial to reducing the cross-sectional area of the first emission part 312a, reducing the area ratio of the second emitter, thereby reducing the carrier recombination rate of the solar cell and improving the photoelectric conversion efficiency of the solar cell.

[0053] Furthermore, the curvature of each first emission part 312a is equal to the curvature of the corresponding auxiliary grid 331 located on the first emission part 312a. In this way, there is no need to increase the width of the first emission part 312a to ensure effective contact between the bottom surface of the auxiliary grid 331 and the top surface of the first emission part 312a, which is beneficial to further reducing the area ratio of the second emitter, thereby reducing the carrier recombination rate of the solar cell and improving the photoelectric conversion efficiency of the solar cell.

[0054] In addition to the layout deformation of the first electrode 13 during the screen printing process resulting in the need to widen the width of the second emitter 112, the layout offset of the first electrode 13 during the formation process will also cause the need to widen the width of the second emitter 112. The following is an explanation of the rotational offset of the layout of the first electrode 13:

[0055] Reference Figure 7 , the solid auxiliary grid 131 represents the ideal position of the auxiliary grid 131, and the dashed auxiliary grid 131 represents the possible offset position of the auxiliary grid 131. When the layout of the auxiliary grid 131 undergoes a rotational offset, the extension direction of the offset auxiliary grid 131 is skew to the extension direction of the auxiliary grid 131 in the ideal position. Assuming the rotation center is the layout center, the center point of the auxiliary grid 131 at the middle position does not shift, and the center points of the auxiliary grid 131 at other positions shift.

[0056] To avoid misalignment between the secondary grid 131 and the first emission part 112a caused by rotational offset, it is necessary to widen the width of the first emission part 112a. For example, widen the overall width of the first emission part 112a, or, in the direction of the first emission part 112a extending outward from the center, the width of the first emission part 112a gradually increases; at the same time, since the center point of the secondary grid 131 at the edge position will have rotational offset, therefore, to avoid misalignment between the secondary grid 131 at the edge position and the corresponding first emission part 112a, the center of the first emission part 112a at the edge position after widening is closer to the middle position compared to before widening, or rather, for other positions except the middle position, the center of the widened first emission part 112a is closer to the middle position compared to the center of the secondary grid 131 at the corresponding ideal position. At the same time, the first emission parts 112a at other positions also need to be elongated in the second direction Y, that is, in the direction from the middle position towards the edge position and parallel to the first direction X, the lengths of different first emission parts 112a increase.

[0057] In this embodiment, the curvature of the secondary grid at the edge position is relatively large. By setting the width of the first emission part at the edge position to be relatively wide, it is beneficial to ensure effective contact between the bottom surface of the secondary grid at the edge position and the top surface of the first emission part, ensuring that the secondary grid has a relatively large electron collection area, thereby improving the electron collection efficiency; at the same time, since the doping concentration of the second emitter to which the first emission part belongs is relatively large, when effective contact between the second emitter and the first electrode is achieved, setting the width of the first emission part at the middle position to be relatively narrow is beneficial to reducing the area ratio of the second emitter, thereby reducing the carrier recombination rate of the solar cell to improve the photoelectric conversion efficiency of the solar cell.

[0058] The embodiment of the present invention further provides a photovoltaic module, which is used to convert the received light energy into electrical energy. The photovoltaic module includes a battery string, an encapsulation adhesive film, and a cover plate; the battery string is formed by connecting a plurality of solar cells, and the solar cells can be any of the foregoing solar cells (including but not limited to Figures 1 - 6 the solar cells described); the encapsulation adhesive film can be an organic encapsulation adhesive film such as EVA or POE, and the encapsulation adhesive film covers the surface of the battery string to seal it; the cover plate can be a glass cover plate or a plastic cover plate, etc., and the cover plate covers the surface of the encapsulation adhesive film facing away from the battery string. In some embodiments, a light trapping structure is provided on the cover plate to increase the utilization rate of incident light. The photovoltaic module has a relatively high current collection ability and a relatively low carrier recombination rate, and can achieve a relatively high photoelectric conversion efficiency.

[0059] Correspondingly, the embodiment of the present invention further provides a manufacturing method of a solar cell. Figures 8 to 11Schematic diagrams corresponding to the steps of the manufacturing method of the solar cell provided by the embodiments of the present invention. The manufacturing method of the solar cell includes the following steps:

[0060] Referring to Figure 1 , a substrate 10 and an emitter are provided. The emitter 11 is located on the first surface of the substrate 10. The emitter 11 includes a first emitter 111 and a second emitter 112. The doping concentration of the second emitter 112 is greater than that of the first emitter 111. The second emitter 112 includes a plurality of first emitter portions 112a arranged along the first direction X. In the first direction X, the width of the first emitter portion 112a located at the edge position of the substrate 10 is greater than the width of another first emitter portion 112a located at the middle position of the substrate 10; a first electrode 13 is formed. The first electrode 13 includes a plurality of sub-grids 131 arranged along the first direction X. The sub-grids 131 are located on the first emitter portions 112a. In the first direction X, the curvature of the sub-grid 131 located at the edge position is greater than the curvature of another sub-grid 131 located at the middle position.

[0061] In some embodiments, the emitter 11 is an integral single-layer structure. The forming method of the emitter 11 includes:

[0062] The first method: Provide an initial substrate, perform light diffusion on the first surface layer of the initial substrate to form a lightly doped region; form a layout on the initial substrate. The layout has a pattern opening. The pattern opening can be formed by laser film opening or spraying and etching slurry, or a layout with a pattern opening can be directly formed by inkjet printing; clean the pattern opening to avoid residual substances in the pattern opening affecting the position accuracy of the pattern opening. In the direction perpendicular to the surface of the initial substrate, the lightly doped region misaligned with the projection of the pattern opening serves as the first emitter 111; perform heavy diffusion on part of the lightly doped region through the pattern opening to form a second emitter 112 with a higher doping concentration.

[0063] The second method: Provide an initial substrate, oxidize the first surface of the initial substrate to form a relatively thin oxide layer. The relatively thin oxide layer can be used as a semi-permeable and semi-masking film. In the ion implantation process, part of the ions can penetrate the semi-permeable and semi-masking film, and part of the ions are blocked by the semi-permeable and semi-masking film; partially remove the oxide layer to form a pattern opening. The position of the pattern opening is used to define the positions of the first emitter 111 and the second emitter 112; perform heavy diffusion on the first surface layer of the initial substrate through the relatively thin oxide layer. The first surface layer of the initial substrate exposed by the pattern opening has a higher doping concentration without being blocked and serves as the second emitter 112. The first surface layer of the initial substrate covered by the oxide layer has a lower doping concentration due to the shielding of the oxide layer and serves as the first emitter 111.

[0064] The third method: Provide an initial substrate, oxidize the first surface of the initial substrate to form a relatively thick oxide layer. The relatively thick oxide layer is used as a mask. In the ion implantation process, ions cannot penetrate the mask. Partially remove the oxide layer to form a pattern opening. The position of the pattern opening is used to define the positions of the first emitter 111 and the second emitter 112. Perform heavy diffusion on the first surface layer of the initial substrate through the relatively thick oxide layer. The first surface layer of the initial substrate exposed by the pattern opening has a higher doping concentration because there is no shielding and can be used as the second emitter 112. The first surface layer of the initial substrate covered by the oxide layer has a very low doping concentration or is not doped due to shielding. Remove the borosilicate glass formed by the layout and ion implantation. Perform light diffusion to form the first emitter 111.

[0065] It should be noted that the layout and the borosilicate glass can be removed in the same removal process. For example, a maskless dry etching process can be used to simultaneously remove the layout and the borosilicate glass located within the pattern opening. In addition, the light diffusion can be either local diffusion or global diffusion.

[0066] The fourth method: Provide an initial substrate and perform heavy diffusion on the first surface layer of the initial substrate to form a heavily doped region. The heavily doped region can be either uniformly doped or gradient doped. Gradient doping means that in the direction from the first surface of the substrate 10 towards the inside of the substrate 10, the doping concentration gradually decreases. Form a layout on the initial substrate. The layout has a pattern opening. In the direction perpendicular to the substrate surface, the heavily doped region that coincides with the layout projection is used as the second emitter 112. Through the pattern opening, perform reverse etching to remove the borosilicate glass formed by ion implantation and remove part or all of the thickness of the heavily doped region. At this time, the surface of the initial substrate exposed by the second emitter 112 is not doped or has a very low doping concentration and needs to be further doped to be used as the first emitter 111. Perform light doping to form the first emitter 111. The top surface of the first emitter 111 is lower than the top surface of the second emitter 112.

[0067] The fifth method: Provide an initial substrate and perform heavy diffusion on the first surface layer of the initial substrate to form a heavily doped region. The heavily doped region is gradient doped. Form a layout on the initial substrate. The layout has a pattern opening. In the direction perpendicular to the substrate surface, the heavily doped region that coincides with the layout projection is used as the second emitter 112. Through the pattern opening, perform reverse etching to remove the borosilicate glass formed by ion implantation and the exposed part of the thickness of the heavily doped region. The remaining thickness of the heavily doped region is used as the first emitter 111.

[0068] In some embodiments, the emitter 11 is a stacked structure. The formation method of the emitter 11 includes:

[0069] An initial substrate is provided, and the first surface layer of the initial substrate is lightly doped to form a lightly doped region; a layout is formed on the initial substrate, the layout has a pattern opening, and in a direction perpendicular to the surface of the initial substrate, the lightly doped region that is projected and misaligned with the pattern opening serves as the first emitter 111; intrinsic silicon is filled in the pattern opening, and at least part of the intrinsic silicon is heavily doped to form a doped silicon layer. The above heavy doping process can also be used to dope the lightly doped region directly below the intrinsic silicon; in addition, a tunneling layer can be formed on the doped silicon layer to passivate the surface defects on the surface of the doped silicon layer facing away from the initial substrate, and the emitter 11 includes the tunneling layer.

[0070] It should be noted that if the intrinsic silicon layer is filled in the pattern opening of the layout by screen printing, due to the extrusion of the squeegee, the layout may be bent and deformed, and then the second emitter 112 may be bent and deformed, that is, the curvature of the first emitting portion 112a at the edge position is greater than the curvature of the first emitting portion 112a at the middle position. In this way, it is beneficial to make the curvature of the first emitting portion 112a at the edge position close to the curvature of the sub-grid 131 at the edge position. Compared with the contact between the rectangular first emitting portion 112a and the sub-grid 131 with curvature, the contact between the first emitting portion 112a with curvature and the sub-grid 131 with curvature is beneficial to reduce the cross-sectional area of the first emitting portion 112a, reduce the area ratio of the second emitter 112, thereby reducing the carrier recombination rate of the solar cell and improving the photoelectric conversion efficiency of the solar cell.

[0071] The following will illustrate the process steps of forming the substrate 10, the emitter 11, and the first electrode 13 through a specific embodiment.

[0072] Reference Figure 8 , a substrate 40 is provided; the first surface layer of the substrate 40 is doped to form a first doped region 41, and the region of the substrate 40 other than the first doped region 41 serves as the substrate 10; a first layout 42 is formed, the first layout 42 covers the surface of the first doped region 41, the first layout 42 has a pattern opening, the pattern opening exposes the surface of the first doped region 41, and in a direction perpendicular to the surface of the substrate 10, a part of the first doped region 41 that is projected and misaligned with the pattern opening serves as the first emitter 111, and the pattern opening includes a plurality of first pattern openings arranged along the first direction; screen printing is performed on the first layout 42 to form a plurality of intrinsic silicon portions 43 that fill the first pattern openings, and in the first direction, the curvature of the intrinsic silicon portion 43 at the edge position is greater than the curvature of the other intrinsic silicon portion 43 at the middle position.

[0073] Reference Figure 9 , at least part of the intrinsic silicon portions 43 are doped to form the first emitting portion 112a.

[0074] In some embodiments, the process steps for forming the first emitting portion 112a include: doping a portion of the thickness of the intrinsic silicon portion 43 to form a second doped region 44, where the second doped region 44 is located between the first doped region 41 and the remaining intrinsic silicon portion 45, and the second doped region 44 and the remaining intrinsic silicon portion 45 constitute the first emitting portion 112a; in other embodiments, the process steps for forming the first emitting portion include: doping a portion of the thickness of the intrinsic silicon portion to form a second doped region, and oxidizing the remaining portion of the intrinsic silicon portion to form an oxide layer, where the second doped region is located between the first doped region and the oxide layer, and the second doped region and the oxide layer constitute the first emitting portion.

[0075] Reference Figure 10 , a second layout 45 is formed, where the second layout 45 covers the surface of the first layout 42 and the surface of the first emitting portion 112a. The second layout 42 has a plurality of second pattern openings arranged in a first direction, and the second pattern openings expose a partial surface of the first emitting portion 112a; screen printing is performed on the second layout 45 to form a plurality of sub-gates 131 filling the second pattern openings, and in the first direction, the curvature of the sub-gate 131 located at the edge position is greater than the curvature of another sub-gate 131 located at the middle position.

[0076] If the material of the first layout is the same as the material of the second layout, then under the squeegee pressure, the deformation of the first layout is similar to the deformation of the second layout, and the curvature of the sub-gate 131 located at the edge position is similar to the curvature of the first emitting portion 112a located at the edge position. Thus, it is beneficial to reduce the cross-sectional area of the first emitting portion 112a and reduce the area ratio of the second emitter 112.

[0077] In some embodiments, the first electrode 13 is formed prior to the first passivation structure 12 (Reference Figure 1 ), and the second layout 45 for forming the first electrode 13 covers the surface of the first layout 42 and the surface of the first emitting portion 112a; in other embodiments, the first electrode is formed after the first passivation structure is formed, and at this time, the second layout covers the surface of the first passivation structure.

[0078] Reference Figure 11 , the first layout and the second layout are removed.

[0079] In some embodiments, the curvature of the auxiliary gate at the edge position is relatively large. By setting the width of the first emission part at the edge position to be relatively wide, it is beneficial to ensure effective contact between the bottom surface of the auxiliary gate at the edge position and the top surface of the first emission part, ensuring that the auxiliary gate has a relatively large electron collection area, thereby improving the electron collection efficiency. At the same time, since the doping concentration of the second emitter to which the first emission part belongs is relatively large, when effectively contacting the second emitter and the first electrode, setting the width of the first emission part at the middle position to be relatively narrow is beneficial to reducing the area ratio of the second emitter, thereby reducing the carrier recombination rate of the solar cell to improve the photoelectric conversion efficiency of the solar cell.

[0080] Those of ordinary skill in the art can understand that the above-described embodiments are specific embodiments for implementing the present invention. In actual applications, various changes can be made in form and details without departing from the spirit and scope of the present invention. Any person skilled in the art can make their respective changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be determined by the scope defined in the claims.

Claims

1. A solar cell, characterized in that, Comprising: A base and an emitter, the emitter being located on a first surface of the base. The emitter includes a first emitter and a second emitter, the doping concentration of the second emitter being greater than that of the first emitter. The second emitter includes a plurality of first emitter portions arranged along a first direction. In the first direction, the width of the first emitter portion located at the edge position of the base is greater than the width of another first emitter portion located at the middle position of the base; A first electrode, the first electrode including a plurality of sub-gates arranged along the first direction, the sub-gates being located on the first emitter portions. In the first direction, the curvature of the sub-gate located at the edge position is greater than the curvature of another sub-gate located at the middle position; The second emitter further includes: a plurality of second emitter portions arranged along a second direction, the second emitter portions being electrically connected to the first emitter portions. In the second direction, the width of the second emitter portion located at the edge position is greater than the width of another second emitter portion located at the middle position; The first electrode further includes: a plurality of main gates arranged along the second direction, the main gates being electrically connected to the sub-gates, the main gates being located on the second emitter portions. In the second direction, the curvature of the main gate located at the edge position is greater than the curvature of another main gate located at the middle position.

2. The solar cell according to claim 1, characterized in that, In a direction perpendicular to the first surface, the orthographic projection of the sub-gate is located within the orthographic projection of the corresponding first emitter portion.

3. The solar cell according to claim 1, wherein In the first direction, the maximum curvature of the sub-gate located at the edge position is greater than the maximum curvature of another sub-gate located at the middle position.

4. The solar cell according to claim 1, characterized in that, The sub-gate has a center point, the distances from the center point to the opposite ends of the sub-gate are the same, and the curvature at the center point of the sub-gate is denoted as the center curvature. In the first direction, the center curvature of the sub-gate located at the edge position is greater than the center curvature of another sub-gate located at the middle position.

5. The solar cell according to claim 1, characterized in that, In the first direction, the arc length of the sub-gate located at the edge position is greater than the arc length of another sub-gate located at the middle position.

6. The solar cell according to claim 1, characterized in that, In a direction from the middle position towards the edge position and parallel to the first direction, the widths of different first emitter portions increase sequentially.

7. The solar cell according to claim 6, wherein The width of the first emitter portion located at the middle position is not greater than 1 / 2 of the width of another first emitter portion located at the edge position.

8. The solar cell according to claim 1, wherein In the first direction, the curvature of the first emitter portion located at the edge position is greater than the curvature of another first emitter portion located at the middle position.

9. The solar cell according to claim 8, characterized in that, The curvature of each first emitter portion is equal to the curvature of the corresponding sub-gate located on the first emitter portion.

10. The solar cell according to claim 9, wherein, In a direction perpendicular to the first surface, the orthographic projection of the main gate is located within the orthographic projection of the corresponding second emitter portion.

11. The solar cell according to claim 1, characterized in that, The second emitter includes a doped silicon layer and a tunneling layer arranged in a stacked manner, the doping concentration of the doped silicon layer being greater than the doping concentration of the first emitter, and the tunneling layer being located between the doped silicon layer and the first electrode.

12. The solar cell according to claim 11, characterized in that, The doped silicon layer includes a doped polysilicon layer, and the tunneling layer includes an oxide layer; or, the doped silicon layer includes a doped amorphous silicon layer, and the tunneling layer includes an intrinsic amorphous silicon layer.

13. A photovoltaic module, characterized in that, Comprising: A battery string formed by connecting a plurality of solar cells according to any one of claims 1 to 12; An encapsulation film for covering the surface of the battery string; A cover plate for covering the surface of the encapsulation film facing away from the battery string.

14. A manufacturing method of a solar cell, characterized in that, Comprising: Providing a substrate and an emitter, the emitter being located on a first surface of the substrate, the emitter including a first emitter and a second emitter, the doping concentration of the second emitter being greater than that of the first emitter, the second emitter including a plurality of first emitter portions arranged along a first direction, and in the first direction, the width of the first emitter portion located at an edge position of the substrate being greater than the width of another first emitter portion located at an intermediate position of the substrate; The second emitter further includes: a plurality of second emitter portions arranged along a second direction, the second emitter portions being electrically connected to the first emitter portions, and in the second direction, the width of the second emitter portion located at the edge position being greater than the width of another second emitter portion located at the intermediate position; Forming a first electrode, the first electrode including a plurality of sub-gates arranged along the first direction, the sub-gates being located on the first emitter portions, and in the first direction, the curvature of the sub-gate located at the edge position being greater than the curvature of another sub-gate located at the intermediate position; the first electrode further includes: a plurality of main gates arranged along the second direction, the main gates being electrically connected to the sub-gates, the main gates being located on the second emitter portions, and in the second direction, the curvature of the main gate located at the edge position being greater than the curvature of another main gate located at the intermediate position.

15. The manufacturing method of the solar cell according to claim 14, characterized in that, The steps of providing the substrate, the emitter, and the first electrode include: Providing a substrate; Doping a first surface layer of the substrate to form a first doped region, and the region of the substrate other than the first doped region serves as the substrate; Forming a first layout covering the surface of the first doped region, the first layout having a pattern opening that exposes the surface of the first doped region, and in a direction perpendicular to the surface of the substrate, a part of the first doped region that is projected and misaligned with the pattern opening serves as the first emitter, and the pattern opening includes a plurality of first pattern openings arranged along the first direction; Performing screen printing on the first layout to form a plurality of intrinsic silicon portions filling the first pattern openings, and in the first direction, the curvature of the intrinsic silicon portion located at the edge position being greater than the curvature of another intrinsic silicon portion located at the intermediate position; Doping at least part of the intrinsic silicon portions to form the first emitter portions; Forming a second layout covering the surface of the first layout and the surface of the first emitter portions, the second layout having a plurality of second pattern openings arranged along the first direction, the second pattern openings exposing part of the surface of the first emitter portions; Perform screen printing on the second layout diagram to form a plurality of the sub-gates filling the second pattern openings, and in the first direction, the curvature of the sub-gate located at the edge position is greater than the curvature of the other sub-gate located at the middle position; Remove the first layout diagram and the second layout diagram.

Citation Information

Patent Citations

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    CN104465801A