A single-ended to differential capacitor sampling compensation device and sampling compensation method

Abstract

The embodiment of the present application relates to a kind of single-ended conversion differential capacitor sampling compensation device and sampling compensation method, the device includes: compensation module, at least including one compensation capacitor;The compensation module is connected with the capacitor to be measured, for compensating the reference value of the capacitor to be measured;Sampling amplification module, at least including one charge amplifier and feedback capacitor;The sampling amplification module is connected with the capacitor to be measured and compensation module, for converting the capacitance value of the capacitor to be measured into differential voltage value output, to obtain the capacitance value of the capacitor to be measured.The technical scheme of the embodiment of the present application realizes the operation of single-ended conversion differential with one single-ended circuit.Due to the fact that a pseudo branch can be saved, this structure reduces the area of chip when applied in the scenario of large measured capacitor;And due to the innovation of sampling mode between different working phases, it is realized that the standard value of large measured capacitor can be offset with smaller compensation capacitor.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to a single-ended to differential capacitor sampling compensation device and sampling compensation method. Background Technology

[0002] The capacitance sampling circuit is a basic component of all capacitance sensor systems. Its basic function is to convert a capacitance value into charge and accumulate it on an integrator, thereby outputting a voltage signal that is proportional to the capacitance value.

[0003] In many existing capacitance measurement applications (displacement, pressure, acceleration, etc.), sensor signals are single-ended signals. However, considering signal-to-noise ratio and various anti-interference capabilities (such as power supply rejection ratio, common-mode noise, etc.), sensor signal chain circuits typically tend to use differential structures. Therefore, the front-end circuit of the sensor interface needs a function to convert single-ended input signals into differential signals. This invention utilizes a four-phase sampling circuit to achieve the single-ended to differential conversion function.

[0004] Most capacitance measurement applications focus on the change in capacitance, that is, the change in capacitance around a reference capacitance value caused by variations in the measured physical quantity (such as distance, acceleration, displacement, etc.). This change in capacitance is usually small relative to the reference value of the measured capacitance. To maximize the dynamic range of the readout circuit, an offset compensation capacitor is typically introduced at the front end of the sampling circuit. In actual measurement, by applying opposite excitations to this compensation capacitor and the measured capacitance, the charges generated by the two capacitors cancel each other out, ensuring that only charges related to the changing capacitance enter the subsequent signal chain. This significantly improves the dynamic range of the measurement circuit because the influence of the static reference capacitance is eliminated during the measurement process. However, to achieve scaling, the value of the compensation capacitor needs to be close to the reference value of the measured capacitance. If this reference value is large, it means a large compensation capacitor is required, thus occupying a larger chip area. Summary of the Invention

[0005] Based on the above-mentioned situation of the prior art, the purpose of this invention is to provide a single-ended to differential capacitor sampling compensation device and sampling compensation method. By combining the sampling timing and the excitation signals at both ends of the capacitor, the single-ended capacitor signal is converted into a differential signal output, and the effective value of the compensation capacitor is amplified, thereby reducing the chip area required for the capacitor sampling circuit.

[0006] To achieve the above objectives, according to one aspect of the present invention, a capacitance sampling compensation device is provided, the device comprising:

[0007] The compensation module includes at least one compensation capacitor; the compensation module is connected to the capacitor under test and is used to compensate for the reference value of the capacitor under test.

[0008] The sampling amplification module includes at least one charge amplifier and a feedback capacitor; the sampling amplification module is connected to the capacitor under test and the compensation module, and is used to convert the capacitance value of the capacitor under test into a differential voltage value output to obtain the capacitance value of the capacitor under test.

[0009] Furthermore, the compensation module also includes a first switch network, a second switch network, a third switch network, and a fourth switch network;

[0010] The compensation capacitor is connected to the sampling excitation source through the first switching network, grounded through the second switching network, and connected to the capacitor under test through the third and fourth switching networks, respectively.

[0011] Furthermore, the sampling amplification module also includes a third switch network, a fourth switch network, a fifth switch network, and a sixth switch network;

[0012] The capacitor under test is connected to the negative feedback input of the charge amplifier through the third and fourth switching networks.

[0013] Furthermore, each switch network includes a first switch, a second switch, a third switch, and a fourth switch;

[0014] The first switch, the second switch, the third switch, and the fourth switch are turned on at different times.

[0015] Furthermore, the first, second, third, and fourth switches in each switch network are turned on or off according to the switching sequence to connect the compensation capacitor and the capacitor under test to the sampling excitation source, the ground terminal, or the negative feedback input terminal of the charge amplifier.

[0016] According to another aspect of the present invention, a method for performing capacitance sampling compensation using the capacitance sampling compensation device as described in the first aspect of the present invention is provided, comprising:

[0017] The switches in each switch network are controlled to turn on or off according to the switching sequence, so that the sampling device operates in four working phases within one sampling period;

[0018] In the first and second working phases, the capacitor under test is sampled and held in the positive direction, and the charge of the capacitor under test and the compensation capacitor is calculated.

[0019] In the third and fourth working phases, the capacitor under test is negatively sampled and held, and the charge of the capacitor under test and the compensation capacitor is calculated.

[0020] The sampling capacitance value is calculated based on the charge amount of the measured capacitor and the compensation capacitor during the positive and negative sampling and holding phases, as well as the differential sampling output voltage of the charge amplifier.

[0021] Furthermore, in the first working phase, the switches in each switching network are controlled to turn on and off, and the capacitor under test and the compensation capacitor are both connected between the sampling excitation source and the ground terminal, and the excitation source signals of the capacitor under test and the compensation capacitor are in opposite directions, so as to perform positive terminal sampling and charging.

[0022] Furthermore, in the second operating phase, the switching on and off of the switches in each switching network is controlled, and one end of the capacitor under test and the compensation capacitor are connected to the negative feedback input of the charge amplifier to perform positive terminal sampling discharge.

[0023] Furthermore, in the third working phase, the switching on and off of the switches in each switching network is controlled, the capacitor under test is connected to the ground terminal, and the compensation capacitor is connected between the sampling excitation source and the ground terminal and in the opposite direction to the excitation source signal of the first working phase, so as to perform negative terminal sampling and charging.

[0024] Furthermore, in the fourth operating phase, the switching on and off of the switches in each switching network is controlled, and one end of both the capacitor under test and the compensation capacitor is connected to the negative feedback input of the charge amplifier to perform negative-end sampling discharge.

[0025] In summary, this invention provides a single-ended to differential capacitance sampling compensation device and method. The device includes: a compensation module, comprising at least one compensation capacitor; the compensation module is connected to the capacitor under test and is used to compensate for the reference value of the capacitor under test; a sampling amplification module, comprising at least one charge amplifier and a feedback capacitor; the sampling amplification module is connected to the capacitor under test and the compensation module and is used to convert the capacitance value of the capacitor under test into a differential voltage value output to obtain the capacitance value of the capacitor under test. The technical solution of this invention introduces four working phases for capacitance sampling, realizing single-ended to differential operation using a single-ended circuit. Since a pseudo-branch can be eliminated, this structure significantly reduces the chip area, especially when the capacitor under test is large. Furthermore, due to the innovative sampling method between different working phases, a smaller compensation capacitor can compensate for the standard value of a larger capacitor under test, thereby further reducing the chip area required for the capacitance sampling circuit and greatly reducing costs. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the circuit structure of the capacitance sampling device provided in an embodiment of the present invention;

[0027] Figure 2This is the operating timing sequence of each switch in the switch network of this embodiment of the invention;

[0028] Figure 3 This is a flowchart of the capacitance sampling method provided in an embodiment of the present invention;

[0029] Figure 4 This is a circuit equivalent diagram of the capacitor sampling device in the first operating phase;

[0030] Figure 5 This is a circuit equivalent diagram of the capacitor sampling device in the second operating phase;

[0031] Figure 6 This is a circuit equivalent diagram of the capacitor sampling device in the third working phase;

[0032] Figure 7 This is a circuit equivalent diagram of the capacitor sampling device in the fourth working phase. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and the accompanying drawings. It should be understood that these descriptions are merely exemplary and not intended to limit the scope of the invention. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0034] It should be noted that, unless otherwise defined, the technical or scientific terms used in one or more embodiments of the present invention should have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," and similar terms used in one or more embodiments of the present invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the element or object listed following the word and its equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0035] In existing technologies, most single-ended to differential sampling circuits are implemented by adding a pseudo-signal branch to a fully differential input. Based on this principle, sampling circuits only require two phases (one sampling phase and one holding phase) to sample a single-ended capacitor signal and convert it into a differential signal for output to the next stage of the signal chain.

[0036] However, in the above scheme, the pseudo-differential structure requires the addition of a pseudo-signal branch that matches the signal branch, including sampling and scaling capacitors of the same size. In applications where both the measured capacitor and the scaling capacitor are relatively large, this structure occupies a significant amount of chip area. Furthermore, to achieve the best scaling effect, existing structures require the absolute value of the compensation capacitor to be close to the static standard value of the measured capacitor. For example, if the standard value of the measured capacitor is 100pF, but the capacitance changes by ±1pF due to variations in the measured physical quantity, then the compensation capacitor should be selected as 100pF to offset the standard value of the measured capacitor. For this reason, the compensation capacitor also typically occupies a large amount of chip area, significantly increasing the chip cost.

[0037] This invention provides a single-ended to differential capacitance sampling compensation device and method to solve the above-mentioned problems. The technical solution of this invention will be described in detail below with reference to the accompanying drawings. An embodiment of this invention provides a single-ended to differential capacitance sampling compensation device, which includes a compensation module and a sampling amplification module. The compensation module includes at least one compensation capacitor. The compensation module is connected to the capacitor under test and is used to compensate for the reference value of the capacitor under test. The sampling amplification module includes at least one charge amplifier and a feedback capacitor. The sampling amplification module is connected to the capacitor under test and the compensation module and is used to convert the capacitance value of the capacitor under test into a differential voltage value output to obtain the capacitance value of the capacitor under test.

[0038] Figure 1 The circuit structure diagram of the capacitance sampling device is shown below. Figure 1 The structure of this capacitance sampling device is described.

[0039] The compensation module includes a first switching network, a second switching network, a third switching network, and a fourth switching network, as well as a compensation capacitor C. off Compensation capacitor C off The circuit is connected to the sampling excitation source VDD via a first switching network, grounded via a second switching network, and connected to the capacitor under test C via a third and fourth switching network, respectively. x The first switch network includes a first switch p1 and a fourth switch p4, which are connected in parallel. The second switch network includes a second switch p2 and a third switch p3, which are connected in parallel. Compensation capacitor C off one end (e.g.) Figure 1 Terminal 1) is connected to the sampling excitation source VDD through the first switching network and simultaneously connected to the ground terminal through the second switching network. The third switching network includes a third switch p3 and a fourth switch p4, one end of which is interconnected and then connected to the compensation capacitor C.off The other end (e.g.) Figure 1 The second terminal of the third switch (p3) is connected to the ground terminal, and the other terminal of the fourth switch (p4) is connected to the negative feedback input terminal of the charge amplifier. The fourth switch network includes the first switch (p1) and the second switch (p2). One end of the first switch (p1) and the second switch (p2) are interconnected and then connected to the compensation capacitor C. off At the other end, the other end of the first switch p1 is connected to the ground terminal, and the other end of the second switch p2 is connected to the negative feedback input terminal of the charge amplifier.

[0040] The sampling amplification module includes a third switch network, a fourth switch network, a fifth switch network, and a sixth switch network, as well as a feedback capacitor C. f The measured capacitance C x The negative feedback input of the charge amplifier is connected via a third and fourth switching network; the output of the charge amplifier is connected via a feedback capacitor C. f The fifth switching network, connected in parallel with it, is connected to the negative feedback input, and the differential sampling output voltage V is output through the sixth switching network. outp and V outn The measured capacitance C x one end (e.g.) Figure 1 The first terminal (in the diagram) is connected to the ground terminal, and the other terminal (e.g.) Figure 1 The second terminal of the capacitor is connected to the negative feedback input of the charge amplifier via the first switch p1 in another third switch network, and the other terminal of the third switch p3 in this other third switch network is connected to the ground terminal; the capacitor under test C x The other end (e.g.) Figure 1 The second terminal of the first switch (p1) in the fourth switch network is connected to the negative feedback input terminal of the charge amplifier through the second switch p2 in another fourth switch network, and the other end of the first switch p1 in the other fourth switch network is connected to the ground terminal.

[0041] The negative feedback input of the charge amplifier also passes through a feedback capacitor C. f Connected to the output of the charge amplifier, this output terminal outputs a differentially sampled output voltage V through a sixth switching network. outp and V outn The sixth switch network includes a second switch p2 and a fourth switch p4. One end of the second switch p2 and the fourth switch p4 are connected to the output of the charge amplifier, and the other end of the second switch p2 outputs V. outp The other end of the fourth switch P4 outputs V. outn The feedback capacitor C f A fifth switching network is connected in parallel across the two ends of the amplifier. This fifth switching network includes the first switch p1 and the third switch p3 connected in parallel. The positive feedback input of the charge amplifier is connected to the reference voltage V.cm In the aforementioned switch networks, the first switch p1, the second switch p2, the third switch p3, and the fourth switch p4 are each turned on or off according to the switching sequence to connect the compensation capacitor C. off and the measured capacitance C x Connect to the sampling excitation source VDD, the ground terminal, or the negative feedback input terminal of the charge amplifier. The first switch p1, the second switch p2, the third switch p3, and the fourth switch p4 are turned on at different times, and their operating sequence is as follows: Figure 2 As shown.

[0042] Embodiments of the present invention also provide a single-ended to differential capacitance sampling compensation method, which is used in the capacitance sampling compensation device involved in the above embodiments. Figure 3 The flowchart of the capacitance sampling compensation method is shown, which includes the following steps:

[0043] The switches in each switch network are controlled to turn on or off according to the switching sequence, so that the sampling device operates in four working phases within one sampling period;

[0044] In the first and second working phases, the capacitor under test is sampled and held in the positive direction, and the charge of the capacitor under test and the compensation capacitor is calculated.

[0045] In the third and fourth working phases, the capacitor under test is negatively sampled and held, and the charge of the capacitor under test and the compensation capacitor is calculated.

[0046] The sampling capacitance value is calculated based on the charge amount of the measured capacitor and the compensation capacitor during the positive and negative sampling and holding phases, as well as the differential sampling output voltage of the charge amplifier.

[0047] The following combination Figure 2 The timing diagram in the diagram illustrates the capacitor sampling method.

[0048] In the first operating phase, the switching on and off of the switches in each switching network is controlled to measure the capacitance C. x and compensation capacitor C off Both are connected between the sampling excitation source VDD and the ground terminal, and the measured capacitance C x and compensation capacitor C off The excitation source signals are in opposite directions to enable positive terminal sampling and charging. Figure 4 The diagram shows the equivalent circuit diagram during the first operating phase. At this time, the measured capacitance C... x and compensation capacitor C off The accumulated charges are as follows:

[0049] Q x =―V dd·C x (1)

[0050] Q off =V dd ·C off (2)

[0051] Among them, Q x The capacitance C being measured in the first operating phase is indicated. x The charge accumulated on, Q off Indicates the compensation capacitor C in the first working phase off The charge accumulated on, V dd C represents the voltage value of the sampling excitation source VDD. x Indicates the measured capacitance C x The capacitance value, C off Indicates the compensation capacitor C off The capacitance value.

[0052] In the second operating phase, the switching on and off of the switches in each switching network is controlled to measure the capacitance C. x and compensation capacitor C off Uniform end (e.g.) Figure 5 The second terminal (in the circuit) is connected to the negative feedback input terminal of the charge amplifier, and the other terminal (e.g.) Figure 5 The first terminal of each component is connected to the ground terminal for positive terminal sampling discharge. Figure 5 The diagram shows the equivalent circuit diagram during the second operating phase. At this point, charge transfer occurs due to the negative feedback of the amplifier. Ultimately, this transfer occurs at the measured capacitor C. x and compensation capacitor C off The stored charge becomes:

[0053]

[0054]

[0055] in, Indicates the capacitance C being measured in the second working phase. x The charge accumulated on the surface Indicates the compensation capacitor C in the second working phase off The charge accumulated on, V cm Indicates the reference voltage value, C x Indicates the measured capacitance C x The capacitance value, C off Indicates the compensation capacitor C off The capacitance value.

[0056] Due to the conservation of charge, according to the above equations (1)-(4), the charge stored in the charge amplifier can be derived as follows:

[0057]

[0058] Assuming in this design The output of the charge amplifier can then be derived as:

[0059]

[0060] V out+ This is the positive voltage of the differential output. As can be seen from the above formula, the design of the structure and operating timing of the capacitor sampling device in this embodiment of the invention enables effective compensation of the capacitor C. off It has been magnified three times. For example: if you need to completely offset a standard value of C... x If the capacitor is such that the required compensation capacitor value C is... off Only for:

[0061]

[0062] After the first and second working phases of positive terminal sampling are completed, the circuit enters negative terminal sampling. The working principle of negative terminal sampling is the same as that of positive terminal sampling, the only difference being that the direction of the excitation signal to the capacitor is reversed. In the third working phase, the switching on and off of the switches in each switching network is controlled, thereby controlling the capacitance C under test. x Connect to the ground terminal, compensation capacitor C off A signal from an excitation source connected between the sampling excitation source VDD and the ground terminal, and in the opposite direction to the first operating phase, is used for negative terminal sampling and charging. Figure 6 The diagram shows the equivalent circuit diagram during the third operating phase. At this time, the measured capacitance C is in the third operating phase. x and compensation capacitor C off The accumulated charges are as follows:

[0063] Q x- =0 (7)

[0064] Q off- =―V dd ·C off (8)

[0065] Among them, Q x- This indicates the capacitance C being measured in the third working phase. x The charge accumulated on, Q off- Indicates the compensation capacitor C in the second working phase off The charge accumulated on, V dd C represents the voltage value of the sampling excitation source VDD. off Indicates the compensation capacitor C off The capacitance value.

[0066] In the fourth operating phase, controlling the on / off state of the switches in each switching network will control the capacitance C under test.x and compensation capacitor C off Uniform end (e.g.) Figure 7 The second terminal (in the circuit) is connected to the negative feedback input of the charge amplifier for negative-end sampling discharge. Figure 7 The diagram shows the equivalent circuit diagram during the fourth operating phase. At this point, due to the negative feedback of the charge amplifier causing charge transfer, the charge ultimately flows through the measured capacitor C. x and compensation capacitor C off The stored charge becomes:

[0067]

[0068]

[0069] in, This indicates the capacitance C being measured in the fourth operating phase. x The charge accumulated on the surface This indicates the compensation capacitor C in the fourth working phase. off The charge accumulated on, V dd V represents the voltage value of the sampling excitation source VDD. cm Indicates the reference voltage value, C x Indicates the measured capacitance C x The capacitance value, C off Indicates the compensation capacitor C off The capacitance value.

[0070] Also due to the conservation of charge, according to equations (7)-(10), the charge stored in the charge amplifier at this time can be derived as follows:

[0071]

[0072] Because in this design The output of the charge amplifier in this state can then be derived as follows:

[0073]

[0074] V out― This is the negative voltage of the differential output. As can be seen from equation (12) above, at this phase, the output of the sampling circuit is in the same phase as the second operating phase but with opposite polarities, which is exactly a fully differential signal. That is, V out+ With V out― The absolute values ​​are equal but the phases are opposite, resulting in differential output. Simultaneously, the compensation capacitor C... off The 3x amplification ensures that this circuit only requires a small compensation capacitor to achieve the effect of compensating for a large reference value of the measured capacitor, which greatly saves chip area and cost.

[0075] In summary, this invention relates to a single-ended to differential capacitance sampling compensation device and method. The device includes: a compensation module, comprising at least one compensation capacitor; the compensation module is connected to the capacitor under test and is used to compensate for the reference value of the capacitor under test; a sampling amplification module, comprising at least one charge amplifier and a feedback capacitor; the sampling amplification module is connected to the capacitor under test and the compensation module and is used to convert the capacitance value of the capacitor under test into a differential voltage value output to obtain the capacitance value of the capacitor under test. The technical solution of this invention, by combining a timing circuit structure with four operating phases and a capacitance sampling circuit, achieves the conversion of a single-ended capacitance input signal into a fully differential output, avoiding the use of a pseudo-differential branch similar to the signal branch, thereby saving at least two capacitors and reducing chip area and cost; by adjusting the excitation power supply for the compensation capacitor at different operating phases, a three-fold amplification effect for this capacitor is ultimately generated, further reducing the requirement for on-chip capacitance, thereby reducing chip area and cost.

[0076] It should be understood that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of this invention, technical features of the above embodiments or different embodiments can also be combined, steps can be implemented in any order, and many other variations exist regarding different aspects of one or more embodiments of the invention as described above, which are not provided in the details for the sake of brevity. The specific embodiments described above are merely illustrative or explanatory of the principles of the invention and do not constitute a limitation thereof. Therefore, any modifications, equivalent substitutions, improvements, etc., made without departing from the spirit and scope of the invention should be included within the protection scope of the invention. Furthermore, the appended claims are intended to cover all variations and modifications falling within the scope and boundaries of the appended claims, or equivalent forms of such scope and boundaries.

Claims

1. A capacitance sampling compensation device, characterized by, The device comprises: a compensation module comprising a first switch network, a second switch network, a third switch network, a fourth switch network and a compensation capacitor; the compensation module is connected to the measured capacitor and is used for compensating the reference value of the measured capacitor; the compensation capacitor is connected to a sampling excitation source through the first switch network, is grounded through the second switch network and is connected to the measured capacitor through the third switch network and the fourth switch network respectively; a sampling amplification module comprising a third switch network, a fourth switch network, a fifth switch network, a sixth switch network, a charge amplifier and a feedback capacitor; the sampling amplification module is connected to the measured capacitor and the compensation module and is used for converting the capacitance value of the measured capacitor into a differential voltage value output to obtain the capacitance value of the measured capacitor; the measured capacitor is connected to the negative feedback input end of the charge amplifier through the third switch network and the fourth switch network; the switches in each switch network are turned on or turned off according to the switch timing to connect the compensation capacitor and the measured capacitor to the sampling excitation source, the ground end or the negative feedback input end of the charge amplifier; each switch network comprises a first switch, a second switch, a third switch and a fourth switch; the first switch, the second switch, the third switch and the fourth switch are turned on at different times.

2. The apparatus of claim 1, wherein, the first switch, the second switch, the third switch and the fourth switch in each switch network are turned on or turned off according to the switch timing to connect the compensation capacitor and the measured capacitor to the sampling excitation source, the ground end or the negative feedback input end of the charge amplifier.

3. A method for capacitance sampling compensation using the capacitance sampling compensation device according to claim 1 or 2, characterized by, comprises: controlling the switches in each switch network to be turned on or turned off according to the switch timing, so that the sampling device works in four working phases in one sampling period; in the first working phase and the second working phase, the measured capacitor is forward sampled and held, and the charge amount of the measured capacitor and the compensation capacitor is sampled and calculated; in the third working phase and the fourth working phase, the measured capacitor is negative sampled and held, and the charge amount of the measured capacitor and the compensation capacitor is sampled and calculated; the sampling capacitance value is calculated according to the charge amount of the measured capacitor and the compensation capacitor in the forward sampling and holding stage and the negative sampling and holding stage and the differential sampling output voltage output by the charge amplifier.

4. The method of claim 3, wherein, in the first working phase, the switches in each switch network are controlled to be turned on or turned off, the measured capacitor and the compensation capacitor are connected between the sampling excitation source and the ground end, and the excitation source signal directions of the measured capacitor and the compensation capacitor are opposite, so as to perform positive end sampling charging.

5. The method of claim 4, wherein, in the second working phase, the switches in each switch network are controlled to be turned on or turned off, the measured capacitor and the compensation capacitor are connected to the negative feedback input end of the charge amplifier, so as to perform positive end sampling discharging.

6. The method of claim 5, wherein, in the third working phase, the switches in each switch network are controlled to be turned on or turned off, the measured capacitor is connected to the ground end, and the compensation capacitor is connected between the sampling excitation source and the ground end and is opposite to the excitation source signal direction in the first working phase, so as to perform negative end sampling charging.

7. The method of claim 6, wherein, in the fourth working phase, the switches in each switch network are controlled to be turned on or turned off, the measured capacitor and the compensation capacitor are connected to the negative feedback input end of the charge amplifier, so as to perform negative end sampling discharging.

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