A single camera module frame synchronization signal detection method and electronic device

Abstract

The present application relates to the field of camera module testing, in particular to a kind of single camera module frame synchronization signal detection method and electronic equipment, the single camera module includes image sensor, the detection method includes: obtaining the frame synchronization signal of the image sensor in main camera mode and detecting whether the frame synchronization signal is normal;Obtain the frame synchronization signal of the image sensor in secondary camera mode and detect whether the frame synchronization signal is normal;If the frame synchronization signal of image sensor in main camera mode is normal and the frame synchronization signal of image sensor in secondary camera mode is normal, then determine that the frame synchronization signal of the image sensor is effective.The present application provides a kind of single camera module frame synchronization signal detection method and electronic equipment, can conveniently detect the effectiveness of single camera module frame synchronization signal, can well meet the actual demand.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of camera module testing, in particular to a single camera module frame synchronization signal detection method and electronic equipment. BACKGROUND

[0002] In the field of camera module testing, user terminals will use dual cameras to achieve data frame synchronization. Data frame synchronization means that the pictures taken by the dual cameras are of the same time. However, the module factory does not have the device and method to achieve dual camera frame synchronization. This leads to the situation that when the camera module frame synchronization fails, the module factory cannot detect it, and finally the defective camera modules flow to the user terminal. This defective product can only be detected when the user terminal achieves frame synchronization, resulting in waste of computing resources and manpower of the user terminal.

[0003] Considering the above situation, the module factory needs a device to detect the effectiveness of the frame synchronization signal to avoid defective camera modules flowing to the user terminal. However, the cost of purchasing an additional device to achieve dual camera frame synchronization and putting it into actual production is high. Therefore, in view of the actual situation of the module factory taking a single camera module as the production unit, it is urgent to propose a scheme for detecting the effectiveness of the frame synchronization signal of a single camera module. In view of the above defects, the present application is improved. SUMMARY

[0004] In order to overcome the shortcomings of the background art, the present application provides a single camera module frame synchronization signal detection method, which can conveniently detect the effectiveness of the single camera module frame synchronization signal and can well meet the actual needs.

[0005] The present application provides a single camera module frame synchronization signal detection method, which includes an image sensor. The detection method includes: obtaining the frame synchronization signal of the image sensor in the main camera mode and detecting whether the frame synchronization signal is normal; obtaining the frame synchronization signal of the image sensor in the secondary camera mode and detecting whether the frame synchronization signal is normal; if the frame synchronization signal of the image sensor in the main camera mode is normal and the frame synchronization signal of the image sensor in the secondary camera mode is normal, it is determined that the frame synchronization signal of the image sensor is effective.

[0006] Preferably, the single camera module frame synchronization signal detection method specifically includes the following steps:

[0007] S101, obtaining the frame synchronization signal of the image sensor in the main camera mode and detecting whether the frame synchronization signal is normal;

[0008] S102, if the frame synchronization signal of the image sensor in the main camera mode is normal, obtaining the frame synchronization signal of the image sensor in the secondary camera mode and detecting whether the frame synchronization signal is normal;

[0009] S103, if the frame synchronization signal of the image sensor in the secondary camera mode is normal, determining that the frame synchronization signal of the image sensor is valid.

[0010] Preferably, before step S101, further comprising: connecting a VSYNC pin and a PO1 pin on a camera test fixture, the single camera module being installed on the camera test fixture for detection, the VSYNC pin being used for outputting the frame synchronization signal of the image sensor, the PO1 pin being a general I / O pin and being used for input signal, and acquiring the frame synchronization signal of the image sensor in the primary camera mode or the secondary camera mode through the PO1 pin.

[0011] Preferably, in step S101, the image sensor is put into the primary camera mode, if the image sensor is successfully put into the primary camera mode, the VSYNC pin outputs the frame synchronization signal of the image sensor in the primary camera mode, and the frame synchronization signal of the image sensor in the primary camera mode is acquired through the PO1 pin.

[0012] Preferably, in step S101, after the image sensor is successfully put into the primary camera mode, detecting whether the frame synchronization signal is normal specifically comprises the following steps.

[0013] S201, i=0, i being the number of detection times;

[0014] S202, delaying for a preset time t1;

[0015] S203, detecting a PO1 port level polarity p1, 1 being high level and 0 being low level;

[0016] S204, i=i+1;

[0017] S205, judging whether p1==n1 is true or not, n1 being a preset valid polarity;

[0018] S206, if p1==n1 is true, the frame synchronization signal of the image sensor in the primary camera mode is normal, and then step S102 is entered;

[0019] S207, if p1==n1 is not true, judging whether i

[0020] S208, if i

[0021] S209, if i

[0022] Preferably, in step S202, the preset time t1 is 300 ms, and in step S207, the preset maximum number cnt1 is 5.

[0023] Preferably, in step S102, the image sensor enters the sub-camera mode, and if the image sensor enters the sub-camera mode successfully, the VSYNC pin outputs the frame synchronization signal of the image sensor in the sub-camera mode, and the PO1 pin acquires the frame synchronization signal of the image sensor in the sub-camera mode.

[0024] Preferably, in step S102, after the image sensor successfully enters the sub-camera mode, the detection of whether the frame synchronization signal is normal specifically includes the following steps.

[0025] S301, j = 0, j is the detected number of times;

[0026] S302, delay for a preset time t2;

[0027] S303, detect the PO1 port level polarity p2, 1 for high level, and 0 for low level;

[0028] S304, j = j + 1;

[0029] S305, judge whether p2 == n2 is true, n2 is a preset valid polarity;

[0030] S306, if p2 == n2 is not true, the frame synchronization signal of the image sensor in the sub-camera mode is abnormal, and at this time, it is determined that the frame synchronization signal of the image sensor is invalid;

[0031] S307, if p2 == n2 is true, judge whether j < cnt2 is true, cnt2 is a preset maximum number;

[0032] S308, if j < cnt2 is true, return to step S302;

[0033] S309, if j < cnt2 is not true, the frame synchronization signal of the image sensor in the sub-camera mode is normal, and at this time, it is determined that the frame synchronization signal of the image sensor is valid.

[0034] Preferably, in step S302, the preset time t2 is 500 ms, and in step S307, the preset maximum number cnt2 is 5.

[0035] The application further provides an electronic device including a processor and a memory, wherein the memory stores a computer program, and the computer program is executed by the processor to implement the detection method of the frame synchronization signal of the single-camera module.

[0036] In summary, the application has the following advantages:

[0037] In terms of hardware, this invention only requires connecting the VSYNC pin and PO1 pin on the camera test fixture, thus realizing the function of detecting the validity of the frame synchronization signal of a single camera module at a low cost. Furthermore, this invention only requires one camera module to complete the test, which is suitable for the actual situation of module manufacturers that produce single camera modules, and is conducive to module manufacturers to quickly implement the validity test of the frame synchronization signal of a single camera module.

[0038] The invention will now be further described with reference to the accompanying drawings. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a schematic flowchart of the detection method of the present invention;

[0041] Figure 2 This is a schematic diagram of the overall process of the detection method of the present invention;

[0042] Figure 3 This is a schematic diagram of a signal where the main camera mode of the present invention is active high.

[0043] Figure 4 This is a schematic diagram of a signal where the secondary camera mode of the present invention is active low.

[0044] Figure 5 This is a schematic diagram of a signal where the main camera mode of the present invention is active low.

[0045] Figure 6 This is a schematic diagram of a signal where the secondary camera mode of the present invention is active high.

[0046] Figure 7 This is a schematic diagram of a structural block of the electronic device of the present invention; Detailed Implementation

[0047] The following will be based on embodiments of the present invention. Figures 1 to 7 The technical solutions in the embodiments of the present invention are clearly and completely described herein. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0048] For the purposes of making the objectives, technical solutions and advantages of the present application clearer, the technical solutions in the embodiments of the present application will be described in more detail below with reference to the drawings in the embodiments of the present application.

[0049] As shown in Figures 1 to 7 The single camera module frame synchronization signal detection method disclosed in the embodiment includes: acquiring the frame synchronization signal of the image sensor in the main camera mode and detecting whether the frame synchronization signal is normal; acquiring the frame synchronization signal of the image sensor in the secondary camera mode and detecting whether the frame synchronization signal is normal; if the frame synchronization signal of the image sensor in the main camera mode is normal and the frame synchronization signal of the image sensor in the secondary camera mode is normal, it is determined that the frame synchronization signal of the image sensor is valid. In the above technical solution, the image sensor is one of the important devices of the camera module. For a single camera module, it may be defined as a main camera lens or a secondary camera lens when used in a subsequent user terminal. The main camera lens corresponds to the main camera mode of the image sensor, and the secondary camera lens corresponds to the secondary camera mode of the image sensor. However, it is not determined at the module factory. Therefore, it is necessary to detect whether the frame synchronization signal of the image sensor in the main camera mode is normal and whether the frame synchronization signal of the image sensor in the secondary camera mode is normal. Only when the frame synchronization signals in the two modes are normal, it is determined that the frame synchronization signal of the image sensor is valid, that is, the frame synchronization signal of the single camera module is valid. Wherein, the main camera mode is Master Mode; the secondary camera mode is Slave Mode; the image sensor is Sensor, which is one of the important devices of the camera module.

[0050] As a preferred technical solution, the single camera module frame synchronization signal detection method specifically includes the following steps:

[0051] S101, acquiring the frame synchronization signal of the image sensor in the main camera mode and detecting whether the frame synchronization signal is normal;

[0052] Preferably, before step S101, the VSYNC pin and the PO1 pin on the camera test fixture are connected, the single camera module is installed on the camera test fixture for detection, the VSYNC pin is used to output the frame synchronization signal of the image sensor, the PO1 pin is a general I / O pin and is used to input a signal, and the frame synchronization signal of the image sensor in a primary camera mode or a secondary camera mode is obtained through the PO1 pin. In the embodiment, the VSYNC pin and the PO1 pin on the camera test fixture are directly connected, that is, the VSYNC pin and the PO1 pin are short-circuited. The VSYNC pin is connected with the PO1 pin to output the frame synchronization signal from the VSYNC pin to the PO1 pin, so that the computer program can read the frame synchronization signal input by the PO1 pin. In specific implementation, the PO1 pin can be set as a GPIO input mode through image detection software, and the frame synchronization signal input by the PO1 pin can be read through the image detection software. Therefore, the frame synchronization signal of the image sensor in the primary camera mode or the secondary camera mode can be conveniently obtained through the PO1 pin. The PO1 pin is set as the GPIO input mode, so that the PO1 can be used as an input pin, and the software can detect the input signal of the PO1. The above technical solution can detect whether the VSYNC pin signal is normal. The principle of the application is to detect whether the obtained VSYNC pin signal meets the normal VSYNC signal characteristics, that is, to detect whether the obtained frame synchronization signal meets the normal frame synchronization signal characteristics.

[0053] The camera test fixture is a test device for camera detection, and includes a printed circuit board, a test circuit, a carrier module, and a connector. The camera test fixture can be used to connect a camera module and a tool. In specific implementation, the camera test fixture of the embodiment adopts a special PCB connecting plate. The VSYNC pin and the PO1 pin on the camera test fixture are connected by connecting the VSYNC pin and the PO1 pin on the special PCB connecting plate.

[0054] The tool is a device for camera testing, and is a high-speed and high-precision MIPI test device specially used for automatic equipment.

[0055] VSYNC: vertical synchronization, frame synchronization

[0056] The VSYNC pin is a frame synchronization pin, which outputs a frame synchronization signal. The frame synchronization signal indicates the start of scanning one frame. In double-camera frame synchronization, the VSYNC pins of the primary camera and the secondary camera are directly short-circuited.

[0057] The PO1 pin is a general I / O pin, which can be controlled by a computer program to be an input (I) or an output (O). Generally, there are four PO1 pins on a camera test fixture, in addition to the PO1 pin, there are also PO2-PO4 pins.

[0058] GPIO: General-purpose input / output, the abbreviation of general-purpose input / output, the function is similar to 8051 P0-P3, its pin can be used by user program free, PIN foot can be used as general input (GPI) or general output (GPO) or general input and output (GPIO) according to the actual consideration.

[0059] Preferably, in step S101, the image sensor enters the main camera mode, if the image sensor enters the main camera mode successfully, the VSYNC pin outputs the frame synchronization signal of the image sensor in the main camera mode, and the PO1 pin acquires the frame synchronization signal of the image sensor in the main camera mode. In the embodiment, the image detection software is used to make the sensor (i.e. image sensor) enter the Master Mode (i.e. main camera mode), and after entering successfully, the PO1 pin can acquire the frame synchronization signal of the image sensor in the main camera mode.

[0060] Preferably, in step S101, after the image sensor successfully enters the main camera mode, the frame synchronization signal is detected whether it is normal, which specifically includes the following steps:

[0061] S201, i=0, i is the number of detection times;

[0062] In this step, the initial value of the detection times is assigned as 0.

[0063] S202, delay preset time t1;

[0064] In this step, the preset time t1 is preferably 300 ms, and the delay of the predetermined time can facilitate the subsequent detection work.

[0065] S203, detect the PO1 port level polarity p1, 1 is high level, and 0 is low level;

[0066] In this step, the image detection software reads the frame synchronization signal input by the PO1 pin, which can facilitate the detection of the PO1 port level polarity p1.

[0067] S204, i=i+1;

[0068] In this step, since the PO1 port level polarity has been detected once, the detection times is added 1 and assigned to i.

[0069] S205, judge whether p1==n1 is true, n1 is a preset valid polarity;

[0070] The step is to detect whether the current level polarity is correct, n1 is a preset valid polarity of the image sensor in the main camera mode, which represents the correct polarity, so when p1 = n1, it is determined that the current level polarity is correct, which means that the frame synchronization signal in the main camera mode is normal, and then it is detected whether the frame synchronization signal in the auxiliary camera mode is normal.

[0071] S206, if p1 == n1 is true, the frame synchronization signal of the image sensor in the main camera mode is normal, and then step S102 is entered;

[0072] In this step, step S102 is entered to detect whether the frame synchronization signal in the auxiliary camera mode is normal.

[0073] S207, if p1 == n1 is not true, it is determined whether i < cnt1 is true, and cnt1 is a preset maximum number of times;

[0074] In this step, the preset maximum number of times cnt1 is generally 5 times, and when it is determined that the current level polarity is incorrect, it is determined whether the number of detection times has reached 5 times.

[0075] S208, if i < cnt1 is true, return to step S202;

[0076] In this step, i < cnt1 is true, indicating that the number of detection times has not reached the preset maximum number of times, and then step S202 is returned to continue to detect and determine whether the PO1 port level polarity p1 is correct.

[0077] S209, if i < cnt1 is not true, the frame synchronization signal of the image sensor in the main camera mode is abnormal, and then it is determined that the frame synchronization signal of the image sensor is invalid.

[0078] In this step, i < cnt1 is not true, indicating that the number of detection times has reached the preset maximum number of times, and the current level polarity is incorrect for multiple times, indicating that the frame synchronization signal of the image sensor in the main camera mode is abnormal, and then it is determined that the frame synchronization signal of the image sensor is invalid.

[0079] S102, if the frame synchronization signal of the image sensor in the main camera mode is normal, the frame synchronization signal of the image sensor in the auxiliary camera mode is acquired and it is detected whether the frame synchronization signal is normal;

[0080] Preferably, in step S102, the image sensor is enabled to enter the slave camera mode, and if the image sensor is successfully enabled to enter the slave camera mode, the VSYNC pin outputs a frame synchronization signal of the image sensor in the slave camera mode, and the frame synchronization signal of the image sensor in the slave camera mode is acquired through the PO1 pin. In this embodiment, the image sensor is enabled to enter the Slave Mode (i.e., the slave camera mode) through the image detection software, and after entering the Slave Mode successfully, the frame synchronization signal of the image sensor in the slave camera mode can be acquired through the PO1 pin.

[0081] Preferably, in step S102, after the image sensor is successfully enabled to enter the slave camera mode, whether the frame synchronization signal is normal is detected, specifically including the following steps.

[0082] S301, j=0, j is the number of detections;

[0083] In this step, the initial value of the number of detections is set to 0.

[0084] S302, delay for a preset time t2;

[0085] In this step, the preset time t2 is preferably 500 ms, and the delay for the preset time facilitates the subsequent detection work.

[0086] S303, detect the PO1 port level polarity p2, 1 for high level and 0 for low level;

[0087] In this step, the image detection software reads the frame synchronization signal input by the PO1 pin, which facilitates the detection of the PO1 port level polarity p2.

[0088] S304, j=j+1;

[0089] In this step, since the PO1 port level polarity has been detected once, the number of detections is increased by 1 and then assigned to j.

[0090] S305, determine whether p2==n2 is true, n2 being a preset valid polarity;

[0091] This step is to detect whether the current level polarity is correct, n2 being a preset valid polarity of the image sensor in the slave camera mode, which represents the correct polarity. Therefore, when p2=n2, it is determined that the current level polarity is correct. If correct, the current level polarity is continuously detected within a preset maximum number of detections. If incorrect, it means that the frame synchronization signal in the slave camera mode is abnormal, and at this time, it is determined that the frame synchronization signal of the image sensor is invalid.

[0092] S306, if p2==n2 is not true, the frame synchronization signal of the image sensor in the slave camera mode is abnormal, and at this time, it is determined that the frame synchronization signal of the image sensor is invalid.

[0093] In this step, the fact that p2 == n2 is not true indicates that the current voltage polarity is incorrect.

[0094] S307. If p2==n2 is true, then determine whether j<cnt2 is true, where cnt2 is the preset maximum number of times.

[0095] In this step, the preset maximum number of times cnt2 is generally 5 times. When the polarity of the current level is determined to be correct, it is then determined whether the number of times detected has reached 5.

[0096] S308. If j < cnt2 is true, then return to step S302.

[0097] In this step, if j < cnt2 is true, it means that the number of tests has not reached the preset maximum number. At this time, you can return to step S302 to continue to test and determine whether the polarity p2 of the PO1 port level is correct.

[0098] S309. If j < cnt2 is not true, then the frame synchronization signal of the image sensor in the secondary camera mode is normal, and at this time it is determined that the frame synchronization signal of the image sensor is valid.

[0099] In this step, if j < cnt2 is not true, it means that the number of detections has reached the preset maximum number. If the current level polarity is detected multiple times, it indicates that the frame synchronization signal of the image sensor in the secondary camera mode is normal. At this time, it is determined that the frame synchronization signal of the image sensor is valid.

[0100] S103. If the frame synchronization signal of the image sensor is normal in the secondary camera mode, then the frame synchronization signal of the image sensor is determined to be valid.

[0101] In this embodiment, it is preferred to detect whether the frame synchronization signal of the image sensor is normal in the order of main camera mode first and then secondary camera mode. This is because some image sensors may have abnormal main camera mode signals after entering secondary camera mode, which may affect the detection results. When the frame synchronization signal of the image sensor is normal in both main camera mode and secondary camera mode, it is determined that the frame synchronization signal of the image sensor is valid, that is, the frame synchronization signal of the single camera module is valid.

[0102] Frame synchronization signals generally have the following two characteristics:

[0103] 1. Master Mode is active high; see appendix. Figure 3 Slave Mode is active low; see appendix. Figure 4 .

[0104] 2. Master Mode is active low; see appendix. Figure 5 Slave Mode is active high; see appendix.Figure 6 .

[0105] Wherein, the normal frame synchronization signal of the image sensor in the main camera mode is a frequency pulse, according to the frame synchronization signal characteristics in the main camera mode, the embodiment detects whether the frame synchronization signal is normal after the image sensor successfully enters the main camera mode, as long as the current level polarity is correct once in the preset maximum detection times, it indicates that the frame synchronization signal in the main camera mode is normal, and if the current level polarity is incorrect in the preset maximum detection times, it indicates that the frame synchronization signal in the main camera mode is abnormal.

[0106] The normal frame synchronization signal of the image sensor in the auxiliary camera mode is always at a high level or always at a low level, so it needs to be sampled multiple times to determine that it is always at the same polarity, according to the frame synchronization signal characteristics in the auxiliary camera mode, the embodiment detects whether the frame synchronization signal is normal after the image sensor successfully enters the auxiliary camera mode, as long as the current level polarity is incorrect once in the preset maximum detection times, it indicates that the frame synchronization signal in the auxiliary camera mode is abnormal, and if the current level polarity is correct in the preset maximum detection times, it indicates that the frame synchronization signal in the auxiliary camera mode is normal.

[0107] The application only needs to connect the VSYNC pin and the PO1 pin on the camera test fixture in the hardware device aspect, so as to realize the function of detecting the effectiveness of the frame synchronization signal of a single camera module at a small cost, and the application only needs a camera module to complete the detection, which is suitable for the actual situation of the module factory taking a single camera module as a production unit, and is conducive to the module factory to quickly implement the effectiveness detection of the frame synchronization signal of a single camera module.

[0108] The application also provides an electronic device 1, which comprises a processor 2 and a memory 3, and the memory stores a computer program 4, and the computer program 4 is executed by the processor 2 to realize the detection method of the frame synchronization signal of a single camera module in the above embodiment.

[0109] The processor can be a central processing unit (CPU), a controller, a microcontroller, a microprocessor, or other data processing chips in some embodiments. The processor is usually used to control the overall operation of the electronic device. In the embodiment, the processor is mainly used to execute the computer program of the image detection software.

[0110] The memory includes at least one type of readable storage medium, such as a flash memory, a hard disk, a multimedia card, a card-type memory (e.g., an SD or DX memory, etc.), a random access memory (RAM), a static random access memory (SRAM), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), a programmable read-only memory (PROM), a magnetic memory, a magnetic disk, an optical disk, etc. In some embodiments, the memory can be an internal storage unit of the electronic device, such as a hard disk or a memory of the electronic device. In other embodiments, the memory can also be an external storage device of the electronic device, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the electronic device. Of course, the memory can also include both the internal storage unit and the external storage device of the electronic device. In the present embodiment, the memory is generally used to store the operating method and various application software installed on the electronic device, such as the program code or image detection software of the detection method based on the single camera module frame synchronization signal. In addition, the memory can also be used to temporarily store various data that has been output or will be output.

[0111] The parts not involved in the present embodiment are the same as or can be implemented by the prior art, and will not be further described herein.

[0112] Those skilled in the art should know: although the present application has been described according to the above specific embodiments, the inventive idea of the present application is not limited to this invention, and any modification using the inventive idea will be included in the scope of protection of the present patent.

Claims

1. A method for detecting frame synchronization signals of a single camera module, characterized in that, The single camera module includes an image sensor. The detection method includes: obtaining the frame synchronization signal of the image sensor in the main camera mode and detecting whether the frame synchronization signal is normal; obtaining the frame synchronization signal of the image sensor in the sub-camera mode and detecting whether the frame synchronization signal is normal; if the frame synchronization signal of the image sensor in the main camera mode is normal and the frame synchronization signal of the image sensor in the sub-camera mode is normal, it is determined that the frame synchronization signal of the image sensor is valid. It includes the following steps: S101, obtaining the frame synchronization signal of the image sensor in the main camera mode and detecting whether the frame synchronization signal is normal; S102, if the frame synchronization signal of the image sensor in the main camera mode is normal, obtaining the frame synchronization signal of the image sensor in the sub-camera mode and detecting whether the frame synchronization signal is normal; S103, if the frame synchronization signal of the image sensor in the sub-camera mode is normal, determining that the frame synchronization signal of the image sensor is valid; Before step S101, it further includes: connecting the VSYNC pin and the PO1 pin on the camera test fixture, installing the single camera module on the camera test fixture for detection. The VSYNC pin is used to output the frame synchronization signal of the image sensor, and the PO1 pin is a general-purpose I / O pin and is used to input signals. The frame synchronization signal of the image sensor in the main camera mode or the sub-camera mode is obtained through the PO1 pin.

2. The method for detecting frame synchronization signals of a single camera module according to claim 1, characterized in that, In step S101, let the image sensor enter the main camera mode. If the image sensor successfully enters the main camera mode, the VSYNC pin outputs the frame synchronization signal of the image sensor in the main camera mode, and the frame synchronization signal of the image sensor in the main camera mode is obtained through the PO1 pin.

3. The method for detecting frame synchronization signals of a single camera module according to claim 2, characterized in that, In step S101, after the image sensor successfully enters the main camera mode, detecting whether the frame synchronization signal is normal specifically includes the following steps: S201, i = 0, where i is the number of times detected; S202, delaying for a preset time t1; S203, detecting the level polarity p1 of the PO1 port, 1 for high level and 0 for low level; S204, i = i + 1; S205, judging whether p1 == n1 holds, where n1 is the preset valid polarity; S206, if p1 == n1 holds, the frame synchronization signal of the image sensor in the main camera mode is normal, and at this time, step S102 is entered; S207, if p1 == n1 does not hold, judging whether i < cnt1 holds, where cnt1 is the preset maximum number of times; S208, if i < cnt1 holds, returning to step S202; S209, if i < cnt1 does not hold, the frame synchronization signal of the image sensor in the main camera mode is abnormal, and at this time, it is determined that the frame synchronization signal of the image sensor is invalid.

4. The method for detecting frame synchronization signals of a single camera module according to claim 3, characterized in that, In step S202, the preset time t1 is 300 ms, and in step S207, the preset maximum number of times cnt1 is 5.

5. The method for detecting frame synchronization signals of a single camera module according to claim 1, characterized in that, In step S102, the image sensor is made to enter the secondary shooting mode. If the image sensor successfully enters the secondary shooting mode, the VSYNC pin outputs the frame synchronization signal of the image sensor in the secondary shooting mode, and the frame synchronization signal of the image sensor in the secondary shooting mode is obtained through the PO1 pin.

6. The method for detecting frame synchronization signals of a single camera module according to claim 5, characterized in that, In step S102, after the image sensor successfully enters the secondary shooting mode, detecting whether the frame synchronization signal is normal specifically includes the following steps: S301: j = 0, where j is the number of times detected. S302: Delay for a preset time t2. S303: Detect the level polarity p2 of the PO1 port, where 1 represents high level and 0 represents low level. S304: j = j + 1. S305: Determine whether p2 == n2 holds, where n2 is the preset valid polarity. S306: If p2 == n2 does not hold, the frame synchronization signal of the image sensor in the secondary shooting mode is abnormal, and at this time, it is determined that the frame synchronization signal of the image sensor is invalid. S307: If p2 == n2 holds, determine whether j < cnt2 holds, where cnt2 is the preset maximum number of times. S308: If j < cnt2 holds, return to step S302. S309: If j < cnt2 does not hold, the frame synchronization signal of the image sensor in the secondary shooting mode is normal, and at this time, it is determined that the frame synchronization signal of the image sensor is valid.

7. The method for detecting frame synchronization signals of a single camera module according to claim 6, characterized in that, In step S302, the preset time t2 is 500 ms, and in step S307, the preset maximum number of times cnt2 is 5.

8. An electronic device, characterized in that, It includes a processor and a memory. A computer program is stored on the memory. When the computer program is executed by the processor, the method according to any one of claims 1 to 7 is implemented.

Images