Lightning arrester parameter determination method, device, equipment, storage medium and program product

Abstract

The application relates to a lightning arrester parameter determination method and device, computer equipment, a storage medium and a computer program product. The method comprises the following steps: obtaining a parameter limitation condition of a lightning arrester to be determined; the parameter limitation condition comprises an operating impulse protection level voltage of the lightning arrester and an impulse duration of the lightning arrester; obtaining an overvoltage multiple of the lightning arrester based on the impulse duration of the lightning arrester and a preset corresponding relationship between the overvoltage multiple and the impulse duration, and obtaining a reference voltage of the lightning arrester by using the overvoltage multiple of the lightning arrester and the operating impulse protection level voltage of the lightning arrester; and determining a lightning arrester parameter of the lightning arrester according to the reference voltage of the lightning arrester. The lightning arrester parameter of the lightning arrester can be accurately determined by using the method.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of lightning arresters, in particular to a lightning arrester parameter determination method and device, computer equipment, a storage medium and a computer program product. BACKGROUND

[0002] With the development of the technical field of lightning arresters, a large-capacity DC lightning arrester parameter determination technology has appeared. This technology uses a 2-millisecond square wave to simulate the working state of a large-capacity DC lightning arrester, and determines the parameters that the lightning arrester needs to configure based on the operating information of the lightning arrester in this working state.

[0003] The large-capacity DC lightning arrester configured by the above technical solution has a fault rate that exceeds the normal level in actual operation. After analysis, it is found that there are significant differences between the operating conditions of a large-capacity DC lightning arrester and those of a general DC lightning arrester. There is no significant operating voltage when a large-capacity DC lightning arrester is operating, and there are significant differences between the 50-200-millisecond long-wave impulse current that a large-capacity DC lightning arrester bears when it acts and the 2-millisecond square-wave impulse current. Therefore, the parameter configuration method that uses a traditional 2-millisecond square wave to simulate the working state of a large-capacity DC lightning arrester will result in inaccurate parameters of the large-capacity DC lightning arrester. SUMMARY

[0004] Therefore, it is necessary to provide a lightning arrester parameter determination method, device, computer equipment, computer-readable storage medium and computer program product that can accurately determine the parameters of a large-capacity DC lightning arrester to solve the above technical problems.

[0005] In a first aspect, the present application provides a lightning arrester parameter determination method. The method comprises:

[0006] obtaining a parameter limitation condition of a lightning arrester whose parameters are to be determined; the parameter limitation condition comprises an operating impulse protection level voltage of the lightning arrester and an impulse duration of the lightning arrester;

[0007] based on the impulse duration of the lightning arrester and a pre-set corresponding relationship between an overvoltage multiple and an impulse duration, obtaining an overvoltage multiple of the lightning arrester, and using the overvoltage multiple of the lightning arrester and the operating impulse protection level voltage of the lightning arrester to obtain a reference voltage of the lightning arrester;

[0008] determining a lightning arrester parameter of the lightning arrester according to the reference voltage of the lightning arrester.

[0009] In one of the embodiments, the parameter defining condition further comprises: a coordination current of the surge arrester; the surge arrester parameter of the surge arrester comprises a number of resistors of a single resistor column of the surge arrester, and a number of resistor columns of the surge arrester; the determining the surge arrester parameter of the surge arrester according to the reference voltage of the surge arrester comprises: obtaining the number of resistors of the single resistor column of the surge arrester based on the reference voltage of the surge arrester; obtaining the number of resistor columns of the surge arrester based on the overvoltage multiple and the coordination current of the surge arrester; and the surge arrester comprises a plurality of parallel resistor columns.

[0010] In one of the embodiments, the single resistor column comprises a plurality of series resistors; and the obtaining the number of resistors of the single resistor column of the surge arrester based on the reference voltage of the surge arrester comprises: obtaining a reference voltage of a single resistor in advance, and obtaining a result of dividing the reference voltage of the surge arrester by the reference voltage of the single resistor; and obtaining the number of resistors of the single resistor column of the surge arrester based on the result of the division.

[0011] In one of the embodiments, the obtaining the number of resistor columns of the surge arrester based on the overvoltage multiple and the coordination current of the surge arrester comprises: obtaining a corrected overvoltage multiple based on the overvoltage multiple and an overvoltage multiple correction coefficient obtained in advance; the corrected overvoltage multiple is used to represent the overvoltage multiple of the single resistor; obtaining an operating impulse protection level voltage of the single resistor based on the corrected overvoltage multiple and the reference voltage of the single resistor; obtaining the coordination current of the single resistor by a resistor volt-ampere curve of the single resistor obtained in advance based on the operating impulse protection level voltage of the single resistor; the coordination current of the single resistor is also the coordination current of the single resistor column; and obtaining the number of resistor columns of the surge arrester based on the coordination current of the single resistor and the coordination current of the surge arrester.

[0012] In one of the embodiments, after the number of resistor columns of the surge arrester is obtained, the method further comprises: obtaining a number of resistors of the surge arrester based on the number of resistors of the single resistor column and the number of resistor columns of the surge arrester; obtaining an energy absorption capacity of the surge arrester based on the energy absorption capacity of the single resistor obtained in advance and the number of resistors; if the energy absorption capacity of the surge arrester is greater than a preset value, the energy absorption capacity of the surge arrester is detected by energy; and if the energy absorption capacity of the surge arrester is less than or equal to the preset value, the number of resistors of the single resistor column of the surge arrester and the number of resistor columns of the surge arrester are recalculated.

[0013] In one of the embodiments, when the energy absorption capacity of the lightning arrester is greater than the preset value, the energy absorption capacity of the lightning arrester after energy detection further comprises: obtaining the number of standby resistance columns of the lightning arrester based on the number of resistance columns of the lightning arrester and the preset proportion coefficient of the standby resistance columns; and obtaining the final number of resistance columns of the lightning arrester based on the number of standby resistance columns of the lightning arrester and the number of resistance columns of the lightning arrester.

[0014] In a second aspect, the present application further provides a lightning arrester parameter determination device. The device comprises:

[0015] a limiting condition obtaining module, configured to obtain a parameter limiting condition of a lightning arrester to be determined; the parameter limiting condition comprises: an operating impulse protection level voltage of the lightning arrester and an impulse duration of the lightning arrester;

[0016] a reference voltage obtaining module, configured to obtain an overvoltage multiple of the lightning arrester based on the impulse duration of the lightning arrester and a preset corresponding relationship between overvoltage multiples and impulse durations, and obtain a reference voltage of the lightning arrester by using the overvoltage multiple of the lightning arrester and the operating impulse protection level voltage of the lightning arrester;

[0017] a lightning arrester parameter obtaining module, configured to determine a lightning arrester parameter of the lightning arrester according to the reference voltage of the lightning arrester.

[0018] In a third aspect, the present application further provides a computer device. The computer device comprises a memory and a processor, the memory stores a computer program, and the processor realizes the following steps when executing the computer program:

[0019] obtaining a parameter limiting condition of a lightning arrester to be determined; the parameter limiting condition comprises: an operating impulse protection level voltage of the lightning arrester and an impulse duration of the lightning arrester;

[0020] obtaining an overvoltage multiple of the lightning arrester based on the impulse duration of the lightning arrester and a preset corresponding relationship between overvoltage multiples and impulse durations, and obtaining a reference voltage of the lightning arrester by using the overvoltage multiple of the lightning arrester and the operating impulse protection level voltage of the lightning arrester;

[0021] determining a lightning arrester parameter of the lightning arrester according to the reference voltage of the lightning arrester.

[0022] In a fourth aspect, the present application further provides a computer readable storage medium. The computer readable storage medium stores a computer program, and the computer program realizes the following steps when executed by a processor:

[0023] obtaining a parameter limiting condition of the lightning arrester whose parameters are to be determined; the parameter limiting condition comprises an operating impulse protection level voltage of the lightning arrester and an impulse duration of the lightning arrester;

[0024] obtaining an overvoltage multiple of the lightning arrester based on the impulse duration of the lightning arrester and a preset corresponding relationship between an overvoltage multiple and an impulse duration, and obtaining a reference voltage of the lightning arrester by using the overvoltage multiple of the lightning arrester and the operating impulse protection level voltage of the lightning arrester;

[0025] determining the lightning arrester parameters of the lightning arrester according to the reference voltage of the lightning arrester.

[0026] In a fifth aspect, the present application further provides a computer program product. The computer program product comprises a computer program which, when executed by a processor, implements the following steps:

[0027] obtaining a parameter limiting condition of the lightning arrester whose parameters are to be determined; the parameter limiting condition comprises an operating impulse protection level voltage of the lightning arrester and an impulse duration of the lightning arrester;

[0028] obtaining an overvoltage multiple of the lightning arrester based on the impulse duration of the lightning arrester and a preset corresponding relationship between an overvoltage multiple and an impulse duration, and obtaining a reference voltage of the lightning arrester by using the overvoltage multiple of the lightning arrester and the operating impulse protection level voltage of the lightning arrester;

[0029] determining the lightning arrester parameters of the lightning arrester according to the reference voltage of the lightning arrester.

[0030] The lightning arrester parameter determination method, device, computer device, storage medium and computer program product obtain a parameter limiting condition of the lightning arrester whose parameters are to be determined; the parameter limiting condition comprises an operating impulse protection level voltage of the lightning arrester and an impulse duration of the lightning arrester; an overvoltage multiple of the lightning arrester is obtained based on the impulse duration of the lightning arrester and a preset corresponding relationship between an overvoltage multiple and an impulse duration, and a reference voltage of the lightning arrester is obtained by using the overvoltage multiple of the lightning arrester and the operating impulse protection level voltage of the lightning arrester; and the lightning arrester parameters of the lightning arrester are determined according to the reference voltage of the lightning arrester. The overvoltage multiple of the lightning arrester is obtained based on the preset corresponding relationship between the overvoltage multiple and the impulse duration, and the reference voltage of the lightning arrester is further obtained, and the lightning arrester parameters of the lightning arrester can be accurately determined according to the reference voltage of the lightning arrester. BRIEF DESCRIPTION OF DRAWINGS

[0031] Figure 1 a flowchart of a lightning arrester parameter determination method in an embodiment;

[0032] Figure 2 A flowchart for determining the parameters of a surge arrester in an embodiment;

[0033] Figure 3 A flowchart for determining the number of resistors in a single resistor column in an embodiment;

[0034] Figure 4 A flowchart for determining the number of resistor columns in an embodiment;

[0035] Figure 5 A flowchart for determining the parameters of a surge arrester with large capacity in an embodiment;

[0036] Figure 6 A block diagram of a device for determining the parameters of a surge arrester in an embodiment;

[0037] Figure 7 An internal structure diagram of a computer device in an embodiment. DETAILED DESCRIPTION

[0038] In order to make the purposes, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0039] It should be noted that the terms "first" and "second" involved in the embodiments of the present application are only to distinguish similar objects, and do not represent a specific order of the objects. It can be understood that "first" and "second" can be interchanged in a specific order or sequence as allowed. It should be understood that the objects distinguished by "first" and "second" can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein.

[0040] In an embodiment, as shown in Figure 1 A method for determining the parameters of a surge arrester is provided, and the present embodiment is exemplified by applying the method to a terminal. It can be understood that the method can also be applied to a server, and can also be applied to a system including a terminal and a server, and can be realized through the interaction of the terminal and the server. In the present embodiment, the method includes the following steps:

[0041] In step S101, the parameter limiting conditions of the surge arrester to be determined are obtained; the parameter limiting conditions include the operating impulse protection voltage of the surge arrester and the impulse duration of the surge arrester.

[0042] The arrester to be determined parameters is a large-capacity DC arrester to be determined parameters, the large-capacity DC arrester has no significant operating voltage when operating, and the significant operating voltage means that the ratio of the actual continuous operating voltage of the arrester to the DC reference voltage is not more than 50%, and the large-capacity DC arrester bears a long-wave impulse current of 50-200 ms when operating. The parameter limitation condition is a limitation condition of the to-be-determined parameter, which is used to limit the calculation of the parameter of the arrester, and is obtained by the electromagnetic transient software, and includes: continuous voltage, operating impulse protection level voltage, coordinated current, impulse duration, wherein the continuous voltage is the maximum continuous voltage that can be applied between the terminals of the arrester, the operating impulse protection level voltage is the maximum allowed peak voltage on the operating impulse protection device terminal under specified conditions, the coordinated current is the current corresponding to the operating impulse protection level voltage, and the impulse duration is the time during which the voltage of the arrester rises from the normal voltage to the peak voltage and then returns to the normal voltage when the arrester receives the current impulse.

[0043] Specifically, the parameter limitation condition of the arrester to be determined parameters is obtained by the electromagnetic transient software.

[0044] In step S102, the overvoltage multiple of the arrester is obtained based on the impulse duration of the arrester and the corresponding relationship between the overvoltage multiple and the impulse duration, and the reference voltage of the arrester is obtained by using the overvoltage multiple of the arrester and the operating impulse protection level voltage of the arrester.

[0045] The corresponding relationship between the overvoltage multiple and the impulse duration is that the overvoltage-time characteristic curves of the arrester under different impulse wavelengths are extracted from the long-wave impulse test results, and the calculation formula of the overvoltage multiple is fitted by comprehensively considering the test measurement deviation, the difference between different manufacturers, and other factors. The reference voltage is the average value of the DC voltage of the arrester measured when the arrester passes the DC reference current, and the overvoltage multiple refers to the ratio of the operating impulse protection level voltage of the arrester to the reference voltage.

[0046] Specifically, the corresponding relationship between the overvoltage multiple and the impulse duration is as follows:

[0047] k = 0.14e -T / 76.32 + 1.22;

[0048] Wherein, k is the overvoltage multiple, T is the impulse duration, e is the natural constant, the impulse duration of the arrester is input into the correspondence between the overvoltage multiple and the impulse duration, and the overvoltage multiple of the arrester can be obtained, and then the reference voltage of the arrester is obtained by dividing the operating impulse protection level voltage of the arrester by the overvoltage multiple. For example, when the impulse duration of the arrester is 200 ms and the operating impulse protection level voltage of the arrester is 87.9 kV, the overvoltage multiple k = 1.23 can be obtained through the correspondence between the overvoltage multiple and the impulse duration, and at this time the reference voltage of the arrester should be 87.9 / 1.23 = 71.46 kV.

[0049] Step S103, determining the arrester parameter of the arrester according to the reference voltage of the arrester.

[0050] Wherein, the arrester parameter is the parameter that needs to be configured for the arrester, and the arrester parameter can be the number of resistance sheets of a single resistance sheet column of the arrester and the number of resistance sheet columns of the arrester.

[0051] Specifically, the arrester parameter of the arrester can be calculated according to the reference voltage of the arrester and the parameter limitation condition of the arrester.

[0052] In the arrester parameter determination method, the parameter limitation condition of the arrester to be determined is obtained, the parameter limitation condition includes the operating impulse protection level voltage of the arrester and the impulse duration of the arrester, the overvoltage multiple of the arrester is obtained based on the impulse duration of the arrester and the pre-set correspondence between the overvoltage multiple and the impulse duration, and the reference voltage of the arrester is obtained by using the overvoltage multiple of the arrester and the operating impulse protection level voltage of the arrester, and the arrester parameter of the arrester is determined according to the reference voltage of the arrester. Through the pre-set correspondence between the overvoltage multiple and the impulse duration, the overvoltage multiple of the arrester is obtained, and then the reference voltage of the arrester is obtained, and the arrester parameter of the arrester can be accurately determined according to the reference voltage of the arrester.

[0053] In one embodiment, as shown in FIG. Figure 2 According to the reference voltage of the arrester, the arrester parameter of the arrester is determined, including the following steps:

[0054] Step S201, obtaining the number of resistance sheets of a single resistance sheet column of the arrester based on the reference voltage of the arrester.

[0055] Wherein, the number of resistance sheets of a single resistance sheet column is the number of resistance sheets of each resistance sheet column in the plurality of resistance sheet columns connected in parallel in the arrester, and each resistance sheet column is composed of a plurality of resistance sheets connected in series.

[0056] Specifically, based on the reference voltage of the surge arrester and the parameter constraints of the surge arrester, the number of resistors in a single resistor column of the surge arrester can be calculated.

[0057] Step S202: Based on the overvoltage multiple and the arrester's working current, the number of resistor columns in the arrester is obtained; the arrester contains multiple resistor columns connected in parallel.

[0058] The number of resistor columns is the same as the number of parallel resistor columns in the surge arrester.

[0059] Specifically, based on the overvoltage multiple, the matching current of the surge arrester, and the parameter constraints of the surge arrester, the number of resistor columns of the surge arrester can be calculated.

[0060] In this embodiment, by using the reference voltage of the surge arrester and the parameter limitations of the surge arrester, the number of resistors and the number of resistor columns in a single resistor column of the surge arrester can be accurately calculated.

[0061] In one embodiment, such as Figure 3 As shown, the number of resistors in a single resistor column of the surge arrester is obtained based on the reference voltage of the surge arrester, including the following steps:

[0062] Step S301: Obtain the reference voltage of a single resistor element obtained in advance, and obtain the result of dividing the reference voltage of the surge arrester by the reference voltage of the single resistor element.

[0063] The reference voltage of a single resistor is the maximum continuous voltage that can be persistently applied to the single resistor, and the result of dividing the reference voltage of the surge arrester by the reference voltage of the single resistor is the value of the reference voltage of the surge arrester divided by the reference voltage of the single resistor.

[0064] Specifically, the reference voltage of a single resistor element is obtained in advance, and the reference voltage of the surge arrester is divided by the reference voltage of the single resistor element to obtain the above result. For example, if the reference voltage of a single resistor element is 4.9kV and the reference voltage of the surge arrester is 71.46kV, then the result of dividing the reference voltage of the surge arrester by the reference voltage of the single resistor element is 71.46 / 4.9 = 14.58 elements.

[0065] Step S302: Based on the result of phase division, obtain the number of resistors in a single resistor column of the surge arrester.

[0066] Specifically, if the result of dividing the reference voltage of the lightning arrester by the reference voltage of the single resistance disc is an integer, the number of resistance discs of the single resistance disc column of the lightning arrester is the result, and if the result is not an integer, the number of resistance discs of the single resistance disc column of the lightning arrester is the next integer value after the result. For example, the result of dividing the reference voltage of the lightning arrester by the reference voltage of the single resistance disc is 71.46 / 4.9 = 14.58 discs, and the number of resistance discs of the single resistance disc column of the lightning arrester is 15 discs.

[0067] In this embodiment, by obtaining the result of dividing the reference voltage of the lightning arrester by the reference voltage of the single resistance disc, the number of resistance discs of the single resistance disc column of the lightning arrester can be accurately obtained.

[0068] In one embodiment, as shown in Figure 4 Based on the overvoltage multiple and the operating impulse protection level voltage of the single resistance disc, the number of resistance disc columns of the lightning arrester is obtained, including the following steps:

[0069] Step S401, based on the overvoltage multiple and the pre-obtained overvoltage multiple correction coefficient, the corrected overvoltage multiple is obtained; the corrected overvoltage multiple is used to represent the overvoltage multiple of the single resistance disc.

[0070] Wherein, the overvoltage multiple correction coefficient is a correction coefficient for correcting the overvoltage multiple of the lightning arrester to the overvoltage multiple of the single resistance disc, and the overvoltage multiple of the single resistance disc and the overvoltage multiple of the lightning arrester have certain numerical difference in practice.

[0071] Specifically, based on the overvoltage multiple and the pre-obtained overvoltage multiple correction coefficient, the corrected overvoltage multiple is obtained. For example, when the overvoltage multiple correction coefficient is 0.98, the corrected overvoltage multiple is 1.23*0.98 = 1.206.

[0072] Step S402, based on the corrected overvoltage multiple and the reference voltage of the single resistance disc, the operating impulse protection level voltage of the single resistance disc is obtained.

[0073] Wherein, the operating impulse protection level voltage of the single resistance disc is the maximum allowable peak voltage on the terminal of the single resistance disc operating impulse protection device.

[0074] Specifically, the reference voltage of the single resistance disc and the corrected overvoltage multiple are multiplied to obtain the operating impulse protection level voltage of the single resistance disc. For example, the corrected overvoltage multiple is 1.23*0.98 = 1.206, and the reference voltage of the single resistance disc is 4.9kV, then the operating impulse protection level voltage of the single resistance disc is 4.9*1.206 = 5.91kV.

[0075] Step S403: Based on the operational impulse protection level voltage of a single resistor element, the coordination current of the single resistor element is obtained through the pre-obtained volt-ampere curve of the single resistor element; the coordination current of the single resistor element is also the coordination current of the single resistor element column.

[0076] Among them, the voltage-current curve of a single resistor is the functional relationship curve of the voltage and current of a single resistor, while the coordination current of a single resistor is the current corresponding to the operating impulse protection level voltage of a single resistor. Since a single resistor column is composed of multiple resistors connected in series, the coordination current of a single resistor is also the coordination current of a single resistor column.

[0077] Specifically, based on the operating impulse protection level voltage of a single resistor element, the coordination current of the single resistor element is obtained through the pre-obtained volt-ampere curve of the single resistor element. For example, the operating impulse protection level voltage of a single resistor element should be 4.9 × 1.206 = 5.91 kV. According to the volt-ampere curve of the resistor element, the corresponding coordination current of the single resistor element at this time is about 70 A.

[0078] Step S404: Based on the coordination current of a single resistor element and the coordination current of the surge arrester, the number of resistor elements in the surge arrester is obtained.

[0079] Specifically, since the coordination current of a single resistor element is also the coordination current of a single resistor element column, and the surge arrester is composed of multiple resistor elements connected in parallel, the number of resistor elements in the surge arrester can be obtained by dividing the coordination current of the surge arrester by the coordination current of a single resistor element. For example, if the coordination current of a single resistor element is approximately 70A, and the coordination current of the surge arrester is a pre-determined 0.99kA, then the number of parallel resistor elements in the surge arrester should be greater than 990 / 70 = 14.1 elements. Since four elements connected in parallel form one surge arrester component, it can be determined that the surge arrester has 16 parallel resistor elements, requiring 4 surge arrester components connected in parallel.

[0080] In this embodiment, by accurately calculating the coordination current of a single resistor element and the coordination current of the surge arrester, the number of resistor elements in the surge arrester can be accurately obtained.

[0081] In one embodiment, after obtaining the number of resistor columns of the surge arrester, the following steps are also included:

[0082] The number of resistors in a surge arrester is determined based on the number of resistors in a single resistor column and the number of resistor columns in the surge arrester. The energy absorption capacity of the surge arrester is determined based on the pre-obtained energy absorption capacity of a single resistor and the number of resistors. If the energy absorption capacity of the surge arrester is greater than a preset value, the energy absorption capacity of the surge arrester is verified by energy detection. If the energy absorption capacity of the surge arrester is less than or equal to the preset value, the number of resistors in a single resistor column and the number of resistor columns in the surge arrester are recalculated.

[0083] The number of resistors in the surge arrester is the total number of resistors in the surge arrester, and the energy absorption capacity of a single resistor is the energy absorption capacity of a single resistor when subjected to a current surge. The preset value is a critical value of the energy absorption capacity of the surge arrester obtained in advance.

[0084] Specifically, the number of resistors in a single resistor column is multiplied by the total number of resistor columns in the surge arrester to obtain the total number of resistors in the surge arrester. Then, this number is multiplied by the total number of resistors in the surge arrester to obtain the surge arrester's energy absorption capacity. If the surge arrester's energy absorption capacity is greater than a preset value, the surge arrester passes energy detection, and the number of resistors in a single resistor column and the total number of resistor columns in the surge arrester can proceed to the next step. If the surge arrester's energy absorption capacity is less than or equal to the preset value, the number of resistors in a single resistor column and the total number of resistor columns in the surge arrester are recalculated. For example, if the energy absorption capacity of a single resistor in the surge arrester is approximately 42.1 kJ, and the energy carrying capacity is 16 × 15 × 42.1 = 10.11 MJ, which is greater than the preset value of 2.6 kJ, then the surge arrester's energy absorption capacity passes energy detection.

[0085] In this embodiment, by calculating the energy absorption capacity of the surge arrester and comparing it with a preset value, it is possible to accurately determine whether the energy absorption capacity of the surge arrester passes the energy detection.

[0086] In one embodiment, if the energy absorption capacity of the surge arrester is greater than a preset value, after the energy absorption capacity of the surge arrester is detected, the following steps are also included:

[0087] The number of spare resistor columns in the surge arrester is obtained based on the number of resistor columns in the surge arrester and the pre-set ratio coefficient of the spare resistor columns; the final number of resistor columns in the surge arrester is obtained based on the number of spare resistor columns in the surge arrester and the number of resistor columns in the surge arrester.

[0088] Among them, the spare resistor column is the spare resistor column reserved in the above-mentioned surge arrester, and the ratio coefficient of the spare resistor column is the ratio of the number of spare resistor columns to the number of resistor columns in the above-mentioned surge arrester. As for the final number of resistor columns, it is the final number of resistor columns configured in the above-mentioned surge arrester.

[0089] Specifically, the number of resistor columns in the surge arrester is multiplied by a pre-set ratio of spare resistor columns to obtain the number of spare resistor columns. Then, the number of spare resistor columns is added to the total number of resistor columns in the surge arrester to obtain the final number of resistor columns. For example, if the ratio of spare resistor columns is 20%, then the number of spare resistor columns is 16 × 20% = 3.2 columns. In practice, 4 columns are used, so the final number of resistor columns in the surge arrester is 16 + 4 = 20 columns. Assuming 4 resistor columns are connected in parallel as one surge arrester element, 5 surge arrester elements need to be connected in parallel.

[0090] In this embodiment, the final number of resistor columns in the surge arrester is obtained by calculating the number of spare resistor columns. This makes the surge arrester configured with this parameter safer and more stable during operation.

[0091] In one embodiment, such as Figure 5 As shown, a method for confirming the parameters of a high-capacity surge arrester is provided, and the specific steps are as follows:

[0092] 1. Determine the reference voltage of the surge arrester.

[0093] First, the parameter setting conditions of the surge arrester are determined through electromagnetic transient software, as shown in Table 1 below. These parameter setting conditions include: continuous voltage, switching impulse protection level, coordination current, energy absorption capacity, and impulse duration.

[0094]

[0095] Table 1 - Surge Arrester Parameter Setting Conditions

[0096] Then, based on the results of long-wave impulse tests, overvoltage-time characteristic curves under different impulse wavelengths from some surge arrester manufacturers were extracted. Taking into account factors such as test measurement deviations and differences in formulations from different manufacturers, a formula for calculating the overvoltage multiple k was fitted.

[0097] k = 0.14e -T / 76.32 +1.22;

[0098] When the impact time is 200ms, according to the above calculation formula, the overvoltage multiple k = 1.23, and the reference voltage of the DC surge arrester should not be less than 87.9 / 1.23 = 71.46kV;

[0099] 2. Determine the number of resistors connected in series.

[0100] The reference voltage for a single resistor is 4.9kV. To ensure that the DC reference voltage is greater than 71.46kV, the number of single-column resistors connected in series is 71.46 / 4.9 = 14.58 = 15.

[0101] 3. Determine the number of resistors connected in parallel.

[0102] The ratio of the overall operating protection level of the surge arrester to the maximum reference voltage is 87.9 / (71.46×1.02)=1.206. The operating protection level of a single resistor element should be 4.9×1.206=5.91kV. According to the volt-ampere curve of the resistor element, the corresponding coordination current is about 70A. The coordination current of the surge arrester determined by the system study is 0.99kA. Therefore, the number of parallel resistor elements in the surge arrester should be greater than 990 / 70=14.1 elements. Assuming that each surge arrester has a four-element parallel structure, the number of parallel resistor elements in the surge arrester is determined to be 16 elements. Therefore, 4 surge arresters need to be connected in parallel.

[0103] 4. Energy verification

[0104] The energy absorption capacity of a single resistor element of the surge arrester is approximately 42.1 kJ, and the energy current carrying capacity is 16 × 15 × 42.1 = 10.11 MJ, which is greater than the required value of 2.6 kJ. The energy verification is passed.

[0105] 5. Protection level verification

[0106] The current per column is approximately 66.6A (990 / 16). According to the volt-ampere curve of the resistor element, the operating impulse protection level of a single resistor element at 66.6A is 5.86kV. At this time, the ratio of the operating impulse protection level of a single resistor element to the maximum reference voltage is 5.86 / 4.9 = 1.196. Therefore, the overall operating impulse protection level of the surge arrester is approximately 87.2kV (71.46 × 1.02 × 1.196) < 87.9kV. The protection level verification is passed.

[0107] 6. Final parameter determination

[0108] Considering a 20% hot reserve, 16 × 20% = 3.2, the actual hot reserve is 4 columns. The final surge arrester configuration adopts 20 columns of resistor plates connected in parallel, with the structural design having four columns connected in parallel within each element, for a total of 5 elements connected in parallel.

[0109] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0110] Based on the same inventive concept, this application also provides a surge arrester parameter determination device for implementing the surge arrester parameter determination method described above. The solution provided by this device is similar to the solution described in the above method; therefore, the specific limitations in one or more surge arrester parameter determination device embodiments provided below can be found in the limitations of the surge arrester parameter determination method described above, and will not be repeated here.

[0111] In one embodiment, such as Figure 6 As shown, a surge arrester parameter determination device is provided, comprising: a constraint condition acquisition module 601, a reference voltage acquisition module 602, and a surge arrester parameter acquisition module 603, wherein:

[0112] The constraint condition acquisition module 601 is used to acquire the parameter constraint conditions of the surge arrester whose parameters are to be determined; the parameter constraint conditions include: the operating impulse protection level voltage of the surge arrester and the impulse duration of the surge arrester.

[0113] The reference voltage acquisition module 602 is used to obtain the overvoltage multiple of the surge arrester based on the surge arrester's impulse duration and the pre-set correspondence between the overvoltage multiple and the impulse duration, and to obtain the surge arrester's reference voltage using the surge arrester's overvoltage multiple and the surge arrester's operating impulse protection level voltage.

[0114] The surge arrester parameter acquisition module 603 is used to determine the surge arrester parameters based on the surge arrester's reference voltage.

[0115] In one embodiment, the surge arrester parameter acquisition module 603 is further configured to obtain the number of resistors in a single resistor column of the surge arrester based on the reference voltage of the surge arrester; and to obtain the number of resistor columns of the surge arrester based on the overvoltage multiple and the coordination current of the surge arrester; the surge arrester comprises multiple resistor columns connected in parallel.

[0116] In one embodiment, the surge arrester parameter acquisition module 603 is further configured to acquire a pre-obtained reference voltage of a single resistor element, and to acquire the result of dividing the surge arrester's reference voltage by the reference voltage of the single resistor element; based on the division result, the number of resistor elements in the single resistor element column of the surge arrester is obtained.

[0117] In one embodiment, the surge arrester parameter acquisition module 603 is further configured to obtain a corrected overvoltage multiple based on the overvoltage multiple and a pre-obtained overvoltage multiple correction coefficient; the corrected overvoltage multiple is used to characterize the overvoltage multiple of a single resistor element; based on the corrected overvoltage multiple and the reference voltage of a single resistor element, the operating impulse protection level voltage of a single resistor element is obtained; based on the operating impulse protection level voltage of a single resistor element, the coordination current of a single resistor element is obtained through the pre-obtained resistor element volt-ampere curve of the single resistor element; the coordination current of a single resistor element is also the coordination current of a single resistor element column; based on the coordination current of a single resistor element and the coordination current of the surge arrester, the number of resistor element columns of the surge arrester is obtained.

[0118] In one embodiment, the surge arrester parameter acquisition module 603 is further configured to obtain the number of resistors in the surge arrester based on the number of resistors in a single resistor column and the number of resistor columns in the surge arrester; to obtain the energy absorption capacity of the surge arrester based on the pre-obtained energy absorption capacity of a single resistor column and the number of resistors; if the energy absorption capacity of the surge arrester is greater than a preset value, the energy absorption capacity of the surge arrester is detected by energy detection; if the energy absorption capacity of the surge arrester is less than or equal to the preset value, the number of resistors in a single resistor column and the number of resistor columns in the surge arrester are recalculated.

[0119] In one embodiment, the surge arrester parameter acquisition module 603 is further used to obtain the number of spare resistor columns of the surge arrester based on the number of resistor columns of the surge arrester and a pre-set ratio coefficient of spare resistor columns; and to obtain the final number of resistor columns of the surge arrester based on the number of spare resistor columns of the surge arrester and the number of resistor columns of the surge arrester.

[0120] Each module in the aforementioned surge arrester parameter device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the corresponding operations of each module.

[0121] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 7As shown, the computer device includes a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. When executed by the processor, the computer program implements a surge arrester parameter method. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the computer device's casing, or an external keyboard, touchpad, or mouse.

[0122] Those skilled in the art will understand that Figure 7 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0123] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0124] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.

[0125] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0126] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0127] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0128] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0129] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for determining surge arrester parameters, characterized in that, The method includes: Obtain the parameter limiting conditions of the surge arrester whose parameters are to be determined; the parameter limiting conditions include: the operating impulse protection level voltage of the surge arrester and the impulse duration of the surge arrester; Based on the surge arrester's impulse duration and the pre-set correspondence between the overvoltage multiple and the impulse duration, the surge arrester's overvoltage multiple is obtained. Then, using the surge arrester's overvoltage multiple and the surge arrester's operational impulse protection level voltage, the surge arrester's reference voltage is obtained. Determine the surge arrester parameters based on the reference voltage of the surge arrester; The parameter limiting conditions also include: the coordination current of the surge arrester; the surge arrester parameters include the number of resistors in a single resistor column of the surge arrester, and the number of resistor columns of the surge arrester; determining the surge arrester parameters based on the reference voltage of the surge arrester includes: Based on the reference voltage of the surge arrester, the number of resistors in a single resistor column of the surge arrester is obtained; Based on the overvoltage multiple and the arrester's operating current, the number of resistor columns in the arrester is determined; the arrester comprises multiple resistor columns connected in parallel. The single resistor column comprises multiple resistors connected in series; the determination of the number of resistors in a single resistor column of the surge arrester based on the reference voltage of the surge arrester includes: Obtain the reference voltage of a single resistor element obtained in advance, and obtain the result of dividing the reference voltage of the surge arrester by the reference voltage of the single resistor element; Based on the result of the phase division, the number of resistors in a single resistor column of the surge arrester is obtained; The determination of the number of resistor columns in the surge arrester based on the overvoltage multiple and the arrester's operating current includes: Based on the overvoltage multiple and the pre-obtained overvoltage multiple correction coefficient, the corrected overvoltage multiple is obtained; the corrected overvoltage multiple is used to characterize the overvoltage multiple of the individual resistor element. Based on the corrected overvoltage multiple and the reference voltage of the individual resistor, the operating impulse protection level voltage of the individual resistor is obtained; Based on the operational impulse protection level voltage of the single resistor, the coordination current of the single resistor is obtained through the pre-obtained volt-ampere curve of the single resistor; the coordination current of the single resistor is also the coordination current of the single resistor column. The number of resistor columns in the surge arrester is obtained based on the coordination current of the individual resistor and the coordination current of the surge arrester.

2. The method according to claim 1, characterized in that, After obtaining the number of resistor columns of the surge arrester, the method further includes: The number of resistors in the surge arrester is obtained based on the number of resistors in the single resistor column and the number of resistor columns in the surge arrester; The energy absorption capacity of the surge arrester is obtained based on the energy absorption capacity of the single resistor element and the number of resistor elements obtained in advance. If the energy absorption capacity of the surge arrester is greater than a preset value, then the energy absorption capacity of the surge arrester is detected by energy detection. If the energy absorption capacity of the surge arrester is less than or equal to a preset value, the number of resistors in a single resistor column of the surge arrester and the total number of resistor columns of the surge arrester are recalculated.

3. The method according to claim 2, characterized in that, If the energy absorption capacity of the surge arrester is greater than a preset value, then after the energy absorption capacity of the surge arrester is detected, the following steps are also included: The number of spare resistor columns of the surge arrester is obtained based on the number of resistor columns of the surge arrester and the pre-set ratio coefficient of the spare resistor columns; The final number of resistor columns in the surge arrester is obtained based on the number of spare resistor columns and the number of resistor columns in the surge arrester.

4. A surge arrester parameter determination device, characterized in that, The device includes: The limiting condition acquisition module is used to acquire the parameter limiting conditions of the surge arrester whose parameters are to be determined; the parameter limiting conditions include: the operating impulse protection level voltage of the surge arrester and the impulse duration of the surge arrester; The reference voltage acquisition module is used to obtain the overvoltage multiple of the surge arrester based on the surge arrester's impulse duration and a pre-set correspondence between the overvoltage multiple and the impulse duration, and to obtain the surge arrester's reference voltage using the surge arrester's overvoltage multiple and the surge arrester's operating impulse protection level voltage; A surge arrester parameter acquisition module is used to determine the surge arrester parameters based on the reference voltage of the surge arrester. The parameter limiting conditions also include: the coordination current of the surge arrester; the surge arrester parameters include the number of resistors in a single resistor column of the surge arrester, and the total number of resistor columns of the surge arrester; the surge arrester parameter acquisition module is further used to: obtain the number of resistors in a single resistor column of the surge arrester based on the reference voltage of the surge arrester; obtain the total number of resistor columns of the surge arrester based on the overvoltage multiple and the coordination current of the surge arrester; the surge arrester comprises multiple resistor columns connected in parallel; The single resistor column comprises multiple resistors connected in series; the surge arrester parameter acquisition module is further configured to: acquire a pre-obtained reference voltage of a single resistor, and acquire the result of dividing the surge arrester's reference voltage by the reference voltage of the single resistor; based on the division result, obtain the number of resistors in the single resistor column of the surge arrester; The surge arrester parameter acquisition module is further configured to: obtain a corrected overvoltage multiple based on the overvoltage multiple and a pre-obtained overvoltage multiple correction coefficient; the corrected overvoltage multiple is used to characterize the overvoltage multiple of a single resistor element; obtain the operating impulse protection level voltage of a single resistor element based on the corrected overvoltage multiple and the reference voltage of the single resistor element; obtain the coordination current of a single resistor element based on the operating impulse protection level voltage of the single resistor element and the pre-obtained volt-ampere curve of the single resistor element; the coordination current of the single resistor element is also the coordination current of the single resistor element column; and obtain the number of resistor element columns of the surge arrester based on the coordination current of the single resistor element and the coordination current of the surge arrester.

5. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 3.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 3.

7. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 3.

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