Voltage Monitoring in Multiple Frequency Ranges in Autonomous Machine Applications
By adopting multiple sets of threshold systems and high-frequency and low-frequency voltage error detectors in the independent machine, the problem of insufficient detection of high-frequency and low-frequency voltage faults in the prior art is solved, and accurate voltage fault detection and system performance optimization are achieved.
Patent Information
- Application Number
- CN202210368290.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-06-14
- Filing Date
- 2022-04-02
- Publication Date
- 2025-07-18
- Estimated Expiration
- 2042-04-02
AI Technical Summary
In the voltage monitoring of autonomous and semi-autonomous machines, it is difficult to detect high-frequency and low-frequency voltage failures simultaneously, resulting in high false alarm rates or low coverage rates, which cannot meet strict safety requirements.
Multiple sets of threshold systems are adopted, including high-frequency overvoltage and undervoltage thresholds, low-frequency overvoltage and undervoltage thresholds. The voltage signals are processed separately through high-frequency and low-frequency voltage error detectors, and the noise is filtered and compared to ensure the accuracy of fault detection.
It realizes simultaneous detection of high-frequency and low-frequency voltage faults, reduces the false alarm rate, meets the diagnostic coverage requirements of the computer system, and optimizes the system performance.
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Figure CN115480092B_ABST
Abstract
Description
BACKGROUND OF THE INVENTION
[0001] For safe operation, it is required that the safety and operation critical computer systems of autonomous and semi-autonomous machines meet certain safety requirements to help ensure that these computer systems can make decisions in a timely and accurate manner and take appropriate measures to ensure the safe operation of the machines. Among the many safety considerations, the voltage supplied to these computer systems can be monitored to ensure that an appropriate voltage level is provided. For example, functional safety standards, such as the International Organization for Standardization (ISO) standard ISO 26262, require the detection of at least 99% of faults for certain safety goals.
[0002] As the complexity of computer systems in autonomous and semi-autonomous machines increases, for example, due to increased processing and power requirements, power supplies that can switch between multiple operating modes and corresponding power consumption rates and / or requirements are becoming more common. One drawback of such power supplies is that they can introduce alternating current (AC) noise into the normal direct current (DC) voltage supplied to the computer system. In previous systems, the fault detection or diagnostic range typically provided only a single overvoltage (OV) threshold and a single undervoltage (UV) threshold for comparison with the input voltage supplied by the power supply to the computer system. However, this diagnostic coverage may not be sufficient to meet the strict safety requirements that require a very low undetected failure rate. For example, if the single OV threshold is set to a relatively high value (and the corresponding single UV threshold is set to a relatively low value, indicating a wide allowable voltage range), false alarms will be reduced, but low-frequency faults will not be detected, thus reducing the diagnostic coverage below an acceptable limit. Another example is that if the single OV threshold is set to a relatively low value (and the corresponding single UV threshold is set to a relatively high value, indicating a narrow allowable voltage range), false alarms will be prevalent due to the AC noise in the supplied voltage, thus limiting the performance of the system - for example, because the system state will change even when the computer system can accept the input voltage. If the AC noise is filtered before applying the narrow range threshold, the fault detection will be limited to low-frequency faults, and high-frequency faults will not be detected, which may lead to undetected system failures. SUMMARY OF THE INVENTION
[0003] Embodiments of the present invention relate to an integrated voltage monitor for autonomous machine applications, such as autonomous or semi-autonomous vehicles, robots, and / or robotic platforms. Systems and methods for identifying voltage errors in low-frequency and high-frequency applications through a voltage monitor are disclosed. Based on the identified voltage errors, a safety manager can change the operating state of the electronic device to which the voltage is supplied.
[0004] Compared with traditional systems (as described above), the current systems and methods use multiple sets of thresholds to determine whether the voltage supplied to an electronic system is safe - for example, in non-limiting embodiments, these sets of thresholds can include high-frequency overvoltage (OV) thresholds, high-frequency undervoltage (UV) thresholds, low-frequency OV thresholds, and low-frequency UV thresholds. Embodiments of the present invention include a high-frequency voltage error detector and a low-frequency voltage error detector. The high-frequency voltage error detector can compare the supplied or input voltage with the high-frequency OV and UV thresholds, and the low-frequency voltage error detector can filter the supplied voltage to remove or reduce any AC noise, and then can compare the filtered voltage with the input voltage against the low-frequency OV and UV thresholds. In such an arrangement, both low-frequency and high-frequency errors can be detected while maintaining a low false alarm rate, thereby meeting the diagnostic coverage requirements of a computer system while also increasing or optimizing the performance of the system, at least with respect to the supplied voltage. BRIEF DESCRIPTION OF THE DRAWINGS
[0005] The existing systems and methods for an integrated voltage monitor for autonomous machine applications are described in detail below with reference to the accompanying drawings, in which:
[0006] Figure 1 is a hardware system diagram showing a voltage monitor between a computer system and a coupled power supply according to some embodiments of the present disclosure;
[0007] Figure 2 is a hardware diagram showing a voltage monitor configured to detect low-frequency and high-frequency voltage errors according to some embodiments of the present disclosure;
[0008] Figure 3A is a graphical representation of a voltage monitor having a narrow range of allowable voltages, such as through a low-frequency voltage error detector;
[0009] Figure 3B is a graphical representation of a voltage monitor having a wide range of allowable voltages, such as through a high-frequency voltage error detector;
[0010] Figure 4 is a graphical representation of a voltage monitor having two sets of thresholds, as a Figure 3A and Figure 3B combination;
[0011] Figures 5 - 6 is a flowchart showing a voltage monitoring method according to some embodiments of the present disclosure;
[0012] Figure 7A is an illustration of an exemplary autonomous vehicle according to some embodiments of the present disclosure;
[0013] Figure 7BExamples of camera positions and fields of view of an exemplary autonomous vehicle in accordance with some embodiments of the present disclosure Figure 7A
[0014] Figure 7C Block diagram of an exemplary system architecture of an exemplary autonomous vehicle in accordance with some embodiments of the present disclosure Figure 7A
[0015] Figure 7D System diagram of communication between one or more cloud - based servers and an exemplary autonomous vehicle in accordance with some embodiments of the present disclosure Figure 7A
[0016] Figure 8 Block diagram of an example computing device suitable for implementing some embodiments of the present disclosure; and
[0017] Figure 9 Block diagram of an example data center suitable for implementing some embodiments of the present disclosure DETAILED DESCRIPTION
[0018] Systems and methods related to integrated voltage monitoring for autonomous machine applications are disclosed. Although the present disclosure may be described with respect to an exemplary autonomous vehicle 700 (or referred to herein as "vehicle 700" or "ego machine 700"), which is described by way of example with respect to Figures 7A - 7D this is not intended to be limiting. For example, the systems and methods described herein may be used by, but not limited to, non - autonomous vehicles, semi - autonomous vehicles (e.g., in one or more adaptive driver assistance systems (ADA)), manned and unmanned robots or robotic platforms, warehouse vehicles, off - road vehicles, vehicles connected to one or more trailers, flying vessels, boats, shuttles, emergency response vehicles, motorcycles, electric or motorized bicycles, airplanes, construction vehicles, underwater vehicles, drones, and / or other vehicle types. Additionally, although the present disclosure may be described as monitoring the voltage provided to a computer system in a safety application, this is not intended to be limiting, and the systems and methods described herein may be used in augmented reality, virtual reality, mixed reality, robotics, security and surveillance, autonomous or semi - autonomous machine applications, and / or any other technical space that may use safety applications
[0019] Embodiments of the present invention relate to a computer system configured to detect voltage errors in safety-critical applications, such as in autonomous or semi-autonomous machine applications. In some embodiments, the computer system may be associated with a safety system communicatively and / or electrically coupled that may include a voltage monitor and / or a safety manager. The voltage monitor may detect faults in the input voltage supplied by a power source to one or more electronic components of the computer system, and the safety manager may take various remedial actions using the faults detected by the voltage monitor, such as placing the computer system in a safe mode, a low-power mode, a shutdown mode, and / or changing the operating mode of the computer system.
[0020] In embodiments of the present disclosure, the computer system may broadly include electronic components, a power source, a voltage monitor, and / or a safety manager. The electronic components may be any of a variety of hardware components that are powered, such as but not limited to processors, system-on-chips (SoCs), microcontrollers, sensors, etc. The electronic components may also include a collection of individual components or a group of individual components, integrated circuits, or other power receivers, where the power source may supply power to the electronic components via one or more power rails (e.g., different components may require different input voltages, and the power source may supply different input voltages via any number of power rails). The electronic components may have one or more operating modes, such as a fully autonomous operating mode, a semi-autonomous operating mode, a driver control mode, a driver alert mode, a safe mode, a low-power mode, and / or a power-off mode. Once a fault is detected using the voltage monitor, the safety manager may issue an indication (e.g., by sending a message or signal to the electronic component) or may directly place the electronic component in another operating mode. Thus, the safety manager may prevent the electronic component (supplied with a faulty voltage) from performing potentially defective calculations (or other operations) that could pose a safety problem for the system. For example, if the electronic component is in a fully autonomous operating mode when a faulty voltage is detected, the safety manager may change the electronic component to a driver control mode because the electronic component may make incorrect decisions due to the faulty voltage. The driver control mode may give control of the machine to the driver so that the driver can make correct control decisions – at least until the voltage problem is resolved.
[0021] The power source may be configured to supply power to the electronic components. The power source may be provided by a battery, an alternator, and / or other power sources. In some embodiments, the power source may be a switched-mode power supply, a linear power supply, or a combination thereof. For example, in some embodiments, there may be a set of power sources including a first power source and a second power source of the same type or different types, such as a switched-mode power supply and a linear power supply. Other combinations and / or types of power sources may be used without departing from the scope of the present invention.
[0022] The safety manager can be configured to change the operating mode of an electronic component when a voltage monitor detects a voltage fault. In an embodiment, the safety manager can be communicatively and / or electrically coupled to the voltage monitor and the electronic component. The safety manager may receive a voltage fault indication from the voltage monitor and, in response, may cause a change in the operating state of the electronic component. For example, when the voltage monitor detects that the input voltage from the power supply is greater than at least one of a high-frequency OV threshold or less than a low-frequency OV threshold, or the filtered input voltage is greater than a low-frequency OV threshold or less than a low-frequency UV threshold, the safety manager may perform one or more operations, such as changing the current operating state of the electronic component.
[0023] Embodiments of the present disclosure relate to a voltage monitor configured to detect a voltage fault in an input or supply voltage from a power supply to an electronic component. The voltage monitor may include a voltmeter (e.g., a voltage meter) electrically disposed between the power supply and the electronic component. In an embodiment, the voltage monitor may be included in a component different from the power supply and the electronic component, and / or may be included in a component of the power supply, the electronic component, and / or the safety manager, e.g., on an integrated circuit with the electronic component.
[0024] In an embodiment, the voltage monitor may include a low-frequency voltage error detector and a high-frequency voltage error detector, which may operate in parallel to detect low-frequency and / or high-frequency faults in the same supply voltage, but is not limited thereto.
[0025] The low-frequency voltage error detector may include a filter (e.g., a low-pass filter) for filtering the input voltage to produce a filtered input voltage. The filter may remove at least a portion of the AC noise in the supplied voltage such that a drift in the underlying voltage can be identified in the analysis of the filtered input voltage. The filtered input voltage may then pass through a comparator of the low-frequency voltage error detector, which may compare the filtered input voltage with a low-frequency UV threshold and a low-frequency OV threshold. The high-frequency voltage error detector may include a comparator configured to compare the input voltage (e.g., with or without filtering) with a high-frequency OV threshold and a high-frequency UV threshold.
[0026] The voltage monitor may be communicatively coupled to the safety manager. Once a voltage fault is detected, the voltage monitor may alert the safety manager (e.g., send a signal, message, etc.) so that the safety manager can change the operating mode of the electronic component. The voltage monitor may send information indicating the detected fault, such as the detected voltage, the exceeded threshold, the timestamp, other operating conditions, the power supply involved, and / or other information. The safety manager may store the received information and / or use the information to determine a remedial action to take (e.g., what operating mode to place the electronic component in).
[0027] In some embodiments of the present invention, at least one of a low-frequency OV threshold, a low-frequency UV threshold, a high-frequency OV threshold, or a high-frequency UV threshold is programmable or otherwise variable to allow changing the corresponding threshold based on certain configurations, hardware, layout, and / or conditions.
[0028] Accordingly, the present system and method can be configured to compare an input voltage of a power supply with two high-frequency thresholds and, after filtering to produce a filtered input signal, with a low-frequency threshold. For example, a voltage monitor can compare the input voltage with a high-frequency OV threshold, a high-frequency UV threshold, a low-frequency OV threshold (after filtering), and a low-frequency UV threshold (after filtering). By comparing the input voltage with overvoltage and undervoltage thresholds as well as high-frequency and low-frequency thresholds, various fault types can be detected while taking into account the AC noise in the input voltage. Additionally, since the voltage monitor is capable of considering both filtered and unfiltered input voltage levels simultaneously, the thresholds may not be limited, and thus the performance of the system may be improved.
[0029] Refer to Figure 1 , Figure 1 FIG. 100 is an exemplary voltage monitoring system 100 (also referred to herein as "system 100") according to some embodiments of the present invention. It should be understood that this and other arrangements described herein are presented only as examples. Other arrangements and elements (e.g., machines, interfaces, functions, sequences, function groupings, etc.) can be used in addition to or in place of the shown arrangements and elements, and some elements can be entirely omitted. Moreover, many of the elements described herein are functional entities that can be implemented as discrete or distributed components, or in combination with other components, and can be implemented in any suitable combination and location. The various functions described herein as being performed by entities can be executed by hardware, firmware, and / or software. For example, the various functions can be executed by a processor that executes instructions stored in a memory. For example, in some embodiments, system 100 can include features, functions, and / or components similar to those of Figures 7A - 7D an exemplary autonomous vehicle 700, Figure 8 an example computing device 800, and / or Figure 9 an example data center 900.
[0030] As Figure 1As shown, system 100 may generally include a computer system 102, a power supply 104, a voltage monitor 106, and a security manager 108. The power supply 104 may supply power to various electronic components 112 of the computer system 102 along one or more lines 110 (e.g., power rails). The supplied electrical power may have an associated voltage, and the voltage of the electrical power may be tested by the voltage monitor 106 to determine whether the voltage is too high and / or too low for each electronic component 112. As described herein, if the voltage exceeds an acceptable threshold, the voltage monitor 106 may send a message to or otherwise alert the security manager 108. The security manager 108 may then take any of a variety of remedial actions, including changing the operating state of the computer system 102 and / or the electronic components 112. This is because an incorrect voltage may affect the computations and other functions being performed by the computer system 102, rendering those computations and other functions untrustworthy in a safety context. Changing the operating state of the computer system 102 may include interrupting the communication between the computer system 102 and the vehicle 700 to prevent the execution of one or more computations, computations, and other functions. Thus, changing the operating state of the computer system 102 and / or the electronic components 112 may prevent such a potentially unsafe situation.
[0031] In embodiments of the present disclosure, the system may be a component of or associated with at least one of the following: a control system for an autonomous or semi-autonomous machine; a perception system for an autonomous or semi-autonomous machine; a system for performing simulation operations; a system for performing deep learning operations; a system implemented using edge devices; a system implemented using robots; a system including one or more virtual machines (VMs); a system implemented at least in part in a data center; or a system implemented at least in part using cloud computing resources.
[0032] The computer system 102 may be the computing system 800 in the autonomous vehicle 700, as shown and described with respect to Figures 7A - 7D The computer system 102 may control any of a variety of safety-related functions, such as functions, methods, or processes upon which the safe operation of the machine depends. For example, an autonomous vehicle 700 operating autonomously may include a computer system 102 that makes a large number of observations of surrounding obstacles and determines a large number of actions for the vehicle to take to avoid those obstacles. Such autonomous control is an example of a safety-related function because the safety of the vehicle and any passengers depends on the correct identification and avoidance of obstacles.
[0033] The computer system 102 may include one or more electronic components 112. As a non-limiting example, Figure 1Depicts four electronic components 112. However, embodiments of the present invention may include more or fewer electronic components 112. The electronic components 112 may perform one or more security-related functions for the system 100 or the computer system 102. In an embodiment, the electronic components 112 may be independent of the computer system 102, may be a component of the computer system 102, and / or may be integral to the computer system 102.
[0034] The electronic components 112 may be any of a variety of hardware components that receive power from the power supply 104. For example, in some embodiments of the present invention, as described with respect to Figure 7C and 8 described, the electronic components 112 may include at least one of a processor or a system-on-chip (SoC), such as CPU 706, CPU 718, CPU 806, GPU 708, GPU 720, GPU 808, SoC704A, SoC 704B, a data processing unit (DPU), a tensor processing unit (TPU), a vector processing unit (VPU), etc. As another example, in some embodiments of the present disclosure, the electronic components 112 may be Figures 7A - 7D any of the components shown in FIGS. 8 and / or 9; or any combination of such components.
[0035] The power supply 104 may be electrically coupled to an electrical load that directly or indirectly includes the electronic components 112. The power supply 104 may be the power supply 816 discussed herein or another power supply type, and the power supply 104 may convert or otherwise change the power into the voltage, current, frequency, or other characteristics required by the electrical load. The power supply may be a battery, an internal combustion engine, and / or other power supply types. In some embodiments, the power supply 104 may include separate components (as shown in Figure 1 ), while in other embodiments, the power supply 104 may be a component of the computer system 102 – for example, built into the same integrated circuit. The power supply 104 may be connected to the electronic components 112 by one or more lines 110 such that power (e.g., in the form of electrons) may flow from the power supply 104 to the electronic components 112.
[0036] In some embodiments, power supply 104 may include a switch-mode power supply 114 (SMPS) and / or a linear power supply 116 (LPS). In an embodiment, the first power supply is the switch-mode power supply 114 and the second power supply is the linear power supply 116. The power supply may be configured otherwise, such as multiple SMPSs 114, multiple LPSs 116, or other combinations. In an embodiment, system 100 includes a first power supply 104 electrically coupled to a first electronic component 112 and a second power supply 104 electrically coupled to a second electronic component 112 – for example, to provide another input voltage to the second electronic component 112. In some embodiments, the input voltage from the second power supply 104 to the second electronic component 112 may be the same as or different from the first input voltage.
[0037] The switch-mode power supply 114 is a type of power supply 104 that uses semiconductors as on / off switches (instead of a continuously variable resistor) to provide voltage. The SMPS 114 may include a driver / controller 118, an external compensation network 120, an inductor 122, a capacitor 124, and / or other components. The driver / controller 118 ideally switches lossless storage elements, such as the inductor 122 and the capacitor 124. Although the inductor 122 and the capacitor 124 may have losses, the losses can be reduced compared to the LPS 116 discussed herein. The external compensation network 120 may regulate the output voltage, and as an example, the external compensation network 120 may be a type I, type II, or type III feedback amplifier network.
[0038] The linear power supply 116 may use a linear voltage regulator to provide an output voltage by consuming excess power (e.g., in a resistor or as heat). The excess voltage (e.g., the difference between the voltage input to the LPS 116 from the power supply and the voltage output) may be lost or wasted.
[0039] The power supply 104 may provide the input voltage at the level required by the electronic component 112. The input voltage is depicted as the voltage drain (VD) at the electronic component 112. In an embodiment, various electronic components 112 may require a unique input voltage and have a unique acceptable threshold for such input voltage. Thus, the power supply 104 may provide many different input voltages to the respective electronic components 112 – for example, as Figure 1 shown, using different lines 110 (e.g., power rails) to provide different input voltages to different electronic components 112. The line 110 may include a split 126 that directs the input voltage to a voltage monitor 106 for voltage testing. The line 110 may also include one or more capacitors 128 after the split 126 for storing excess charge. Figure 1
[0040] The voltage monitor 106 may be arranged along the partition 126 to receive an input voltage at the input 130. In an embodiment, the voltage monitor 106 may be arranged between the power supply 104 and the electronic component 112 and may include an output 132 configured to report a detected voltage error to the security manager 108. The security manager 108 may also include an output 134 configured to change the operating state of the electronic component 112 (which may include a change in the operating state of the entire computer system 100) in response to the detected voltage error, as described herein, for example, by disabling external communication and / or shutting down the power of the computer system 100 to place the entire computer system 100 in a secure state.
[0041] The voltage monitor 106 may be a component of, or associated with, an autonomous or semi-autonomous machine control system; a sensing system of an autonomous or semi-autonomous machine; a system for performing analog operations; a system for performing deep learning operations; a system implemented using edge devices; a system implemented using robots; a system including one or more virtual machines (VMs); a system implemented at least in part in a data center; or a system implemented at least in part using cloud computing resources. Figures 7A - 9 Some examples of such systems are shown and discussed herein.
[0042] Turning to Figure 2 , the voltage monitor 106 may include a voltage monitor chip 200 configured to receive an input voltage at one or more input lines 202 (e.g., power rails) and a controller 204 for processing the detected voltage error and alerting the security manager 108, as Figure 1 shown. The voltage monitor 106 may include a low-frequency voltage error detector 206 and a high-frequency voltage error detector 208, and the input voltage may be divided between the low-frequency voltage error detector 206 and the high-frequency voltage error detector 208.
[0043] The voltage monitor 106 may include various circuits (as described herein) to receive the input voltage from the power supply 104 electrically coupled to the electronic component 112 and compare the input voltage with one or more thresholds using the low-frequency voltage error detector and the high-frequency voltage error detector. More specifically, the voltage monitor 106 may use the high-frequency voltage error detector to compare the input voltage with at least one of a high-frequency overvoltage (OV) threshold or a high-frequency undervoltage (UV) threshold; a filter that uses the low-frequency voltage error detector to produce a filtered input voltage of the input voltage; and use the low-frequency voltage error detector to compare the filtered voltage with at least one of a low-frequency OV threshold or a low-frequency UV threshold.
[0044] The low-frequency voltage error detector may include a low-pass filter 210 and a comparator 212, and the comparator 212 is associated with an under-voltage (UV) threshold 214 and an over-voltage (OV) threshold 216. The low-pass filter 210 may filter at least a portion of the input voltage to generate a filtered input voltage. For example, the low-pass filter 210 may remove at least a portion of the noise from the input voltage (e.g., from the alternating current noise in the input voltage) to generate a filtered input voltage. The low-pass filter 210 may allow signals having frequencies below a specific cut-off frequency to pass through and / or attenuate signals having frequencies above the cut-off frequency. Examples of low-pass filters may include resistor-capacitor filters (RC filters), resistor-inductor filters (RL filters), resistor-inductor-capacitor filters (RLC filters), higher-order passive filters, active low-pass filters, and / or other types of filters. After passing through the low-pass filter 210, the comparator 212 may compare the filtered input voltage with the low-frequency UV threshold 214 and the low-frequency OV threshold 216.
[0045] An illustration of the low-frequency voltage error detector is as Figure 3A shown. Figure 3A It includes a voltage axis (as the y-axis) and a time axis (as the x-axis). The regulator nominal voltage (V nom ) line is arranged at a specific voltage level (e.g., Figure 3A at the level in), and the V nom plus regulator tolerance line is arranged above the V nom line. Associated with the V nom plus regulator tolerance line is the low-frequency OV threshold. Arranged below the V nom line is the V nom minus regulator tolerance line. Associated with the V nom minus regulator tolerance line is the low-frequency UV threshold. In some embodiments, as Figure 3A shown, the low-frequency OV threshold may not be associated with the V nom plus regulator tolerance, and the low-frequency threshold may not be associated with the V nom minus regulator tolerance. Two example unfiltered voltage readings (one close to the OV threshold and one close to the UV threshold) are shown as example voltage readings. In the absence of a low-pass filter, the low-frequency voltage error detector may return false positive results, and the low-pass filter removes the Figure 3A variations shown in, such that voltage up or down drifts can be detected regardless of the variations.
[0046] The high-frequency voltage error detector may include a comparator 218 configured to compare an input voltage (e.g., filtered or unfiltered) with a high-frequency UV threshold 220 and a high-frequency OV threshold 222. The comparator 218 is similar to the comparator 212 of the low-frequency voltage error detector and may be a device that compares an input voltage with corresponding thresholds. The comparator 218 performs 1-bit quantization essentially as an analog-to-digital converter. Thus, a first comparator may be used to perform the comparison of the input voltage, and a second comparator may be used to perform the comparison of the filtered input voltage, where each comparator is associated with a different threshold.
[0047] In some embodiments of the present invention, at least one of the high-frequency OV threshold 222, the high-frequency UV threshold 220, the low-frequency OV threshold 216, and the low-frequency UV threshold 214 is programmable. Each threshold may be programmed by the controller 204 or other external computer systems. In other embodiments of the present disclosure, one or more thresholds may be static.
[0048] A graphical representation of the high-frequency voltage error detector is as Figure 3B shown. Figure 3B including a voltage axis (as the y-axis) and a time axis (as the x-axis). In one or more embodiments, the regulator nominal voltage (V nom ) line is arranged at a specific voltage level (e.g., Figure 3A at the horizontal in). As shown, the V nom plus regulator tolerance line is arranged above the V nom line, and the high-frequency OV threshold is arranged above the V nom plus regulator tolerance line. As shown, the V nom minus regulator tolerance line is arranged below the V nom line, and the high-frequency UV threshold is arranged below the V nom line. Two example voltage readings (one close to the OV threshold and one close to the UV threshold) are shown as example voltage readings. The settings of the OV threshold and the UV threshold should ensure that the natural and acceptable noise in the supply voltage does not exceed the corresponding thresholds.
[0049] The voltage monitor 106 may include an OR gate 224 that passes the detected voltage error (e.g., a voltage exceeding one of the thresholds) to the controller 204. It should be understood that the OR gate 224 may be implemented as a physical hardware component and / or a logic circuit. Similarly, each of the low-frequency voltage error detector 206 and the high-frequency voltage error detector 208 may include an OR gate from their respective UV thresholds and OV thresholds (not shown), which may also be implemented as a physical hardware component and / or a logic circuit.
[0050] A graphical representation of the OR gate 224 identifies a voltage error through the high-frequency voltage error detector or the low-frequency voltage error detector, as Figure 4as shown Figure 4 such as Figure 3A and 3B also include a voltage axis (as the y-axis) and a time axis (as the x-axis). In one or more embodiments, the regulator nominal voltage (V nom ) line is arranged at a specific voltage level (e.g., Figure 3A at the horizontal level in). As shown in the figure, the V nom plus regulator tolerance line is arranged above the V nom line, and the V nom minus regulator tolerance line is arranged below the V nom line. Four total threshold lines are also depicted. From top to bottom, as Figure 4 shown, these threshold lines are the high-frequency OV threshold, the low-frequency OV threshold, the low-frequency UV threshold, and the high-frequency UV threshold.
[0051] Two example unfiltered voltage readings (one near the V nom plus regulator tolerance line and one near the V nom minus regulator tolerance line) are shown as example voltage readings. The unfiltered voltage readings are compared with the high-frequency OV threshold and the high-frequency UV threshold. The filtered voltage (not shown) is compared with the low-frequency OV threshold and the low-frequency UV threshold. Therefore, the high-frequency OV threshold and the high-frequency UV threshold can identify instantaneous faults in the fluctuating unfiltered voltage, and the low-frequency OV threshold and the low-frequency UV threshold can identify progressive faults in the filtered voltage, enhancing stability.
[0052] The voltage monitor 106 may include an output 226, which is configured to send a voltage error indication to the safety manager 108. When a voltage error is detected based on the input voltage being greater than the high-frequency OV threshold or less than the high-frequency UV threshold or the filtered input voltage being greater than the low-frequency OV threshold or less than the low-frequency UV threshold, the voltage monitor 106 can indicate a voltage error to the safety manager 108 of the system 100. In other embodiments, the voltage monitor 106 may perform one or more functions of the safety manager 108, such as changing the operating state of the electronic component 112.
[0053] Returning to Figure 1 , the safety manager 108 may be a microcontroller or other processing element, such as the logic unit 820. In an embodiment, the safety manager 108 may be a component different from the computer system 102, such that it can monitor and control the operation of the computer system 102 without being affected by any potential error voltages. The safety manager 108 may configure the voltage monitor 106, for example, by setting and / or reprogramming one or more thresholds discussed herein. The safety manager 108 may monitor the voltage monitor 106, for example, by reading through an interface such as an internal integrated circuit (I 2Faults discovered by the interface of (C) (e.g., in an embodiment, it may be located within the security manager 108 and the voltage monitor 106, or may be a component of the security manager 108 and / or the voltage monitor 106). In other embodiments, the security manager 108 may be a component of the computer system 102, a component of the SoC, a component of the power supply 104, etc. The security manager 108 may be communicatively coupled directly or indirectly to the voltage monitor 106 and / or the electronic component 112. In some embodiments, the security manager 108 detects a voltage error at the voltage monitor 106 without any direct communication from the voltage monitor 106. In these embodiments, the voltage monitor 106 may be referred to as a passive voltage monitor. In other embodiments, the security manager 108 may receive a message from the voltage monitor 106 indicating a voltage error. The message may contain information related to the electronic component 112 associated with the voltage error, an exceeded specific threshold, the current voltage level, the amount above or below the corresponding threshold, the duration of the voltage error, the timestamp of the voltage error, the critical level, or other information indicating the electronic component 112, or other information. In these embodiments, the voltage monitor 106 may be referred to as an active voltage monitor. In any embodiment, an indication of a voltage error may cause a change in at least one electronic component 112 communicatively coupled to the security manager 108.
[0054] The security manager 108 may be configured to cause a change in the operating state of the electronic component 112 when the voltage monitor 106 detects that the input voltage from the power supply 104 is greater than at least one of the high-frequency OV threshold or less than the low-frequency OV threshold, or the filtered input voltage is greater than the low-frequency OV threshold or less than the low-frequency UV threshold. The operating state may be specific to the electronic component 112, the computer system 102, or the vehicle 700 (or other machine).
[0055] Now refer to Figure 5 and 6 , each block of the methods 500 and 600 described herein includes a computational process that can be performed using any combination of hardware, firmware, and / or software. For example, various functions may be performed by a processor executing instructions stored in a memory. The methods 500 and 600 may also be embodied as computer-usable instructions stored on a computer storage medium. The methods 500 and 600 may be provided by a stand-alone application, a service, or a hosted service (stand-alone or in combination with another hosted service), or a plug-in of another product, to name a few. Additionally, as an example, the methods 500 and 600 are described for the system 100 of Figure 1 and / or Figure 2 the voltage monitor 106 of
[0056] Now refer to Figure 5 , Figure 5 which is a flowchart showing a method 500 for monitoring the voltage supplied to an electronic component 112 according to some embodiments of the present invention. At block B502, method 500 includes supplying an input voltage to the electronic component 112 using a power supply 104. The electronic component 112 may include at least one of a processor or a system-on-chip (SoC). The power supply 104 may be a switched-mode power supply 114, which includes some alternating current (AC) noise and / or fluctuations in the input voltage.
[0057] At block B504, method 500 includes comparing the input voltage with at least one of a high-frequency overvoltage (OV) threshold or a high-frequency undervoltage (UV) threshold using a high-frequency voltage error detector. The high-frequency voltage error detector detects a voltage error in the AC noise fluctuations.
[0058] At block 506, method 500 includes filtering the input voltage using a low-pass filter of a low-frequency voltage error detector to produce a filtered input voltage. The low-pass filter may remove at least a portion of the AC noise from the input voltage to produce the filtered input voltage.
[0059] At block 508, method 500 includes comparing the filtered voltage with at least one of a low-frequency OV threshold or a low-frequency UV threshold using a low-frequency voltage error detector. The low-frequency voltage error detector detects a voltage error in the steady drift of the substantially filtered voltage. In some embodiments, the high-frequency voltage error detector and the low-frequency error detector may be arranged in parallel. In these embodiments, the operations of comparing using the high-frequency voltage error detector and the operations of comparing using the low-frequency voltage error detector may be performed at least partially simultaneously.
[0060] At block 510, method 500 includes using a security manager 108 to determine: a voltage error based on at least one of the input voltage being greater than the high-frequency OV threshold or less than the high-frequency UV threshold or the filtered input voltage being greater than the low-frequency OV threshold or less than the low-frequency UV threshold.
[0061] At block 512, method 500 includes changing the operating mode of the electronic component 112 at least partially based on the determined voltage error. This change may exit the safety program, thereby making it less likely that the voltage error will cause an unsafe situation in a vehicle or other machine.
[0062] Refer to Figure 6 , Figure 6is a flowchart showing a method 600 for monitoring the voltage supplied to an electronic component 112, according to some embodiments of the present invention. At block 602, method 600 includes receiving an input voltage from a power supply 104 that is electrically coupled to the electronic component 112. The power supply 104 also provides the input voltage to the electronic component 112.
[0063] At block 604, method 600 includes comparing the input voltage with at least one of a high-frequency overvoltage (OV) threshold or a high-frequency undervoltage (UV) threshold using a high-frequency voltage error detector.
[0064] At block 606, method 600 includes filtering the input voltage using a low-frequency voltage error detector to produce a filtered input voltage.
[0065] Method 600, at block 608, includes comparing the filtered voltage with at least one of a low-frequency OV threshold or a low-frequency UV threshold using a low-frequency voltage error detector.
[0066] At block 610, method 600 includes indicating the voltage error to a safety manager. For example, when a voltage error is detected based on at least one of the input voltage being greater than the high-frequency OV threshold or less than the high-frequency UV threshold or the filtered input voltage being greater than the low-frequency OV threshold or less than the low-frequency UV threshold, the voltage error can be indicated to the safety manager 108 of the system 100 such that the safety manager 108 can take any of a variety of remedial actions, such as changing the operating state of the electronic component 112 that supplies the input voltage to it.
[0067] Autonomous vehicle example
[0068] Figure 7AFIG. 0 is an illustration of an exemplary autonomous vehicle 700 in accordance with some embodiments of the present invention. An autonomous vehicle 700 (or referred to herein as “vehicle 700”) may include, but is not limited to, a passenger vehicle such as an automobile, a truck, a bus, a first response vehicle, a shuttle vehicle, an electric or motorized bicycle, a motorcycle, a fire truck, a police car, an ambulance, a boat, a construction vehicle, an underwater vehicle, a drone, a vehicle coupled to a trailer, and / or other types of transportation (e.g., unmanned and / or accommodating one or more passengers). Autonomous vehicles are generally described in terms of levels of automation, defined by the National Highway Traffic Safety Administration (NHTSA) under the U.S. Department of Transportation, and the Society of Automotive Engineers (SAE) “Taxonomy and Definitions for Terms Related to Driving Automation Systems for On-Road Motor Vehicles” (Standard No.: J3016-201806, issued on June 15, 2018, Standard No.: J3016-201609, issued on September 30, 2016, and prior and future versions of this standard). Vehicle 700 may implement functions according to one or more of levels 3 to 5 of the autonomous driving level. For example, according to an embodiment, vehicle 700 may have conditional automation (level 3), high automation (level 4), and / or full automation (level 5).
[0069] Vehicle 700 may include a chassis, a body, wheels (e.g., 2, 4, 6, 8, 18, etc.), tires, axles, and other components of the vehicle. Vehicle 700 may include a propulsion system 750 such as an internal combustion engine, a hybrid power plant, an all-electric motor, and / or other types of propulsion systems. Propulsion system 750 may be connected to the driveline of vehicle 700, which may include a transmission to effect the propulsion of vehicle 700. Propulsion system 750 may be controlled in response to receiving a signal from throttle / accelerator 752.
[0070] When propulsion system 750 is operating (e.g., when the vehicle is in motion), a steering system 754 including a steering wheel may be used to guide vehicle 700 (e.g., along a desired path or route). Steering system 754 may receive a signal from steering actuator 756. For fully autonomous (level 5) functions, the steering wheel may be optional.
[0071] A brake sensor system 746 may be used to operate vehicle brakes in response to signals received from brake actuator 748 and / or brake sensors.
[0072] One or more controllers 736 may include one or more system-on-chips (SoCs) 704( Figure 7C) and / or one or more GPUs, may provide signals (e.g., representative of commands) to one or more components and / or systems of vehicle 700. For example, one or more controllers may send signals through one or more brake actuators 748 to operate vehicle brakes, operate steering system 754 through one or more steering actuators 756, and operate propulsion system 750 through one or more throttle / accelerators 752. One or more controllers 736 may include one or more on-vehicle (e.g., integrated) computing devices (e.g., supercomputers) that process sensor signals and output operation commands (e.g., signals representative of commands) to enable autonomous driving and / or assist a human driver in driving vehicle 700. One or more controllers 736 may include a first controller 736 for autonomous driving functions, a second controller 736 for functional safety functions, a third controller 736 for artificial intelligence functions (e.g., computer vision), a fourth controller 736 for infotainment functions, a fifth controller 736 for redundancy in emergency situations, and / or other controllers. In some examples, a single controller 736 may handle two or more of the above functions, and two or more controllers 736 may handle a single function and / or any combination thereof.
[0073] One or more controllers 736 may provide signals for controlling one or more components and / or systems of vehicle 700 in response to sensor data (e.g., sensor inputs) received from one or more sensors. Sensor data may be received from, for example but not limited to, one or more global navigation satellite system sensors 758 (e.g., one or more global positioning system sensors), one or more radar sensors 760, one or more ultrasonic sensors 762, one or more lidar sensors 764, one or more inertial measurement unit (IMU) sensors 766 (e.g., one or more accelerometers, one or more gyroscopes, one or more magnetic compasses, magnetometers, etc.), one or more microphones 796, one or more stereo cameras 768, one or more wide-angle cameras 770 (such as fish-eye cameras), one or more infrared cameras 772, one or more surround cameras 774 (such as 360-degree cameras), one or more remote and / or mid-range cameras 798, one or more speed sensors 744 (such as for measuring the speed of vehicle 700), one or more vibration sensors 742, one or more steering sensors 740, one or more brake sensors (e.g., as part of brake sensor system 746), and / or other sensor types.
[0074] One or more of the controllers 736 may receive inputs (e.g., represented by input data) from the instrument cluster 732 of the vehicle 700 and provide outputs (e.g., represented by output data, display data, etc.) via the human machine interface (HMI) display 734, audio annunciator, speaker, etc. and / or via other components of the vehicle 700. The outputs may include information such as vehicle speed, rate, time, map data (e.g., Figure 7C HD map 722), location data (e.g., the location of the vehicle 700, e.g., a location on a map), direction, the location of other vehicles (e.g., occupancy grid), etc., information about objects and object states sensed by one or more of the controllers 736, etc. For example, the HMI display 734 may display information about the presence of one or more objects (e.g., street signs, warning signs, traffic light changes, etc.) and / or information about driving operations that the vehicle has performed, is performing, or will perform (e.g., changing lanes now, exiting at exit 34B in two miles, etc.).
[0075] The vehicle 700 also includes a network interface 724 that may communicate via one or more networks using one or more wireless antennas 726 and / or a modem. For example, the network interface 724 may be capable of communicating via LTE, WCDMA, UMTS, GSM, CDMA2000, etc. One or more of the wireless antennas 726 may also enable communication between objects (e.g., vehicles, mobile devices, etc.) in the environment using one or more local area networks (e.g., Bluetooth, Bluetooth LE, Z - wave, ZigBee, etc.) and / or low - power wide - area networks (LPWAN), such as LoRaWAN, SigFox, etc.
[0076] Figure 7B is an example of the camera positions and fields of view of an exemplary autonomous vehicle 700 in accordance with some embodiments of the present invention Figure 7A The cameras and respective fields of view are an example embodiment and are not intended to be limiting. For example, additional and / or alternative cameras may be included and / or the cameras may be located at different positions on the vehicle 700.
[0077] The camera type of the camera may include, but is not limited to, a digital camera, and the camera may be applicable to components and / or systems of the vehicle 700. One or more cameras may operate at an Automotive Safety Integrity Level (ASIL) B and / or other ASILs. According to embodiments, the camera type may have any image capture rate, such as 60 frames per second (fps), 120 frames, 240 frames, etc. The camera may use a rolling shutter, a global shutter, another type of shutter, or a combination thereof. In some examples, the color filter array may include a red clear (RCCC) color filter array, a red clear blue (RCCB) color filter array, a red blue green clear (RBGC) color filter array, a Foveon X3 color filter array, a Bayer sensor (RGGB) color filter array, a monochrome sensor color filter array, and / or other types of color filter arrays. In some embodiments, a clear pixel camera, such as a camera having an RCCC, RCCB, and / or RBGC color filter array, may be used to strive to improve light sensitivity.
[0078] In some examples, one or more cameras may be used to perform Advanced Driver Assistance System (ADAS) functions (e.g., as part of a redundant or fail-safe design). For example, a multi-functional single camera may be installed to provide functions such as lane departure warning, traffic sign assistance, and intelligent headlight control. One or more cameras (e.g., all cameras) may simultaneously record and provide image data (e.g., video).
[0079] One or more cameras may be installed in a mounting assembly, such as a custom-designed (3D printed) assembly, to cut off stray light and in-vehicle reflections (e.g., dashboard reflections reflected by the windshield rearview mirror) that may interfere with the camera's image data capture ability. Regarding the wing mirror mounting assembly, the wing mirror assembly may be custom 3D printed so that the camera mounting plate matches the shape of the wing mirror. In some examples, one or more cameras may be integrated into the wing rearview mirror. For side view cameras, one or more cameras may also be integrated within the four pillars at each corner of the cab.
[0080] A camera having a field of view including a portion of the environment in front of the vehicle 700 (e.g., a front camera) may be used for surround view to help identify the forward path and obstacles, and, with the help of one or more controllers 736 and / or a control SOC, assist in providing information crucial for generating an occupancy grid and / or determining a preferred vehicle path. The front camera may be used to perform many of the same ADAS functions as lidar, including emergency braking, pedestrian detection, and collision avoidance. The forward camera may also be used for ADAS functions and systems, including lane departure warning (“LDW”), adaptive cruise control (“ACC”), and / or other functions such as traffic sign recognition.
[0081] A variety of cameras can be used in a front-facing configuration, including, for example, a monocular camera platform including a CMOS (Complementary Metal Oxide Semiconductor) color imager. Another example could be a wide-angle camera 770 that can be used to sense objects entering the field of view from the periphery (e.g., pedestrians, cross traffic, or bicycles). Although Figure 7B only one wide-angle camera is shown in , any number of wide-angle cameras 770 may be present on the vehicle 700. Additionally, one or more remote cameras 798 (e.g., a long-range stereo camera pair) can be used for depth-based object detection, particularly for objects for which a neural network has not been trained. One or more remote cameras 798 can also be used for object detection and classification as well as basic object tracking.
[0082] One or more stereo cameras 768 can also be included in the front-facing configuration. One or more stereo cameras 768 can include an integrated control unit that includes a scalable processing unit that can provide programmable logic (FPGA) and a multi-core microprocessor with an integrated CAN or Ethernet interface on a single chip. This unit can be used to generate a three-dimensional map of the vehicle environment, including distance estimates for all points in the image. One or more alternative stereo cameras 768 can include a compact stereo vision sensor that can include two camera lenses (one left and one right) and an image processing chip that can measure the distance from the vehicle to a target object and use the generated information (e.g., metadata) to activate automatic emergency braking and lane departure warning functions. In addition to the stereo cameras described herein, or alternatively, other types of stereo cameras 768 can be used.
[0083] Cameras having a field of view that includes a portion of the vehicle 700's side environment (e.g., side-view cameras) can be used for surround view, providing information for creating and updating an occupancy grid as well as generating side collision warnings. For example, one or more surround cameras 774 (e.g., four surround cameras 774 as Figure 7B shown) can be positioned on the vehicle 700. One or more surround cameras 774 can include one or more wide-angle cameras 770, one or more fish-eye cameras, one or more 360-degree cameras, etc. For example, four fish-eye cameras can be located at the front, rear, and sides of the vehicle. In an alternative arrangement, the vehicle can use three surround cameras 774 (e.g., left, right, and rear) and can utilize one or more other cameras (e.g., a front-facing camera) as the fourth surround view camera.
[0084] A camera (e.g., a rear-view camera) having a field of view that includes a rear environment portion of the vehicle 700 can be used for parking assistance, surround view, rear-end collision warning, and creating and updating an occupancy grid. A variety of cameras can be used, including but not limited to cameras that are also suitable as front cameras (e.g., one or more long-range and / or mid-range cameras 798, one or more stereo cameras 768, one or more infrared cameras 772, etc.), as described herein.
[0085] Figure 7C is of some embodiments of the present invention Figure 7A block diagram of an exemplary system architecture of an exemplary autonomous vehicle 700. It should be understood that this and other arrangements described herein are presented only as examples. In addition to the arrangements and elements shown, other arrangements and elements (e.g., machines, interfaces, functions, sequences, function groupings, etc.) can be used, or the shown arrangements and elements can be replaced with other arrangements and elements, and some elements can be omitted entirely. Moreover, many of the elements described herein are functional entities that can be implemented as discrete or distributed components, or in combination with other components, and can be implemented in any suitable combination and location. The various functions described herein as being performed by entities can be performed by hardware, firmware, and / or software. For example, the various functions can be performed by a processor executing instructions stored in a memory.
[0086] Figure 7C Each component, feature, and system of the vehicle 700 in is connected via a bus 702. The bus 702 can include a Controller Area Network (CAN) data interface (also referred to herein as the "CAN bus"). CAN can be a network within the vehicle 700 that helps control various features and functions of the vehicle 700, such as the actuation of brakes, acceleration, braking, steering, windshield wipers, etc. The CAN bus can be configured to have dozens or even hundreds of nodes, each with its own unique identifier (e.g., CAN ID). The CAN bus can be read to find the steering wheel angle, ground speed, revolutions per minute (RPM) of the engine, button positions, and / or other vehicle status indicators. The CAN bus can comply with the ASIL B standard.
[0087] Although bus 702 is described herein as a CAN bus, this is not intended to be limiting. For example, in addition to, or instead of, a CAN bus, FlexRay and / or Ethernet can be used. Further, although a single line is used to represent bus 702, this is not intended to be limiting. For example, any number of buses 702 can be present, which can include one or more CAN buses, one or more FlexRay buses, one or more Ethernet buses, and / or one or more other types of buses using different protocols. In some examples, two or more buses 702 can be used to perform different functions and / or can be used for redundancy. For example, a first bus 702 can be used for collision avoidance functions and a second bus 702 can be used for drive control. In any example, each bus 702 can communicate with any component of vehicle 700, and two or more buses 702 can communicate with the same component. In some examples, each SoC 704, each controller 736, and / or each computer within the vehicle can access the same input data (e.g., input from sensors of vehicle 700) and can be connected to a common bus, such as a CAN bus.
[0088] Vehicle 700 can include one or more controllers 736, such as the controller described herein with respect to Figure 7A the controller. The controller 736 can be used for various functions. One or more controllers 736 can be coupled to any one of the various other components and systems of vehicle 700 and can be used to control vehicle 700, the artificial intelligence of vehicle 700, the infotainment of vehicle 700, etc.
[0089] Vehicle 700 can include one or more system-on-chips (SoCs) 704. The SoC 704 can include one or more CPUs 706, one or more GPUs 708, one or more processors 710, one or more caches 712, one or more accelerators 714, one or more data stores 716, and / or other components and features not shown. One or more SoCs 704 can be used to control vehicle 700 in various platforms and systems. For example, one or more SoCs 704 can be combined with an HD map 722 in a system (e.g., a system of vehicle 700), and the HD map 722 can obtain map refreshes and / or updates from one or more servers (e.g., Figure 7D server 778) via a network interface 724.
[0090] One or more CPUs 706 may include a CPU cluster or CPU complex (or referred to herein as "CCPLEX"). One or more CPUs 706 may include multiple cores and / or secondary caches. For example, in some embodiments, one or more CPUs 706 may include eight cores in a coherent multi-processor configuration. In some embodiments, one or more CPUs 706 may include four dual-core clusters, each with a dedicated secondary cache (e.g., 2MB secondary cache). One or more CPUs 706 (e.g., CCPLEX) may be configured to support simultaneous cluster operation such that any combination of the clusters of CPUs 706 is active at any given time.
[0091] One or more CPUs 706 may implement power management capabilities including one or more of the following: a single hardware block may be automatically clock-gated when idle to save dynamic power; each core clock may be gated when the core is not actively executing instructions due to execution of WFI / WFE instructions; each core may be independently power-gated; each core cluster may be independently clock-gated when all cores are clock-gated or power-gated; and / or each core cluster may be independently power-gated when all cores are power-gated. One or more CPUs 706 may further implement an enhanced algorithm for managing power states, where allowed power states and expected wake-up times are specified, and the hardware / microcode determines the optimal power state to enter for cores, clusters, and CCPLEX. The processing cores may support a simplified power state input sequence in software and offload the work to the microcode.
[0092] One or more GPUs 708 may include an integrated GPU (or referred to herein as "iGPU"). The GPU 708 may be programmable and may be efficient for parallel workloads. In some examples, one or more GPUs 708 may use an enhanced tensor instruction set. One or more GPUs 708 may include one or more streaming microprocessors, where each streaming microprocessor may include a level-1 cache (e.g., a level-1 cache with a storage capacity of at least 96KB), and two or more streaming microprocessors may share a level-2 cache (e.g., a level-2 cache with a storage capacity of 512KB). In some embodiments, one or more GPUs 708 may include at least eight streaming microprocessors. One or more GPUs 708 may use one or more computing application programming interfaces (APIs). Additionally, one or more GPUs 708 may use one or more parallel computing platforms and / or programming models (e.g., NVIDIA's CUDA).
[0093] One or more GPUs 708 may be power optimized to achieve optimal performance in automotive and embedded use cases. For example, one or more GPUs 708 may be fabricated on fin field-effect transistors (FinFETs). However, this is not intended to be limiting, and other semiconductor manufacturing processes may be used to fabricate one or more GPUs 708. Each streaming microprocessor may incorporate multiple hybrid-precision processing cores divided into multiple blocks. For example, but not limited to, 64 PF32 cores and 32 PF64 cores may be partitioned into four processing blocks. In such an example, 16 FP32 cores, 8 FP64 cores, 16 INT32 cores, two hybrid-precision NVIDIA tensor cores for deep learning matrix algorithms, an L0 instruction cache, a warp scheduler, a dispatch unit, and / or a 64KB register file may be allocated to each processing block. Additionally, the streaming microprocessor may include independent parallel integer and floating-point data paths to provide efficient execution of workloads through hybrid computing and addressing computations. The streaming microprocessor may include independent thread scheduling capabilities to enable finer-grained synchronization and cooperation among parallel threads. The streaming microprocessor may include a combined level-1 data cache and shared memory unit to improve performance while simplifying programming.
[0094] One or more GPUs 708 may include high-bandwidth memory (HBM) and / or a 16GB HBM2 memory subsystem to provide a peak memory bandwidth of approximately 900GB / second in some examples. In some examples, synchronous graphics random access memory (SGRAM), such as fifth-generation graphics double data rate synchronous random access memory (GDDR5), may be used in addition to or alternatively to HBM memory.
[0095] GPU 708 may include unified memory technology that includes access counters to allow more accurate migration of memory pages to the processors that access them most frequently, thereby improving the efficiency of sharing memory ranges among processors. In some examples, address translation service (ATS) support may be used to allow one or more GPUs 708 to directly access the page tables of one or more CPUs 706. In such an example, when a memory management unit (MMU) of one or more GPUs 708 experiences a miss, an address translation request may be sent to one or more CPUs 706. In response, one or more CPUs 706 may look up the virtual-to-physical mapping of the address in their page tables and send the translation back to one or more GPUs 708. Thus, the unified memory technology may allow a single unified virtual address space for the memory of both one or more CPUs 706 and one or more GPUs 708, thereby simplifying programming for one or more GPUs 708 and porting applications to one or more GPUs 708.
[0096] In addition, one or more GPUs 708 may include an access counter that may track the frequency of access by the one or more GPUs 708 to the memory of other processors. The access counter may help ensure that memory pages are moved into the physical memory of the processor that accesses the pages most frequently.
[0097] One or more SoCs 704 may include any number of caches 712, including the caches 712 described herein. For example, one or more caches 712 may include an L3 cache that is available to both one or more CPUs 706 and one or more GPUs 708 (e.g., connecting both the one or more CPUs 706 and the one or more GPUs 708). The cache 712 may include a write-back cache that may track the state of the lines, e.g., by using a cache coherence protocol (e.g., MEI, MESI, MSI, etc.). Although smaller cache sizes may be used, according to an embodiment, the L3 cache may include 4MB or more.
[0098] One or more SoCs 704 may include one or more arithmetic logic units (ALUs) that may be used to perform processing related to various tasks or operations of the vehicle 700, such as processing DNNs. In addition, one or more SoCs 704 may include one or more floating-point units (FPUs) or other math co-processors or digital co-processor types for performing mathematical operations within the system. For example, one or more SoCs 104 may include one or more FPUs integrated as execution units within the CPU 706 and / or GPU 708.
[0099] One or more SoCs 704 may include one or more accelerators 714 (e.g., hardware accelerators, software accelerators, or a combination thereof). For example, one or more SoCs 704 may include a hardware acceleration cluster that may include optimized hardware accelerators and / or large on-chip memories. The large on-chip memory (e.g., 4MB of SRAM) may enable the hardware acceleration cluster to accelerate neural networks and other computations. The hardware acceleration cluster may be used to supplement the one or more GPUs 708 and offload some tasks of the one or more GPUs 708 (e.g., freeing up more cycles of the one or more GPUs 708 to perform other tasks). For example, one or more accelerators 714 may be used for target workloads (e.g., perception, convolutional neural networks (CNNs), etc.) that are stable enough to be suitable for acceleration. The term "CNN" as used herein may include all types of CNNs, including region-based or region convolutional neural networks (RCNNs) and fast RCNNs (e.g., for object detection).
[0100] One or more accelerators 714 (e.g., a hardware acceleration cluster) may include one or more deep learning accelerators (DLAs). One or more DLAs may include one or more tensor processing units (TPUs), which may be configured to provide an additional 10 trillion operations per second for deep learning applications and inference. The TPU may be an accelerator configured to perform and optimized for image processing functions (e.g., for CNN, RCNN, etc.). One or more DLAs may also be optimized for specific neural network types and floating point operations, as well as inference. The design of one or more DLAs may provide higher performance per millimeter than a general-purpose GPU and significantly exceed the performance of a CPU. One or more TPUs may perform multiple functions, including single-instance convolution functions, e.g., supporting INT8, INT16, and FP16 data types for features and weights, as well as post-processor functions.
[0101] One or more DLAs may execute a neural network, especially a CNN, quickly and efficiently on processed or unprocessed data for any of a variety of functions, including but not limited to: a CNN for object recognition and detection using data from a camera sensor; a CNN for distance estimation using data from a camera sensor; a CNN for emergency vehicle detection and identification and detection using microphone data; a CNN for face recognition and vehicle owner recognition using data from a camera sensor; and / or a CNN for security and / or safety-related events.
[0102] One or more DLAs may perform any function of one or more GPUs 708. For example, by using an inference accelerator, a designer may target any function for one or more DLAs or one or more GPUs 708. For example, a designer may concentrate the processing of CNNs and floating point operations on one or more DLAs and leave other functions to one or more GPUs 708 and / or one or more other accelerators 714.
[0103] One or more accelerators 714 (e.g., a hardware acceleration cluster) may include programmable vision accelerators (PVAs), which may also be referred to herein as computer vision accelerators. One or more PVAs may be designed and configured to accelerate computer vision algorithms for advanced driver assistance systems (ADAS), autonomous driving, and / or augmented reality (AR) and / or virtual reality (VR) applications. One or more PVAs may provide a balance between performance and flexibility. For example, each PVA may include, for example but not limited to, any number of reduced instruction set computer (RISC) cores, direct memory access (DMA), and / or any number of vector processors.
[0104] The RISC core can interact with an image sensor (e.g., the image sensor of any camera described herein), one or more image signal processors, etc. Each RISC core can include any number of memories. The RISC core can use any one of a variety of protocols, depending on the embodiment. In some examples, the RISC core can execute a real-time operating system (RTOS). The RISC core can be implemented using one or more integrated circuit devices, application-specific integrated circuits (ASICs), and / or memory devices. For example, the RISC core can include an instruction cache and / or tightly coupled RAM.
[0105] The DMA can enable the PVA component to access system memory independently of one or more CPUs 706. The DMA can support any function for optimizing the PVA, including but not limited to supporting multi-dimensional addressing and / or circular addressing. In some examples, the DMA can support up to six or more dimensions of addressing, which can include block width, block height, block depth, horizontal block step, vertical block step, and / or depth step.
[0106] The vector processor can be a programmable processor, and its design can efficiently and flexibly execute the programming of computer vision algorithms and provide signal processing capabilities. In some examples, the PVA can include a PVA core and two vector processing subsystem partitions. The PVA core can include a processor subsystem, one or more DMA engines (e.g., two DMA engines), and / or other peripherals. The vector processing subsystem can operate as the main processing engine of the PVA and can include a vector processing unit (VPU), an instruction cache, and / or vector memory (e.g., VMEM). The VPU core can include a digital signal processor, e.g., a single instruction, multiple data (SIMD), very long instruction word (VLIW) digital signal processor. The combination of SIMD and VLIW can improve throughput and speed.
[0107] Each vector processor can include an instruction cache and can be coupled to dedicated memory. As a result, in some examples, each vector processor can be configured to execute independently of other vector processors. In other examples, the vector processors included in a specific PVA can be configured to employ data parallelism. For example, in some embodiments, multiple vector processors included in a single PVA can execute the same computer vision algorithm on different regions of an image. In other examples, the vector processors included in a specific PVA can execute different computer vision algorithms simultaneously on the same image, or even execute different algorithms on sequential images or parts of an image. Among other things, any number of PVAs can be included in a hardware acceleration cluster, and any number of vector processors can be included in each PVA. In addition, the PVA can include additional error correction code (ECC) memory to enhance overall system security.
[0108] One or more accelerators 714 (e.g., a hardware acceleration cluster) may include on-chip computer vision network and SRAM to provide high-bandwidth, low-latency SRAM for one or more accelerators 714. In some examples, the on-chip memory may include at least 4MB SRAM, including but not limited to, eight field-configurable memory blocks that can be accessed by the PVA and DLA. Each pair of memory blocks may include an Advanced Peripheral Bus (APB) interface, configuration circuitry, a controller, and a multiplexer. Any type of memory may be used. The PVA and DLA may access the memory via a backbone that provides high-speed memory access to the PVA and DLA. The backbone may include an on-chip computer vision network that interconnects the PVA and DLA to the memory (e.g., using APB).
[0109] The on-chip computer vision network may include an interface that determines that both the PVA and DLA provide ready and valid signals before transmitting any control signals / addresses / data. Such an interface may provide independent phases and independent channels for transmitting control signals / addresses / data, as well as burst communication for continuous data transmission. Such an interface may comply with the ISO26262 or IEC 61508 standards, but other standards and protocols may also be used.
[0110] In some examples, one or more SoCs 704 may include a real-time ray tracing hardware accelerator, as described in U.S. Patent Application No. 16 / 101,232, filed on August 10, 2018. The real-time ray tracing hardware accelerator may be used to quickly and efficiently determine the position and extent of an object (e.g., within a world model), generate real-time visualization simulations for radar signal interpretation, sound propagation synthesis and / or analysis, sonar system simulations, general wave propagation simulations, comparison with lidar data for positioning and / or other functions and / or other uses. In some embodiments, one or more tree traversal units (ttu) may be used to perform one or more ray tracing-related operations.
[0111] One or more accelerators 714 (e.g., a hardware accelerator cluster) have a wide range of uses in autonomous driving. The PVA may be a programmable vision accelerator that can be used in key processing stages of ADA and autonomous vehicles. The capabilities of the PVA are well-suited to algorithm domains that require predictable processing with low power consumption and low latency. In other words, the PVA performs well in semi-dense or regular dense computations, even on small data sets that require low latency and low power consumption for predictable runtimes. Therefore, in the context of an autonomous vehicle platform, the PVA is designed to run classical computer vision algorithms because they are very effective in object detection and integer math operations.
[0112] For example, according to one embodiment of the present technology, PVA is used to perform computer stereo vision. In some examples, an algorithm based on semi-global matching may be used, although this is not intended to be limiting. Many applications of 3-5 level autonomous driving require instant motion estimation / stereo matching (e.g., structure from motion, pedestrian recognition, lane detection, etc.). PVA can perform computer stereo vision functions on the inputs from two monocular cameras.
[0113] In some examples, PVA can be used to perform dense optical flow. Processed radar is provided by processing raw radar data (e.g., using 4D fast Fourier transform). In other examples, PVA is used for time-of-flight depth processing, e.g., by processing raw time-of-flight data to provide processed time-of-flight data.
[0114] DLA can be used to run any type of network to enhance control and driving safety, e.g., including neural networks that output confidence measurements for each object detection. Such confidence values can be interpreted as probabilities or provide relative "weights" of each detection relative to other detections. This confidence value enables the system to further decide which detections should be considered true positive detections rather than false positive detections. For example, the system can set a threshold for the confidence level and only consider detections exceeding the threshold as true positive detections. In an automatic emergency braking (AEB) system, false positive detections will cause the vehicle to automatically perform emergency braking, which is clearly undesirable. Therefore, only the most reliable detections should be considered as triggers for AEB. DLA can run a neural network to regress the confidence value. The neural network can take at least some subset of parameters as its input, e.g., bounding box dimensions, obtained ground plane estimate (e.g., from another subsystem), output of an inertial measurement unit (IMU) sensor 766 related to the vehicle 700's orientation and distance, 3D position estimate of an object obtained from the neural network and / or other sensors (e.g., lidar sensor 764 or radar sensor 760), etc.
[0115] One or more SoCs 704 may include one or more data stores 716 (e.g., memories). The data store 716 can be on-chip memory of the SoC 704, which can store neural networks to be executed on the GPU and / or DLA. In some examples, the capacity of the data store 716 can be large enough to store multiple instances of neural networks for redundancy and safety. The data store 712 may include a secondary or tertiary cache 712. As described herein, references to one or more data stores 716 may include references to memories associated with the PVA, DLA, and / or one or more other accelerators 714.
[0116] One or more SoCs 704 may include one or more processors 710 (e.g., embedded processors). The processor 710 may include a boot and power management processor, which may be a dedicated processor and subsystem for handling boot power and management functions and related security implementations. The boot and power management processor may be part of the boot sequence of one or more SoCs 704 and may provide runtime power management services. The boot power and management processor may provide clock and voltage programming, assistance with system low power state transitions, management of the SoC 704 thermal sensor and temperature sensors, and / or management of the SoC 704 power state. Each temperature sensor may be implemented as a ring oscillator whose output frequency is proportional to temperature, and one or more SoCs 704 may use the ring oscillator to detect the temperature of one or more CPUs 706, one or more GPUs 708, and / or one or more accelerators 714. If it is determined that the temperature exceeds a threshold, the boot and power management processor may enter a temperature fault routine and place one or more SoCs 704 in a low power state and / or place the vehicle 700 in a driver safe stop mode (e.g., cause the vehicle 700 to stop safely).
[0117] One or more processors 710 may also include a set of embedded processors that can act as an audio processing engine. The audio processing engine may be an audio subsystem that is capable of providing full hardware support for multi-channel audio through multiple interfaces and a wide and flexible audio I / O interface. In some examples, the audio processing engine is a dedicated processor core of a digital signal processor with dedicated RAM.
[0118] One or more processors 710 may also include an always-on processor engine that can provide the necessary hardware functions to support low power sensor management and wake-up use cases. The always-on processor engine may include a processor core, tightly coupled RAM, support peripherals (e.g., timers and interrupt controllers), various I / O controller peripherals, and routing logic.
[0119] One or more processors 710 may also include a security cluster engine that includes a dedicated processor subsystem for handling security management of automotive applications. The security cluster engine may include two or more processor cores, tightly coupled RAM, support peripherals (e.g., timers, interrupt controllers, etc.), and / or routing logic. In the secure mode, two or more cores may run in lockstep mode and operate as a single core with comparison logic to detect any differences between their operations.
[0120] One or more processors 710 may also include a real-time camera engine that may include a dedicated processor subsystem for handling real-time camera management.
[0121] One or more processors 710 may also include a high dynamic range signal processor, which may include an image signal processor, which is a hardware engine that is part of a camera processing pipeline.
[0122] One or more processors 710 may include a video image synthesizer, which may be a processing block (e.g., implemented on a microprocessor) that implements the video post-processing functions required for a video playback application to generate the final image of a player window. The video image synthesizer may perform lens distortion correction on one or more wide-angle cameras 770, one or more surround cameras 774, and / or an in-cockpit monitoring camera sensor. The in-cockpit monitoring camera sensor is preferably monitored by a neural network running on another instance of the advanced SoC, which is configured to identify in-cockpit events and respond accordingly. The in-cockpit system may perform lip reading to activate cellular services and make phone calls, dictate emails, change the vehicle's destination, activate or change the vehicle's infotainment system and settings, or provide voice-activated web surfing. Certain functions are only available to the driver when the vehicle is operating in an automated mode and are otherwise disabled.
[0123] The video image synthesizer may include enhanced temporal noise reduction for spatial and temporal noise reduction. For example, in the case of motion occurring in a video, the noise reduction appropriately weights the spatial information, thereby reducing the weight of the information provided by adjacent frames. In the case where an image or a portion of an image does not include motion, the temporal noise reduction performed by the video image synthesizer may use information from a previous image to reduce the noise in the current image.
[0124] The video image synthesizer may also be configured to perform stereo correction on input stereo lens frames. When the operating system desktop is in use, the video image synthesizer may also be used for user interface synthesis and does not require the GPU 708 to continuously render new surfaces. Even when one or more GPUs 708 are powered on and active during 3D rendering, the video image synthesizer may be used to offload one or more GPUs 708 to improve performance and responsiveness.
[0125] One or more SoCs 704 may also include a Mobile Industry Processor Interface (MIPI) camera serial interface, a high-speed interface, and / or a video input block for receiving video and inputs from cameras and may be used for camera and related pixel input functions. One or more SoCs 704 may also include one or more input / output controllers, which may be software-controlled and may be used to receive I / O signals that are not specified for a particular role.
[0126] One or more SoCs 704 may also include a wide range of peripheral interfaces to enable communication with peripheral devices, audio codecs, power management, and / or other devices. One or more SoCs 704 may be used to process data from cameras (e.g., via Gigabit Multimedia Serial Link and Ethernet connections), sensors (e.g., one or more lidar sensors 764, one or more radar sensors 760, etc. that may be connected via Ethernet), data from bus 702 (e.g., the speed of vehicle 700, steering wheel position, etc.), and data from one or more GNSS sensors 758 (e.g., via Ethernet or CAN bus connections). One or more SoCs 704 may also include a dedicated high-performance large-capacity storage controller, which may include its own DMA engine and may be used to free one or more CPUs 706 from conventional data management tasks.
[0127] One or more SoCs 704 can be an end-to-end platform with a flexible architecture spanning automation levels 3 - 5, thus providing a comprehensive functional safety architecture that leverages and effectively utilizes computer vision and ADAS technologies to achieve diversity and redundancy, providing a platform for a flexible and reliable drive software stack as well as deep learning tools. Compared with traditional systems, one or more SoCs 704 can be faster, more reliable, even more energy-efficient and space-saving. For example, when one or more accelerators 714 are combined with one or more CPUs 706, one or more GPUs 708, and one or more data stores 716, it can provide a fast and efficient platform for level 3 - 5 autonomous vehicles.
[0128] Therefore, this technology provides capabilities and functions that traditional systems cannot achieve. For example, computer vision algorithms can be executed on the CPU, and the CPU can be configured using a high-level programming language (e.g., the C programming language) to execute various processing algorithms on a variety of visual data. However, the CPU generally cannot meet the performance requirements of many computer vision applications, such as those related to execution time and power consumption. In particular, many CPUs cannot execute complex object detection algorithms in real time, which is a requirement for in-vehicle ADAS applications and also for practical level 3 - 5 autonomous vehicles.
[0129] Compared with traditional systems, the techniques described herein allow multiple neural networks to be executed simultaneously and / or sequentially by providing a CPU complex, a GPU complex, and a hardware acceleration cluster, and allow the results to be combined to achieve Level 3-5 autonomous driving functions. For example, a CNN executed on a DLA or a dGPU (e.g., one or more GPUs 720) can include text and word recognition, allowing a supercomputer to read and understand traffic signs, including signs that the neural network has not been specifically trained for. The DLA can also include a neural network capable of recognizing, interpreting, and providing semantic understanding of symbols, and passing that semantic understanding to a path planning module running on the CPU complex.
[0130] Another example is that multiple neural networks can be run simultaneously, such as required for Level 3, 4, or 5 driving. For example, a warning sign consisting of "Warning: Flashing lights indicate icing conditions" and a light can be interpreted independently or jointly by multiple neural networks. The sign itself can be recognized as a traffic sign by the first deployed neural network (e.g., a trained neural network), the text "Flashing lights indicate icing conditions" can be interpreted by the second deployed neural network, and when the flashing lights are detected, the vehicle path planning software (preferably executed on the CPU complex) is notified of the presence of icing conditions. The flashing lights can be recognized by operating a third deployed neural network over multiple frames, and the vehicle path planning software is notified of the presence or absence of the flashing lights. All three neural networks can run simultaneously, e.g., within the DLA and / or on one or more GPUs 708.
[0131] In some examples, a CNN for face recognition and owner recognition can use data from a camera sensor to recognize the presence of an authorized driver and / or the owner of vehicle 700. When the owner approaches the driver's door and turns on the lights, a normally-on sensor can be used to unlock the vehicle, and, in a security mode, to disable the vehicle when the owner leaves the vehicle. In this way, one or more SoCs 704 provide anti-theft and / or anti-carjacking protection.
[0132] In another example, a CNN for emergency vehicle detection and identification can use data from microphone 796 to detect and identify emergency vehicle sirens. Different from traditional systems that use a general classifier to detect sirens and manually extract features, one or more SoCs 704 use a CNN to classify ambient and urban sounds, as well as to classify visual data. In a preferred embodiment, the CNN running on the DLA is trained to recognize the relative closing speed of an emergency vehicle (e.g., by using the Doppler effect). The CNN can also be trained to identify emergency vehicles specific to the vehicle's operating area, as identified by one or more GNSS sensors 758. Thus, for example, when operating in Europe, the CNN will seek to detect European alerts, and when in the United States, the CNN will seek to identify only North American alerts. Once an emergency vehicle is detected, a control program can be used to execute an emergency vehicle safety routine with the help of ultrasonic sensor 762, causing the vehicle to slow down, pull over, stop, and / or idle until one or more emergency vehicles pass by.
[0133] The vehicle can include one or more CPUs 718 (e.g., one or more discrete CPUs or one or more dCPUs), which can be coupled to one or more SoCs 704 via a high-speed interconnect (e.g., PCIE). For example, one or more CPUs 718 can include X86 processors. The CPU 718 can be used to perform any of a variety of functions, including arbitrating potentially inconsistent results between ADAS sensors and the SoC 704, and / or monitoring the status and health of one or more controllers 736 and / or the infotainment SoC 730.
[0134] The vehicle 700 can include one or more GPUs 720 (e.g., one or more discrete GPUs or one or more dGPUs), which can be coupled to the SoC 704 via a high-speed interconnect (e.g., NVIDIA's NVLINK). One or more GPUs 720 can provide additional artificial intelligence capabilities, such as by executing redundant and / or different neural networks, and can be used to train and / or update neural networks based on inputs from the sensors of the vehicle 700 (e.g., sensor data).
[0135] Vehicle 700 may further include a network interface 724, which may include one or more wireless antennas 726 (e.g., one or more wireless antennas for different communication protocols, such as cellular antennas, Bluetooth antennas, etc.). The network interface 724 can be used to achieve wireless connections with the cloud (e.g., with one or more servers 778 and / or other network devices), with other vehicles, and / or with computing devices (e.g., the passenger's client device) via the Internet. To communicate with other vehicles, a direct link and / or an indirect link (e.g., via the network and the Internet) can be established between two vehicles. A vehicle-to-vehicle communication link can be used to provide the direct link. The vehicle-to-vehicle communication link can provide information about the vehicles near vehicle 700 (e.g., the vehicles in front of, to the side of, and / or behind vehicle 700) to vehicle 700. This function may be part of the cooperative adaptive cruise control function of vehicle 700.
[0136] The network interface 724 may include a SoC that provides modulation and demodulation functions and enables one or more controllers 736 to communicate via a wireless network. The network interface 724 may include a radio frequency front end for upconverting from baseband to radio frequency and downconverting from radio frequency to baseband. The frequency conversion can be performed by well-known processes and / or can be performed using a superheterodyne process. In some examples, the radio frequency front end functions can be provided by a separate chip. The network interface may include wireless functions for communicating via LTE, WCDMA, UMTS, GSM, CDMA2000, Bluetooth, Bluetooth LE, Wi-Fi, Z-Wave, ZigBee, LoRaWAN, and / or other wireless protocols.
[0137] Vehicle 700 may further include one or more data stores 728, which may include off-chip (e.g., outside the SoC). The data store 728 may include one or more storage elements, including RAM, SRAM, DRAM, VRAM, flash memory, hard disks, and / or other components and / or devices that can store at least one bit of data.
[0138] Vehicle 700 may also include one or more GNSS sensors 758. One or more GNSS sensors 758 (e.g., GPS, assisted GPS sensors, differential GPS (DGPS) sensors, etc.) are used to assist in mapping, perception, occupancy grid generation, and / or path planning functions. Any number of GNSS sensors 758 can be used, including, for example but not limited to, GPS using a USB connector with an Ethernet to serial (RS-232) bridge.
[0139] Vehicle 700 may also include one or more radar sensors 760. Even in dark and / or adverse weather conditions, vehicle 700 may use one or more radar sensors 760 for remote vehicle detection. The radar functional safety level may be ASIL B. One or more radar sensors 760 may be controlled and access target tracking data using CAN and / or bus 702 (e.g., to transmit data generated by one or more radar sensors 760), and in some examples, access raw data via Ethernet. A variety of radar sensor types may be used. For example, but not limited to, one or more radar sensors 760 may be suitable for front, rear, and side radar use. In some examples, pulsed Doppler radar sensors are used.
[0140] One or more radar sensors 760 may include different configurations, such as long-range with a narrow field of view, short-range with a wide field of view, short-distance side coverage, etc. In some examples, long-range radar may be used for adaptive cruise control functions. The long-range radar system may provide a wide field of view achieved through two or more independent scans, e.g., within a range of 250 meters. One or more radar sensors 760 may help distinguish between static and moving objects and may be used by the ADAS system for emergency braking assistance and forward collision warning. The long-range radar sensor may include a monostatic multimode radar with multiple (e.g., six or more) fixed radar antennas and high-speed CAN and FlexRay interfaces. In an example with six antennas, the central four antennas may create a focused beam pattern designed to record the surroundings of vehicle 700 at higher speeds with minimal traffic interference from adjacent lanes. The other two antennas may widen the field of view to enable quick detection of vehicles entering or leaving the lane of vehicle 700.
[0141] For example, a mid-range radar system may include a range of up to 760 meters (front) or 80 meters (rear), and a field of view of up to 42 degrees (front) or 750 degrees (rear). The short-range radar system may include, but is not limited to, radar sensors designed to be installed at both ends of the rear bumper. When installed at both ends of the rear bumper, such radar sensor systems may generate two beams of light to continuously monitor the blind spots at the rear and beside the vehicle.
[0142] Short-range radar systems may be used in the ADAS system for blind spot detection and / or lane change assistance.
[0143] Vehicle 700 may also include one or more ultrasonic sensors 762. One or more ultrasonic sensors 762 may be located at the front, rear, and / or sides of vehicle 700 and may be used for parking assistance and / or creating and updating an occupancy grid. A variety of ultrasonic sensors 762 may be used, and different ultrasonic sensors 762 may be used for different detection ranges (e.g., 2.5 m, 4 m). One or more ultrasonic sensors 762 may operate at a functional safety level of ASIL B.
[0144] Vehicle 700 may include one or more lidar sensors 764. One or more lidar sensors 764 may be used for object and pedestrian detection, emergency braking, collision avoidance, and / or other functions. The functional safety rating of one or more lidar sensors 764 may be ASIL B. In some examples, vehicle 700 may include multiple lidar sensors 764 (e.g., two, four, six, etc.) that may use Ethernet (e.g., to provide data to a gigabit Ethernet switch).
[0145] In some examples, one or more lidar sensors 764 may be able to provide a list of objects and their distances in a 360-degree field of view. The advertised range of one or more commercial lidar sensors 764 is approximately 700 m, with an accuracy of 2 cm - 3 cm, and supports, for example, a 700 Mbps Ethernet connection. In some examples, one or more non-protruding lidar sensors 764 may be used. In such examples, one or more lidar sensors 764 may be implemented as a small device that may be embedded in the front, rear, sides, and / or corners of vehicle 700. In such examples, one or more lidar sensors 764 may provide a horizontal field of view of up to 120 degrees and a vertical field of view of 35 degrees, with a range of 200 m even for low-reflectivity objects. One or more front-mounted lidar sensors 764 may be configured with a horizontal field of view between 45 degrees and 135 degrees.
[0146] In some examples, lidar technologies such as 3D flash lidar may also be used.
[0147] The 3D flash lidar uses a laser flash as the transmission source, illuminating approximately 200 meters around the vehicle. The flash lidar device includes a receiver that records the laser pulse transmission time and the reflected light on each pixel, and each pixel in turn corresponds to the range from the vehicle to the object. The flash lidar can generate a high-accuracy, distortion-free environmental image using each laser flash. In some examples, four flash lidar sensors can be deployed, one on each side of the vehicle 700. Available 3D flash lidar systems include solid-state 3D staring array lidar cameras and have no moving parts except for a fan (e.g., non-scanning lidar devices). The flash lidar device can use 5-nanosecond Class I (eye-safe) laser pulses per frame and can capture reflected laser light in the form of 3D range point clouds and co-registered intensity data. By using flash lidar and because flash lidar is a solid-state device without moving parts, one or more lidar sensors 764 can be less susceptible to motion blur, vibration, and / or shock.
[0148] The vehicle may also include one or more IMU sensors 766. In some examples, one or more IMU sensors 766 can be located at the center of the rear axle of the vehicle 700. One or more IMU sensors 766 can include, for example but not limited to, one or more accelerometers, one or more magnetometers, one or more gyroscopes, one or more magnetic compasses, and / or other sensor types. In some examples, such as in a six-axis application, one or more IMU sensors 766 can include accelerometers and gyroscopes, while in a nine-axis application, one or more IMU sensors 766 can include accelerometers, gyroscopes, and magnetometers.
[0149] In some embodiments, one or more IMU sensors 766 can be implemented as a miniature, high-performance GPS-aided inertial navigation system (GPS / INS) that combines microelectromechanical system (MEMS) inertial sensors, a high-sensitivity GPS receiver, and advanced Kalman filtering algorithms to provide estimates of position, velocity, and attitude. Thus, in some examples, one or more IMU sensors 766 can enable the vehicle 700 to estimate heading without input from magnetic sensors by directly observing and correlating the speed changes from GPS to one or more IMU sensors 766. In some examples, one or more IMU sensors 766 and one or more GNSS sensors 758 can be combined in a single integrated unit.
[0150] The vehicle may include one or more microphones 796 placed inside and / or around the vehicle 700. One or more microphones 796 can be used for emergency vehicle detection and identification, etc.
[0151] The vehicle may also include any number of camera types, including one or more stereo cameras 768, one or more wide-angle cameras 770, one or more infrared cameras 772, one or more surround cameras 774, one or more long-range and / or mid-range cameras 798, and / or other camera types. The cameras can be used to capture image data of the entire periphery of the vehicle 700. The camera types used depend on the embodiment and requirements of the vehicle 700, and any combination of camera types can be used to provide the necessary coverage around the vehicle 700. Additionally, according to embodiments, the number of cameras can vary. For example, the vehicle may include six cameras, seven cameras, ten cameras, twelve cameras, and / or other numbers of cameras. As an example, the cameras can support but are not limited to Gigabit Multimedia Serial Link (GMSL) and / or Gigabit Ethernet. Each camera will be described in more detail with reference to Figure 7A and Figure 7B each camera.
[0152] The vehicle 700 may also include one or more vibration sensors 742. The one or more vibration sensors 742 can measure the vibrations of vehicle components such as axles. For example, a change in vibration may indicate a change in the road surface. In another example, when two or more vibration sensors 742 are used, the difference between the vibrations can be used to determine the friction or slip of the road surface (e.g., when the vibration difference is between a powered drive axle and a freely rotating axle).
[0153] The vehicle 700 may include an ADAS system 738. In some examples, the ADAS system 738 may include a SoC. The ADAS system 738 may include automatic / adaptive / auto cruise control (ACC), cooperative adaptive cruise control (CACC), forward collision warning (FCW), automatic emergency braking (AEB), lane departure warning (LDW), lane keeping assist (LKA), blind spot warning (BSW), rear cross traffic warning (RCTW), collision warning system (CWS), lane centering (LC), and / or other features and functions.
[0154] The ACC system can use one or more radar sensors 760, one or more lidar sensors 764, and / or one or more cameras. The ACC system may include longitudinal ACC and / or lateral ACC. Longitudinal ACC monitors and controls the distance from the vehicle directly in front of the vehicle 700 and automatically adjusts the vehicle speed to maintain a safe distance from the vehicle ahead. Lateral ACC performs distance keeping and recommends that the vehicle 700 change lanes if necessary. Lateral ACC is related to other ADAS applications such as LCA and CWS.
[0155] The CACC uses information from other vehicles, which can be received indirectly from other vehicles via a network interface 724 and / or one or more wireless antennas 726, via a wireless link, or via a network connection (e.g., via the Internet). The direct link can be provided by a vehicle-to-vehicle (V2V) communication link, while the indirect link can be an infrastructure-to-vehicle (I2V) communication link. Generally, the V2V communication concept provides information about the vehicle in front (e.g., the vehicle directly in front of vehicle 700 and in the same lane), while the I2V communication concept provides information about the traffic ahead. The CACC system can include one or both of the I2V and V2V information sources. Considering the vehicle information in front of vehicle 700, the CACC may be more reliable and has the potential to improve the smoothness of traffic flow and reduce congestion on the road.
[0156] The FCW system is designed to alert the driver of a hazard so that the driver can take corrective measures. The FCW system uses a forward camera and / or one or more radar sensors 760 coupled to a dedicated processor, DSP, FPGA, and / or ASIC, which is electrically coupled to driver feedback such as a display, speaker, and / or vibration component. The FCW system can provide warnings such as audible, visual warnings, vibration, and / or a quick braking pulse.
[0157] The AEB system detects an impending forward collision with another vehicle or other object and may automatically apply the brakes if the driver does not take corrective measures within a specified time or distance parameter. The AEB system can use one or more front cameras and / or one or more radar sensors 760 coupled to a dedicated processor, DSP, FPGA, and / or ASIC. When the AEB system detects a hazard, it typically first alerts the driver to take corrective measures to avoid the collision. If the driver does not take corrective measures, the AEB system can automatically apply the brakes to prevent or at least mitigate the impact of the expected collision. The AEB system can include technologies such as dynamic brake support and / or collision imminent braking.
[0158] The LDW system provides visual, audible, and / or tactile warnings, such as steering wheel or seat vibration, to alert the driver when vehicle 700 crosses a lane marking. The LDW system does not activate when the driver indicates an intentional lane departure by activating the turn signal. The LDW system can use a front-side facing camera coupled to a dedicated processor, DSP, FPGA, and / or ASIC, which is electrically coupled to driver feedback such as a display, speaker, and / or vibration component.
[0159] The LKA system is a variant of the LDW system. If the vehicle 700 starts to drive out of the lane, the LKA system provides steering input or braking to correct the vehicle 700.
[0160] The BSW system detects and warns the driver of a vehicle within the blind spot of the vehicle. The BSW system can provide visual, audible, and / or tactile alerts to indicate that merging or changing lanes is unsafe. When the driver uses the turn signal, the system may provide additional warnings. The BSW system can use a rear-facing camera and / or radar sensor 760 coupled to a dedicated processor, DSP, FPGA, and / or ASIC, which is electrically coupled to driver feedback such as a display, speaker, and / or vibration component.
[0161] When an object outside the rear camera range is detected while the vehicle 700 is reversing, the RCTW system can provide visual, audible, and / or tactile notifications. Some RCTW systems include AEB to ensure that the vehicle brakes are applied to avoid collisions. The RCTW system can use one or more rearward radar sensors 760, which are coupled to a dedicated processor, DSP, FPGA, and / or ASIC, which is electrically coupled to driver feedback such as a display, speaker, and / or vibration component.
[0162] Traditional ADAS systems may be prone to false positive results, which can be annoying and distracting to the driver, but usually do not have catastrophic consequences because the ADAS system alerts the driver and allows the driver to decide whether there is indeed a safety situation and take appropriate action. However, in an autonomous vehicle 700, in the case of conflicting results, the vehicle 700 itself must decide whether to listen to the results from the main computer or the auxiliary computer (e.g., the first controller 736 or the second controller 736). For example, in some embodiments, the ADAS system 738 can be a backup and / or auxiliary computer for providing perception information to the backup computer module. The backup computer rationality monitor can run different software redundantly on hardware components to detect faults in perception and dynamic driving tasks. The output from the ADAS system 738 can be provided to the monitoring MCU. If the outputs of the main computer and the auxiliary computer conflict, the monitoring MCU must determine how to reconcile the conflict to ensure safe operation.
[0163] In some examples, the host computer may be configured to provide a confidence score to the monitoring MCU, indicating the host computer's confidence in the selected result. If the confidence score exceeds a threshold, the monitoring MCU may follow the direction of the host computer, regardless of whether the secondary computer provides conflicting or inconsistent results. If the confidence score does not meet the threshold and the host computer and the secondary computer indicate different results (e.g., conflict), the monitoring MCU may arbitrate between the computers to determine the appropriate result.
[0164] The monitoring MCU may be configured to run one or more neural networks that are trained and configured to determine the conditions under which the secondary computer provides false alarms based on the outputs of the host computer and the secondary computer. Thus, one or more neural networks in the monitoring MCU can learn when the output of the secondary computer is trustworthy and when it is not. For example, when the secondary computer is a radar-based FCW system, one or more neural networks in the monitoring MCU can learn when the FCW system identifies metal objects that are not actually dangerous, such as drain grates or manhole covers that trigger an alarm. Similarly, when the secondary computer is a camera-based LDW system, the neural network in the monitoring MCU can learn to override the LDW when a bicycle or pedestrian is present and the lane departure is actually the safest maneuver. In embodiments that include one or more neural networks running on the monitoring MCU, the monitoring MCU may include at least one of a DLA or a GPU suitable for running one or more neural networks with associated memory. In a preferred embodiment, the monitoring MCU may comprise and / or include components of the SoC 704.
[0165] In other examples, the ADAS system 738 may include a secondary computer that performs ADAS functions using traditional computer vision rules. Thus, the secondary computer may use classical computer vision rules (if-then), and the presence of one or more neural networks in the monitoring MCU can improve reliability, safety, and performance. For example, diverse implementations and intentional non-identifications make the overall system more fault-tolerant, especially to faults caused by software (or software-hardware interface) functions. For example, if there is a software defect or error in the software running on the host computer and the different software code running on the secondary computer provides the same overall result, the monitoring MCU may have more confidence in the correctness of the overall result and that the software or hardware defect on the host computer did not cause a significant error.
[0166] In some examples, the output of the ADAS system 738 can be fed into the perception block of the host computer and / or the dynamic driving task block of the host computer. For example, if the ADAS system 738 indicates a forward collision warning due to an object directly ahead, the perception block can use this information when identifying the object. In other examples, as described herein, the secondary computer can have its own trained neural network, thereby reducing the risk of false positives.
[0167] The vehicle 700 may also include an infotainment SoC 730 (e.g., in-vehicle infotainment system (IVI)). Although shown and described as an SoC, the infotainment system may not be an SoC and may include two or more discrete components. The infotainment SoC 730 may include a combination of hardware and software that can be used to provide audio (e.g., music, personal digital assistant, navigation instructions, news, radio, etc.), video (e.g., television, movies, streaming, etc.), telephone (e.g., hands-free call), network connection (e.g., LTE, Wi-Fi, etc.), and / or provide information services to the vehicle 700 (e.g., navigation system, rear parking assist, radio data system, vehicle-related information such as fuel level, total distance traveled, brake fuel level, engine oil level, door open / closed, air filter information, etc.). For example, the infotainment SoC 730 can be a radio, disk player, navigation system, video player, USB and Bluetooth connection, in-vehicle computer, in-vehicle entertainment, Wi-Fi, steering wheel audio control, hands-free voice control, head-up display (HUD), HMI display 734, telecommunication device, control panel (e.g., for controlling and / or interacting with various components, features, and / or systems), and / or other components. The infotainment SoC 730 can also be used to provide information (e.g., visual and / or auditory) to the vehicle user, such as information from the ADAS system 738, autonomous driving information such as planned vehicle maneuvers, trajectories, surrounding environment information (e.g., intersection information, vehicle information, road information, etc.), and / or other information.
[0168] The infotainment SoC 730 may include GPU functionality. The infotainment SoC 730 can communicate with other devices, systems, and / or components of the vehicle 700 via a bus 702 (e.g., CAN bus, Ethernet, etc.). In some examples, the infotainment SoC 730 can be coupled to the monitoring MCU such that the GPU of the infotainment system can perform some self-driving functions in the event of a failure of one or more main controllers 736 (e.g., the main computer and / or the backup computer of the vehicle 700). In such examples, the infotainment SoC 730 can place the vehicle 700 in a driver-to-safe-stop mode, as described herein.
[0169] Vehicle 700 may also include an instrument cluster 732 (e.g., digital dashboard, electronic instrument cluster, digital instrument panel, etc.). The instrument cluster 732 may include a controller and / or a supercomputer (e.g., discrete controller or supercomputer). The instrument cluster 732 may include a set of gauges such as a speedometer, fuel level, oil pressure, tachometer, odometer, turn signal indicators, shift position indicators, one or more seatbelt warning lights, one or more parking brake warning lights, one or more engine fault lights, airbag (SRS) system information, lighting control, safety system control, navigation information, etc. In some examples, information may be displayed and / or shared between the infotainment SoC 730 and the instrument cluster 732. In other words, the instrument cluster 732 may be included as part of the infotainment SoC 730 and vice versa.
[0170] Figure 7D is a system diagram of the communication between one or more cloud-based servers and Figure 7A the exemplary autonomous vehicle 700 according to some embodiments of the present disclosure. System 776 may include one or more servers 778, one or more networks 790, and vehicles, including vehicle 700. One or more servers 778 may include multiple GPUs 784(a)-784(H) (collectively referred to as GPUs 784), PCIe switches 782(a)-782(H) (collectively referred to as PCIe switches 782), and / or CPUs 780(A)-780(B) (collectively referred to herein as CPUs 780). The GPUs 784, CPUs 780, and PCIe switches may be interconnected by a high-speed interconnect, such as but not limited to the NVLink interface 788 and / or the PCIE connection 786 developed by NVIDIA. In some examples, the GPUs 784 are connected via NVLink and / or an NV switch SoC, and the GPUs 784 and the PCIe switches 782 are connected via a PCIe interconnect. Although eight GPUs 784, two CPUs 780, and two PCIe switches are illustrated, this is not intended to be limiting. According to an embodiment, each of the one or more servers 778 may include any number of GPUs 784, CPUs 780, and / or PCIe switches. For example, each of the one or more servers 778 may include eight, sixteen, thirty-two, and / or more GPUs 784.
[0171] One or more servers 778 may receive, via one or more networks 790, image data representative of an image from a vehicle, the image showing an unexpected or changing road condition, such as road work that has recently begun. One or more servers 778 may send, via one or more networks 790, a neural network 792, an updated neural network 792, and / or map information 794 to the vehicle, including information about traffic and road conditions. Updates to the map information 794 may include updates to the HD map 722, such as information about construction sites, potholes, detours, floods, and / or other obstacles. In some examples, the neural network 792, the updated neural network 792, and / or the map information 794 may be derived from new training and / or experience represented in data received from any number of vehicles in the environment, and / or based on training performed in a data center (e.g., using one or more servers 778 and / or other servers).
[0172] One or more servers 778 may be used to train a machine learning model (e.g., a neural network) based on training data. The training data may be generated by vehicles, and / or may be generated in a simulation (e.g., using a game engine). In some examples, the training data is labeled (e.g., neural networks benefit from supervised learning) and / or undergoes other preprocessing, while in other examples, the training data is unlabeled and / or not preprocessed (e.g., neural networks do not require supervised learning). The training may be performed according to any one or more classes of machine learning techniques, including but not limited to: supervised training, semi-supervised training, unsupervised training, self-learning, reinforcement learning, federated learning, transfer learning, feature learning (including principal component and clustering analysis), multilinear subspace learning, manifold learning, representation learning (including alternate dictionary learning), rule-based machine learning, anomaly detection, and any variations or combinations thereof. Once the machine learning model is trained, the machine learning model may be used by the vehicle (e.g., transmitted to the vehicle 790 via one or more networks), and / or the machine learning model may be used by one or more servers 778 for remote monitoring of the vehicle).
[0173] In some examples, one or more servers 778 may receive data from a vehicle and apply the data to a state-of-the-art real-time neural network for real-time intelligent inference. One or more servers 778 may include a deep learning supercomputer and / or a dedicated AI computer powered by a GPU 784, such as DGX and DGX Station machines developed by NVIDIA. However, in some examples, one or more servers 778 may include a deep learning infrastructure of a data center powered only by CPUs.
[0174] The deep learning infrastructure of one or more servers 778 can perform fast real-time inference and can use this capability to evaluate and verify the health of the processors, software, and / or associated hardware in vehicle 700. For example, the deep learning infrastructure can receive periodic updates from vehicle 700, such as images and / or sequences of objects (e.g., via computer vision and / or other machine learning object classification techniques) located by vehicle 700 in the image sequence. The deep learning infrastructure can run its own neural network to identify objects and compare them with the objects identified by vehicle 700. If the results do not match and the infrastructure concludes that the AI in vehicle 700 has malfunctioned, one or more servers 778 can send a signal to vehicle 700 instructing the fail-safe computer in vehicle 700 to take control, notify the passengers, and complete a safe parking operation.
[0175] For inference, one or more servers 778 can include one or more GPUs 784 and one or more programmable inference accelerators (e.g., NVIDIA's TensorRT). The combination of GPU-powered servers and inference acceleration may enable real-time response. In other examples, such as where performance is less critical, servers powered by CPUs, FPGAs, and other processors can be used for inference.
[0176] Example computing device
[0177] Figure 8 is a block diagram of an example computing device 800 suitable for implementing some embodiments of the present disclosure. Computing device 800 can include an interconnect system 802 that directly or indirectly couples the following devices: a memory 804, one or more central processing units (CPUs) 806, one or more graphics processing units (GPUs) 808, a communication interface 810, input / output (I / O) ports 812, input / output components 814, a power supply 816, one or more presentation components 818 (e.g., a display), and one or more logic units 820. In at least one embodiment, one or more computing devices 800 can include one or more virtual machines (VMs), and / or any of its components can include virtual components (e.g., virtual hardware components). For non-limiting examples, one or more GPUs 808 can include one or more vGPUs, one or more CPUs 806 can include one or more vCPUs, and / or one or more logic units 820 can include one or more virtual logic units. Thus, one or more computing devices 800 can include discrete components (e.g., a complete GPU dedicated to computing device 800), virtual components (e.g., a portion of a GPU dedicated to computing device 800), or a combination thereof.
[0178] Although Figure 8The various modules in are shown as being connected by an interconnection system 802 to a line, but this is not intended to be limiting and is for clarity only. For example, in some embodiments, a rendering component 818 such as a display device can be considered an I / O component 814 (e.g., if the display is a touch screen). As another example, the CPU 806 and / or the GPU 808 can include memory (e.g., in addition to the memory of the GPU 808, CPU 806, and / or other components, the memory 804 can represent a storage device). In other words, Figure 8 the computing devices of are merely illustrative. There is no distinction made between "workstations", "servers", "laptop computers", "desktop computers", "tablet computers", "client devices", "mobile devices", "handheld devices", "game consoles", "electronic control units (ECUs)", "virtual reality systems", and / or other device or system types, as contemplated within the scope of Figure 8 the computing devices of.
[0179] The interconnection system 802 can represent one or more links or buses, such as an address bus, a data bus, a control bus, or a combination thereof. The interconnection system 802 can include one or more bus or link types, such as an Industry Standard Architecture (ISA) bus, an Extended Industry Standard Architecture (EISA) bus, a Video Electronics Standards Association (VESA) bus, a Peripheral Component Interconnect (PCI) bus, a Peripheral Component Interconnect Express (PCIE) bus, and / or other types of buses or links. In some embodiments, there are direct connections between components. For example, the CPU 806 can be directly connected to the memory 804. Additionally, the CPU 806 can be directly connected to the GPU 808. In cases where there are direct or point-to-point connections between components, the interconnection system 802 can include a PCIe link for making the connection. In these examples, a PCI bus need not be included in the computing device 800.
[0180] The memory 804 can include any of a variety of computer-readable media. The computer-readable media can be any available media that can be accessed by the computing device 800. The computer-readable media can include volatile and non-volatile media as well as removable and non-removable media. By way of example and not limitation, the computer-readable media can include computer storage media and communication media.
[0181] A computer storage medium can include volatile and non-volatile media and / or removable and non-removable media implemented in any method or technology for storing information such as computer-readable instructions, data structures, program modules, and / or other data types. For example, memory 804 can store computer-readable instructions (e.g., instructions representing one or more programs and / or one or more program elements), such as an operating system. Computer storage media can include, but are not limited to, RAM, ROM, EEPROM, flash memory or other storage technologies, CD-ROM, digital versatile disks (DVDs) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and that can be accessed by computing device 800. As used herein, computer storage media does not itself include signals.
[0182] A computer storage medium can carry computer-readable instructions, data structures, program modules, and / or other data types in a modulated data signal, such as a carrier wave or other transport mechanism, and includes any information delivery medium. The term "modulated data signal" can refer to a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. By way of example, and not limitation, computer storage media can include wired media such as a wired network or direct wired connection, and wireless media such as acoustic, RF, infrared, and other wireless media. Any combination of the foregoing should also be included within the scope of computer-readable media.
[0183] One or more CPUs 806 can be configured to execute at least some of the computer-readable instructions to control one or more components of computing device 800 to perform one or more of the methods and / or processes described herein. One or more CPUs 806 can each include one or more cores capable of simultaneously processing multiple software threads (e.g., one, two, four, eight, twenty-eight, seventy-two, etc.). One or more CPUs 806 can include any type of processor and can include different types of processors depending on the type of computing device 800 being implemented (e.g., a processor with fewer cores for a mobile device and a processor with more cores for a server). For example, depending on the type of computing device 800, the processor can be an advanced RISC machine (ARM) processor implemented using reduced instruction set computing (RISC) or an x86 processor implemented using complex instruction set computing (CISC). In addition to one or more microprocessors or supplementary co-processors (such as a math co-processor), computing device 800 can also include one or more CPUs 806.
[0184] In addition to, or selected from, one or more CPUs 806, one or more GPUs 808 may be configured to execute at least some computer-readable instructions to control one or more components of computing device 800 to perform one or more of the methods and / or processes described herein. One or more GPUs 808 may be integrated GPUs (e.g., having one or more CPUs 806 and / or one or more GPUs 808 may be discrete GPUs). In an embodiment, one or more GPUs 808 may be coprocessors of one or more CPUs 806. Computing device 800 may use one or more GPUs 808 to render graphics (e.g., 3D graphics) or perform general-purpose computing. For example, one or more GPUs 808 may be used for general-purpose computing on the GPU (GPGPU). One or more GPUs 808 may include hundreds or thousands of cores that are capable of simultaneously processing hundreds or thousands of software threads. One or more GPUs 808 may generate pixel data for an output image in response to a rendering command (e.g., a rendering command received from one or more CPUs 806 via a host interface). One or more GPUs 808 may include graphics memory, such as display memory, for storing pixel data or any other suitable data, such as GPGPU data. The display memory may include a part of memory 804. One or more GPUs 808 may include two or more GPUs operating in parallel (e.g., via a link). The link may directly connect the GPUs (e.g., using NVLINK) or connect the GPUs through a switch (e.g., using NVSwitch). When combined, each GPU 808 may generate pixel data or GPGPU data for different parts of the output or different outputs (e.g., the first GPU for the first image, the second GPU for the second image). Each GPU may include its own memory or may share memory with other GPUs.
[0185] In addition to, or selected from, one or more CPUs 806 and / or one or more GPUs 808, one or more logic units 820 may be configured to execute at least some computer-readable instructions to control one or more components of the computing device 800 to perform one or more methods and / or processes described herein. In an embodiment, one or more CPUs 806, one or more GPUs 808, and / or one or more logic units 820 may discretely or jointly execute any combination of methods, processes, and / or portions thereof. One or more of the logic units 820 may be part of and / or integrated in one or more of the CPUs 806 and / or GPUs 808, and / or one or more of the logic units 820 may be discrete components or otherwise located external to one or more of the CPUs 806 and / or one or more of the GPUs 808. One or more of the logic units 820 may be a coprocessor of one or more of the CPUs 806 and / or one or more of the GPUs 808.
[0186] Examples of one or more logic units 820 include one or more processing cores and / or their components, such as data processing units (DPUs), tensor cores (TCs), tensor processing units (TPUs), pixel vision cores (PVCs), visual processing units (VPUs), graphics processing clusters (GPCs), texture processing clusters (TPCs), streaming multiprocessors (SMs), tree traversal units (TTUs), artificial intelligence accelerators (AIAs), deep learning accelerators (DLAs), arithmetic logic units (ALUs), application-specific integrated circuits (ASICs), floating-point units (FPUs), input / output (I / O) elements, peripheral component interconnect (PCI) or peripheral component interconnect express (PCIe) elements, and / or the like.
[0187] The communication interface 810 may include one or more receivers, transmitters, and / or transceivers that enable the computing device 800 to communicate with other computing devices via an electronic communication network including wired and / or wireless communication. The communication interface 810 may include components and functionality to support communication over any of a plurality of different networks, such as wireless networks (e.g., Wi-Fi, Z-Wave, Bluetooth, Bluetooth LE, ZigBee, etc.), wired networks (e.g., communicating via Ethernet or InfiniBand), low-power wide area networks (e.g., LoRaWAN, SigFox, etc.), and / or the Internet. In one or more embodiments, the logic unit 820 and / or the communication interface 810 may include one or more data processing units (DPUs) to directly transfer data received over the network and / or via the interconnect system 802 to one or more GPUs 808 (e.g., memory).
[0188] The I / O port 812 may logically couple the computing device 800 with other devices, including I / O components 814, one or more presentation components 818, and / or other components, some of which may be built in (e.g., integrated within) the computing device 800. Illustrative I / O components 814 include microphones, mice, keyboards, joysticks, game pads, game controllers, satellite dishes, scanners, printers, wireless devices, etc. The I / O components 814 may provide a natural user interface (NUI) that processes air gestures, voice, or other physiological inputs generated by a user. In some cases, the input may be transmitted to an appropriate network element for further processing. The NUI may implement any combination of speech recognition, stylus recognition, face recognition, biometrics, on-screen and near-screen gesture recognition, air gestures, head and eye tracking, and touch recognition associated with a display of the computing device 800 (described in more detail below). The computing device 800 may include a depth camera, such as a stereoscopic camera system, an infrared camera system, an RGB camera system, touch screen technology, and combinations thereof, for gesture detection and recognition. Additionally, the computing device 800 may include an accelerometer or gyroscope capable of detecting motion (e.g., as part of an inertial measurement unit (IMU)). In some examples, the output of the accelerometer or gyroscope may be used by the computing device 800 for rendering immersive augmented reality or virtual reality.
[0189] The power supply 816 may include hardwired power, battery power, or a combination thereof. The power supply 816 may power the computing device 800 to enable the components of the computing device 800 to operate.
[0190] One or more presentation components 818 may include a display (e.g., a monitor, a touch screen, a television screen, a head-up display (HUD), other display types, or a combination thereof), a speaker, and / or other presentation components. One or more presentation components 818 may receive data from other components (e.g., one or more GPUs 808, one or more CPUs 806, DPU, etc.) and output data (e.g., as an image, video, sound, etc.).
[0191] Example data center
[0192] Figure 9 An example data center 900 that may be used in at least one embodiment of the present disclosure is shown. The data center 900 may include a data center infrastructure layer 910, a framework layer 920, a software layer 930, and / or an application layer 940.
[0193] As Figure 9 shown, the data center infrastructure layer 910 may include a resource coordinator 912, grouped computing resources 914, and node computing resources (“node C.R.s”) 916(1)-916(N), where “N” represents any integer. In at least one embodiment, the node C.R.s 916(1)-
[0194] 916(N) may include, but are not limited to, any number of central processing units (“CPUs”) or other processors (including accelerators, field programmable gate arrays (FPGAs), graphics processors or graphics processing units (GPUs), etc.), storage devices (e.g., dynamic read-only memory), in some embodiments, storage devices (e.g., solid state or disk drives), network input / output (“NWI / O”) devices, network switches, virtual machines (“VMs”), power modules, and / or cooling modules, etc. One or more of the node C.R.s 916(1)-916(N) may correspond to a server having one or more of the above computing resources. Additionally, in some embodiments, the node C.R.s 916(1)-9161(N) may include one or more virtual components, such as vGPUs, vCPUs, and / or similar components, and / or one or more of the node C.R.s 916(1)-916(N) may correspond to a virtual machine (VM).
[0195] In at least one embodiment, the grouped computing resources 914 may include separate groupings of node C.R.s 916 located within one or more racks (not shown), or multiple racks within data centers located in different geographical locations (also not shown). Separate groupings of node C.R.s 916 within the grouped computing resources 914 may include grouped computing, network, memory, or storage resources, which may be configured or allocated to support one or more workloads. In at least one embodiment, multiple node C.R.s 916 including CPUs, GPUs, DPUs, and / or other processors may be grouped within one or more racks to provide computing resources to support one or more workloads. One or more racks may also include any combination of any number of power modules, cooling modules, and / or network switches.
[0196] The resource coordinator 922 may configure or otherwise control one or more node C.R.s 916(1)-916(N) and / or the grouped computing resources 914. In at least one embodiment, the resource coordinator 922 may include a software design infrastructure (“SDI”) management entity for the data center 900. The resource coordinator 922 may include hardware, software, or some combination thereof.
[0197] In at least one embodiment, as Figure 9 shown, the framework layer 920 may include a job scheduler 932, a configuration manager 934, a resource manager 936, and / or a distributed file system 938. The framework layer 920 may include a framework for software 932 of the support software layer 930 and / or one or more applications 942 of the application layer 940. The software 932 or one or more applications 942 may respectively include web-based service software or applications, such as those provided by Amazon Web Services, Google Cloud, and Microsoft Azure. The framework layer 920 may be, but is not limited to, a free and open-source software web application framework, such as Apache SparkTM (hereinafter referred to as “Spark”), which may utilize the distributed file system 938 for large-scale data processing (e.g., “big data”). In at least one embodiment, the job scheduler 932 may include a Spark driver to facilitate the scheduling of workloads supported by the various layers of the data center 900. The configuration manager 934 may configure different layers, such as the software layer 930 and the framework layer 920, including Spark and the distributed file system 938, to support large-scale data processing. The resource manager 936 may be able to manage the clusters or grouped computing resources mapped to or allocated for supporting the distributed file system 938 and the job scheduler 932. In at least one embodiment, the clusters or grouped computing resources may include the grouped computing resources 914 at the data center infrastructure layer 910. The resource manager 936 may coordinate with the resource coordinator 912 to manage these mapped or allocated computing resources.
[0198] In at least one embodiment, the software 932 included in the software layer 930 may include software used by at least a portion of the node C.R.s 916(1)-916(N), the packet computing resources 914, and / or the distributed file system 938 of the framework layer 920. One or more software may include, but is not limited to, Internet web search software, email virus scanning software, database software, and streaming video content software.
[0199] In at least one embodiment, the applications 942 included in the application layer 940 may include one or more types of applications used by at least a portion of the node C.R.s 916(1)-916(N), the packet computing resources 914, and / or the distributed file system 938 of the framework layer 920, but are not limited to any number of genomics applications, sensing computing, and machine learning applications, including training or inference software, machine learning framework software (e.g., PyTorch, TensorFlow, Caffe, etc.), and / or other machine learning applications used in conjunction with one or more embodiments.
[0200] In at least one embodiment, any one of the configuration manager 934, the resource manager 936, and the resource coordinator 912 may perform any number and type of self-modifying actions based on any amount and type of data obtained in any technically feasible manner. The self-modifying actions may save the data center operator of the data center 900 from making potentially incorrect configuration decisions and may avoid underutilized and / or poorly performing portions of the data center.
[0201] According to one or more embodiments described herein, the data center 900 may include tools, services, software, or other resources for training one or more machine learning models or using one or more machine learning models to predict or infer information. For example, one or more machine learning models may be trained by calculating weight parameters according to a neural network architecture using the software and / or computing resources of the data center 900 described above. In at least one embodiment, a trained or deployed machine learning model corresponding to one or more neural networks may be used to infer or predict information using the resources of the data center 900 described above by using weight parameters calculated by one or more training techniques (e.g., but not limited to the training techniques described herein).
[0202] In at least one embodiment, data center 900 may use a CPU, an application specific integrated circuit (ASIC), a GPU, an FPGA, and / or other hardware (or corresponding virtual computing resources) to perform training and / or inference using the above resources. Additionally, the above one or more software and / or hardware resources may be configured as services to allow users to train or perform information inference, such as image recognition, speech recognition, or other artificial intelligence services.
[0203] Example Network Environment
[0204] A network environment suitable for implementing embodiments of the present invention may include one or more client devices, servers, network attached storage (NAS), other backend devices, and / or other device types. The client devices, servers, and / or other device types (e.g., each device) may be implemented on one or more instances of Figure 8 computing device 800 - e.g., each device may include similar components, features, and / or functions of computing device 800. Additionally, backend devices (servers, NAS, etc.) may be included as part of data center 900, examples of which are described in more detail herein with reference to Figure 9 more detail.
[0205] The components of the network environment may communicate with each other via one or more networks, wired, wireless, or both. The network may include multiple networks, or a network of networks. By way of example, the network may include one or more wide area networks (WANs), one or more local area networks (LANs), one or more public networks (e.g., the Internet and / or the public switched telephone network (PSTN)), and / or one or more private networks. In the case where the network includes a wireless telecommunications network, components such as base stations, communication towers, or even access points (and other components) may provide a wireless connection.
[0206] A compatible network environment may include one or more peer - to - peer network environments - in which case, servers may not be included in the network environment - and one or more client - server network environments - in which case, one or more servers may be included in the network environment. In a peer - to - peer network environment, the functions described herein with respect to servers may be implemented on any number of client devices.
[0207] In at least one embodiment, the network environment may include one or more cloud-based network environments, distributed computing environments, and combinations thereof, etc. The cloud-based network environment may include a framework layer, a job scheduler, a resource manager, and a distributed file system implemented on one or more servers, which may include one or more core network servers and / or edge servers. The framework layer may include a framework that supports a software layer and / or one or more applications in an application layer. The software or one or more applications may include web-based service software or applications, respectively. In an embodiment, one or more client devices may use web-based service software or applications (e.g., by accessing the service software and / or applications via one or more application programming interfaces (APIs)). The framework layer may be, but is not limited to, a free and open-source software web application framework, e.g., which may use the distributed file system for large-scale data processing (e.g.,
[0208] “big data”).
[0209] The cloud-based network environment may provide any combination of cloud computing and / or cloud storage for performing the computing and / or data storage functions (or one or more parts thereof) described herein. Any of these various functions may be distributed from a central or core server (e.g., a server in one or more data centers) to multiple locations, which data centers may be distributed in a state, a region, a country, globally, etc. If the connection to a user (e.g., a client device) is relatively close to one or more edge servers, the one or more core servers may assign at least a portion of the functions to the one or more edge servers. The cloud-based network environment may be private (e.g., limited to a single organization), may be public (e.g., available to many organizations), and / or a combination thereof (e.g., a hybrid cloud environment).
[0210] One or more client devices may include at least some components, features, and functions of one or more of the example computing devices 700 described herein with respect to FIG. 7. By way of example and not limitation, the client device may be embodied as a personal computer (PC), a laptop computer, a mobile device, a smartphone, a tablet computer, a smartwatch, a wearable computer, a personal digital assistant (PDA), an MP3 player, a virtual reality headset, a global positioning system (GPS) or device, a video player, a camera, a monitoring device or system, a vehicle, a boat, an aircraft, a virtual machine, a drone, a robot, a handheld communication device, a hospital device, a gaming device or system, an entertainment system, a vehicle computer system, an embedded system controller, a remote control, a device, a consumer electronic device, a workstation, an edge device, any combination of these depicted devices, or any other suitable device.
[0211] The present disclosure may be described in the general context of computer code or machine - usable instructions, including computer - executable instructions, such as program modules, executed by a computer or other machine, such as a personal data assistant or other handheld device. Generally, program modules include routines, programs, objects, components, data structures, etc., which refer to code that performs a particular task or implements a particular abstract data type. The present disclosure may be implemented in a variety of system configurations, including handheld devices, consumer electronics, general - purpose computers, more specialized computing devices, etc. The present invention may also be implemented in a distributed computing environment where tasks are performed by remote processing devices linked through a communication network.
[0212] As used herein, the recitation of "and / or" with respect to two or more elements should be interpreted as referring to only one element or a combination of elements. For example, "element A, element B, and / or element C" may include only element A, only element B, only element C, element A and element B, element A and element C, element B and element C, or element A, element B, and element C. In addition, "at least one of element A or element B" may include at least one of element A, at least one of element B, or at least one of element A and at least one of element B. Further, "at least one of element A and element B" may include at least one of element A, at least one of element B, or at least one of element A and at least one of element B.
[0213] To meet statutory requirements, the subject matter of the present disclosure is described in detail herein. However, the description itself is not intended to limit the scope of the present disclosure. On the contrary, the inventors have contemplated that the claimed subject matter may also be embodied in other ways, including different steps or combinations of steps similar to those described in this document, as well as other existing or future technologies. Additionally, although the terms "step" and / or "block" may be used herein to imply different elements of the methods employed, the terms should not be construed as implying any particular order among the various steps disclosed herein unless the order of each step is explicitly described.
[0214] Extracted figure: Figure 1
[0215] Figure 1
[0216] 102 Computer system
[0217] 112 Electronic components
[0218] 134 change operating state
[0219] STATUS REPORTS AND PROGRAMMING CHANGE OPERATING STATE
[0220] 108 Safety Manager
[0221] 106 Voltage Monitor
[0222] 104 Power Supply
[0223] 114 Switching Mode Power Supply
[0224] 120 External Compensation Network
[0225] 118 Driver / Controller
[0226] 116 Linear Power Supply
[0227] Figure 2
[0228] 106 Voltage Monitor
[0229] 210 Low-Pass Filter
[0230] 212 Comparator
[0231] 214 UV Threshold
[0232] 216 OV Threshold
[0233] 204 Controller
[0234] 226 Voltage Error Indicator
[0235] Figure 3A
[0236] tolerence Tolerance
[0237] threshold Threshold
[0238] voltage Voltage
[0239] TIME Time
[0240] regulator nominal Regulator Nominal
[0241] Figure 3B
[0242] tolerence Tolerance
[0243] threshold Threshold
[0244] TIME Time
[0245] regulator nominal Regulator Nominal
[0246] voltage Voltage
[0247] Figure 4
[0248] tolerence Tolerance
[0249] threshold Threshold
[0250] LOW FREQUENCY UV Low Frequency UV
[0251] HIGH FREQUENCY OV High Frequency OV
[0252] regulator nominal Regulator nominal
[0253] time Time
[0254] voltage Voltage
[0255] Figure 5
[0256] B502 PROVIDE AN INPUT VOLTAGE B502 provides an input voltage B504 COMPARE TO HIGH-FREQUENCY THRESHOLDS B504 compares to high-frequency thresholds
[0257] B506 FILTER USING A LOW-PASS FILTER B506 filters using a low-pass filter B508COMPARE TO LOW-FREQUENCY THRESHOLDS B508 compares to low-frequency thresholds
[0258] B510 DETERINE A VOLTAGE ERROR B510 determines a voltage error B512 CAUSE A CHANGE INOPERATING MODE B512 causes a change in operating mode
[0259] Figure 6
[0260] B602RECEIVE AN INPUT VOLTAGE B602 receives an input voltage B604 COMPARE TO HIGH-FREQUENCY THRESHOLDS B504 compares to high-frequency thresholds
[0261] B606 FILTER USING A LOW-PASS FILTER B506 filters using a low-pass filter B608COMPARE TO LOW-FREQUENCY THRESHOLDS B508 compares to low-frequency thresholds
[0262] B610 INDICATE VOLTAGE ERROR TO SAFETY MANAGER B610 indicates voltage error to the safety manager. Note: In this case Figures 7A - 9 is related to Figure 6 A- Figure 8 corresponds to
[0263] Figure 7A
[0264] 726 Wireless antenna
[0265] 724 Network interface
[0266] 736 Controller
[0267] 762 Ultrasonic sensor
[0268] 796 Microphone
[0269] 760 Radar sensor
[0270] 764 LiDAR sensor
[0271] 742 Vibration sensor
[0272] 746 Brake sensor system
[0273] 796 Microphone
[0274] 752 Throttle / accelerator
[0275] 744 Speed sensor
[0276] 742 Vibration sensor
[0277] 746 Brake sensor system
[0278] 748 Multiple brake actuators
[0279] 764 LiDAR sensor
[0280] 760 Radar sensor
[0281] 762 Ultrasonic sensor
[0282] 770 Wide-angle camera
[0283] 768 Stereo camera
[0284] 772 Infrared camera
[0285] 750 Propulsion system
[0286] 740 Steering sensor
[0287] 734 HMI display
[0288] 774 Surround Camera
[0289] 796 Microphone
[0290] 766 IMU Sensor
[0291] 748 Brake Actuator
[0292] 756 Steering Actuator
[0293] 758 Global Navigation Satellite System (GNSS) Sensor Figure 7B
[0294] 798 Remote Camera
[0295] 768 Stereo Camera
[0296] 798 Remote Camera
[0297] 770 Wide - Angle Camera
[0298] 774 Surround Camera
[0299] 798 Mid - Range Camera, Wing Mirror Bracket
[0300] 774 Surround Camera
[0301] 768 Stereo Camera
[0302] 798 Mid - Range Camera, Wing Mirror Bracket
[0303] 774 Surround Camera
[0304] 772 Infrared Camera
[0305] Figure 7C
[0306] 758 Global Navigation Satellite System (GNSS) Sensor 760 Radar Sensor
[0307] 762 Ultrasonic Sensor
[0308] 764 LiDAR Sensor
[0309] 766 Inertial Measurement Unit (IMU) Sensor
[0310] 796 Microphone
[0311] 768 Stereo Camera
[0312] 770 Wide - Angle Camera
[0313] 772 Infrared Camera
[0314] 774 Surround Camera
[0315] 798 Remote and / or Mid - Range Camera
[0316] 730 Information Entertainment SoC
[0317] 732 Instrument Cluster
[0318] 734 HMI Display
[0319] 738 ADAS System
[0320] 636 Controller
[0321] 710 Processor
[0322] 712 Cache
[0323] 714 Accelerator
[0324] 716 Data Memory
[0325] 722 HD Map
[0326] 724 Network Interface
[0327] 728 Data Memory
[0328] 740 Steering Sensor
[0329] 742 Vibration Sensor
[0330] 744 Speed Sensor
[0331] 746 Brake Sensor System
[0332] 748 Brake Actuator
[0333] 750 Propulsion System
[0334] 752 Throttle / Accelerator
[0335] 754 Steering System
[0336] 756 Steering Actuator
[0337] Figure 7D
[0338] PCIE switch PCIE Switch Server 778
[0339] Network 790
[0340] Figure 8
[0341] 814 Input / Output Component Power 816
[0342] Presentation Component 818
[0343] Logic Unit 820
[0344] Communication interface 810
[0345] Input / Output (I / O) port 812 Figure 9
[0346] Application layer 940
[0347] Application 942
[0348] Software layer 930
[0349] Software 932
[0350] Framework layer 920
[0351] Job scheduler 932
[0352] Configuration manager 934
[0353] Distributed file system 938
[0354] Resource manager 936
[0355] Data center infrastructure layer 910
[0356] Resource coordinator 912
[0357] Grouped computing resources 914
[0358] Node C.R. 916
Claims
1. A voltage monitoring system, comprising: an electronic component; a power supply electrically coupled to the electronic component, the power supply providing an input voltage to the electronic component; a voltage monitor disposed between the power supply and the electronic component, the voltage monitor comprising: a high-frequency voltage error detector for comparing the input voltage with a first overvoltage OV threshold and a first undervoltage UV threshold; a low-frequency voltage error detector for filtering the input voltage to generate a filtered input voltage and comparing the filtered input voltage with a second UV threshold and a second OV threshold; and a safety manager communicatively coupled to the voltage monitor and the electronic component, the safety manager for causing a change in the operating state of the electronic component when the voltage monitor detects at least one of the following: the input voltage is greater than the first OV threshold, the input voltage is less than the first UV threshold, the filtered input voltage is greater than the second OV threshold, or the filtered input voltage is less than the second UV threshold.
2. The system according to claim 1, wherein the electronic component comprises at least one of a processor or a system-on-chip SoC, and the power supply comprises at least one of a switched-mode power supply or a linear power supply.
3. The system according to claim 1, wherein: the low-frequency voltage error detector comprises: a low-pass filter for removing at least a portion of the noise from the input voltage to generate the filtered input voltage; and a first comparator for performing the comparison of the filtered input voltage with the first OV threshold and the first UV threshold; and the high-frequency voltage error detector comprises a second comparator for performing the comparison of the input voltage with the second OV threshold and the second UV threshold.
4. The system according to claim 1, wherein the high-frequency voltage error detector is in parallel with the low-frequency voltage error detector, wherein the high-frequency voltage error detector is configured to compare the input voltage and at least one of the first OV threshold or the first UV threshold, and at least partially simultaneously use the low-frequency voltage error detector to perform the comparison of the input voltage and at least one of the second OV threshold or the second UV threshold.
5. The system according to claim 1, wherein at least one of the first OV threshold, the first UV threshold, the second OV threshold or the second UV threshold is reprogrammable.
6. The system according to claim 1, wherein the voltage monitor is located outside at least one of the power supply or the electronic component.
7. The system according to claim 1, further comprising: another electronic component; and another power supply electrically coupled to the another electronic component, the another power supply providing another input voltage to the second electronic component, wherein the voltage monitor is further configured to compare the another input voltage with the first OV threshold, the first UV threshold, the second OV threshold and the second UV threshold. Wherein the security manager is further configured to cause a change in the operating state of the other electronic component when the voltage monitor detects at least one of the following: The other input voltage is greater than the first OV threshold, The other input voltage is less than the first UV threshold, The other filtered input voltage is greater than the second OV threshold, or The filtered input voltage is less than the second UV threshold.
8. The system according to claim 7, wherein: The power supply is a switched-mode power supply; and The other power supply is a linear power supply.
9. The system according to claim 1, wherein the system consists of at least one of the following: A control system of an autonomous or semi-autonomous machine; A sensing system of an autonomous or semi-autonomous machine; A system for performing simulation operations; A system for performing deep learning operations; A system implemented using edge devices; A system implemented using robots; A system including one or more virtual machines VM; A system implemented at least in part in a data center; or A system implemented at least in part using cloud computing resources.
10. A voltage monitoring method, comprising: Providing an input voltage to an electronic component using a power supply; Comparing the input voltage with at least one of a high-frequency overvoltage OV threshold or a high-frequency undervoltage UV threshold using a high-frequency voltage error detector; Filtering the input voltage using a low-pass filter of a low-frequency voltage error detector to generate a filtered input voltage; Comparing the filtered voltage with at least one of a low-frequency OV threshold or a low-frequency UV threshold using the low-frequency voltage error detector; Using a security manager to determine a voltage error based on at least one of the input voltage being greater than the high-frequency OV threshold or less than the high-frequency UV threshold, or the filtered input voltage being greater than the low-frequency OV threshold or less than the low-frequency UV threshold; and Causing a change in the operating mode of the electronic component based at least in part on the determination of the voltage error.
11. The method according to claim 10, wherein the electronic component includes at least one of a processor or a system-on-chip SoC.
12. The method according to claim 10, wherein: The power supply is a switched-mode power supply; The input voltage corresponds to direct current DC; And The low-pass filter removes at least a portion of the alternating current AC noise from the input voltage to generate the filtered input voltage.
13. The method according to claim 10, wherein: The high-frequency voltage error detector and the low-frequency error detector are arranged in parallel; and The comparison using the high-frequency voltage error detector and the comparison using the low-frequency voltage error detector are performed at least in part simultaneously.
14. The method according to claim 10, wherein at least one of the high-frequency OV threshold, the high-frequency UV threshold, the low-frequency OV threshold, and the low-frequency UV threshold is reprogrammable.
15. A voltage monitor, comprising a circuit for: Receiving an input voltage from a power supply electrically coupled to an electronic component, the power supply providing the input voltage to the electronic component; Using a high-frequency voltage error detector, compare the input voltage with at least one of a high-frequency overvoltage OV threshold or a high-frequency undervoltage UV threshold; Using a low-frequency voltage error detector, filter the input voltage to generate a filtered input voltage; Using the low-frequency voltage error detector, compare the filtered voltage with at least one of a low-frequency OV threshold or a low-frequency UV threshold; And When a voltage error is detected based on at least one of the input voltage being greater than the high-frequency OV threshold or less than the high-frequency UV threshold or the filtered input voltage being greater than the low-frequency OV threshold or less than the low-frequency UV threshold, indicate the voltage error to the safety manager of the system.
16. The voltage monitor according to claim 15, wherein the indication of the voltage error causes a change in an electronic component communicatively coupled to the safety manager.
17. The voltage monitor according to claim 15, wherein: The power supply is a switched-mode power supply; The input voltage corresponds to direct current DC; And Remove at least a portion of alternating current AC noise from the input voltage to generate the filtered input voltage.
18. The voltage monitor according to claim 15, wherein the filtered input voltage is generated using a low-pass filter of the low-frequency voltage error detector.
19. The voltage monitor according to claim 15, wherein a first comparator is used to perform the comparison of the input voltage, and a second comparator is used to perform the comparison of the filtered input voltage.
20. The voltage monitor according to claim 15, wherein the voltage monitor consists of at least one of the following: A control system of an autonomous or semi-autonomous machine; A sensing system of an autonomous or semi-autonomous machine; A system for performing analog operations; A system for performing deep learning operations; A system implemented using an edge device; A system implemented using a robot; A system including one or more virtual machines VM; A system at least partially implemented in a data center; or A system at least partially implemented using cloud computing resources.
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