Phosphorus-doped gallium oxide dielectric layer, thin film transistor and preparation method thereof

Abstract

The present invention provides a phosphorus-doped gallium oxide dielectric layer, a thin film transistor and a preparation method thereof, wherein a Ga2O3 dielectric layer with excellent dielectric properties is synthesized by phosphorus (P) doping using an aqueous solution method. Appropriate P incorporation can act as a network connection and reduce oxygen-related defects (oxygen vacancies and hydroxyls) in Ga2O3, thereby improving the dielectric properties of the Ga2O3 dielectric layer. Using a Ga‑P‑O dielectric with an optimal doping concentration, the oxide thin film transistor exhibits higher performance, including high mobility, high current on / off ratio, low operating voltage and negligible hysteresis, and has excellent bias stress stability. Moreover, the Ga2O3 dielectric layer is synthesized using an aqueous solution method, which is simple, fast, very convenient, suitable for large-scale production, and provides a new path for the next generation of low-cost advanced Ga2O3 devices.

Description

Technical Field

[0001] The present invention relates to power semiconductor technology and semiconductor manufacturing fields, and in particular to a phosphorus-doped gallium oxide dielectric layer, a thin film transistor and a preparation method thereof. Background Art

[0002] Gallium oxide (Ga2O3) is widely used in the emerging field of optoelectronics as an ultra-wide bandgap semiconductor. It is a candidate material for next-generation high-power electronics and solar-blind ultraviolet photodetectors due to its unique material properties and substrate availability. Although Ga2O3 has been studied most as an ultra-wide bandgap semiconductor, recent studies have found that Ga2O3 is a promising high-κ dielectric material for high-end transistor fabrication due to its high thermal stability, excellent moisture resistance, and easy solution processing, as it has a large breakdown electric field of 8MV / cm, a dielectric constant of about 10, and good thermal / chemical stability, especially high resistance to moisture absorption.

[0003] It is worth noting that due to the inclusion of wet processes in current standard microelectronics manufacturing, resistance to moisture absorption is a major concern for high-κ oxides. Some high-κ oxides, such as La-based oxides, show relatively high dielectric constants and large band gaps, however, their high hygroscopicity severely impairs the electrical properties and hinders practical applications. Previous studies have shown that hygroscopicity may occur in most high-κ oxides. In this field, the Gibbs free energy change (ΔG) of the material is used to describe the hygroscopicity of high-κ oxides, and high-κ oxides with positive ΔG can significantly inhibit moisture absorption. According to previous theoretical calculations, among the high-κ oxide materials, only Sc2O3 (ΔG = 38.2 KJ mol -1 )、Ga2O3(ΔG=23.1KJ mol -1 ) and HfO2 (ΔG = 20.5 kJ mol -1 ) has a positive ΔG, indicating that it has strong resistance to moisture absorption. In fact, Ga2O3 has been widely used as a passivation material in the field of microelectronics. Although exposure to moisture and air is inevitable, the positive ΔG of Ga2O3 also indicates that it can be solution processed. The previous work of the present invention indeed shows that high-quality Ga2O3 dielectric films can be made by a simple aqueous solution route, thus achieving potential low-cost and large-scale applications.

[0004] However, the dielectric properties of solution-processed Ga2O3, especially the leakage current and breakdown strength, need to be further improved. Doping is a simple and effective way to improve the dielectric properties of Ga2O3, but the progress is quite slow. Oleksak et al. showed that W doping can improve the dielectric properties (leakage current and breakdown strength) of Ga2O3, but the device performance of thin film transistors (TFTs) has not been confirmed. He et al. demonstrated that Al doping can enhance the leakage current of Ga2O3, however, the resulting TFTs showed relatively poor on / off current ratio (~10 4 There is currently no effective element doping that can improve the dielectric properties of solution-processed Ga2O3 and also enable it to exhibit higher performance when used in thin-film transistors (TFTs).

[0005] Therefore, the prior art needs to be improved. Summary of the invention

[0006] In view of the above-mentioned deficiencies in the prior art, the purpose of the present invention is to provide a phosphorus-doped gallium oxide dielectric layer, a thin film transistor and a method for preparing the same. A Ga2O3 dielectric layer with excellent dielectric properties is synthesized by phosphorus (P) doping using an aqueous solution method, aiming to improve the dielectric properties of Ga2O3 currently processed by a solution method while improving the performance of devices used in thin film transistors (TFTs).

[0007] The technical solution of the present invention is as follows:

[0008] A phosphorus-doped gallium oxide dielectric layer comprises a gallium oxide dielectric layer, wherein the gallium oxide dielectric layer is doped with phosphorus.

[0009] The phosphorus-doped gallium oxide dielectric layer, wherein the phosphorus doping concentration in the gallium oxide dielectric layer is 0-40at%.

[0010] An application of a phosphorus-doped gallium oxide dielectric layer, wherein the phosphorus-doped gallium oxide dielectric layer as described above is applied to a thin film transistor.

[0011] A method for preparing a thin film transistor, comprising the steps of:

[0012] Mix Ga(NO)3·xH2O and H3PO4 into water to obtain Ga-PO solution;

[0013] Dissolve In(NO)3·xH2O in water to obtain In2O3 solution;

[0014] Providing a substrate, and forming a gate on the substrate;

[0015] Spin coating the Ga-PO solution on the gate for a predetermined time, followed by a first annealing process to form a Ga-PO dielectric layer / gate / substrate;

[0016] Spin coating the In2O3 solution on the Ga-PO dielectric layer of the Ga-PO dielectric layer / gate / substrate for a predetermined time, followed by a second annealing process to form an In2O3 channel layer / Ga-PO dielectric layer / gate / substrate;

[0017] An Al source electrode and a drain electrode are deposited on the In2O3 channel layer of the In2O3 channel layer / Ga-PO dielectric layer / gate / substrate to prepare the thin film transistor.

[0018] The method for preparing a thin film transistor, wherein in the Ga-PO solution, the atomic percentage of P / (Ga+P) is 0-40at%.

[0019] The method for preparing a thin film transistor, wherein the gate comprises P ++ -Si wafer.

[0020] The method for preparing a thin film transistor further comprises the step of filtering the prepared solution through a 0.2 μm filter syringe before spin coating.

[0021] The method for preparing a thin film transistor, wherein the first predetermined time is 20-30 seconds; and the second predetermined time is 20-30 seconds.

[0022] The method for preparing a thin film transistor, wherein the first annealing treatment is performed at 350-500° C. for 1 hour; and the second annealing treatment is performed at 300-350° C. for 1 hour.

[0023] A thin film transistor, wherein the thin film transistor is prepared by any of the above-mentioned methods for preparing the thin film transistor.

[0024] Beneficial effects: The present invention provides a phosphorus-doped gallium oxide dielectric layer, a thin film transistor and a preparation method thereof, wherein a Ga2O3 dielectric layer with excellent dielectric properties is synthesized by phosphorus (P) doping using an aqueous solution method. Appropriate P doping can act as a network connection (with PO4 3- form) and reduce oxygen-related defects ((oxygen vacancies (V O ) and hydroxyl groups (-OH)), thereby improving the dielectric properties of the Ga2O3 dielectric layer. Using Ga-PO dielectrics with P doping, the oxide thin film transistors (TFTs) showed higher performance, including a mobility of 20.49±0.32cm 2 V -1 s -1, subthreshold swing is 0.15±0.01V / dec, high current on / off ratio I on / I off >10 6 , low operating voltage and negligible hysteresis, and excellent bias stress stability. Systematic analysis shows that the incorporation of P greatly reduces oxygen-related defects (oxygen vacancies and hydroxyl groups) in Ga2O3, leading to better dielectric properties and TFT device performance. Moreover, the Ga2O3 dielectric layer is synthesized using an aqueous solution method, which is simple, fast, and very convenient, suitable for large-scale production, and provides a new path for the next generation of low-cost advanced Ga2O3 devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 TGA and DSC curves of the Ga-PO precursor powder provided in the embodiments of the present invention.

[0026] Figure 2 GIXRD diagram of Ga-PO thin film with P doping content of 0-40at% provided in the embodiment of the present invention.

[0027] Figure 3 This is an AFM image of a Ga-PO film with a P doping content of 0-40at% provided in an embodiment of the present invention.

[0028] Figure 4 The refractive index diagram of a Ga-PO film with a P doping content of 0-40at% provided in an embodiment of the present invention.

[0029] Figure 5 FTIR spectrum of Ga-PO thin film with P doping content of 0-40at% provided in the embodiment of the present invention.

[0030] Figure 6 XPS spectra of Ga-PO films with different P-doping contents provided in the embodiments of the present invention. (a) O 1s, (b) Ga 2p, (c) P 2p spectra, (d) P-doping ratio between solution and film.

[0031] Figure 7 Schematic diagram of P-doped Ga-PO metal network provided by an embodiment of the present invention. (a) Before P-doping; (b) After P-doping.

[0032] Figure 8 Capacitance-frequency (a) and current-voltage characteristics (b) of Ga-PO thin films with a P-doping content of 0-40 at% provided in an embodiment of the present invention.

[0033] Fig. 9Structural diagram (a) and cross-sectional transmission electron microscope TEM (b) of an In2O3 / Ga-PO (20at% P) TFT device provided in an embodiment of the present invention.

[0034] Fig.10 Transfer curve (a) and output curve (b) of In2O3 / Ga-PO TFT with P doping content of 0-40% provided in an embodiment of the present invention.

[0035] Fig.11 In2O3 / Ga-PO (20at% P) TFT provided in the embodiment of the present invention is (a) PBS (V G =2V), (b) NBS (V G =-2V)、(c)NBIS(V G =-2 V) and (d) the corresponding transfer curves under threshold voltage shift. DETAILED DESCRIPTION

[0036] The present invention provides a phosphorus-doped gallium oxide dielectric layer, a thin film transistor and a method for preparing the same. To make the purpose, technical solution and effect of the present invention clearer and more specific, the present invention is further described in detail below. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0037] An embodiment of the present invention provides a phosphorus-doped gallium oxide dielectric layer, comprising a gallium oxide dielectric layer, wherein phosphorus is doped in the gallium oxide dielectric layer.

[0038] The embodiment of the present invention improves the dielectric properties of gallium oxide (Ga2O3) by doping with phosphorus (P). Appropriate phosphorus doping can reduce oxygen-related defects (oxygen vacancies (V O ) and hydroxyl (-OH)), thereby improving the dielectric properties of Ga2O3. The surface of the phosphorus-doped Ga2O3 film is extremely smooth, and this atomic-level smooth morphology is crucial for high-performance electronic devices. At the same time, appropriate P doping can increase the film density. Using the Ga-PO dielectric layer with the optimal doping concentration as the gate dielectric, the oxide TFT exhibits higher device performance, including higher mobility (μ), on / off ratio (I on / I off )>10 6 , better subthreshold swing (SS), lower threshold voltage (V TH ), low operating voltage with negligible hysteresis, and excellent bias stress stability.

[0039] In some embodiments, the doping concentration of phosphorus in the gallium oxide dielectric layer is 0-40 at %.

[0040] Generally speaking, amorphous structures are the first choice for dielectric materials because of their smooth surface, good channel / dielectric interface, and low leakage current in the absence of grain boundaries. The GIXRD patterns of Ga2O3 films with phosphorus doping content of 0-40at% show that all P-doped Ga2O3 films are amorphous. At the same time, AFM images show that the surface of Ga-PO films is extremely smooth. In Ga-PO films with P content of 0, 10, 20, 30 and 40at%, the RMS roughness is 0.190, 0.148, 0.172, 0.186 and 0.181nm, respectively. This atomic-level smooth morphology is critical for high-performance electronic devices.

[0041] The embodiment of the present invention also uses ellipsometry to estimate the thickness and refractive index of the P-doped Ga2O3 film. When the P doping is 0, 10, 20, 30 and 40 at%, the thickness of the Ga2O3 film is 58.09, 57.85, 56.15, 54.56, and 53.50 nm, respectively. As the P doping content increases, the film thickness decreases slightly, which may be due to the different viscosities of the Ga(NO)3·xH2O and H3PO4 precursors. The change in the refractive index of the deposited Ga-PO film shows that the refractive index of the undoped Ga2O3 film is 1.680 (at 550 nm), and as the doping concentration increases, the refractive index first increases and then decreases, which are 1.697, 1.699, 1.688, and 1.675, respectively. The refractive index is directly related to the film density. By calculation, the film densities at 0, 10, 20, 30, and 40 at% P doping are 4.87, 4.95, 4.96, 4.91, and 4.85 g / cm, respectively. 3 Therefore, appropriate P doping can increase the film density, which is due to the fact that the PO bond energy (599.1 kJ / mol) is higher than the Ga-O bond energy (353.5 kJ / mol), promoting the formation of more metal network structures. In addition, the oxygen anions (PO4 3- ) can reduce oxygen-related defects in the film (V O and -OH), thereby increasing the film density. However, excessive P doping will reduce the film density because excess PO4 3- This will lead to the destruction of the undoped Ga2O3 network. Therefore, in the embodiment of the present invention, the phosphorus doping concentration is selected to be 10-40at%, preferably 20at%.

[0042] An embodiment of the present invention further provides an application of a phosphorus-doped gallium oxide dielectric layer, and the phosphorus-doped gallium oxide dielectric layer as described above is applied to a thin film transistor.

[0043] The embodiment of the present invention further provides a method for preparing a thin film transistor, comprising the steps of:

[0044] S10, mixing Ga(NO)3·xH2O and H3PO4 into water to obtain a Ga-PO solution;

[0045] S20, dissolving In(NO)3·xH2O in water to obtain an In2O3 solution;

[0046] S30, providing a substrate, and forming a gate on the substrate;

[0047] S40, spin coating the Ga-PO solution on the gate for a predetermined time, and then performing a first annealing treatment to form a Ga-PO dielectric layer / gate / substrate;

[0048] S50, spin coating the In2O3 solution on the Ga-PO dielectric layer of the Ga-PO dielectric layer / gate / substrate for a predetermined time of two, and then performing a second annealing treatment to form an In2O3 channel layer / Ga-PO dielectric layer / gate / substrate;

[0049] S60, depositing an Al source electrode and a drain electrode on the In2O3 channel layer of the In2O3 channel layer / Ga-PO dielectric layer / gate / substrate to prepare the thin film transistor.

[0050] In some embodiments, Ga(NO)3·xH2O and H3PO4 are mixed in deionized water and stirred on a stirring table for 2 to 3 hours to prepare a Ga-PO solution for spin coating.

[0051] Specifically, the total concentration of the metal precursor Ga-PO solution is 2M.

[0052] In some embodiments, in the Ga-PO solution, the atomic percentage of P / (Ga+P) is 0-40 at%. Specifically, the atomic ratio (P / Ga+P) is 0, 10, 20, 30 and 40%, respectively. At the same time, as the proportion of P in the precursor increases from 0 to 10, 20, 30 and 40%, the atomic ratio of P / Ga+P in the film steadily increases from 0 to 7.4, 12.4, 18.5 and 24.8%.

[0053] In some embodiments, the In2O3 channel material is made by dissolving In(NO)3·xH2O in deionized water.

[0054] Specifically, the concentration of In(NO)3·xH2O is 0.1M.

[0055] In some embodiments, the gate includes P ++ -Si wafer.

[0056] In some embodiments, before spin coating, the method further comprises the step of dropping the prepared solution onto the film through a 0.2 μm filtered syringe.

[0057] In some implementations, the first predetermined time is 20-30 seconds; the second predetermined time is 20-30 seconds.

[0058] In some embodiments, the first annealing treatment is performed at 350-500°C for 1h, preferably at 500°C. The TGA and DSC curves of the Ga-PO precursor powder show that the first endothermic peak at 135°C is related to the dehydration of H3PO4, and the second peak at 173°C is attributed to the dehydroxylation of gallium hydroxide. The TGA and DSC results show that impurities can be completely decomposed at 500°C to form a metal oxide skeleton. Therefore, the annealing temperature is set to 500°C.

[0059] In some embodiments, the second annealing treatment is performed at 300-350° C. for 1 hour.

[0060] In a specific embodiment, the present invention uses a bottom-gate top-contact arrangement structure to prepare a thin film transistor (TFT). First, a substrate is provided, and a gate is formed on the substrate. ++ -Si wafer as the gate. Then the Ga-PO solution was spun on a plate at a spin speed of 4500 rpm for 20 s, and then the Ga-PO sample was annealed at 500 °C for 1 h to form a Ga-PO dielectric layer / P ++ -Si gate / substrate. Then In2O3 solution is applied to Ga-PO dielectric layer / P ++ -Si gate / substrate was rotated at 3500rpm and then annealed at 350℃ for 1h to form In2O3 channel layer / Ga-PO dielectric layer / P ++ -Si gate / substrate. Finally, a 100nm thick Al source and drain are deposited on the In2O3 channel layer by thermal evaporation, and the channel length / width is 100 / 1500μm respectively. Finally, a phosphorus-doped gallium oxide dielectric layer thin film transistor is prepared. In addition, the present invention also prepares Al / Ga-PO / P ++-Si metal insulator metal (MIM) structure, test the capacitance and leakage current of Ga-PO to obtain the dielectric properties of Ga-PO. In the embodiment of the present invention, TGA and DSC (Netzsch) observe the thermal decomposition behavior of Ga-PO, Ga-PO structure is studied using GIXRD (Science), surface morphology and chemical composition are checked by AFM (Bruker) and XPS (Thermofisher), ellipsometry (JA Woollam) is used to determine the refractive index and thickness of Ga-PO film, and the microstructure of TFT device is observed by TEM (Tecnai). Under ambient conditions, electrical characteristics analysis is performed by semiconductor parameter analyzer (Keithley 2614B) and impedance analyzer (Keysight E4980A).

[0061] In some embodiments, P is incorporated into Ga2O3 in the form of phosphoric acid. For gallium nitrate in aqueous solution, there are usually Ga cations [Ga(OH2)6 3+ ]. These water ligands undergo thermal hydrolysis during the fabrication process after annealing to form a metal-oxygen-metal (MOM) framework. However, due to incomplete dehydration, oxygen-related defects (V O and -OH). These defects are the main reason for the poor dielectric properties of typical sol-gel high-κ oxides. The incorporation of phosphoric acid usually forms phosphate (PO4 3- ), on the one hand, by replacing part of the water ligands, these oxygen ions have a strong complexing ability with the adjacent Ga cations, and this behavior can effectively reduce the -OH group. On the other hand, the oxygen anion (PO4 3- ) also provides additional oxygen atoms, thus reducing V O In addition, PO4 3- It also acts as a network former by forming MOPOM bonds in the Ga2O3 lattice. Since the PO bond (599.1 kJ / mol) is higher than the Ga-O bond (353.5 kJ / mol), the network-forming oxygen anions are believed to be more stable.

[0062] In order to confirm that oxygen anions (PO4 3- ) is present, the present invention uses XPS to monitor the chemical and defect states of Ga-PO films. The results show that the O 1s binding energy increases with the increase of P doping, from 530.7eV without P doping to 531.6eV with 40at% P doping. According to previous reports, oxygen anions (PO4 3- ) has a characteristic binding energy of about 520 eV. Therefore, the positive shift of the O1s peak after P doping indicates the presence of oxygen ions (PO4 3-). The Ga 2p spectrum shows that the two spin-orbit doublets of Ga 2p 1 / 2 and Ga 2p 3 / 2 The generation of Ga2O3 was confirmed by observation, in which the geometry and binding energy of the Ga peak remained unchanged, indicating that Ga 3+ The local environment and oxidation state of the 2p-doped ... 3- , positively charged P 5+ ion, surrounded by four oxygen atoms), while P 3- The characteristic peak of (phosphide, metal-phosphorus bond) at 128.6 eV does not exist, which further verifies the oxygen anion (PO4 3- )’s existence.

[0063] In order to study the dielectric properties of the P-doped Ga2O3 layer, the embodiment of the present invention designs a dielectric structure based on Al / Ga-PO / P ++ -Si MIM structure capacitor. The capacitor is 10 2 -10 5 The capacitance-frequency (Cf) characteristics at Hz show that the dielectric constants of Ga2O3 are 10.16, 9.90, 8.73, 7.94 and 7.71 when the P doping amounts are 0, 10, 20, 30 and 40 at%, respectively. The decrease in the dielectric constant can be attributed to the reduction of "-OH" impurities. The P-doped samples show a lower frequency distribution, which is due to the enhanced film quality. The leakage current density and electric field (JE) of the Ga-PO insulator show that after P doping, the leakage current density and breakdown electric field are greatly improved. As the phosphorus doping rate increases to 20%, the Ga-PO dielectric exhibits a 1.92×10 -7 A / cm 2 The lowest leakage current. It is worth noting that the doped Ga-PO films all show similar excellent morphology relative to the undoped Ga2O3 dielectric film, so it is believed that the enhanced leakage current performance is related to the microstructure. In general, oxygen-related defects in high-κ oxides may act as carriers of leakage current and deteriorate dielectric properties. From the above film characterization, it can be seen that this improvement is attributed to the oxygen-related defects (V O In addition, P doping also increases the film density and reduces the voids in pure Ga2O3, which is also the reason for the relatively high leakage current. However, further increasing the P doping amount to 40at% will damage the electrical properties, which is related to the excessive phosphate (PO43- ) is directly related to the formation of non-network structured oxygen atoms, which results in the destruction of the original Ga2O3 network. Therefore, the preferred phosphorus doping rate in the embodiment of the present invention is 20at%.

[0064] An embodiment of the present invention further provides a thin film transistor, which is manufactured using any of the above-mentioned methods for manufacturing a thin film transistor.

[0065] Based on Ga-PO dielectric, an embodiment of the present invention provides an In2O3 / Ga-PO TFT device. The structural diagram and cross-sectional TEM image of the device show that the In2O3 / Ga-PO and Ga-PO / Si interfaces are clearly layered, and no obvious atomic diffusion occurs, which is crucial for carrier transport. From the TEM cross-sectional image, it can be seen that the thickness of Ga-PO and In2O3 is approximately 60nm and 6nm, which is consistent with the results of the previous ellipsometer analysis.

[0066] In2O3 / Ga-PO TFTs with different P-doping amounts were prepared by aqueous solution method to study the effect of P-doping on device performance. The transfer curves and output curves of In2O3 / Ga-PO TFT devices with different P-doping amounts show that the mobility μ of In2O3 TFT with undoped Ga2O3 dielectric is 12.13±0.18cm 2 V -1 s -1 , I on / I off 7.6×10 5 However, as the P doping amount in Ga2O3 dielectric increases, the mobility of the TFT device gradually increases. When the P doping ratio is 20%, the maximum mobility μ is 20.49±0.32cm 2 V -1 s -1 , I on / I off 1.9×10 6 The enhancement of the mobility μ also leads to a higher on-state current (I on ) increases, thereby increasing the switching ratio (I on / I off ), which is also reflected in the output characteristics. Previous reports have shown that the intrinsic oxygen-related defects in high-κ oxides (mainly -OH and V O ) usually acts as electron capture sites, deteriorating carrier transport, which is why undoped In2O3 / Ga2O3 TFT devices show relatively low mobility. Appropriate P doping can effectively reduce oxygen-related defects in Ga2O3, thereby improving the mobility of the device. However, due to excessive phosphate (PO4 3-) may act as impurities and lead to the destruction of the pure Ga2O3 network, so as the P doping content further increases to 40at%, the device mobility decreases to 14.22±0.25cm 2 V -1 s -1 The device mobility trend is consistent with the above microstructure, capacitance frequency and leakage current analysis. At the optimal P doping concentration (20at%), the In2O3 / Ga-PO TFT mobility μ is 20.49±0.32cm 2 V -1 s -1 , the switching ratio I on / I off 1.9×10 6 , SS is 0.15±0.01V / dec, V TH The device can operate at a low operating voltage (~2 V), which is very important for low-power portable mobile electronic systems. Undoubtedly, the performance of In2O3 / Ga-PO TFT is one of the advanced devices based on simple solution processing.

[0067] Based on the optimal doping concentration of Ga-PO (20at% P) dielectric, the bias stress stability of In2O3 TFT was evaluated in the present embodiment. The stability of the positive bias stress (PBS) of the device was observed to produce a positive V of 0.1V after a gate bias stress of 2V for 1440s. TH This phenomenon is attributed to the trapping of carriers during transport at the semiconductor layer / dielectric layer interface or defects in the dielectric layer. In addition, for TFT devices without passivation, the adsorption of oxygen molecules also contributes to V TH The negative bias stress (NBS) instability of In2O3 / Ga-PO TFTs was observed to produce a negative V of -0.32 V after 1440 s when the gate bias stress was 2 V. TH The shift is attributed to the fact that under the action of negative gate bias, H2O molecules in the air combine with holes in the semiconductor layer / dielectric interface to form positively charged water molecules. However, continuous loading of negative bias causes positively charged water molecules to accumulate on the back channel surface, causing electron delocalization at the semiconductor / dielectric interface, thereby enhancing the carrier response and causing V TH Negative shift. Under illumination conditions, photoexcited holes can drift to the dielectric or dielectric / semiconductor interface, resulting in a more severe V THThe corresponding VTH shifts of PBS, NBS and NBIS TFT devices after P doping indicate that P-doped In2O3 / Ga2O3 TFT devices show significant improvements under bias stress compared to undoped Ga2O3 or B-doped In2O3 / Ga2O3 TFT devices previously described, which is attributed to the reduced content of oxygen-related defects in the film. The principles described by the present invention through the incorporation of phosphoric acid are applicable to other high-κ oxides and to a variety of applications.

[0068] The following is a further explanation of a phosphorus-doped gallium oxide dielectric layer, a thin film transistor and a preparation method thereof according to the present invention through specific embodiments:

[0069] Example 1 Preparation of Phosphorus-doped Thin Film Transistor

[0070] The Ga-PO solution for spin coating was prepared by mixing Ga(NO)3·xH2O and H3PO4 in deionized water. The total concentration of the metal precursor was 2 M, and the atomic ratio (P / Ga+P) was 0, 10, 20, 30, and 40%, respectively. The In2O3 channel material was made by dissolving 0.1 M In(NO)3·xH2O in deionized water. Before spin coating, the prepared solution was dripped onto the film through a 0.2 μm filtered syringe. To prepare the oxide TFT, a bottom gate top contact arrangement was used. The Ga-PO solution was spun at a speed of 4500 rpm in P ++ -Si wafer (used as gate) was rotated for 20s, and then the Ga-PO sample was annealed at 500℃ for 1h. Then the In2O3 solution was ++ -Si substrate was rotated at 3500rpm and then annealed at 350℃ for 1h. 100nm thick Al source and drain were deposited on the In2O3 channel layer by thermal evaporation, and the channel length / width was 100 / 1500μm respectively. In addition, Al / Ga-PO / P ++ -Si metal-insulator-metal (MIM) structure to obtain the dielectric properties of Ga-PO.

[0071] Example 2 Related performance parameters of Ga-PO films at different P doping levels

[0072] The thermal decomposition behavior of Ga-PO was observed by TGA and DSC (Netzsch). The Ga-PO structure was studied using GIXRD (Rigaku). The surface morphology and chemical composition were examined by AFM (Bruker) and XPS (Thermofisher). Ellipsometry (JA Woollam) was used to determine the refractive index and thickness of Ga-PO films. The microstructure of the TFT device was observed by TEM (Tecnai). Electrical characteristics were analyzed by a semiconductor parameter analyzer (Keithley 2614B) and an impedance analyzer (Keysight E4980A) under ambient conditions.

[0073] The relevant performance parameters of Ga-PO films under different P doping amounts are shown in Table 1.

[0074] Table 1. Ga-PO film properties at different p-doping ratios

[0075]

[0076] Figure 1 The TGA and DSC curves of Ga-PO precursor powder are shown. The first endothermic peak at 135°C is related to the dehydration of H3PO4. The second peak at 173°C is attributed to the dehydroxylation of gallium hydroxide. The TGA and DSC results show that the impurities can be completely decomposed at 500°C to form a metal oxide skeleton. Therefore, the annealing temperature is set to 500°C.

[0077] Figure 2 GIXRD patterns of Ga-PO films with phosphorus doping content ranging from 0 to 40 at% are shown. All P-doped Ga2O3 films are in an amorphous state. Generally, amorphous structures are preferred for dielectric materials because of their smooth surface, good channel / dielectric interface, and low leakage current in the absence of grain boundaries. Figure 3 The AFM images in Figure 3 show that the surface of the Ga-PO film is extremely smooth. The RMS roughness of the Ga-PO films with P contents of 0, 10, 20, 30, and 40 at% are 0.190, 0.148, 0.172, 0.186, and 0.181 nm, respectively. This atomically smooth morphology is critical for high-performance electronic devices.

[0078] The thickness and refractive index of P-doped Ga2O3 films were estimated by ellipsometry. The thickness of Ga2O3 films was 58.09, 57.85, 56.15, 54.56, and 53.50 nm at P-doping concentrations of 0, 10, 20, 30, and 40 at%, respectively. The film thickness decreased slightly with increasing P-doping content, which may be due to the different viscosities of Ga(NO)3·xH2O and H3PO4 precursors. Figure 4The change of the refractive index of the deposited Ga-PO film is shown. The refractive index of the undoped Ga2O3 film is 1.680 (at 550nm), and as the doping concentration increases, the refractive index first increases and then decreases, which are 1.697, 1.699, 1.688, and 1.675, respectively. The refractive index is directly related to the film density. By calculation, the film density at 0, 10, 20, 30, and 40 at% P doping is 4.87, 4.95, 4.96, 4.91, and 4.85 g / cm, respectively. 3 Therefore, appropriate P doping can increase the film density, which is due to the fact that the PO bond energy (599.1 kJ / mol) is higher than the Ga-O bond energy (353.5 kJ / mol), promoting the formation of more metal network structures. In addition, the oxygen anions (PO4 3- ) can reduce oxygen-related defects in the film (V O and -OH), thereby increasing the film density. However, excessive P doping will reduce the film density because excess PO4 3- This will lead to the destruction of the undoped Ga2O3 network. Figure 5 The FTIR spectra of Ga-PO films with P doping contents ranging from 0 to 40 at% are shown.

[0079] XPS was used to monitor the chemical and defect states of Ga-PO thin films. Figure 6 As shown in (a), the O 1s binding energy increases with the increase of P doping amount, from 530.7eV without P doping to 531.6eV with 40at% P doping. According to previous reports, oxygen anions (PO4 3- ) has a characteristic binding energy of about 520 eV. Therefore, the positive shift of the O1s peak after P doping indicates the presence of oxygen ions (PO4 3- ). Figure 6 (b) describes the Ga 2p spectrum by analyzing the two spin-orbit doublets of Ga2p 1 / 2 and Ga 2p 3 / 2 The generation of Ga2O3 was confirmed by observation, in which the geometry and binding energy of the Ga peak remained unchanged, indicating that Ga 3 + The local environment and oxidation state of are not affected by P incorporation. The corresponding P 2p spectrum is shown in Figure 6 As shown in (c), according to previous reports on the P2p peak, the peaks at 135.6 eV, 133.5 eV, 128.6 eV, and 129.9 eV correspond to P2O5, phosphate, phosphide, and element P, respectively. Therefore, in the present invention, the characteristic peak of 133.5 eV is assigned to phosphate (PO4 3- , positively charged P 5+ ion, surrounded by four oxygen atoms), while P3- The characteristic peak of (phosphide, metal-phosphorus bond) at 128.6 eV does not exist, which further verifies the oxygen anion (PO4 3- ) exists. In addition, Figure 6 As shown in (d), as the P content in the precursor increases from 0 to 10, 20, 30, and 40%, the P / Ga+P atomic ratio in the film increases steadily from 0 to 7.4, 12.4, 18.5, and 24.8%.

[0080] Figure 7 The formation mechanism of Ga2O3 (in the form of phosphoric acid) when P is doped is explained. Figure 7 As shown in (a), for gallium nitrate in aqueous solution, there are usually Ga cations [Ga(OH2)6 3+ ]. These water ligands undergo thermal hydrolysis during the fabrication process after annealing to form a metal-oxygen-metal (MOM) framework. However, due to incomplete dehydration, oxygen-related defects (V O These defects are the main reason for the poor dielectric properties of typical sol-gel high-κ oxides. Figure 7 As shown in (b), the incorporation of phosphoric acid usually forms phosphate (PO4 3- ), on the one hand, by replacing part of the water ligands, these oxygen ions have a strong complexing ability with the adjacent Ga cations, and this behavior can effectively reduce the -OH group; on the other hand, the oxygen anion (PO4 3- ) also provides additional oxygen atoms, thus reducing V O In addition, PO4 3- It also acts as a network former by forming MOPOM bonds in the Ga2O3 lattice. Since the PO bond (599.1 kJ / mol) is higher than the Ga-O bond (353.5 kJ / mol), the network-forming oxygen anions are believed to be more stable.

[0081] Example 3 Performance Test of TFT Device

[0082] In order to study the dielectric properties of P-doped Ga2O3 layers, a novel Al / Ga-PO / P ++ -Si MIM structure capacitor. Figure 8 (a) describes 10 2 -10 5Capacitance-frequency (Cf) characteristics at Hz. The dielectric constants of Ga2O3 are 10.16, 9.90, 8.73, 7.94, and 7.71 at P doping levels of 0, 10, 20, 30, and 40 at%, respectively. The decrease in the dielectric constant can be attributed to the reduction of "-OH" impurities. The P-doped samples show a lower frequency distribution, which is due to the enhanced film quality. Figure 8 (b) shows the leakage current density and electric field (JE) of the Ga-PO insulator. It can be found that after P doping, the leakage current density and breakdown electric field are greatly improved. As the phosphorus doping rate increases to 20%, the Ga-PO dielectric exhibits a 1.92×10 -7 A / cm 2 The lowest leakage current. It is worth noting that the doped Ga-PO films all show similar excellent morphology compared to the undoped Ga2O3 dielectric film, so it is believed that the enhanced leakage current performance should be related to the microstructure. In general, oxygen-related defects in high-κ oxides may act as carriers of leakage current and deteriorate dielectric properties. From the above film characterization, it can be seen that this improvement is attributed to the oxygen-related defects (V O In addition, P doping also increases the film density and reduces the voids in pure Ga2O3, which is also the reason for the relatively high leakage current. However, further increasing the P doping amount to 40at% will damage the electrical properties, which is related to the excessive phosphate (PO4 3- ) because it forms oxygen atoms with non-network structure, resulting in the destruction of the original Ga2O3 network.

[0083] Fig. 9 (a) and (b) show the structural diagram and cross-sectional TEM of the In2O3 / Ga-PO (20at% P) device. The TEM image shows that the In2O3 / Ga-PO and Ga-PO / Si interfaces are clearly layered and there is no obvious atomic diffusion phenomenon, which is crucial for the carrier transport of TFT devices. From the TEM cross-sectional image, it can be seen that the thickness of Ga-PO and In2O3 is approximately 60nm and 6nm, which is consistent with the results of the previous ellipsometer analysis. Next, In2O3 / Ga-P-OTFTs with different P-doping amounts were prepared by an aqueous solution method to study the effect of P doping on device performance.

[0084] Fig.10 (a) and (b) show the transfer curves and output curves of In2O3 / Ga-PO TFT devices with different P doping amounts. The relevant parameters of the devices are shown in Table 2.

[0085] Table 2. Device parameters of In2O3 TFTs with Ga-PO dielectric

[0086]

[0087] a Average values ​​of 15 devices

[0088] The mobility μ of In2O3 TFT with undoped Ga2O3 dielectric is 12.13±0.18cm 2 V -1 s -1 , I on / I off 7.6×10 5 However, as the P doping amount in Ga2O3 dielectric increases, the mobility of the TFT device gradually increases. When the P doping ratio is 20%, the maximum mobility μ is 20.49±0.32cm 2 V -1 s -1 , I on / I off 1.9×10 6 The enhancement of the mobility μ also leads to a higher on-state current (I on ) increases, thereby increasing the switching ratio (I on / I off ), which is also reflected in the output characteristics. Previous reports have shown that the intrinsic oxygen-related defects in high-κ oxides (mainly -OH and V O ) usually act as electron capture sites, deteriorating carrier transport. This is why undoped In2O3 / Ga2O3 TFT devices show relatively low mobility. Appropriate P doping can effectively reduce oxygen-related defects in Ga2O3, thereby improving the mobility of the device. However, due to excessive phosphate (PO4 3- ) may act as impurities and lead to the destruction of the pure Ga2O3 network, so as the P doping content further increases to 40at%, the device mobility decreases to 14.22±0.25cm 2 V -1 s -1 The device mobility trend is consistent with the above microstructure, capacitance frequency and leakage current analysis. At the optimal P doping concentration (20at%), the In2O3 / Ga-PO TFT mobility μ is 20.49±0.32cm 2 V -1 s -1 , the switching ratio I on / I off 1.9×10 6, SS is 0.15±0.01V / dec, VTH is 0.03±0.01V and negligible hysteresis. In addition, the device can operate at a low operating voltage (~2V), which is very important for low-power portable mobile electronic systems. Undoubtedly, the performance of In2O3 / Ga-PO TFT is one of the advanced devices based on simple solution processing.

[0089] The bias stress stability of In2O3 TFTs was evaluated based on Ga-PO (20at%P) dielectric with optimal doping concentration, as Fig.11 shown. Fig.11 (a) shows the stability of the device under positive bias stress (PBS). A gate bias stress of 2 V was observed to produce a positive V of 0.1 V after 1440 s. TH This phenomenon is attributed to the trapping of carriers during transport at the semiconductor layer / dielectric layer interface or defects in the dielectric layer. In addition, for TFT devices without passivation, the adsorption of oxygen molecules also contributes to V TH positive movement. Fig.11 (b) shows the negative bias stress (NBS) instability of the In2O3 / Ga-PO TFT. A gate bias stress of 2 V was observed to produce a negative V of -0.32 V after 1440 s. TH The shift is attributed to the fact that under the action of negative gate bias, H2O molecules in the air combine with holes in the semiconductor layer / dielectric interface to form positively charged water molecules. However, continuous loading of negative bias causes positively charged water molecules to accumulate on the back channel surface, causing electron delocalization at the semiconductor / dielectric interface, thereby enhancing the carrier response and causing V TH Negative shift. Fig.11 (c) illustrates the negative bias illumination stress (NBIS) instability after oxygen anion doping into the device. The results show that under illumination conditions, the photoexcited holes drift to the dielectric or dielectric / semiconductor interface, resulting in more severe V TH Displacement -0.43V. Fig.11 (d) Plotted the corresponding V values ​​of PBS, NBS and NBIS in TFT devices after P doping TH It is noteworthy that the P-doped In2O3 / Ga2O3 TFT devices show a significant improvement under bias stress compared to previous reports on undoped Ga2O3 or B-doped In2O3 / Ga2O3 TFT devices, which is attributed to the reduced content of oxygen-related defects in the film. Therefore, the principles illustrated by the incorporation of phosphoric acid are applicable to other high-κ oxides and are suitable for a variety of applications.

[0090] In summary, the present invention provides a phosphorus-doped gallium oxide dielectric layer, a thin film transistor and a preparation method thereof, wherein a Ga2O3 dielectric layer with excellent dielectric properties is synthesized by phosphorus (P) doping using an aqueous solution method. Appropriate P doping can act as a network connection (with PO4 3- form) and reduce oxygen-related defects ((oxygen vacancies (V O ) and hydroxyl groups (-OH)), thereby improving the dielectric properties of the Ga2O3 dielectric layer. Using Ga-PO dielectrics with optimal doping concentrations, the oxide thin-film transistors (TFTs) exhibited higher performance, including a mobility of 20.49±0.32cm 2 V -1 s -1 , subthreshold swing is 0.15±0.01V / dec, high current on / off ratio I on / I off >10 6 , low operating voltage and negligible hysteresis, and excellent bias stress stability. Systematic analysis shows that the incorporation of P greatly reduces oxygen-related defects (oxygen vacancies and hydroxyl groups) in Ga2O3, leading to better dielectric properties and TFT device performance. Moreover, the Ga2O3 dielectric layer is synthesized using an aqueous solution method, which is simple, fast, and very convenient, suitable for large-scale production, and provides a new path for the next generation of low-cost advanced Ga2O3 devices.

[0091] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A method for preparing a thin film transistor, characterized in that: Includes steps: Mix Ga(NO)3·xH2O and H3PO4 into water to obtain Ga-PO solution; Dissolve In(NO)3·xH2O in water to obtain In2O3 solution; Providing a substrate, and forming a gate on the substrate; Spin coating the Ga-PO solution on the gate for a predetermined time, followed by a first annealing process to form a Ga-PO dielectric layer / gate / substrate; Spin coating the In2O3 solution on the Ga-PO dielectric layer of the Ga-PO dielectric layer / gate / substrate for a predetermined time, followed by a second annealing process to form an In2O3 channel layer / Ga-PO dielectric layer / gate / substrate; An Al source electrode and a drain electrode are deposited on the In2O3 channel layer of the In2O3 channel layer / Ga-PO dielectric layer / gate / substrate to prepare the thin film transistor.

2. The method for preparing a thin film transistor according to claim 1, characterized in that: In the Ga-PO solution, the atomic percentage of P / (Ga+P) is 0-40 at %.

3. The method for preparing a thin film transistor according to claim 1, characterized in that: The gate includes P ++ -Si wafer.

4. The method for preparing a thin film transistor according to claim 1, characterized in that: The method also includes the following steps before spin coating: filtering the prepared solution through a 0.2 μm filter syringe.

5. The method for preparing a thin film transistor according to claim 1, characterized in that: The first predetermined time is 20-30 seconds; the second predetermined time is 20-30 seconds.

6. The method for preparing a thin film transistor according to claim 1, characterized in that: The first annealing treatment is performed at 350-500° C. for 1 hour; the second annealing treatment is performed at 300-350° C. for 1 hour.

7. A thin film transistor, characterized in that: The thin film transistor is prepared by the method for preparing the thin film transistor as described in any one of claims 1 to 6.

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