Display device

Abstract

A display device comprises a light-emitting element (ED), wherein the light-emitting element (ED) includes a first electrode (D1), a second electrode (D2), a light-emitting layer (LE), a first charge transport layer (LT1) having a first charge transport function, and a second charge transport layer (LT2) having a second charge transport function. The display device comprises a first inspection element (X1) including a fourth electrode and a third electrode. The first inspection element is a single-charge element including a light-emitting layer shared with the light-emitting element and a first charge transport layer, and mainly through which first charges flow. The light-emitting element is driven according to the characteristics of the first inspection element.

Description

Technical Field

[0001] The present invention relates to a display device. Background Art

[0002] Patent Document 1 discloses a method of detecting the current / voltage characteristics of a light-emitting element of a sub-pixel and driving the light-emitting element based on the detection result.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Publication No. 2003-330418 Summary of the Invention

[0006] Technical problems to be solved by the present invention

[0007] The method of Patent Document 1 (external compensation) has a problem of not being applicable to a light-emitting element whose light-emitting characteristics largely depend on electron injection or hole injection.

[0008] Technical solutions to technical problems

[0009] A display device according to one embodiment of the present invention comprises a light-emitting element in each sub-pixel, wherein the light-emitting element includes: a first electrode; a second electrode; a light-emitting layer disposed between the first electrode and the second electrode; a first charge transport layer disposed between the first electrode and the light-emitting layer; and a second charge transport layer disposed between the light-emitting layer and the second electrode, wherein the display device comprises a first inspection element including a third electrode and a fourth electrode, the first inspection element including the light-emitting layer and the first charge transport layer disposed between the third electrode and the fourth electrode and shared with the light-emitting element, and the light-emitting element is driven according to characteristics of the first inspection element.

[0010] Beneficial effects

[0011] According to one embodiment of the present invention, external compensation can be performed even for a light-emitting element whose light-emitting characteristics largely depend on electron injection or hole injection. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a block diagram showing the configuration of the display device according to the first embodiment.

[0013] Figure 2 (a) is a cross-sectional view showing the structure of the display unit. Figure 2 (b) is Figure 2 Equivalent circuit diagram of (a).

[0014] Figure 3(a) is the band gap diagram of the light-emitting element, Figure 3 (b) and (c) are schematic diagrams showing the state of electron current in the light-emitting element.

[0015] Figure 4 (a) is a graph showing the (hole) current / voltage characteristics of a light-emitting element. Figure 4 (b) is a graph showing the brightness / voltage characteristics of the light-emitting element. Figure 4 (c) is a graph showing the (electronic) current / voltage characteristics of the test element. Figure 4 (d) is a graph showing the relationship between the voltage of the test element and the luminance of the light-emitting element.

[0016] Figure 5 Schematic diagram showing a configuration example of a test circuit and a pixel circuit.

[0017] Figure 6 This is a flowchart showing an example of the operation of the display device.

[0018] Figure 7 (a) to (d) are cross-sectional views illustrating a method for manufacturing the display device according to the first embodiment.

[0019] Figure 8 (a) and (b) are cross-sectional views showing the configuration of a display portion according to the second embodiment.

[0020] Figure 9 (a) and (b) are cross-sectional views showing the configuration of a display portion according to the third embodiment.

[0021] Figure 10 Schematic diagram showing a modified example of the inspection circuit and the pixel circuit.

[0022] Figure 11 2 is a schematic diagram showing still another modified example of the inspection circuit and the pixel circuit.

[0023] Figure 12 This is a cross-sectional view showing a modified example of the display portion of the first embodiment.

[0024] Figure 13 (a) and (b) are cross-sectional views showing another modified example of the display portion of the first embodiment.

[0025] Figure 14 (a) and (b) are cross-sectional views showing modified examples of the display portion of the second embodiment. DETAILED DESCRIPTION

[0026] [First embodiment]

[0027] Figure 1This is a block diagram showing the configuration of the display device according to the first embodiment. Figure 2 (a) is a cross-sectional view showing the structure of the display unit. Figure 2 (b) is Figure 2 The equivalent circuit diagram of (a). Figure 1 As shown, the display device 10 includes a display unit 30, a driving unit 40 for driving the display unit 30, and a control unit 50 for controlling the driving unit 40. In the display unit 30, a light-emitting element ES is formed for each sub-pixel, and a first test element X1 is formed for each of one or more sub-pixels. The light-emitting element ES is driven based on the characteristics of the first test element X1.

[0028] like Figure 2 As shown in FIG, the display unit 30 has a TFT layer (thin film transistor layer) 4, a light-emitting element layer 5 and a sealing layer 6 formed in sequence on the substrate 2. The light-emitting element layer 5 includes a light-emitting element ES (such as a quantum dot light-emitting diode) and a first inspection element X1.

[0029] The light-emitting element ES includes: a first electrode D1; a second electrode D2 opposite to the first electrode D1; a light-emitting layer LE arranged between the first electrode D1 and the second electrode D2; a first charge transport layer LT1 arranged between the first electrode D1 and the light-emitting layer LE and having a first charge transport function; and a second charge transport layer LT2 arranged between the light-emitting layer LE and the second electrode D2 and having a second charge transport function.

[0030] The first inspection element X1 includes a third electrode A3 and a fourth electrode K4, and a light-emitting layer LE and a first charge transport layer LT1 that are provided between the third electrode A3 and the fourth electrode K4 and shared with the light-emitting element ES. Specifically, the light-emitting layer LE of the present embodiment is provided in series (continuously) on the light-emitting element ES and the first inspection element X1 provided adjacent to the light-emitting element ES. In addition, the first charge transport layer LT1 of the present embodiment is provided in series (continuously) on the light-emitting element ES and the first inspection element X1 provided adjacent to the light-emitting element ES. Figure 1 In the example, the first charge is electrons, and the second charge is holes. The first inspection element X1 is a single-charge element, specifically an electron-only device (EOD), in which the first charge (electrons) primarily flows. On the first inspection element X1, the light-emitting layer LE is in contact with the third electrode A3.

[0031] In this embodiment, the first electrode D1 (cathode) is connected to the ELVSS power supply (low-potential power supply) via transistor Te, and the fourth electrode K4 is connected to the ELVSS power supply via transistor Tx. The second electrode D2 and the third electrode A3 form a common electrode (common anode) 25 in series. The common electrode 25 is connected to the ELVDD power supply (high-potential power supply).

[0032] A glass substrate or a flexible base material mainly composed of a resin such as polyimide can be used as the substrate 2. A barrier layer for blocking foreign matter such as water and oxygen can also be provided on the upper surface of the substrate 2.

[0033] The first electrode D1 is a light-reflecting electrode, for example, formed from a laminate of Al (aluminum), Ag (silver), or an alloy containing Ag. The edge cover film 23 covers the edges of each of the first electrode D1 and the fourth electrode K4, leaving the non-edge portions exposed. The light-emitting layer LE includes quantum dots that emit blue, red, or green light. The common electrode 25 is formed from a light-transmitting metal thin film, such as ITO (indium tin oxide) or a magnesium-silver alloy. However, the light-emitting layer LE may also include an organic light-emitting material that emits blue, red, or green light.

[0034] In the light-emitting element ES, holes and electrons are recombined in the light-emitting layer LE by the driving current between the first electrode D1 and the second electrode D2 (common electrode 25), and the excitons generated thereby emit light in the process of transitioning from the conduction band energy level of the quantum dot to the valence band energy level.

[0035] Figure 3 (a) is the band gap diagram of the light-emitting element, Figure 3 (b) and (c) are schematic diagrams showing the state of the electron current in the light-emitting element. Figure 3 In the example, the band gap is varied by adjusting the particle size of quantum dots (QDs) (comprising a core composed of CdSe and a shell composed of ZnS) to achieve red, green, and blue emission wavelengths. In the light-emitting element ES, the conduction band energy level of blue-emitting quantum dots (QDs) is particularly shallow (e.g., -2.7 eV), making electron injection difficult. Therefore, electron injection is improved through a first charge transport layer (electron transport layer) LT1, which has a shallow conduction band energy level. Electron injection from the first charge transport layer LT1 into the quantum dots (QDs) significantly affects the characteristics of the light-emitting element.

[0036] This electron injection also has a great influence on the state of the interface between the first charge transport layer LT1 and the quantum dots QD, and the interface between the first charge transport layer LT1 and the first electrode D1. Figure 3 As shown in (b) and (c), when nanoparticles NP containing metal oxides such as ZnO, SnO2, TiO2, etc. are used in the first charge transport layer LT1, the state of these interfaces is prone to deviation in each coating (each light-emitting element), thereby causing deviations in the characteristics of the light-emitting element.

[0037] For example, Figure 3As shown in (b), the electron flow is uniform at the interface of the nanoparticle NP without deviation, and the QD also emits light uniformly, so it is assumed that the light-emitting element deteriorates uniformly. Figure 3 At the interface where the nanoparticles NP are arranged in a biased manner as in (b), the flow of electrons becomes dense and sparse, and the QD with large electron injection emits large light, while the QD with small electron injection emits small light. In the QD with large light emission, the degradation of the QD proceeds faster than that of the QD with small light emission. Therefore, assuming that the QD with large degradation and the QD with small degradation are mixed in the light-emitting element, the element as a whole is affected by the QD with large degradation and deteriorates rapidly.

[0038] Figure 4 (a) is a graph showing the (hole) current / voltage characteristics of the light-emitting element ES. Figure 4 (b) is a graph showing the brightness / voltage characteristics of the light-emitting element ES. Figure 4 (c) is a graph showing the (electron) current / voltage characteristics of the inspection element X1 (EOD), Figure 4 (d) is a graph showing the relationship between the voltage of the test element X1 (EOD) and the luminance of the light-emitting element.

[0039] like Figure 2 and Figure 4 As shown, the current (hole current) Ie flowing through the light-emitting element ES increases when the anode / cathode voltage Ve is VA, and the electron current Ix flowing through the first test element X1 increases when the anode / cathode voltage Ve is the electron injection start voltage VC (>VA). The luminance L of the light-emitting element ES increases when the anode / cathode voltage Ve is the electron injection start voltage VC. This is because the electron injection is smaller than the hole injection.

[0040] Therefore, in Figure 1 / Figure 2 In the first test element X1, an EOD is fabricated that shares the light-emitting layer LE and the first charge transport layer LT1 (electron transport layer) with the light-emitting element ES, but does not have a hole transport layer (HTL). Electrons primarily flow through the first test element X1, and holes hardly flow.

[0041] The deviation of the interface state between the first charge transport layer LT1 and the light-emitting layer LE depends on the liquid amount, flow rate, concentration of the quantum dot QD dispersion solution, ambient temperature and humidity (ease of drying of the solvent), etc. during coating. Therefore, with respect to the light-emitting element ES and the first inspection element X1, by producing the first charge transport layer LT1 in the same process and producing the light-emitting layer LE in the same process, the interface state of the light-emitting element ES and the first inspection element X1 can be made consistent.

[0042] In the first embodiment, while changing the gate voltage Vg (grayscale signal) shared by the transistors Te / Tx, the relationship between the voltage Vk of the fourth electrode K4 of the first test element X1 and the brightness L of the light-emitting element ES is obtained ( Figure 4 The characteristic of (d) is stored as a table in the control unit 50. For example, the grayscale signal Vg=V(To), the luminance L=Lo of the light-emitting element ES (luminance corresponding to the grayscale To), the voltage Vx=Vo applied to the first test element X1, and the grayscale To of the sub-pixel are associated with each other.

[0043] In the inspection mode described later, the voltage Vk of the fourth electrode K4 is measured as the gate voltage Vg = V(To). If Vx (the potential difference between Vk and ELVDD) = Vo, the grayscale signal V(To) is not corrected. If the voltage Vk of the fourth electrode K4 is measured and Vx < Vo, electron current easily flows through the light-emitting element ES and the first inspection element X1, and the brightness L of the light-emitting element exceeds the specified Lo, correction is performed to increase the grayscale signal V(To) and reduce the electron current in the light-emitting element ES. Conversely, if Vx > Vo, electron current hardly flows through the light-emitting element ES and the first inspection element X1, and the brightness L of the light-emitting element exceeds the specified Lo, correction is performed to decrease the grayscale signal V(To) and increase the electron current in the light-emitting element ES.

[0044] This allows external compensation based on the characteristics of the first test element X1 (the value of the voltage Vk of the fourth electrode relative to the gate voltage Vg of the transistor Tx) even for light-emitting elements ES, whose emission characteristics are significantly dependent on electron injection. Specifically, this reduces the influence of individual subpixel characteristic variations caused by the interface state between the first charge transport layer LT1 (electron transport layer) and the light-emitting layer LE, as well as characteristic variations caused by differences in the degree of degradation over time, enabling desired emission characteristics to be achieved. This enables the realization of a high-quality display device.

[0045] Figure 5 Schematic diagram showing an example of the configuration of a test circuit and a pixel circuit. Figure 5 In the embodiment, an inspection circuit XC including a first inspection element X1 and a pixel circuit PC including a light-emitting element ES are provided for each sub-pixel, and data signal lines DL, measurement lines FL and a voltage measurement circuit SC as a voltage measurement unit are arranged in a manner corresponding to sub-pixel columns.

[0046] In the inspection circuit XC, the fourth electrode K4 of the first inspection element X1 is connected to the measurement line FL via transistor Tz. The gate of transistor Tx is connected to the data signal line DL via transistor Ts and to the ELVSS power supply via capacitor Cx. The gates of transistors Ts and Tz are connected to the inspection line Gx, the data signal line DL is connected to the driver 40, and the measurement line FL is connected to the voltage measurement circuit SC. In the pixel circuit PC, the gate of transistor Te is connected to the data signal line DL via transistor Tw and to the ELVSS power supply via capacitor Cp. The gate of transistor Tw is connected to the scanning signal line GL.

[0047] exist Figure 5 In the display mode, the scanning signal line GL is selected, and a grayscale signal is written from the data signal line DL to the gate of the transistor Te. Furthermore, in the test mode, the test line Gx is selected, and a grayscale signal is written from the data signal line DL to the gate of the transistor Tx. The voltage Vk of the fourth electrode K4 of the first test element X1 is measured by the voltage measurement circuit SC.

[0048] Figure 6 This is a flowchart showing an example of the operation of the display device. In step S1, when the user turns on the power of the display device 10, the process proceeds to step S2. If it is an initial startup, the process proceeds to step S3, and the control unit 50 sets the display unit 30 to the inspection mode. In the inspection mode, the inspection circuit XC is driven to perform Figure 2 The measurement of the voltage Vk of the fourth electrode K4 and the correction of the grayscale signal. For example, the voltage Vk of the fourth electrode K4 is measured when the grayscale signal V(To) corresponding to the grayscale To is written to the gate of the transistor Tx. If Vx=Vo( Figure 4 If Vx < Vo, the grayscale signal V(To) is not corrected. If Vx < Vo, the grayscale signal V(To) is corrected to increase. If Vx > Vo, the grayscale signal V(To) is corrected to decrease. Step S3 can reduce the influence of the initial characteristic deviation of the pixel circuit PC (light-emitting element ES).

[0049] After step S3 is completed, the process proceeds to step S4, where the control unit 50 sets the display unit 30 to display mode. In display mode, the pixel circuit PC is driven for display, and the inspection circuit XC is not driven. However, this is not limited to this. In display mode, the inspection circuit XC may also be driven, for example, by driving the first inspection element X1 at the same current density as the light-emitting element ES. This allows the degradation states of the charge transfer layer LT1, the light-emitting layer LE, and their interfaces to be aligned in the first inspection element X1 and the light-emitting element ES, allowing the first inspection element X1 to correct for any reduction in brightness caused by degradation of the light-emitting element ES.

[0050] If the initial startup is not complete in step S2, the process proceeds to step S5, where the control unit 50 sets the display unit 30 to display mode. If the user subsequently turns off the power to the display device 10 ("Yes" in step S6), the process proceeds to step S7, where the control unit 50 sets the display unit 30 to the same inspection mode as in step S3. Regularly performing step S7 can reduce the effects of time-dependent degradation of the pixel circuit PC (light-emitting element ES).

[0051] Ideally, Vk measurement and grayscale signal V(To) correction in inspection mode are performed for the three color (R, G, and B) pixel circuits PC and inspection element X1. However, this can be performed only for the blue pixel circuit PC and inspection element X1, as electron injection has a significant impact on the luminescence characteristics. Furthermore, Vk measurement and grayscale signal correction can be performed at regular intervals, regardless of power on / off.

[0052] Figure 7 (a) to (d) are cross-sectional views illustrating a method for manufacturing the display device according to the first embodiment. Figure 7 In (a), the first electrode D1 and the fourth electrode K4 are formed on the TFT layer 4 including the transistors Te / Tx by sputtering, vapor deposition or the like. Figure 7 In (b), after forming the first charge transport layer LT1 (electron transport layer) and the light emitting layer LE by sputtering, evaporation, coating, etc., a mask pattern MP is disposed on the light emitting layer LE. The mask pattern MP may be a resist mask or a metal mask. Figure 7 In step (c), a second charge transport layer LT2 (hole transport layer) is formed by sputtering, evaporation, coating, or the like. Next, the mask pattern MP is removed, and a common electrode 25 (including a second electrode D2 and a third electrode A3) is formed by sputtering, evaporation, or the like. Thereafter, a sealing layer 6 ( Figure 7 (d)).

[0053] [Second embodiment]

[0054] Figure 8 (a) and (b) are cross-sectional views showing the configuration of the display portion of the second embodiment. Figure 8 As shown in FIG, the display unit 30 has a TFT layer (thin film transistor layer) 4, a light-emitting element layer 5 and a sealing layer 6 formed in sequence on the substrate 2. The light-emitting element layer 5 includes a light-emitting element ES (such as a quantum dot light-emitting diode) and a first inspection element Y1.

[0055] The light-emitting element ES includes: a first electrode D1; a second electrode D2 opposite to the first electrode D1; a light-emitting layer LE arranged between the first electrode D1 and the second electrode D2; a first charge transport layer LT1 arranged between the first electrode D1 and the light-emitting layer LE and having a first charge transport function; and a second charge transport layer LT2 arranged between the light-emitting layer LE and the second electrode D2 and having a second charge transport function.

[0056] The first test element Y1 includes a third electrode A3 and a fourth electrode K4, and a light emitting layer LE and a first charge transport layer LT1 provided between the third electrode A3 and the fourth electrode K4 and shared with the light emitting element ES. Figure 8 In the first inspection element Y1, the first charges are holes and the second charges are electrons. The first inspection element Y1 is a single-charge device, specifically a HOD (hole-only device), in which the first and second charges (holes) primarily flow. In the first inspection element Y1, the light-emitting layer LE is in contact with the fourth electrode K4.

[0057] exist Figure 8 In the light-emitting element ES, the second electrode D2, the second charge transport layer LT2 (electron transport layer), the light-emitting layer LE, the first charge transport layer LT1 (hole transport layer), and the first electrode D1 are stacked in this order. In the first inspection element Y1, the fourth electrode K4, the light-emitting layer LE, the first charge transport layer LT1 (hole transport layer), and the third electrode A3 are stacked in this order. The second electrode D2 is connected to the ELVSS power supply (low-potential side power supply) via the transistor Te, and the fourth electrode K4 is connected to the ELVSS power supply via the transistor Ty. The first electrode D1 and the third electrode A3 form a series of common electrodes (common anodes) 25. The common electrode 25 is connected to the ELVDD power supply (high-potential side power supply).

[0058] Figure 8 The first test element Y1 shares the light-emitting layer LE and first charge transport layer LT1 (hole transport layer) with the light-emitting element ES, but lacks an electron transport layer (ETL). Therefore, holes primarily flow through the first test element Y1, with almost no electrons. For the light-emitting element ES, whose emission characteristics rely heavily on hole injection, external compensation is possible by driving the light-emitting element ES based on the characteristics of the first test element Y1, which serves as the HOD.

[0059] In addition, if Figure 8 As shown in (b), a fourth charge transport layer LT4 having a hole transport function may be provided between the light emitting layer LE and the fourth electrode K4. In this way, electrons can be prevented from flowing out of the fourth electrode K4 in the first test element Y1.

[0060] [Third embodiment]

[0061] Figure 9 (a) and (b) are cross-sectional views showing the configuration of the display portion of the third embodiment. Figure 9 As shown, the display unit 30 has a TFT layer (thin film transistor layer) 4, a light-emitting element layer 5 and a sealing layer 6 formed in sequence on the substrate 2. The light-emitting element layer 5 includes a light-emitting element ES (such as a quantum dot light-emitting diode), a first inspection element X1 and a second inspection element Y2.

[0062] The light-emitting element ES includes: a first electrode D1; a second electrode D2 opposite to the first electrode D1; a light-emitting layer LE arranged between the first electrode D1 and the second electrode D2; a first charge transport layer LT1 arranged between the first electrode D1 and the light-emitting layer LE and having an electron transport function; and a second charge transport layer LT2 arranged between the light-emitting layer LE and the second electrode D2 and having a hole transport function.

[0063] The first test element X1 includes a third electrode A3 and a fourth electrode K4, a light-emitting layer LE disposed between the third and fourth electrodes A3 and K4 and shared with the light-emitting element ES, and a first charge transport layer LT1 (electron transport layer). This is an EOD that primarily allows electrons to flow and rarely allows holes to flow (it lacks a hole transport layer). On the first test element X1, the light-emitting layer LE is in contact with the third electrode A3.

[0064] The second test element Y2 includes a fifth electrode A5 and a sixth electrode K6, a light-emitting layer LE disposed between the fifth and sixth electrodes A5 and K6 and shared with the light-emitting element ES, and a second charge transport layer LT2 (hole transport layer). This is a HOD that primarily allows holes to flow and rarely allows electrons to flow (it lacks an electron transport layer). In the second test element Y2, the light-emitting layer LE is in contact with the sixth electrode K6.

[0065] Regarding the light-emitting element ES whose emission characteristics largely depend on electron injection and hole injection, external compensation can be performed by driving the light-emitting element ES based on the characteristics of the first inspection element X1 as EOD and the characteristics of the second inspection element Y2 as HOD.

[0066] In addition, if Figure 9 As shown in (b), a third charge transport layer LT3 having an electron transport function may be provided between the third electrode A3 and the light-emitting layer LE, and a fourth charge transport layer LT4 having a hole transport function may be provided between the sixth electrode K6 and the light-emitting layer LE.

[0067] [Other Implementation Methods]

[0068] Figure 10 Schematic diagram showing a modified example of the inspection circuit and the pixel circuit. Figure 10 In the embodiment, a test circuit XC and a pixel circuit PC are provided for each sub-pixel, and data signal lines DL and voltage measurement circuits SC are arranged so as to correspond to sub-pixel columns.

[0069] In the inspection circuit XC, the fourth electrode K4 of the first inspection element X1 is connected to the data signal line DL via transistor Tz. The gate of transistor Tx is connected to the data signal line DL via transistor Ts and to the ELVSS power supply via capacitor Cx. The gate of transistor Ts is connected to the first inspection line GX1, and the gate of transistor Tz is connected to the second inspection line GX2. The data signal line DL is connected to the driver 40 and the voltage measurement circuit SC. In the pixel circuit PC, the gate of transistor Te is connected to the data signal line DL via transistor Tw and to the ELVSS power supply via capacitor Cp. The gate of transistor Tw is connected to the scanning signal line GL.

[0070] exist Figure 10 In display mode, the scanning signal line GL is selected, and a grayscale signal is written from the data signal line DL to the gate of the transistor Te. Furthermore, in test mode, the first test line GX1 and the second test line GX2 are sequentially selected. After the grayscale signal is written from the data signal line DL to the gate of the transistor Tx, the voltage Vk of the fourth electrode K4 of the first test element X1 is measured by the voltage measurement circuit SC.

[0071] Figure 11 : is a schematic diagram showing another modified example of the inspection circuit and the pixel circuit. Figure 11 In the embodiment, a pixel circuit PC is provided for each sub-pixel arranged in the row direction, a test circuit XC is provided for each sub-pixel row, and a data signal line DL and a voltage measurement circuit SC are arranged corresponding to the column of the test circuit XC.

[0072] In the inspection circuit XC, the fourth electrode K4 of the first inspection element X1 is connected to the measurement line FL via transistor Tz. The gate of transistor Tx is connected to the data signal line DL via transistor Ts and to the ELVSS power supply via capacitor Cx. The gates of transistors Ts and Tz are connected to the scanning signal line GL, which is connected to the driver 40. The measurement line FL is connected to the voltage measurement circuit SC. In the pixel circuit PC, the gate of transistor Te is connected to the data signal line DL via transistor Tw and to the ELVSS power supply via capacitor Cp. The gate of transistor Tw is connected to the scanning signal line GL.

[0073] exist Figure 11In the display mode, the scanning signal line GL is selected, and a grayscale signal is written from the data signal line DL to the gate of the transistor Te. Furthermore, in the test mode, the scanning signal line GL is selected, and a grayscale signal is written from the data signal line DL to the gate of the transistor Tx, and the voltage Vk of the fourth electrode K4 of the first test element X1 is measured by the voltage measurement circuit SC.

[0074] Figure 12 : is a cross-sectional view showing a modified example of the display portion of the first embodiment. Figure 2 On the first inspection element X1, the light emitting layer LE and the third electrode A3 are in contact, but not limited thereto. Figure 12 As shown, a third charge transport layer LT3 having an electron transport function may be provided between the light emitting layer LE and the third electrode A3. In this way, holes can be prevented from flowing out from the third electrode A3 on the first test element X1.

[0075] Figure 13 (a) and (b) are cross-sectional views showing another modified example of the display portion of the first embodiment. Figure 2 In the embodiment, the first electrode D1 and the fourth electrode K4 are connected to different transistors, and the second electrode D2 and the third electrode A3 constitute a common electrode (common anode) 25, but the present invention is not limited thereto. Figure 13 As shown in (a), the second electrode D2 and the third electrode A3 may be connected to different transistors (Te / Tx), and the first electrode D1 and the fourth electrode K4 constitute a common electrode (common cathode) 25.

[0076] In this case, in the light-emitting element ES, the second electrode D2, the second charge transport layer LT2 (hole transport layer), the light-emitting layer LE, the first charge transport layer LT1 (electron transport layer), and the first electrode D1 are stacked in this order. In the first inspection element X1, the third electrode A3, the light-emitting layer LE, the first charge transport layer LT1 (electron transport layer), and the fourth electrode K4 are stacked in this order. The second electrode D2 is connected to the ELVDD power supply via the transistor Te, and the third electrode A3 is connected to the ELVDD power supply via the transistor Tx. In addition, regarding the first inspection element X1, as shown in FIG. Figure 13 As shown in (b), a third charge transport layer LT3 having an electron transport function may be provided between the third electrode A3 and the light emitting layer LE.

[0077] Figure 14 (a) and (b) are cross-sectional views showing modified examples of the display portion of the second embodiment. Figure 14 As shown in (a), the first electrode D1 and the third electrode A3 are connected to different transistors (Te / Ty), and the second electrode D2 and the fourth electrode K4 can constitute a common electrode (common cathode) 25.

[0078] In this case, in the light-emitting element ES, the first electrode D1, the first charge transport layer LT1 (hole transport layer), the light-emitting layer LE, the second charge transport layer LT2 (electron transport layer), and the second electrode D2 are stacked in this order. In the first inspection element Y1, the third electrode A3, the first charge transport layer LT1 (hole transport layer), the light-emitting layer LE, and the fourth electrode K4 are stacked in this order. The first electrode D1 is connected to the ELVDD power supply via the transistor Te, and the third electrode A3 is connected to the ELVDD power supply via the transistor Ty. In addition, regarding the first inspection element Y1, as shown in FIG. Figure 14 As shown in (b), a fourth charge transport layer LT4 having a hole transport function may be provided between the fourth electrode K4 and the light emitting layer LE.

[0079] The above embodiments are for illustration and description purposes only and are not intended to be limiting. Based on these illustrations and descriptions, it will be apparent to those skilled in the art that various modifications may be made.

[0080] Description of Reference Numerals

[0081] 2: Substrate;

[0082] 4: TFT layer;

[0083] 5: light-emitting element layer;

[0084] 6: Sealing layer;

[0085] 10: display device;

[0086] 23: edge covering film;

[0087] 25: common electrode; as

[0088] 30: display unit;

[0089] 40: driving unit;

[0090] 50: Control Department;

[0091] ES: light emitting element;

[0092] X1: first inspection element (EOD);

[0093] Y1: first inspection element (HOD);

[0094] Y2: second inspection element (HOD);

[0095] D1: first electrode;

[0096] D2: second electrode;

[0097] A3: third electrode;

[0098] K4: fourth electrode;

[0099] A5: fifth electrode;

[0100] K6: sixth electrode;

[0101] SC: Voltage measurement circuit.

Claims

1. A display device, wherein each sub-pixel is provided with a light-emitting element, wherein the light-emitting element comprises: a first electrode; a second electrode; a light-emitting layer disposed between the first electrode and the second electrode; a first charge transport layer disposed between the first electrode and the light-emitting layer; and a second charge transport layer disposed between the light-emitting layer and the second electrode, wherein A first inspection element including a third electrode and a fourth electrode is provided, The first inspection element includes the light emitting layer and the first charge transport layer, which are provided between the third electrode and the fourth electrode and are shared with the light emitting element. The fourth electrode is connected to a power supply via a transistor, and the light emitting element is driven according to the value of the voltage of the fourth electrode relative to the gate voltage of the transistor. The first charge transport layer has a first charge transport function, and the second charge transport layer has a second charge transport function, The first inspection element is a single-charge element that allows the first charge and the second charge to mainly flow.

2. The display device according to claim 1, wherein The first charges are electrons, and the second charges are holes.

3. The display device according to claim 2, wherein: In the first inspection element, the light emitting layer and the third electrode are in contact with each other.

4. The display device according to claim 2, wherein: In the first inspection element, a third charge transport layer having an electron transport function is included between the light emitting layer and the third electrode.

5. The display device according to claim 2, wherein The first electrode and the fourth electrode are connected to different transistors, The second electrode and the third electrode form a series of common electrodes.

6. The display device according to claim 2, wherein: The second electrode and the third electrode are connected to different transistors, The first electrode and the fourth electrode form a series of common electrodes.

7. The display device according to claim 2, wherein: The first charge transport layer contains nanoparticles of metal oxide.

8. The display device according to claim 7, wherein: The metal oxide is any one of ZnO, SnO2, and TiO2.

9. The display device according to claim 1, wherein The first charges are holes, and the second charges are electrons.

10. The display device according to claim 9, wherein In the first inspection element, the light emitting layer and the fourth electrode are in contact with each other.

11. The display device according to claim 9, wherein A fourth charge transport layer having a hole transport function is included between the light emitting layer and the fourth electrode.

12. The display device according to claim 9, wherein The second electrode and the fourth electrode are connected to different transistors, The first electrode and the third electrode form a series of common electrodes.

13. The display device according to claim 9, wherein The first electrode and the third electrode are connected to different transistors, The second electrode and the fourth electrode form a series of common electrodes.

14. The display device according to claim 1, wherein The light emitting element and the first inspection element are formed adjacent to each other.

15. The display device according to claim 1, wherein A voltage measuring section is included that measures the voltage of the third electrode or the fourth electrode of the first inspection element.

16. The display device according to any one of claims 1 to 15, characterized in that The first inspection element is provided for each sub-pixel.

17. The display device according to any one of claims 1 to 15, wherein: The first inspection element is provided for each sub-pixel row composed of a plurality of sub-pixels arranged in the row direction.

18. The display device according to claim 15, wherein The voltage measuring unit performs measurement when power is off.

19. The display device according to claim 15, wherein The voltage measuring unit performs measurement at the time of initial startup.

20. The display device according to claim 15, wherein The voltage measuring unit performs measurement at regular intervals.

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