Thermal management chip, system and management method with built-in interface host

Abstract

This invention provides a thermal management chip, system, and management method for a host with a built-in interface, including: a controllable current source sequence, temperature sensing device category control, an ADC module, a register group, interface, and control logic module, an NVM non-volatile memory, a clock generation module, and a local temperature sensing transistor. The thermal management chip also includes an Aip port, an Ain port, a PWM port, a TACH port, a master / slave mode selection port, an SDA port, an SCL port, and a status indicator port. This invention collects local temperature, remote temperature, and fan speed information from the thermal management chip, and flexibly controls the fan speed using a lookup table to reduce system energy consumption and extend fan life.

Description

Technical Field

[0001] This invention relates to the field of chip and thermal management technology, specifically to a thermal management chip, system, and management method for a host with a built-in interface. Background Technology

[0002] Air cooling remains the most economical cooling method. For systems that cannot achieve heat dissipation through natural air convection, air cooling is still the only option for the vast majority of systems. The fan is a key component in this system. The fan itself contains mechanical parts such as bearings. If it is always running at full speed, it may be the component with the shortest lifespan in the system. At the same time, in order to save energy and reduce noise, the fan speed needs to be controlled.

[0003] Temperature measurement is required in fields such as servers, switches, and data centers to achieve purposes such as temperature monitoring, over-temperature alarms, and adaptive adjustment. For example, it monitors the temperature of chips such as central processing units (CPUs), graphics processing units (GPUs), and FPGAs. When the temperature exceeds the limit, it reduces the temperature by means of starting fans and reducing the operating frequency, so as to prevent system damage and fire risks caused by excessive temperature.

[0004] In patent document CN216750052, titled "Thermal Management Device and Battery Thermal Management System," a thermoelectric cooler is attached to the outer surface of a storage tank, and the battery pack is located in a circulation loop. The power of the thermoelectric cooler is adjusted based on the temperatures from inlet and outlet temperature sensors to drive the heated or cooled antifreeze fluid to circulate in the loop, achieving thermal management. The document does not mention the method for obtaining the temperature information from the inlet and outlet temperature sensors, suggesting a water-cooling method. The disadvantages are that the thermal management system consists of multiple components, resulting in high cost, low accuracy, and specific requirements for the assembly of the circulation loop.

[0005] In patent document CN101811434, titled "Control Method of Passenger Vehicle Thermal Management System and its Fan Assembly," the system includes a fan assembly, a drive unit, a control unit, a temperature sensor, and a human-machine interface device. This system maintains the cooled medium within a constant temperature range, achieving real-time control and extending the service life of components. However, its drawbacks include system complexity, consisting of multiple devices, and an overly simplistic fan control strategy. Summary of the Invention

[0006] To address the shortcomings of existing technologies, the purpose of this invention is to provide a thermal management chip, system, and management method for a host with a built-in interface.

[0007] A thermal management chip for a host computer with a built-in interface according to the present invention includes: a controllable current source sequence, a temperature sensing device category control, an ADC module, a register group & interface & control logic module, an NVM non-volatile memory, a clock generation module, and a local temperature sensing transistor; the thermal management chip also includes an Aip port, an Ain port, a PWM port, a TACH port, a master-slave mode selection port, an SDA port, an SCL port, and a status indication port.

[0008] The input terminal of the controllable current source sequence is used to connect to the power supply of the thermal management chip, the output terminal of the controllable current source sequence is connected to the Vip pin of the ADC module, the control terminal of the controllable current source sequence is connected to the temperature sensing device category control, and the temperature sensing device category control is connected to the Register Bank & Interface & Control Logic.

[0009] The Vip pin on the ADC module is connected to the Aip port, and the Vin pin is connected to the Ain port, which are used to connect to external temperature sensing devices and acquire temperature information.

[0010] The emitter of the local temperature-sensing transistor is connected to the ADC module, and the base and collector of the local temperature-sensing transistor are connected to and grounded; the Dtemp and D of the ADC module... NTC Signals are sent to the register group, interface, and control logic module.

[0011] The register group, interface, and control logic module is connected to the PWM port and TACH port for monitoring and controlling the external fan; the register group, interface, and control logic module is also connected to the status indicator port, SCL port, SDA port, and master / slave mode selection port.

[0012] The clock generation module is connected to the register group, interface, and control logic module and the NVM non-volatile memory, respectively. The NVM non-volatile memory is connected to the SCL port, SDA port, master-slave mode selection port, and programming port, respectively.

[0013] Preferably, multiple sets of Aip ports and Ain ports are connected in parallel to connect multiple temperature sensing devices.

[0014] A thermal management system for a host with a built-in interface according to the present invention includes a thermal management chip for the host with a built-in interface, and further includes a remote temperature sensing device, a fan device, and a master-slave mode selection switch; the remote temperature sensing device is connected to the Vip port and the Vin port of the thermal management chip respectively, the fan device is connected to the PWM port and the TACH port respectively, and the master-slave mode selection switch is connected to the master-slave mode selection port.

[0015] Preferably, the remote temperature sensing device is any one of discrete transistor 2N3904, discrete transistor 2N3906, parasitic transistor, and thermistor.

[0016] Preferably, the fan device has multiple outputs, with the PWM port outputting the fan speed control signal and the TACH port inputting the fan speed monitoring signal.

[0017] Preferably, the master-slave mode selection switch is connected to an external power supply and a ground signal, respectively;

[0018] With the master-slave mode pin grounded, the thermal management chip is in slave mode. It receives external MCU instructions through the SCL and SDA ports to configure the register group, interface, and control logic module, which is used to control the measurement of the remote temperature sensing device and the speed of the fan device.

[0019] In master-slave mode, the pin is connected to the power supply. The thermal management chip is in master mode, running the program in the NVM non-volatile memory to control the measurement of the remote temperature sensing device and the speed of the fan device. It connects to expansion devices, including EEPROM and temperature sensors, through the SCL and SDA ports, and outputs status signals through the status indicator port.

[0020] A management method for a thermal management system of a host with a built-in interface, provided by the present invention, includes the following steps:

[0021] Step S1: Acquire measurement data from the remote temperature sensing device;

[0022] Step S2: Count the fan TACH output using the clock generation module and store it in the register group & interface & control logic module, denoted as NFAN, to obtain the fan speed;

[0023] Step S3: Obtain the thermal management parameter configuration table, obtain the corresponding fan speed parameters based on the temperature information, output the corresponding PWM, and control the fan speed;

[0024] Step S4: When the fan speed reaches the maximum speed and the temperature is still higher than the upper limit of the configuration table, an alarm signal is output through the status indicator port.

[0025] Preferably, in step S1, when the remote temperature sensing device is a discrete transistor or a parasitic transistor, two currents I1 and N*I1 are output through a controllable current source sequence. After conversion by the ADC module, the corresponding temperature is:

[0026]

[0027]

[0028] Among them, V BEThe base-emitter voltage of the transistor is V when the emitter current is I1. BE1； When the emitter current is N*I1, the voltage is V. BE2 VREF is the ADC reference voltage, A1 is the slope coefficient, and B1 is the offset coefficient.

[0029] When the remote temperature sensing device is a thermistor, the corresponding temperature is:

[0030]

[0031] Among them, V NTC A1 is the voltage across the thermistor, A2 is the slope coefficient, and B2 is the offset coefficient.

[0032] Preferably, step S1 further includes: when the thermal management chip is in host mode, receiving data from the extended temperature sensor through the SCL port and SDA port.

[0033] Preferably, the temperature source in the thermal management parameter configuration table includes a local temperature-sensing transistor, a remote temperature-sensing device, or an extended temperature sensor.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] 1. This invention collects local temperature, remote temperature and fan speed information of the thermal management chip, and flexibly controls the fan speed through a lookup table, so as to reduce system energy consumption and extend fan life.

[0036] 2. This invention can be configured into slave and master modes via chip pins. In slave mode, it can receive commands from external MCUs or other master devices for system thermal management. When the system has no master device or the master device fails, the thermal management chip can be used as a master device to manage other components of the system and expand the temperature information input sources. Attached Figure Description

[0037] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0038] Figure 1 This is a block diagram of the thermal management chip and a schematic diagram of its peripheral devices according to the present invention.

[0039] Figure 2 This is a schematic diagram of the thermal management chip of the present invention applied in slave mode;

[0040] Figure 3 This is a schematic diagram of the thermal management chip of the present invention applied in host mode;

[0041] Figure 4This is a schematic diagram of the thermal management chip of the present invention controlling the rotation speed by looking up a table.

[0042] Explanation of reference numerals in the attached figures:

[0043] Thermal management chip 100, local temperature sensing transistor 107

[0044] Controllable current source sequence 101 Discrete transistor 110

[0045] Temperature sensing device category control 102 Parasitic transistor 111

[0046] ADC module 103, thermistor 112

[0047] Register set & interface & control logic module 104; Fan unit 120

[0048] NVM Non-Volatile Memory 105 Master / Slave Mode Selection Switch 130

[0049] Clock generation module 106 Detailed Implementation

[0050] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the scope of protection of the present invention.

[0051] This invention discloses a thermal management chip 100. By acquiring the temperature value of a monitoring point and using methods such as lookup tables and custom temperature-speed relationships, it controls multiple fans through PWM output to achieve thermal management, while saving power and extending fan life. In addition to its built-in local temperature measurement point, which measures the ambient temperature of the thermal management chip 100, it can also measure remote temperatures. Innovatively, in the remote temperature measurement scheme, different modes can be configured according to the type of remote temperature sensing device. By configuring the port in current output mode, the thermal management chip 100 can output a timing-controlled specific sequence current, which can use discrete bipolar transistors such as 2N3904 NPN or 2N3906 PNP, or integrated transistors such as processor or ASIC parasitic transistors 111. Alternatively, the port can be configured in voltage input mode, achieved by measuring the voltage of a thermistor 112, such as an NTC resistor. Furthermore, the built-in interface host of this invention can be used as an interface slave device to report temperature to the master control chip, such as BMC, or as an interface master chip to read temperature chip data on the system I2C bus, thereby expanding the application scenarios and temperature sources.

[0052] Specifically, refer to Figure 1 The thermal management chip 100 includes: a controllable current source sequence 101, a temperature sensing device category control 102, an ADC module 103, a register bank, interface, and control logic module 104, an NVM non-volatile memory 105, a clock generation module 106, and a local temperature sensing transistor 107; the thermal management chip 100 also includes an Aip port, an Ain port, a PWM port, a TACH port, a master / slave mode selection port, an SDA port, an SCL port, and a status indication port.

[0053] The input terminal of the controllable current source sequence 101 is used to connect to the power supply of the thermal management chip. The output terminal of the controllable current source sequence 101 is connected to the Vip pin of the ADC module 103. The control terminal of the controllable current source sequence 101 is connected to the temperature sensing device category control 102. The temperature sensing device category control 102 is connected to the register group & interface & control logic module 104.

[0054] The Vip pin on the ADC module 103 is connected to the Aip port, and the Vin pin is connected to the Ain port, which are used to connect to external temperature sensing devices and acquire temperature information.

[0055] The emitter of the local temperature sensing transistor 107 is connected to the ADC module 103, and the base and collector of the local temperature sensing transistor 107 are connected and grounded; the Dtemp and D of the ADC module 103 are... NTC Signals are sent to register group & interface & control logic module 104.

[0056] The register group, interface, and control logic module 104 is connected to the PWM port and the TACH port for monitoring and controlling the external fan; the register group, interface, and control logic module 104 is also connected to the status indicator port, the SCL port, the SDA port, and the master / slave mode selection port.

[0057] The clock generation module 106 is connected to the register group & interface & control logic module 104 and the NVM non-volatile memory 105, respectively. The NVM non-volatile memory 105 is connected to the SCL port, SDA port, master-slave mode selection port and programming port, respectively. Multiple sets of Aip and Ain ports are connected in parallel for connecting multiple temperature sensing devices.

[0058] This invention discloses a thermal management system for a host with a built-in interface, including a thermal management chip 100 for the host with a built-in interface, a remote temperature sensing device, a fan device 120, and a master-slave mode selection switch 130; the remote temperature sensing device is connected to the Vip port and Vin port of the thermal management chip 100 respectively, the fan device 120 is connected to the PWM port and the TACH port respectively, and the master-slave mode selection switch 130 is connected to the master-slave mode selection port.

[0059] The remote temperature sensing device is any one of discrete transistor 1102N3904, discrete transistor 1102N3906, parasitic transistor 111, and thermistor 112. The fan device 120 is provided with multiple channels, the PWM port outputs the fan device 120 speed control signal, and the TACH port outputs the fan speed monitoring signal.

[0060] The master / slave mode selection switch 130 is connected to the external power supply and the ground signal, respectively.

[0061] Reference Figure 2 When the master-slave mode pin is grounded, the thermal management chip 100 is in slave mode and receives external MCU instructions through the SCL port and SDA port to configure the register group, interface and control logic module 104 for controlling the measurement of the remote temperature sensing device and the speed of the fan device 120.

[0062] Reference Figure 3 When the master-slave mode pin is connected to the power supply, the thermal management chip 100 is in master mode, running the program in the NVM non-volatile memory 105, controlling the measurement of the remote temperature sensing device and the speed of the fan device 120, connecting the expansion device, including EEPROM and temperature sensor, through the SCL port and SDA port, and outputting status signal through the status indicator port.

[0063] This invention discloses a management method for a thermal management system of a host with a built-in interface. Users control the chip's master / slave mode by connecting it to power or ground as needed. Users select the type of remote temperature sensing device based on system cost and the object being measured. Users connect the required number of channels according to the board's needs; this chip supports up to four fans. Once the peripheral devices are determined, the relevant internal registers are configured, and the thermal management closed-loop process is initiated. Specifically, the method includes the following steps:

[0064] Step S1: Acquire measurement data from the remote temperature sensing device;

[0065] When the remote temperature sensing device is a discrete transistor or a parasitic transistor, two currents, I1 and N*I1, are output through the controllable current source sequence 101. After conversion by the ADC module 103, the corresponding temperature is:

[0066]

[0067]

[0068] Among them, V BE The base-emitter voltage of the transistor is V when the emitter current is I1. BE1； When the emitter current is N*I1, the voltage is V. BE2 VREF is the ADC reference voltage, A1 is the slope coefficient, and B1 is the offset coefficient.

[0069] When the remote temperature sensing device is a thermistor, the corresponding temperature is:

[0070]

[0071] Among them, V NTC A1 is the voltage across the thermistor, A2 is the slope coefficient, and B2 is the offset coefficient.

[0072] In addition, when the chip is configured in master mode, it can also obtain the temperature DEXT of other sensors on the bus through the SCL port and SDA port, expanding the sources of temperature information.

[0073] Step S2: The fan TACH output is counted by the clock generation module 106 and stored in the register group & interface & control logic module 104, denoted as NFAN, to obtain the fan speed.

[0074] Step S3: Obtain the thermal management parameter configuration table, obtain the corresponding fan speed parameters based on the temperature information, output the corresponding PWM, and control the fan speed;

[0075] Step S4: When the fan unit reaches its maximum speed of 120 and the temperature is still higher than the upper limit of the configuration table, an alarm signal is output through the status indicator port.

[0076] This invention relates to temperature and PWM control, and the lookup representation is, for example... Figure 4 In particular, in this example, the lookup table can be modified and programmed via NVM non-volatile memory to adapt to different usage environments.

[0077] A lookup table method is used to select the PWM (Pulse Width Modulation) to control the fan speed for thermal management. The advantages are simple operation and straightforward logic. A typical example of this invention is as follows: Figure 4The temperature source can be local temperature, remote transistor temperature, or remote NTC resistor temperature; PWM can control one or more fans and can be configured through the register group, interface, and control logic module 104. As shown by the dotted line in the figure, different duty cycles correspond to different temperature ranges, as shown in the table below. T1, T2, T3, T4, T5 and PWM1, PWM2, PWM3, PWM4 can all be configured through the register group, interface, and control logic module 104 or NVM non-volatile memory.

[0078] Temperature T Duty cycle 0<T<T1 0 T1 <T<T3 PWM1 T3 <T<T4 PWM2 T4 <T<T5 PWM3 T>T5 PWM4

[0079] Additionally, if there are special requirements for fan noise and control linearity, it can be configured into smart mode through the register group & interface & control logic module 104, as shown by the solid line in the figure. The PWM can change linearly with temperature.

[0080] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A thermal management chip for a host computer with a built-in interface, characterized in that, include: The thermal management chip includes a controllable current source sequence, temperature sensing device category control, ADC module, register group & interface & control logic module, NVM non-volatile memory, clock generation module, and local temperature sensing transistor; the thermal management chip also includes an Aip port, an Ain port, a PWM port, a TACH port, a master-slave mode selection port, an SDA port, an SCL port, and a status indicator port. The input terminal of the controllable current source sequence is used to connect to the power supply of the thermal management chip, the output terminal of the controllable current source sequence is connected to the Vip pin of the ADC module, the control terminal of the controllable current source sequence is connected to the temperature sensing device category control, and the temperature sensing device category control is connected to the register group & interface & control logic module. The Vip pin on the ADC module is connected to the Aip port, and the Vin pin is connected to the Ain port, which are used to connect to external temperature sensing devices and acquire temperature information. The emitter of the local temperature-sensing transistor is connected to the ADC module, and the base and collector of the local temperature-sensing transistor are connected to and grounded; the Dtemp and D of the ADC module... NTC Signals are sent to the register group, interface, and control logic module. The register group, interface, and control logic module is connected to the PWM port and TACH port for monitoring and controlling the external fan; the register group, interface, and control logic module is also connected to the status indicator port, SCL port, SDA port, and master / slave mode selection port. The clock generation module is connected to the register group, interface, and control logic module and the NVM non-volatile memory, respectively. The NVM non-volatile memory is connected to the SCL port, SDA port, master-slave mode selection port, and programming port, respectively.

2. The thermal management chip for the host with a built-in interface according to claim 1, characterized in that: The Aip and Ain ports are connected in parallel in multiple sets to connect multiple temperature sensing devices.

3. A thermal management system for a host with a built-in interface, characterized in that: The thermal management chip, including the built-in interface host as described in claim 1 or 2, further includes a remote temperature sensing device, a fan device, and a master-slave mode selection switch; the remote temperature sensing device is connected to the Vip port and Vin port of the thermal management chip respectively, the fan device is connected to the PWM port and TACH port respectively, and the master-slave mode selection switch is connected to the master-slave mode selection port.

4. The thermal management system of the built-in interface host according to claim 3, characterized in that: The remote temperature sensing device is any one of discrete transistor 2N3904, discrete transistor 2N3906, parasitic transistor, and thermistor.

5. The thermal management system of the built-in interface host according to claim 3, characterized in that: The fan device is equipped with multiple channels. The PWM port outputs the fan speed control signal, and the TACH port inputs the fan speed monitoring signal.

6. The thermal management system of the built-in interface host according to claim 3, characterized in that: The master / slave mode selection switch is connected to the external power supply and the ground signal, respectively. With the master-slave mode pin grounded, the thermal management chip is in slave mode. It receives external MCU instructions through the SCL and SDA ports to configure the register group, interface, and control logic module, which is used to control the measurement of the remote temperature sensing device and the speed of the fan device. In master-slave mode, the pin is connected to the power supply. The thermal management chip is in master mode, running the program in the NVM non-volatile memory to control the measurement of the remote temperature sensing device and the speed of the fan device. It connects to expansion devices, including EEPROM and temperature sensors, through the SCL and SDA ports, and outputs status signals through the status indicator port.

7. A management method for a thermal management system of a host with a built-in interface, based on the thermal management system of a host with a built-in interface as described in any one of claims 3-6, characterized in that, Includes the following steps: Step S1: Acquire measurement data from the remote temperature sensing device; Step S2: Count the fan TACH output using the clock generation module and store it in the register group & interface & control logic module, denoted as NFAN, to obtain the fan speed; Step S3: Obtain the thermal management parameter configuration table, obtain the corresponding fan speed parameters based on the temperature information, output the corresponding PWM, and control the fan speed; Step S4: When the fan speed reaches the maximum speed and the temperature is still higher than the upper limit of the configuration table, an alarm signal is output through the status indicator port.

8. The management method of the thermal management system of the host with built-in interface according to claim 7, characterized in that: In step S1, when the remote temperature sensing device is a discrete transistor or a parasitic transistor, two currents, I1 and N*I1, are output through a controllable current source sequence. After conversion by the ADC module, the corresponding temperature is: Among them, V BE The base-emitter voltage of the transistor is V when the emitter current is I1. BE1； When the emitter current is N*I1, the voltage is V. BE2 VREF is the ADC reference voltage, A1 is the slope coefficient, and B1 is the offset coefficient. When the remote temperature sensing device is a thermistor, the corresponding temperature is: Among them, V NTC A1 is the voltage across the thermistor, A2 is the slope coefficient, and B2 is the offset coefficient.

9. The management method of the thermal management system of the host with built-in interface according to claim 7, characterized in that: Step S1 further includes: when the thermal management chip is in host mode, receiving data from the extended temperature sensor through the SCL port and SDA port.

10. The management method of the thermal management system of the host with built-in interface according to claim 7, characterized in that: The temperature sources in the thermal management parameter configuration table include local temperature-sensing transistors, remote temperature-sensing devices, or extended temperature sensors.

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