Method and device for determining mask plate, and storage medium electronic device

Abstract

A method, device, storage medium, and electronic device for determining a mask. The method includes: obtaining original layout data of a product to be produced; identifying patterns in the original layout data; performing a first logical operation based on the pattern recognition result to determine the device types included in the product to be produced and obtain device auxiliary data; and outputting, based on the device auxiliary data, a mask identifier associated with the device required to produce the product to be produced. This solution can improve the efficiency of determining the mask required for semiconductor products and shorten the production cycle of semiconductor products.

Description

Technical Field

[0001] The present invention relates to the field of memory technology, and in particular to a method and device for determining a mask, a storage medium, and an electronic device. Background Art

[0002] Semiconductor products are usually made by combining multiple semiconductor devices using complex processes.

[0003] During the production process of semiconductor products, for different types of semiconductor devices, when forming certain injection layers, such as the threshold voltage injection layer of the transistor and the shallow injection layer of the source and drain ends, corresponding mask plates are required to form corresponding mask patterns to complete the injection.

[0004] In actual applications, before producing semiconductor products, it is necessary to prepare mask plates related to the devices required to produce the semiconductor products in order to successfully complete the manufacturing.

[0005] Currently, when determining the mask plate of the device required for a certain semiconductor product, it is determined manually, which is inefficient and leads to a long production cycle of the semiconductor product. Summary of the Invention

[0006] The problem to be solved by the present invention is to improve the efficiency of determining the mask plate of the device required for producing the semiconductor product and shorten the production cycle of the semiconductor product.

[0007] To solve the above problem, an embodiment of the present invention provides a method for determining a mask plate, the method comprising:

[0008] Obtain the original layout data of the product to be produced;

[0009] Recognizing the graphics of the original layout data;

[0010] Performing a first logical operation based on the pattern recognition result to determine the type of device included in the product to be produced and obtain device auxiliary data;

[0011] Based on the device auxiliary data, a mask identification related to the device required to produce the product to be produced is output.

[0012] Optionally, the identifying the graphics in the original layout data includes: using a design rule checking tool DRC to identify the graphics in the original layout data.

[0013] Optionally, performing a first logical operation based on the graphic recognition result to determine the type of device included in the product to be produced and obtain device auxiliary data includes:

[0014] Performing a first logic operation on the identified pattern using a Boolean operation method to determine the type of device included in the product to be produced;

[0015] The graphics corresponding to each device type are output to different preset layers to form device auxiliary data.

[0016] Optionally, the using of a Boolean operation method to perform a first logic operation on the identified graphic to determine the type of device included in the product to be produced includes:

[0017] Identifying a gate region, a high threshold voltage region, a low threshold voltage region, and an overvoltage region in the original layout data;

[0018] The region where the gate region and the high threshold voltage region intersect is used as the first region, and the device types corresponding to the first region are high threshold voltage transistors and ultra-high threshold voltage transistors;

[0019] The region of the low threshold voltage region excluding the overvoltage region and the region where the gate region intersects are used as a second region, wherein the device type corresponding to the second region is a low threshold voltage transistor;

[0020] The region where the low threshold voltage region, the overvoltage region and the gate region intersect is used as a third region, and the device type corresponding to the third region is an ultra-low threshold voltage transistor;

[0021] The region of the gate region except the first region, the second region and the third region is used as the fourth region. The device type corresponding to the fourth region is a normal threshold voltage transistor.

[0022] Optionally, the step of outputting the graphics corresponding to each device type to different preset layers to form device auxiliary data includes:

[0023] If the fourth area exists in the original layout data, outputting the first preset graphic to a preset first layer;

[0024] If the second area exists in the original layout data, outputting the second preset graphic to a preset second layer;

[0025] If the third area exists in the original layout data, outputting the third preset graphic to a preset third layer;

[0026] If the second area and the third area exist simultaneously in the original layout data, outputting the fourth preset graphic to a preset fourth layer;

[0027] If the fourth area exists in the original layout data and at least one of the second area and the third area exists, the fifth preset graphic is output to the preset fifth layer; the first layer, the second layer, the third layer, the fourth layer and the fifth layer constitute the device auxiliary data.

[0028] Optionally, outputting a mask identification related to a device required for producing the product to be produced based on the device auxiliary data includes:

[0029] When there is a pattern on at least one of the first layer, the second layer, and the third layer, the mask identification related to the device required for the product to be produced includes the identification of the VTPH mask and the CVTN mask;

[0030] When there are graphics in the fourth layer, the mask identification related to the device required for the product to be produced includes the identification of the VTNLE mask and the VTPLE mask;

[0031] When there is a pattern in the fifth layer, the list of mask identifications related to the devices required for the product to be produced includes identifications of the VTNR mask and the VTPR mask.

[0032] Optionally, before outputting the identification of the mask plate related to the device required for producing the product to be produced, the method further includes:

[0033] Acquiring plate-making data, wherein the plate-making data is layout data obtained by performing a second logical operation on the original layout data; the layers in the plate-making data are used to make a mask;

[0034] Based on the plate making data, the mask identification to be output is corrected, and the corrected mask identification is output as the final mask identification related to the device required for producing the product to be produced.

[0035] Optionally, outputting a final identification of a mask related to a device required for producing the product to be produced includes:

[0036] Output the name of the mask plate related to the device required to produce the product to be produced, and the layer number of the mask plate in the plate making data.

[0037] An embodiment of the present invention further provides a device for determining a mask plate, the device comprising:

[0038] A first acquisition unit, adapted to acquire original layout data of a product to be produced;

[0039] A graphic recognition unit, adapted to recognize the graphic of the original layout data;

[0040] a device type determination unit, adapted to perform a first logical operation based on the pattern recognition result, determine the type of device included in the product to be produced, and obtain device auxiliary data;

[0041] The output unit is adapted to output a list of mask identifications related to the devices required for producing the product to be produced based on the device auxiliary data.

[0042] Optionally, the device further comprises:

[0043] A second acquisition unit is adapted to acquire plate-making data, wherein the plate-making data is layout data obtained by performing a second logical operation on the original layout data; the layers in the plate-making data are used to make a mask;

[0044] The correction unit is adapted to correct the mask identification to be output based on the plate making data, and output the corrected mask identification as the final mask identification related to the device required for producing the product to be produced.

[0045] An embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program is executed by a processor to implement the steps of any one of the methods described in the above embodiments.

[0046] An embodiment of the present invention further provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and the processor executes the steps of any one of the methods described in the above embodiments when running the computer program.

[0047] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0048] The solution of the present invention obtains the original layout data of the product to be produced, then performs pattern recognition on the original layout data. Based on the pattern recognition results, a first logical operation is performed to determine the device types contained in the product to be produced, obtaining device auxiliary data. Finally, based on this device auxiliary data, a mask identifier associated with the device required to produce the product can be directly output. The entire solution is automatically executed by a computer, eliminating the need to obtain a device model list or manually determine the device type contained in the product to be produced based on the device model list. This effectively improves the efficiency of mask determination and shortens the production cycle of semiconductor products. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 It is a schematic diagram of the structure of a transistor;

[0050] Figure 2 is a flow chart of a method for determining a mask plate in an embodiment of the present invention;

[0051] Figure 3 It is a structural schematic diagram of a mask plate determination device in an embodiment of the present invention. DETAILED DESCRIPTION

[0052] Figure 1 This is a schematic diagram of the structure of a transistor. Figure 1 The transistor may include: a substrate 10, a well region 11, a source terminal 12 and a drain terminal 13 formed in the substrate 10, a threshold voltage injection layer 14, a source terminal shallow injection layer 15 and a drain terminal shallow injection layer 16 formed in the well region 11, and a gate region 17 formed on the substrate 10.

[0053] In the production process of semiconductor products, for different types of semiconductor devices, when forming certain injection layers, such as Figure 1 The threshold voltage injection layer 14, the source shallow injection layer 15 and the drain shallow injection layer 16 of the transistor need to use corresponding mask plates to form corresponding mask patterns to complete the injection.

[0054] However, when determining the mask plate related to the device required for a certain semiconductor product, it is always determined manually.

[0055] Specifically, a device list of the semiconductor product is manually obtained first, but the device list is composed of all device model names included in the semiconductor product. For example, if the semiconductor product includes 1.2 devices, the device model name corresponding to the 1.2V device in the device list may include:

[0056] 1) 1.2VN-type high threshold voltage transistor (hvtNch);

[0057] 2) 1.2V N-type high threshold voltage transistor (hvtNch_dnw) in a deep N-well;

[0058] 3) 1.2VP type high threshold voltage transistor (hvtPch);

[0059] 4) 1.2V N-type normal threshold voltage transistor (Nch);

[0060] 5) 1.2V N-type normal threshold voltage transistor (Nch_dnw) in deep N-well;

[0061] 6) 1.2VP type normal threshold voltage transistor (Pch);

[0062] 7) 1.2VN-type low threshold voltage transistor (lvtNch);

[0063] 8) 1.2V N-type low threshold voltage transistor in deep N well (lvtNch_dnw);

[0064] 9) 1.2VP type low threshold voltage transistor (lvtPch);

[0065] 10) 1.2V N-type ultra-high threshold voltage transistor (ehvtNch);

[0066] 11) 1.2V N-type ultra-high threshold voltage transistor in a deep N-well (ehvtNch_dnw);

[0067] 12) 1.2VP type ultra-high threshold voltage transistor (ehvtPch);

[0068] 13) 1.2VN-type ultra-low threshold voltage transistor (elvtNch);

[0069] 14) 1.2V N-type ultra-low threshold voltage transistor in a deep N-well (elvtNch_dnw);

[0070] 15) 1.2VP ultra-low threshold voltage transistor (elvtPch);

[0071] 16) 1.2V N-type intrinsic transistor (nNch).

[0072] After obtaining the device list, the devices included in the semiconductor product are manually classified. Specifically, transistors with the three device model names hvtNch, hvtNch_dnw, and hvtPch can be classified as high threshold voltage transistors (High VT, HVT), while transistors with the three device model names Nch, Nch_dnw, and Pch can be classified as normal threshold voltage transistors (Regular VT, RVT), transistors with the three device model names lvtNch, lvtNch_dnw, and lvtPch can be classified as low threshold voltage transistors (Low VT, LVT), transistors with the three device model names ehvtNch, ehvtNch_dnw, and ehvtPch can be classified as extra high threshold voltage transistors (ExtraHigh VT, EHVT), and transistors with the three device model names elvtNch, elvtNch_dnw, and elvtPch can be classified as extra low threshold voltage transistors (ExtraLow ​​VT, ELVT).

[0073] It should be noted that in the embodiments of the present invention, the high threshold voltage transistor refers to an NMOS transistor with a threshold voltage in the range of 0.41V to 0.46V, and a PMOS transistor with a threshold voltage in the range of -0.565V to -0.505V. The normal threshold voltage transistor refers to an NMOS transistor with a threshold voltage in the range of 0.275V to 0.315V, and a PMOS transistor with a threshold voltage in the range of -0.37V to -0.32V. The low threshold voltage transistor refers to an NMOS transistor with a threshold voltage in the range of 0.127V to 0.157V, and a PMOS transistor with a threshold voltage in the range of -0.24V to -0.2V. The ultra-high threshold voltage transistor refers to an NMOS transistor with a threshold voltage in the range of 0.41V to 0.47V, and a PMOS transistor with a threshold voltage in the range of -0.565V to -0.505V. Ultra-low threshold voltage tubes refer to NMOS tubes with a threshold voltage in the range of -0.04V to -0.008V, and PMOS tubes in the range of -0.15V to -0.11V.

[0074] Finally, the corresponding mask list for each product is manually determined based on the device type and mask list correspondence table. The device type and mask list correspondence table is shown in Table 1. Table 1 contains the mask list corresponding to each device type (HVT, RVT, LVT, EHVT, and ELVT).

[0075] Table 1

[0076]

[0077] In the mask list in Table 1, NW indicates the mask used to form the N-well implant layer. PW indicates the mask used to form the P-well implant layer. VTNH (VT for HVT core NMOS) indicates the mask used to form the threshold voltage implant layer for the N-high threshold voltage transistor. VTPH (VT for HVT core PMOS) indicates the mask used to form the threshold voltage implant layer for the P-high threshold voltage transistor. VTNR (VT for RVT core NMOS) indicates the mask used to form the threshold voltage implant layer for the N-normal threshold voltage transistor. VTPR (VT for RVT core PMOS) indicates the mask used to form the threshold voltage implant layer for the P-normal threshold voltage transistor. VTNLE (VT for LVT Vt extra NMOS) indicates the mask used to form the threshold voltage implant layer for the N-ultra-low threshold voltage transistor. VTPLE (VT for LVT Vt extra PMOS) indicates the mask used to form the threshold voltage implant layer for the P-ultra-low threshold voltage transistor. NLDD (LDD for core NMOS) indicates the mask used to form the shallow injection layer at the source and drain of the N-type transistor. PLDD (LDD for core PMOS) indicates the mask used to form the shallow injection layer at the source and drain of the P-type transistor. NLDDH (LDD for Vt extra NMOS) indicates the mask used to form the shallow injection layer at the source and drain of the N-type transistor with an ultra-high threshold voltage. PLDDH (LDD for Vt extra PMOS) indicates the mask used to form the shallow injection layer at the source and drain of the P-type transistor with an ultra-high threshold voltage. CVTN (Vt for SRAM NMOS) indicates the mask used to form the threshold voltage injection layer of the N-type transistor of the static memory device.

[0078] The aforementioned manual process of determining the mask plates associated with the components required for semiconductor products is time-consuming, labor-intensive, and inefficient, resulting in a long production cycle for semiconductor products. Furthermore, manual determination of the components included in a semiconductor product is prone to errors, which further extend the production cycle.

[0079] To address this problem, the present invention provides a method for determining a mask plate. Using this method, after a computer obtains original layout data of a product to be produced, it can automatically perform graphic recognition on the original layout data, and perform a first logical operation based on the graphic recognition result to determine the type of device contained in the product to be produced, obtain device auxiliary data, and finally directly output a list of device-related mask plates required to produce the product to be produced based on the device auxiliary data. There is no need to obtain a device model list, and there is no need to manually determine the device type contained in the product to be produced based on the device model list. This effectively improves the efficiency of determining the mask plate and shortens the production cycle of semiconductor products.

[0080] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0081] Reference Figure 2 An embodiment of the present invention provides a method for determining a mask plate, which may include the following steps:

[0082] Step 21: Obtain original layout data of the product to be produced.

[0083] In a specific implementation, the original layout data is a graphic file, which may include many layers. Each layer forms a partial graphic of the layout of the product to be produced. The graphics of all layers are combined to form the layout of the product to be produced.

[0084] In a specific implementation, the original layout data includes not only the graphic file itself but also the corresponding relationship between the name of each layer in the graphic file and the layer number. The name of each layer is used to indicate the content of the graphics within that layer. For example, layers 98:0 and 99:0 are high threshold voltage regions, layers 96:0 and 97:0 are low threshold voltage regions, layer 149:4 is an overvoltage region, layer 6:0 is an active region layer, and layer 12:0 is a gate layer.

[0085] In specific implementations, the original layout data of the product to be produced can be obtained in a variety of ways. For example, the original layout data can be read through the corresponding file path, or the original layout data can be received through wireless communication, which is not limited here.

[0086] Step 22: Identify the graphics of the original layout data.

[0087] In a specific implementation, a design rule checking tool DRC can be used to perform pattern recognition on the original layout data. DRC can recognize patterns in the layout data, thereby facilitating subsequent logical operations on the image.

[0088] Step 23: Perform a first logic operation based on the pattern recognition result to determine the type of device included in the product to be produced and obtain device auxiliary data.

[0089] In a specific implementation, the Boolean operation method can be used to perform a first logical operation on the identified graphics to determine the device type contained in the product to be produced, and then the graphics corresponding to each device type are output to different preset layers to form device auxiliary data.

[0090] In a specific implementation, there may be multiple ways of performing the first logical operation, which are not limited here, as long as the device type can be identified.

[0091] Referring to Table 1, the inventors' research has revealed that all semiconductor products manufactured using the process under investigation contain HVT-type devices. During production, any semiconductor product manufactured using this process utilizes reticles corresponding to the five mask patterns: NW, PW, VNH, NLDD, and PLDD. Furthermore, any semiconductor product containing an EHVT-type device will utilize reticles corresponding to the two mask patterns: NLDDH and PLDDH, regardless of the other components in the semiconductor product.

[0092] Therefore, based on the above content, the device types (including HVT and EHVT) and mask patterns (including NW, PW, VNH, NLDD, PLDD, NLDDH and PLDDH) that do not need to be determined by computer in Table 1 can be removed, and Table 1 can be simplified to obtain Table 2:

[0093] Table 2

[0094]

[0095] Based on Table 2, the inventors further discovered that, based on the original layout data, the device types that need to be identified by the computer are RVT, LVT, and ELVT. Therefore, the first logical operation is used to identify the three device types of RVT, LVT, and ELVT, thereby reducing the computer's workload and further improving work efficiency.

[0096] In one embodiment of the present invention, the specific process of the first logical operation is as follows:

[0097] Identify the gate region, high threshold voltage region, low threshold voltage region, and overvoltage region in the original layout data. The region where the gate region intersects the high threshold voltage region is defined as a first region. The device type corresponding to the first region is a high threshold voltage transistor and an ultra-high threshold voltage transistor. The region where the low threshold voltage region, excluding the overvoltage region, intersects with the gate region is defined as a second region. The device type corresponding to the second region is a low threshold voltage transistor. The region where the low threshold voltage region, overvoltage region, and gate region intersect is defined as a third region. The device type corresponding to the third region is an ultra-low threshold voltage transistor. The region within the gate region, excluding the first, second, and third regions, is defined as a fourth region. The device type corresponding to the fourth region is a normal threshold voltage transistor.

[0098] In specific implementations, the gate region in the original layout data refers to the intersection of the active area layer and the gate layer in the original layout data, excluding transistor regions outside the scope of this invention. The high threshold voltage region refers to the layer containing high threshold voltage transistors and ultra-high threshold voltage transistors. The low threshold voltage region refers to the layer containing low threshold voltage transistors and ultra-low threshold voltage transistors. The overvoltage region refers to the layer containing ultra-high and ultra-low threshold voltage transistors. The gate region, high threshold voltage region, low threshold voltage region, and overvoltage region can be determined in the original layout data.

[0099] The first region is the result of performing an AND operation on the gate region and the high threshold voltage region. The second region is the result of performing an AND operation on the gate region and the region within the low threshold voltage region, excluding the overvoltage region. The third region is the result of performing an AND operation on the low threshold voltage region, the overvoltage region, and the gate region. The fourth region is the region within the gate region excluding the first, second, and third regions.

[0100] In a specific implementation, in order to facilitate the subsequent determination of the mask plate identification, different preset graphics can be output to different preset layers respectively.

[0101] Specifically, if the fourth area exists in the original layout data, the first preset graphic is output to the preset first layer. If the second area exists in the original layout data, the second preset graphic is output to the preset second layer. If the third area exists in the original layout data, the third preset graphic is output to the preset third layer. If both the second area and the third area exist in the original layout data, the fourth preset graphic is output to the preset fourth layer. If the fourth area exists in the original layout data and at least one of the second area and the third area exists, the fifth preset graphic is output to the preset fifth layer. The first layer, second layer, third layer, fourth layer, and fifth layer constitute the device auxiliary data.

[0102] For example, if a second region exists, that is, if the product to be produced includes LVT devices, the graphics of the second region can be output to layer 2002. If a third region exists, that is, if the product to be produced includes ELVT devices, the graphics of the third region can be output to layer 2003. If a fourth region exists, that is, if the product to be produced includes RVT devices, the graphics of the fourth region can be output to layer 2001.

[0103] A graphic file including a first layer, a second layer, a third layer, a fourth layer and a fifth layer is used as the device auxiliary data.

[0104] In a specific implementation, there is no limitation on the specific type of the preset graphic. In one embodiment, the determined device type and the graphic corresponding to the device type combination can be used as the corresponding preset graphic. Specifically, the first preset graphic can be the graphic of the fourth area, the second preset graphic can be the graphic of the second area, the third preset graphic can be the graphic of the third area, the fourth preset graphic can be the graphic of the third area, and the fifth preset graphic can be the graphic of the second and third areas.

[0105] Step 24: outputting a mask identification related to the device required for producing the product to be produced based on the device auxiliary data.

[0106] In a specific implementation, the devices required for the product to be produced include, but are not limited to, 1.2V devices, and may also be devices of other voltages. It is understood that for devices at any voltage, the mask determination method in the embodiment of the present invention can be referred to to determine the mask used for the device at that voltage.

[0107] Referring to Table 2, the inventors have discovered that, in specific implementations, when the devices at a certain voltage of the product to be produced include at least one of the following device types: RVT, LVT, and ELVT, the VTPH and CVTN masks are required for production of the device. When the devices at that voltage include both LVT and ELVT, the VTNLE and VTPLE masks are required for production of the device. When the devices at that voltage include both the RVT device type and at least one of the LVT and ELVT device types, the VTNR and VTPR masks are required for production of the device.

[0108] Therefore, in one embodiment of the present invention, when determining the mask identification associated with the device required to produce the product to be produced, the device auxiliary data can be retrieved. When a pattern exists on at least one of the first, second, and third layers, the mask pattern output includes a VTPH mask and a CVTN mask. When a pattern exists on the fourth layer, the mask pattern output includes a VTNLE mask and a VTPLE mask. When a pattern exists on the fifth layer, the mask pattern output includes a VTNR mask and a VTPR mask. This allows the mask identification associated with the device used to produce the product to be produced to be determined.

[0109] In a specific implementation, the mask identification device may output mask identifications related to the devices used to produce the product to be produced, specifically for the three device types: RVT, LVT, and ELVT. In some embodiments, the mask identification device may also output mask identifications related to all devices used to produce the product to be produced, including the five mask patterns: NW, PW, VNH, NLDD, and PLDD, which are used by any semiconductor product using the process under study, as well as the two mask patterns: NLDDH and PLDDH, which are required when the semiconductor product includes EHVT.

[0110] In one embodiment of the present invention, before outputting the final mask identification associated with the components required for producing the product to be produced, the mask identification to be outputted may be corrected to more accurately output the final mask identification associated with the components required for producing the product to be produced. The mask identification to be outputted is the mask identification determined using the above-described method.

[0111] For example, after the first logical operation, the output mask plate is determined to include both VTPH and CVTN. However, CVTN is for SRAM, and the product to be produced does not contain SRAM. Therefore, the CVTN mask plate is not required for the product to be produced. Therefore, after the correction, the output mask plate pattern should not include the CVTN mask plate.

[0112] In specific implementations, there may be multiple correction methods, which are not limited here.

[0113] In one embodiment of the present invention, the correction method may include: obtaining platemaking data, which is layout data obtained after performing a second logical operation on the original layout data; the layers existing in the platemaking data are used to make a mask plate; based on the platemaking data, the mask plate identification to be output is corrected, and the corrected mask plate identification is used as the final mask plate identification related to the device required to produce the product to be produced and output.

[0114] In a specific implementation, the original layout data is not the mask data, and a second logical operation must be performed on the original layout data to generate the layers required for the photomask as the plate making data. Only the layers with patterns after the second logical operation can be used to make the photomask.

[0115] In a specific implementation, the data after the second logic operation can be used to correct the mask identification to be output, and the masks in the list but without any graphic output by the second logic operation can be deleted to obtain the corrected mask final identification.

[0116] In a specific implementation, when outputting mask identifiers associated with components required to produce the product to be produced, only the mask names associated with the components required to produce the product to be produced, such as VTPH and CVTN, may be output. To facilitate viewing of the mask pattern, the layer number of the mask pattern in the plate-making data may also be output simultaneously.

[0117] For example, when there is a graphic in the fifth layer of the device auxiliary data, "22VTNR" can be output, where "22" is the layer number of the mask graphic in the plate making data.

[0118] As can be seen from the foregoing, the mask identification method in the embodiments of the present invention eliminates the need to obtain a list of device models. Instead, a computer can automatically output mask identifications related to the components required for the product to be produced based on the original layout data. This eliminates the need for manual intervention, effectively improving work efficiency and shortening the production cycle of the product to be produced. Furthermore, the computer's automated execution reduces the probability of error and improves the accuracy of mask identification.

[0119] In order to enable those skilled in the art to better understand and implement the present invention, the apparatus, computer-readable storage medium, and electronic device corresponding to the above method are described in detail below.

[0120] Reference Figure 3 The present invention also provides a mask determination device 30, which may include: a first acquisition unit 31, a pattern recognition unit 32, a device type determination unit 33, and an output unit 34.

[0121] The first acquisition unit 31 is adapted to acquire original layout data of the product to be produced;

[0122] The graphic recognition unit 32 is adapted to recognize the graphic of the original layout data;

[0123] The device type determination unit 33 is adapted to perform a first logical operation based on the pattern recognition result to determine the device type included in the product to be produced and obtain device auxiliary data;

[0124] The output unit 34 is adapted to output a list of mask identifications related to the devices required to produce the product to be produced based on the device auxiliary data.

[0125] In one embodiment of the present invention, the apparatus 30 may further include: a second acquiring unit 35 and a correcting unit 36.

[0126] The second acquisition unit 35 is adapted to acquire plate-making data, wherein the plate-making data is layout data obtained by performing a second logical operation on the original layout data; the layers in the plate-making data are used to make a mask;

[0127] The correction unit 36 ​​is adapted to correct the mask identification to be output based on the plate making data, and output the corrected mask identification as the final mask identification related to the device required for producing the product to be produced.

[0128] Regarding the above functional units, they can be implemented specifically with reference to the description of the corresponding steps in the above method, which will not be repeated here.

[0129] An embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program is executed by a processor to implement the steps of any of the above methods.

[0130] In a specific implementation, the computer-readable storage medium may include: ROM, RAM, magnetic disk or optical disk, etc.

[0131] An embodiment of the present invention further provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and the processor executes the steps of any of the above methods when running the computer program.

[0132] Regarding the various modules / units contained in the various devices and products described in the above embodiments, they can be software modules / units, hardware modules / units, or partly software modules / units and partly hardware modules / units. For example, for various devices and products applied to or integrated in a chip, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, or at least some of the modules / units can be implemented in the form of software programs, which run on the processor integrated inside the chip, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated in a chip module, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component of the chip module (such as a chip, circuit module, etc.) or in different components, or at least some of the modules / units can be implemented in the form of hardware such as circuits. The element can be implemented in the form of a software program, which runs on the processor integrated inside the chip module, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated in the terminal, the various modules / units contained therein can be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component (for example, chip, circuit module, etc.) or different components in the terminal, or, at least some modules / units can be implemented in the form of a software program, which runs on the processor integrated inside the terminal, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits.

[0133] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A method for determining a mask plate, characterized in that: include: Obtain the original layout data of the product to be produced; Recognizing the graphics of the original layout data; Performing a first logical operation based on the pattern recognition result to determine the type of device included in the product to be produced and obtain device auxiliary data; Based on the device auxiliary data, outputting a mask identification related to the device required to produce the product to be produced; Performing a first logical operation based on the pattern recognition result to determine the type of device included in the product to be produced and obtaining device auxiliary data, including: performing a first logical operation on the recognized pattern using a Boolean operation method to determine the type of device included in the product to be produced; outputting the pattern corresponding to each device type to different preset layers to form device auxiliary data; The device types include: high threshold voltage transistors, normal threshold voltage transistors, low threshold voltage transistors, ultra-high threshold voltage transistors and ultra-low threshold voltage transistors; The Boolean operation method is used to perform a first logical operation on the identified graphics to determine the device type contained in the product to be produced, including: identifying the gate area, high threshold voltage area, low threshold voltage area and overvoltage area in the original layout data; taking the area at the intersection of the gate area and the high threshold voltage area as the first area, and the device type corresponding to the first area is a high threshold and ultra-high threshold voltage tube; taking the area at the intersection of the low threshold voltage area except the overvoltage area and the gate area as the second area, and the device type corresponding to the second area is a low threshold voltage tube; taking the area at the intersection of the low threshold voltage area, the overvoltage area and the gate area as the third area, and the device type corresponding to the third area is an ultra-low threshold voltage tube; taking the area in the gate area except the first area, the second area and the third area as the fourth area, and the device type corresponding to the fourth area is a normal threshold voltage tube.

2. The method for determining a mask plate according to claim 1, wherein: The identifying of the graphics in the original layout data includes: A design rule checking tool DRC is used to identify the graphics in the original layout data.

3. The method for determining the mask plate according to claim 2, wherein: The step of outputting the graphics corresponding to each device type to different preset layers to form device auxiliary data includes: If the fourth area exists in the original layout data, outputting the first preset graphic to a preset first layer; If the second area exists in the original layout data, outputting the second preset graphic to a preset second layer; If the third area exists in the original layout data, outputting the third preset graphic to a preset third layer; If the second area and the third area exist simultaneously in the original layout data, outputting the fourth preset graphic to a preset fourth layer; If the fourth area exists in the original layout data and at least one of the second area and the third area exists, the fifth preset graphic is output to the preset fifth layer; the first layer, the second layer, the third layer, the fourth layer and the fifth layer constitute the device auxiliary data.

4. The method for determining the mask plate according to claim 3, wherein: Outputting a mask identification related to a device required to produce the product to be produced based on the device auxiliary data includes: When there is a pattern on at least one of the first layer, the second layer, and the third layer, the mask identification related to the device required for the product to be produced includes the identification of the VTPH mask and the CVTN mask; When there are graphics in the fourth layer, the mask identification related to the device required for the product to be produced includes the identification of the VTNLE mask and the VTPLE mask; When there are graphics on the fifth layer, the list of mask identifications related to the devices required for the product to be produced includes identifications of the VTNR mask and the VTPR mask.

5. The method for determining a mask plate according to claim 1, wherein: Before outputting the identification of the mask plate related to the device required for producing the product to be produced, the method further includes: Acquiring plate-making data, wherein the plate-making data is layout data obtained by performing a second logical operation on the original layout data; the layers in the plate-making data are used to make a mask; Based on the plate making data, the mask identification to be output is corrected, and the corrected mask identification is output as the final mask identification related to the device required for producing the product to be produced.

6. The method for determining a mask plate according to claim 5, wherein: Output the final identification of the mask related to the devices required to produce the product to be produced, including: Output the name of the mask plate related to the device required to produce the product to be produced, and the layer number of the mask plate in the plate making data.

7. A device for determining a mask plate, characterized in that: include: A first acquisition unit, adapted to acquire original layout data of a product to be produced; A graphic recognition unit, adapted to recognize the graphic of the original layout data; a device type determination unit, adapted to perform a first logical operation based on the pattern recognition result, determine the type of device included in the product to be produced, and obtain device auxiliary data; an output unit adapted to output a list of mask identifications related to devices required for producing the product to be produced based on the device auxiliary data; The device type determination unit is adapted to perform a first logic operation on the identified pattern using a Boolean operation method to determine the type of device included in the product to be produced; Outputting graphics corresponding to each device type to different preset layers to form device auxiliary data; The device types include: high threshold voltage transistors, normal threshold voltage transistors, low threshold voltage transistors, ultra-high threshold voltage transistors and ultra-low threshold voltage transistors; The device type determination unit is suitable for identifying the gate area, high threshold voltage area, low threshold voltage area and overvoltage area in the original layout data; the area at the intersection of the gate area and the high threshold voltage area is used as the first area, and the device type corresponding to the first area is a high threshold and ultra-high threshold voltage tube; the area at the intersection of the low threshold voltage area except the overvoltage area and the gate area is used as the second area, and the device type corresponding to the second area is a low threshold voltage tube; the area at the intersection of the low threshold voltage area, the overvoltage area and the gate area is used as the third area, and the device type corresponding to the third area is an ultra-low threshold voltage tube; the area in the gate area except the first area, the second area and the third area is used as the fourth area, and the device type corresponding to the fourth area is a normal threshold voltage tube.

8. The determination device according to claim 7, wherein: Also includes: a second acquiring unit adapted to acquire plate-making data, wherein the plate-making data is layout data obtained by performing a second logical operation on the original layout data; The layers in the plate making data are used to make a mask plate; The correction unit is adapted to correct the mask identification to be output based on the plate making data, and output the corrected mask identification as the final mask identification related to the device required for producing the product to be produced.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: The computer program is executed by a processor to implement the steps of the method according to any one of claims 1 to 6.

10. An electronic device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, wherein: When the processor runs the computer program, the steps of the method according to any one of claims 1 to 6 are performed.

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