A network boot method, apparatus, electronic device, and storage medium

Abstract

This invention provides a network startup method, apparatus, electronic device, and storage medium. The method involves generating a memory type information form; the memory type information corresponds to a memory address space; allocating memory to the memory address space using historical memory prefetch information and obtaining a first memory allocation value for the memory address space; obtaining a startup file and determining the number of data bytes for the startup file; when the number of data bytes is greater than the first memory allocation value, adjusting the first memory allocation value based on the number of data bytes and the first memory allocation value to generate a second memory allocation value; the second memory allocation value being greater than or equal to the number of data bytes; allocating memory to the memory address space using the second memory allocation value and storing the startup file in the memory address space to start the network. This solves the problem of the memory address space not automatically adapting to the startup file size, thereby improving network startup efficiency.

Description

Technical Field

[0001] This invention relates to the field of network booting technology, and in particular to a network booting method, a network booting device, an electronic device, and a computer-readable storage medium. Background Technology

[0002] The memory address space is a unique identifier assigned to each memory block within the CPU domain. Each memory block can store data, and the identifier serves to quickly and accurately locate the corresponding memory block. There are various types of memory address spaces; according to the UEFI specification, they can be categorized into 16 types, including EfiLoaderCode, EfiLoaderData, EfiBootServicesCode, EfiBootServicesData, EfiRuntimeServicesCode, and EfiRuntimeServicesData.

[0003] PXE (Preboot Execution Environment) is a common method for network booting. Its working mode involves a client and server. The client downloads the image from the server to its memory via the network and loads the boot files. The PXE network boot process is as follows: 1) In UEFI (Unified Extensible Firmware Interface) mode, the client's BIOS (Basic Input Output System) downloads the network boot program file NBP from the server and stores it in memory; 2) The NBP file is executed, which then downloads the kernel file vmlinuz and the initial memory image file initrd from the server; 3) After all boot images are downloaded, control is transferred to the system kernel, and booting begins.

[0004] However, the startup files downloaded from the server are usually stored in a memory address space of less than 2GB, that is, the 1M-MMCFG_BASE area. If the startup file is too large, it cannot be stored completely, resulting in failure to start normally and thus low network startup efficiency. Summary of the Invention

[0005] The present invention provides a network booting method, apparatus, electronic device, and computer-readable storage medium to solve the problem that the memory address space cannot automatically adapt to the size of the boot file.

[0006] This invention discloses a network boot method, which may include:

[0007] Generate a memory type information form; the memory type information form includes memory type information and historical memory prefetch information; the memory type information has a corresponding memory address space;

[0008] The historical memory prefetch information is used to allocate memory to the memory address space, and a first memory allocation value for the memory address space is obtained;

[0009] Obtain the startup file and determine the number of data bytes for the startup file;

[0010] When the number of data bytes is greater than the first memory allocation value, the first memory allocation value is adjusted according to the number of data bytes and the first memory allocation value to generate a second memory allocation value; the second memory allocation value is greater than or equal to the number of data bytes.

[0011] The second memory allocation value is used to allocate memory in the memory address space, and the startup file is stored in the memory address space to start the network.

[0012] Optionally, the method is applied to a client device, the client device being equipped with a flash basic input / output system, the flash basic input / output system being configured with non-volatile random access memory, and the step of generating a memory type information form may further include:

[0013] Generate a memory type information form and store the memory type information form in the non-volatile random access memory.

[0014] Optionally, before the steps of allocating memory for the memory address space using the historical memory prefetch information and obtaining a first memory allocation value for the memory address space, the method may further include:

[0015] The memory type information and the historical memory prefetch information are saved in the form of manual blocks.

[0016] Optionally, the step of adjusting the first memory allocation value based on the number of data bytes and the first memory allocation value to generate a second memory allocation value when the number of data bytes is greater than the first memory allocation value may include:

[0017] Multiple memory value increment levels are generated for the memory address space according to preset rules; each memory value increment level has a corresponding incremental memory allocation value.

[0018] Calculate the difference between the number of data bytes and the first memory allocation value;

[0019] The first target level is determined from the multiple incremental memory value increment levels by using the difference, and the incremental memory allocation value corresponding to the first target level is determined as the second memory allocation value.

[0020] Optionally, it may also include:

[0021] When the number of data bytes is less than the first memory allocation value, multiple memory value reduction levels for the memory address space are generated according to preset rules; each memory value reduction level has a corresponding reduced memory allocation value.

[0022] The second target level is determined from the multiple memory value reduction levels by using the difference, and the memory reduction value corresponding to the second target level is determined as the third memory allocation value;

[0023] The third memory allocation value is used to allocate memory in the memory address space, and the startup file is stored in the memory address space to start the network.

[0024] This invention also discloses a network boot device, which may include:

[0025] A memory type information form generation module is used to generate a memory type information form; the memory type information form includes memory type information and historical memory prefetch information; the memory type information has a corresponding memory address space.

[0026] The first memory allocation value acquisition module is used to allocate memory to the memory address space using the historical memory prefetch information, and to acquire the first memory allocation value for the memory address space.

[0027] A data byte count determination module is used to obtain the startup file and determine the data byte count for the startup file;

[0028] The second memory allocation value generation module is used to adjust the first memory allocation value according to the number of data bytes and the first memory allocation value when the number of data bytes is greater than the first memory allocation value, and generate a second memory allocation value; the second memory allocation value is greater than or equal to the number of data bytes.

[0029] A network startup module is used to allocate memory in the memory address space using the second memory allocation value and store the startup file in the memory address space to start the network.

[0030] Optionally, the device is applied to a client device, the client device being equipped with a flash memory basic input / output system, the flash memory basic input / output system being configured with non-volatile random access memory, and the memory type information form generation module may further include:

[0031] The memory type information form generation submodule is used to generate a memory type information form and store the memory type information form in the non-volatile random access memory.

[0032] Optionally, the device may further include:

[0033] A manual block-based saving module is used to save the memory type information and the historical memory prefetch information in the form of manual blocks.

[0034] Optionally, the second memory allocation value generation module may include:

[0035] The memory value increment generation submodule is used to generate multiple memory value increment levels for the memory address space according to preset rules; each memory value increment level has a corresponding incremental memory allocation value.

[0036] The difference calculation submodule is used to calculate the difference between the number of data bytes and the first memory allocation value;

[0037] The second memory allocation value determination submodule is used to determine a first target level from multiple incremental memory value increment levels through the difference, and to determine the incremental memory allocation value corresponding to the first target level as the second memory allocation value.

[0038] Optionally, it may also include:

[0039] A memory value reduction tier generation submodule is used to generate multiple memory value reduction tiers for the memory address space according to preset rules when the number of data bytes is less than the first memory allocation value; each memory value reduction tier has a corresponding reduced memory allocation value;

[0040] The third memory allocation value determination submodule is used to determine the second target level from multiple memory value reduction levels through the difference, and to determine the reduction memory allocation value corresponding to the second target level as the third memory allocation value;

[0041] The network startup submodule is used to allocate memory in the memory address space using the third memory allocation value and store the startup file in the memory address space to start the network.

[0042] This invention also discloses an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus;

[0043] The memory is used to store computer programs;

[0044] When the processor executes a program stored in the memory, it implements the method described in the embodiments of the present invention.

[0045] This invention also discloses a computer-readable storage medium storing instructions that, when executed by one or more processors, cause the processors to perform the methods described in this invention.

[0046] The embodiments of the present invention have the following advantages:

[0047] In this embodiment of the invention, a memory type information form is generated. This form includes memory type information and historical memory prefetch information. The memory type information corresponds to a memory address space. Memory is allocated to the memory address space using the historical memory prefetch information, and a first memory allocation value is obtained for the memory address space. A startup file is obtained, and the number of data bytes for the startup file is determined. When the number of data bytes is greater than the first memory allocation value, the first memory allocation value is adjusted based on the number of data bytes and the first memory allocation value to generate a second memory allocation value. The second memory allocation value is greater than or equal to the number of data bytes. Memory is allocated to the memory address space using the second memory allocation value, and the startup file is stored in the memory address space to start the network. This solves the problem that the memory address space cannot automatically adapt to the startup file size, thereby improving network startup efficiency. Attached Figure Description

[0048] Figure 1 This is a schematic diagram of the structure of a 4G memory address space in a related technology;

[0049] Figure 2 This is a flowchart of the steps of a network startup method provided in an embodiment of the present invention;

[0050] Figure 3 This is a schematic diagram of the structure of a memory type information form provided in an embodiment of the present invention;

[0051] Figure 4 This is a flowchart illustrating a network startup method provided in an embodiment of the present invention;

[0052] Figure 5 This is a structural block diagram of a network boot device provided in an embodiment of the present invention;

[0053] Figure 6 This is a hardware structure block diagram of an electronic device provided in various embodiments of the present invention. Detailed Implementation

[0054] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0055] In practical applications, early Intel architectures had 32 address buses, resulting in a maximum memory address space of 4GB, giving rise to the concept of a 4GB memory address space. With the development of the computer industry, the maximum memory address space has long exceeded 4GB, but due to backward compatibility requirements, the 4GB memory address space concept remains in use today.

[0056] The memory address space is a unique identifier assigned to each memory block within the CPU domain. Each memory block can store data, and the identifier serves to quickly and accurately locate the corresponding memory block. There are various types of memory address spaces; according to the UEFI specification, they can be categorized into 16 types, including EfiLoaderCode, EfiLoaderData, EfiBootServicesCode, EfiBootServicesData, EfiRuntimeServicesCode, and EfiRuntimeServicesData.

[0057] refer to Figure 1 , Figure 1 This is a schematic diagram of a 4GB memory address space structure based on related technologies. The layout of the 4GB memory address space is as follows: The range 0M-MMCFG_BASE is the address space of the Dynamic Random Access Memory (DRAM) region. This region stores different types of memory data, used for boot-time services, runtime services, and some temporary data during OS (Operating System) boot. The range MMCFG_BASE-4GB is the address space of the mapped memory MMIO region. This region stores data from PCIe (Peripheral Component Interconnect Express) devices. On the Intel Whitley server platform, the default value of MMCFG_BASE is 2GB.

[0058] PXE, a common network boot method, operates in a client-server mode. The client downloads the image from the server to its memory via the network and loads the installation boot files. The PXE network boot process is as follows: 1) In UEFI mode, the client's BIOS downloads the NBP file from the server and stores it in memory; 2) The NBP file is executed, which then downloads the vmlinuz and initrd files from the server; 3) After all boot images have been downloaded, control is handed over to the system kernel, and booting begins.

[0059] However, the boot files downloaded from the server are usually stored in a memory address space of less than 2GB, specifically the 1MB-MMCFG_BASE area. If the boot file becomes too large, it cannot be stored completely, leading to boot failure. For example, the initrd size of Diag 8.3OS in the lab is 400MB, while that of Diag 7.6OS is 321MB. The same machine can boot normally into Diag 7.6OS, but fails to boot into Diag 8.3OS. By collecting system logs and analyzing the memory mapping control register memmap and memory usage, it was found that the Diag 8.3 initrd file size exceeded the available contiguous memory area of ​​less than 2GB, thus preventing file loading. Further investigation revealed that as Diag OS continues to upgrade, its initrd file size will increase, leading to more frequent boot failures.

[0060] Therefore, a core inventive point of this invention is that it proposes a scheme for dynamically adjusting the memory address space. This scheme can dynamically adjust the memory address space according to the actual memory used by the server at each startup, thereby ensuring that the available contiguous memory space of less than 2G meets the size of the PXE boot file, and thus enables the network system to start normally.

[0061] To enable those skilled in the art to better understand the embodiments of the present invention, some technical terms involved in the embodiments of the present invention will be explained below.

[0062] PXE (Preboot Execution Environment)

[0063] MMIO (Memory-mapped I / O) memory mapped I / O

[0064] MMCFG (Memory-mapped Configuration)

[0065] NBP (Network Boot Program)

[0066] PEI (Pre-EFI Initialization) is the initialization process for EFI (Extensible Firmware Interface).

[0067] DXE (Driver Execution Environment)

[0068] BDS (Boot Device Selection)

[0069] Reference Figure 2 The diagram illustrates a flowchart of a network startup method provided in an embodiment of the present invention, which may specifically include the following steps:

[0070] Step 201: Generate a memory type information form; the memory type information form includes memory type information and historical memory prefetch information; the memory type information has a corresponding memory address space;

[0071] Step 202: Allocate memory for the memory address space using the historical memory prefetch information, and obtain a first memory allocation value for the memory address space;

[0072] Step 203: Obtain the startup file and determine the number of data bytes for the startup file;

[0073] Step 204: When the number of data bytes is greater than the first memory allocation value, adjust the first memory allocation value according to the number of data bytes and the first memory allocation value to generate a second memory allocation value; the second memory allocation value is greater than or equal to the number of data bytes.

[0074] Step 205: Allocate memory in the memory address space using the second memory allocation value, and store the startup file in the memory address space to start the network.

[0075] In specific implementations, the embodiments of the present invention can be applied to devices with network systems, such as servers, personal computers, etc.

[0076] In practical applications, network startup is roughly divided into the PEI stage, DXE stage, and BDS stage. In the later stage of the PEI stage, memory initialization is completed. At this time, it is necessary to allocate address space for various types of memory to meet the usage requirements of various devices during the subsequent boot process.

[0077] Therefore, the embodiments of the present invention can generate a memory type information form in the PEI stage. The memory type information form can include memory type information, historical memory prefetch information, current memory prefetch information, memory prefetch information at the next startup, and the memory type information can have a corresponding memory address space.

[0078] refer to Figure 3 , Figure 3This is a schematic diagram of the structure of a memory type information form provided in an embodiment of the present invention. The memory type information form 301 can be used to display the variable MemoryTypeInformation. The memory type information form 301 can include memory type information 302 and memory prefetch information 303 at the last boot, memory prefetch information 304 at the current boot, and memory prefetch information 305 at the next boot.

[0079] In practical applications, the DXE stage mainly performs most of the initialization work. Functionally, the DXE kernel is responsible for the basic DXE services and execution process, while the DXE dispatcher is responsible for scheduling and executing the DXE driver and initializing system devices.

[0080] Therefore, embodiments of the present invention can allocate memory for the memory address space using historical memory prefetch information during the DXE stage, and obtain a first memory allocation value for the memory address space. Specifically, the first memory allocation value can be used to express how much memory has been allocated for the memory address space using historical memory prefetch information.

[0081] For example, using historical memory prefetch information, 0x250 pages are allocated to the memory address space EfiRuntimeServicesCode. 0x250 pages can be the first memory allocation value for the memory address space EfiRuntimeServicesCode. Using historical memory prefetch information, 0x2200 pages are allocated to the memory address space EfiRuntimeServicesData. 0x2200 pages can be the first memory allocation value for the memory address space EfiRuntimeServicesData. Using historical memory prefetch information, 0x1000 pages are allocated to the memory address space EfiBootServicesCode. 0x1000 pages can be the first memory allocation value for the memory address space EfiBootServicesCode. Using historical memory prefetch information, 0xB000 pages are allocated to the memory address space EfiBootServicesData. 0xB000 pages can be the first memory allocation value for the memory address space EfiBootServicesData.

[0082] In practical applications, the BDS stage primarily executes the boot strategy, such as initializing the console device, loading necessary device drivers, and executing boot entries. During this stage, memory usage for various types is statistically analyzed and the data is populated into the MemoryTypeInformation variable. The function CountUnusableMemory() is then used to calculate the contiguous available memory address space up to 2GB.

[0083] Therefore, in this embodiment of the invention, the boot file can be obtained in the BDS stage, and the number of data bytes for the boot file can be determined. When the PXE boot file needs to be loaded into memory, it can be determined whether the number of data bytes is greater than the first memory allocation value, thereby comparing the size of the boot file and the available memory address space.

[0084] When the number of data bytes is greater than the first memory allocation value, the memory address space can be adjusted according to the number of data bytes used to express the size of the startup file and the first memory allocation value, and a second memory allocation value can be generated. The second memory allocation value can be greater than or equal to the number of data bytes.

[0085] After calculating the second memory allocation value, embodiments of the present invention can use the second memory allocation value to allocate memory in the memory address space and store the startup file in the memory address space to start the network.

[0086] For example, the size of the entire DRAM region can be adjusted by setting MMCFG_BASE as the second memory allocation value, thereby increasing the contiguous available memory address space. If the second memory allocation value is greater than or equal to the number of data bytes, it means that the current memory space can meet the requirements of the startup file and can start normally. Therefore, in this embodiment of the invention, after allocating memory in the memory address space using the second memory allocation value, the startup file can be stored in the memory address space to start the network.

[0087] In this embodiment of the invention, a memory type information form is generated. This form includes memory type information and historical memory prefetch information. The memory type information corresponds to a memory address space. Memory is allocated to the memory address space using the historical memory prefetch information, and a first memory allocation value is obtained for the memory address space. A startup file is obtained, and the number of data bytes for the startup file is determined. When the number of data bytes is greater than the first memory allocation value, the first memory allocation value is adjusted based on the number of data bytes and the first memory allocation value to generate a second memory allocation value. The second memory allocation value is greater than or equal to the number of data bytes. Memory is allocated to the memory address space using the second memory allocation value, and the startup file is stored in the memory address space to start the network. This solves the problem that the memory address space cannot automatically adapt to the startup file size, thereby improving network startup efficiency.

[0088] Based on the above embodiments, modified embodiments of the above embodiments are proposed. It should be noted that, in order to keep the description brief, only the differences from the above embodiments are described in the modified embodiments.

[0089] In an optional embodiment of the present invention, the method is applied to a client device equipped with a flash memory basic input / output system, the flash memory basic input / output system being configured with non-volatile random access memory, and the step of generating a memory type information form further includes:

[0090] Generate a memory type information form and store the memory type information form in the non-volatile random access memory.

[0091] In practical applications, client devices download the image from the server to the memory space via the network and load the installation startup file. However, since client devices usually delete the information in the memory type information form after power failure, it is impossible to extract the historical memory prefetch information in the memory type information form.

[0092] Therefore, in specific implementations, the embodiments of the present invention can be applied to client devices. The client device can be a device with a network system, and the embodiments of the present invention can configure a flash memory basic input output system (BIOS) for the client device. The flash memory basic input output system is configured with non-volatile random access memory (NVRam). The embodiments of the present invention can store the generated memory type information form in the non-volatile random access memory, that is, by storing the variable MemoryTypeInformation in the NVRam area of ​​the BIOS Flash. The data in this area will not be lost after power failure.

[0093] In this embodiment of the invention, a memory type information form is generated daily and stored in the non-volatile random access memory, thereby preventing the memory type information form from being deleted after the client loses power and further improving network startup efficiency.

[0094] In an optional embodiment of the present invention, before the steps of allocating memory for the memory address space using the historical memory prefetch information and obtaining a first memory allocation value for the memory address space, the method further includes:

[0095] The memory type information and the historical memory prefetch information are saved in the form of manual blocks.

[0096] In the specific implementation, after the memory initialization is completed in the later stage of the PEI stage, it is necessary to allocate address space for various types of memory to meet the usage requirements of various devices during the subsequent boot process. The allocation will be based on the previous memory prefetch. However, since the data will be cleared due to the PEI stage, this embodiment of the invention can establish memory type information and historical memory prefetch information in the form of manual blocks (HOBs). This allows the memory type information and historical memory prefetch information that can be retained in the form of HOBs to be used in the DXE stage.

[0097] In this embodiment of the invention, by saving the memory type information and the historical memory prefetch information in the form of manual blocks, the memory type information and historical memory prefetch information that can be retained in the form of HOB are not deleted and can be used in the DXE stage, further improving the network startup efficiency.

[0098] In an optional embodiment of the present invention, the step of adjusting the first memory allocation value according to the number of data bytes and the first memory allocation value to generate a second memory allocation value when the number of data bytes is greater than the first memory allocation value includes:

[0099] Multiple memory value increment levels are generated for the memory address space according to preset rules; each memory value increment level has a corresponding incremental memory allocation value.

[0100] Calculate the difference between the number of data bytes and the first memory allocation value;

[0101] The first target level is determined from the multiple incremental memory value increment levels by using the difference, and the incremental memory allocation value corresponding to the first target level is determined as the second memory allocation value;

[0102] The memory address space corresponding to the target gear is determined as the target memory address space.

[0103] In practice, while allocating more memory space to the memory address space can effectively prevent the startup file from being larger than the memory address space, excessively allocating more memory space to the memory address space can also lead to a waste of memory space.

[0104] In this embodiment of the invention, multiple incremental memory value levels for memory address spaces can be generated according to preset rules. Each incremental memory value level can have a corresponding incremental memory allocation value. After generating multiple incremental memory value levels for memory address spaces, the difference between the number of data bytes and the first memory allocation value can be calculated. Then, the first target level can be determined from the multiple incremental memory value levels based on the difference, and the incremental memory allocation value corresponding to the first target level can be determined as the second memory allocation value.

[0105] For example, four memory increment tiers can be configured for the memory address space: Tier 1, Tier 2, Tier 3, and Tier 4. Each increment tier can have a corresponding incremental memory allocation value. Specifically, Tier 1 corresponds to an incremental memory allocation value of 2GB, Tier 2 to 2.5GB, Tier 3 to 3GB, and Tier 4 to 3.5GB. After calculating the difference between the number of data bytes and the Tier 1 memory allocation value, if the difference is less than 500MB, Tier 1 can be matched and designated as the first target tier. Simultaneously, the incremental memory allocation value of 2.5GB corresponding to the Tier 1 target tier can be determined as the second memory allocation value. Alternatively, if the difference is greater than 500MB but less than 1GB, Tier 3 to 3GB can be matched and designated as the first target tier. The incremental memory allocation value of 3GB corresponding to the Tier 1 target tier can be determined as the second memory allocation value, and so on. By setting MMCFG_BASE, the size of the entire DRAM region can be adjusted, thereby increasing the contiguous available memory address space.

[0106] Of course, the above examples are merely illustrations. Those skilled in the art can allocate memory value increments for the memory address space according to any incremental memory allocation value and any number of increments. In this regard, the embodiments of the present invention do not limit the scope of the invention.

[0107] In this embodiment of the invention, multiple memory value increment levels for the memory address space are generated according to preset rules; each memory value increment level has a corresponding incremental memory allocation value; the difference between the number of data bytes and the first memory allocation value is calculated; a first target level is determined from the multiple incremental memory value increment levels based on the difference, and the incremental memory allocation value corresponding to the first target level is determined as the second memory allocation value. This not only increases the continuous available memory address space but also avoids the waste of memory space caused by excessively allocating more memory space to the memory address space, thereby further improving the efficiency of network startup.

[0108] In an optional embodiment of the present invention, when the number of data bytes is less than the first memory allocation value, multiple memory value reduction levels for the memory address space are generated according to preset rules; each memory value reduction level has a corresponding reduced memory allocation value.

[0109] The second target level is determined from the multiple memory value reduction levels by using the difference, and the memory reduction value corresponding to the second target level is determined as the third memory allocation value;

[0110] The third memory allocation value is used to allocate memory in the memory address space, and the startup file is stored in the memory address space to start the network.

[0111] As can be seen from the above, although allocating more memory space to the memory address space can effectively prevent the startup file from being larger than the memory address space, excessive allocation of more memory space to the memory address space can also lead to a waste of memory space.

[0112] Similarly, if the number of data bytes is less than the first memory allocation value, using historical memory prefetch information to allocate memory for the memory address space will also lead to a waste of memory space.

[0113] In this embodiment of the invention, when the number of data bytes is less than a first memory allocation value, multiple memory value reduction levels for the memory address space can be generated according to preset rules. Each memory value reduction level has a corresponding reduced memory allocation value. After generating multiple memory value reduction levels for the memory address space, a second target level can be determined from the multiple memory value reduction levels by the difference. The reduced memory allocation value corresponding to the second target level is determined as a third memory allocation value. Then, the third memory allocation value can be used to allocate memory for the memory address space and store the startup file in the memory address space to start the network.

[0114] For example, four memory value reduction tiers can be configured for the memory address space: Tier 1, Tier 2, Tier 3, and Tier 4. Each memory value reduction tier can have a corresponding incremental memory allocation value. Specifically, Tier 1 corresponds to an incremental memory allocation value of 2.5G, Tier 2 to 2G, Tier 3 to 1.5G, and Tier 4 to 1G. Assuming the current MMCFG_BASE tier is 2.5G, after calculating the difference between the number of data bytes and the first memory allocation value, if the difference is greater than -500, Tier 2 can be matched and used as the second target tier. Simultaneously, the incremental memory allocation value of 2G corresponding to the second target tier can be determined as the third memory allocation value. Then, memory can be allocated to the memory address space using the third memory allocation value of 2G, and the startup file can be stored in the memory address space to start the network.

[0115] In this embodiment of the invention, when the number of data bytes is less than the first memory allocation value, multiple memory value reduction levels for the memory address space are generated according to preset rules; each memory value reduction level has a corresponding reduced memory allocation value; a second target level is determined from the multiple memory value reduction levels by the difference, and the reduced memory allocation value corresponding to the second target level is determined as a third memory allocation value; memory is allocated to the memory address space using the third memory allocation value, and the startup file is stored in the memory address space to start the network. This not only ensures that the memory address space is allocated enough space to store the startup file, but also avoids the waste of memory space that can result from excessive allocation of more memory space to the memory address space, thereby further improving the efficiency of starting the network.

[0116] To enable those skilled in the art to better understand the embodiments of the present invention, a complete example is provided below to illustrate the embodiments of the present invention.

[0117] refer to Figure 4 , Figure 4 This is a flowchart illustrating a network boot method provided in this embodiment of the invention. A table recording memory prefetch information is maintained and stored in the NVRam area of ​​the BIOS Flash using the variable `MemoryTypeInformation`. Data in this area is not lost after power failure. The variable `MemoryTypeInformation` includes the memory type, the prefetch status of each memory type at the last boot, the prefetch status of each memory type at the current boot, and the prefetch status of each memory type at the next boot. Using this table, the size of the contiguous available memory address space region below 2GB can be calculated.

[0118] In the later stages of the PEI phase, memory initialization is complete. At this point, address space needs to be allocated for various types of memory to meet the usage requirements of various devices during subsequent boot processes. The allocation will be based on the memory prefetch information from the previous phase, and the allocation information will be created in the form of Hobs. This is because the data from the PEI phase will be cleared, and the data in the form of Hobs can be retained for use in the DXE phase.

[0119] During the DXE phase, most of the initialization work is performed. Functionally, the DXE kernel is responsible for basic DXE services and execution flow, while the DXE dispatcher is responsible for scheduling and executing DXE drivers and initializing system devices. When initializing memory services, the DXE phase retrieves the Hob created in PEI and allocates memory according to the allocation of various memory types within the Hob. For example, in the diagram above, 0x250 pages are allocated for EfiRuntimeServicesCode, 0x2200 pages for EfiRuntimeServicesData, 0x1000 pages for EfiBootServicesCode, and 0xB000 pages for EfiBootServicesData.

[0120] During the BDS phase, the main task is to execute the boot strategy, such as initializing the console device, loading necessary device drivers, and executing boot items. In this phase, memory usage for various types is statistically analyzed and the data is entered into the `MemoryTypeInformation` variable. The function `CountUnusableMemory()` is used to calculate the contiguous available memory address space below 2GB. When the PXE boot file needs to be loaded into memory, the size of the boot file and the available memory address space are compared. If the boot file size is larger than the available memory address space, the memory address space is adjusted. Specifically, the difference between the boot file size and the available memory address space is calculated and matched against the `MMCFG_BASE` level. `MMCFG_BASE` has four levels (2GB, 2.5GB, 3GB, 3.5GB). For example, a difference less than 500MB will match 2.5GB, a difference greater than 500MB but less than 1GB will match 3GB, and so on. Similarly, by setting MMCFG_BASE, the size of the entire DRAM region can be adjusted, thereby increasing the contiguous available memory address space. If the size of the boot file is smaller than the available memory address space, it means that the current memory space is sufficient to meet the requirements of the boot file and can boot normally. At this time, the difference between the available memory address space and the size of the boot file is calculated, and the MMCFG_BASE level is checked. For example, if the current MMCFG_BASE level is 2.5G and the difference is greater than 500M, then the MMCFG_BASE level can be set to 2G.

[0121] The above method can, on the one hand, calculate the available memory address space based on the current memory address space usage, compare the size of the PXE boot file, and dynamically adjust the memory address space if the requirements are not met. This method has high applicability and can solve the problem of insufficient memory address space resources. On the other hand, by dynamically adjusting the memory address space, memory utilization can be improved.

[0122] It should be noted that, for the sake of simplicity, the method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments of the present invention are not limited to the described order of actions, because according to the embodiments of the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present invention.

[0123] Reference Figure 5 The diagram illustrates a structural block diagram of a network booting device provided in an embodiment of the present invention, which may specifically include the following modules:

[0124] The memory type information form generation module 501 is used to generate a memory type information form; the memory type information form includes memory type information and historical memory prefetch information; the memory type information has a corresponding memory address space.

[0125] The first memory allocation value acquisition module 502 is used to allocate memory to the memory address space using the historical memory prefetch information and to acquire the first memory allocation value for the memory address space.

[0126] The data byte count determination module 503 is used to obtain the startup file and determine the data byte count for the startup file;

[0127] The second memory allocation value generation module 504 is used to adjust the first memory allocation value according to the number of data bytes and the first memory allocation value when the number of data bytes is greater than the first memory allocation value, and generate a second memory allocation value; the second memory allocation value is greater than or equal to the number of data bytes.

[0128] The network startup module 505 is used to allocate memory in the memory address space using the second memory allocation value and store the startup file in the memory address space to start the network.

[0129] Optionally, the device is applied to a client device, the client device being equipped with a flash memory basic input / output system, the flash memory basic input / output system being configured with non-volatile random access memory, and the memory type information form generation module may further include:

[0130] The memory type information form generation submodule is used to generate a memory type information form and store the memory type information form in the non-volatile random access memory.

[0131] Optionally, the device may further include:

[0132] A manual block-based saving module is used to save the memory type information and the historical memory prefetch information in the form of manual blocks.

[0133] Optionally, the second memory allocation value generation module may include:

[0134] The memory value increment generation submodule is used to generate multiple memory value increment levels for the memory address space according to preset rules; each memory value increment level has a corresponding incremental memory allocation value.

[0135] The difference calculation submodule is used to calculate the difference between the number of data bytes and the first memory allocation value;

[0136] The second memory allocation value determination submodule is used to determine a first target level from multiple incremental memory value increment levels through the difference, and to determine the incremental memory allocation value corresponding to the first target level as the second memory allocation value.

[0137] Optionally, it may also include:

[0138] A memory value reduction tier generation submodule is used to generate multiple memory value reduction tiers for the memory address space according to preset rules when the number of data bytes is less than the first memory allocation value; each memory value reduction tier has a corresponding reduced memory allocation value;

[0139] The third memory allocation value determination submodule is used to determine the second target level from multiple memory value reduction levels through the difference, and to determine the reduction memory allocation value corresponding to the second target level as the third memory allocation value;

[0140] The network startup submodule is used to allocate memory in the memory address space using the third memory allocation value and store the startup file in the memory address space to start the network.

[0141] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0142] In addition, this invention also provides an electronic device, including: a processor, a memory, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, it implements the various processes of the above-described network boot method embodiments and achieves the same technical effect. To avoid repetition, it will not be described again here.

[0143] This invention also provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the various processes of the above-described network boot method embodiments and achieves the same technical effects. To avoid repetition, it will not be described again here. The computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0144] Figure 6 A schematic diagram of the hardware structure of an electronic device for implementing various embodiments of the present invention.

[0145] The electronic device 600 includes, but is not limited to, components such as: a radio frequency unit 601, a network module 602, an audio output unit 603, an input unit 604, a sensor 605, a display unit 606, a user input unit 607, an interface unit 608, a memory 609, a processor 610, and a power supply 611. Those skilled in the art will understand that... Figure 6 The electronic device structures shown are not intended to limit the electronic device. An electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements. In embodiments of the present invention, the electronic device includes, but is not limited to, mobile phones, tablet computers, laptops, PDAs, in-vehicle terminals, wearable devices, and pedometers.

[0146] It should be understood that, in this embodiment of the invention, the radio frequency unit 601 can be used for receiving and transmitting signals during information transmission or calls. Specifically, it receives downlink data from the base station and processes it with the processor 610; additionally, it transmits uplink data to the base station. Typically, the radio frequency unit 601 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low-noise amplifier, a duplexer, etc. Furthermore, the radio frequency unit 601 can also communicate with networks and other devices through a wireless communication system.

[0147] The electronic device provides users with wireless broadband internet access through the network module 602, such as helping users send and receive emails, browse web pages, and access streaming media.

[0148] The audio output unit 603 can convert audio data received by the radio frequency unit 601 or the network module 602 or stored in the memory 609 into audio signals and output them as sound. Furthermore, the audio output unit 603 can also provide audio output related to specific functions performed by the electronic device 600 (e.g., call signal reception sound, message reception sound, etc.). The audio output unit 603 includes a speaker, a buzzer, and a receiver, etc.

[0149] Input unit 604 is used to receive audio or video signals. Input unit 604 may include a graphics processing unit (GPU) 6041 and a microphone 6042. GPU 6041 processes image data of still images or videos acquired by an image capture device (such as a camera) in video capture mode or image capture mode. The processed image frames can be displayed on display unit 606. The image frames processed by GPU 6041 can be stored in memory 609 (or other storage medium) or transmitted via radio frequency unit 601 or network module 602. Microphone 6042 can receive sound and process such sound into audio data. The processed audio data can be converted into a format that can be transmitted to a mobile communication base station via radio frequency unit 601 in telephone call mode.

[0150] The electronic device 600 also includes at least one sensor 605, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor includes an ambient light sensor and a proximity sensor. The ambient light sensor can adjust the brightness of the display panel 6061 according to the ambient light level, and the proximity sensor can turn off the display panel 6061 and / or backlight when the electronic device 600 is moved to the ear. As a type of motion sensor, an accelerometer sensor can detect the magnitude of acceleration in various directions (generally three axes). When stationary, it can detect the magnitude and direction of gravity and can be used to identify the posture of the electronic device (such as landscape / portrait switching, related games, magnetometer posture calibration), vibration recognition related functions (such as pedometer, tapping), etc. The sensor 605 may also include a fingerprint sensor, pressure sensor, iris sensor, molecular sensor, gyroscope, barometer, hygrometer, thermometer, infrared sensor, etc., which will not be described in detail here.

[0151] The display unit 606 is used to display information input by the user or information provided to the user. The display unit 606 may include a display panel 6061, which may be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), or the like.

[0152] User input unit 607 can be used to receive input numerical or character information, and to generate key signal inputs related to user settings and function control of electronic devices. Specifically, user input unit 607 includes a touch panel 6071 and other input devices 6072. Touch panel 6071, also known as a touch screen, can collect touch operations performed by the user on or near it (such as operations performed by the user using a finger, stylus, or any suitable object or accessory on or near touch panel 6071). Touch panel 6071 may include two parts: a touch detection device and a touch controller. The touch detection device detects the user's touch position and the signal generated by the touch operation, and transmits the signal to the touch controller; the touch controller receives touch information from the touch detection device, converts it into touch point coordinates, and sends it to the processor 610, which receives and executes commands from the processor 610. In addition, touch panel 6071 can be implemented using various types such as resistive, capacitive, infrared, and surface acoustic wave. Besides touch panel 6071, user input unit 607 may also include other input devices 6072. Specifically, other input devices 6072 may include, but are not limited to, physical keyboards, function keys (such as volume control buttons, power buttons, etc.), trackballs, mice, joysticks, etc., which will not be described in detail here.

[0153] Furthermore, the touch panel 6071 can cover the display panel 6061. When the touch panel 6071 detects a touch operation on or near it, it transmits the information to the processor 610 to determine the type of touch event. Subsequently, the processor 610 provides corresponding visual output on the display panel 6061 based on the type of touch event. Although in Figure 6 In this embodiment, the touch panel 6071 and the display panel 6061 are two independent components to realize the input and output functions of the electronic device. However, in some embodiments, the touch panel 6071 and the display panel 6061 can be integrated to realize the input and output functions of the electronic device. The specific implementation is not limited here.

[0154] Interface unit 608 serves as an interface for connecting external devices to electronic device 600. For example, external devices may include a wired or wireless headphone port, an external power supply (or battery charger) port, a wired or wireless data port, a memory card port, a port for connecting a device with an identification module, an audio input / output (I / O) port, a video I / O port, a headphone port, and so on. Interface unit 608 can be used to receive input from external devices (e.g., data, power, etc.) and transmit the received input to one or more components within electronic device 600, or it can be used to transmit data between electronic device 600 and external devices.

[0155] The memory 609 can be used to store software programs and various data. The memory 609 may primarily include a program storage area and a data storage area. The program storage area may store the operating system, applications required for at least one function (such as sound playback, image playback, etc.), etc.; the data storage area may store data created based on the use of the mobile phone (such as audio data, phonebook, etc.). Furthermore, the memory 609 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0156] The processor 610 is the control center of the electronic device. It connects various parts of the electronic device via various interfaces and lines. By running or executing software programs and / or modules stored in the memory 609, and by calling data stored in the memory 609, it performs various functions and processes data, thereby providing overall monitoring of the electronic device. The processor 610 may include one or more processing units; preferably, the processor 610 may integrate an application processor and a modem processor. The application processor mainly handles the operating system, user interface, and applications, while the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into the processor 610.

[0157] The electronic device 600 may also include a power supply 611 (such as a battery) for supplying power to various components. Preferably, the power supply 611 is logically connected to the processor 610 through a power management system, thereby enabling functions such as managing charging, discharging, and power consumption through the power management system.

[0158] In addition, the electronic device 600 includes some functional modules not shown, which will not be described in detail here.

[0159] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0160] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0161] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of the present invention.

[0162] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0163] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0164] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0165] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0166] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0167] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0168] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A network boot method, characterized by, The method comprises the following steps: generating a memory type information form; the memory type information form comprises memory type information and historical memory prefetch information; the memory type information has a corresponding memory address space; allocating memory for the memory address space by using the historical memory prefetch information, and obtaining a first memory allocation value for the memory address space; obtaining a start file and determining the data byte number of the start file; when the data byte number is greater than the first memory allocation value, adjusting the first memory allocation value according to the data byte number and the first memory allocation value to generate a second memory allocation value; the second memory allocation value is greater than or equal to the data byte number; allocating memory for the memory address space by using the second memory allocation value, and storing the start file in the memory address space to start the network; when the data byte number is less than the first memory allocation value, generating a plurality of memory value decrement gears for the memory address space according to a preset rule; the memory value decrement gears have corresponding decrement memory allocation values; calculating the difference between the data byte number and the first memory allocation value; determining a second target gear from a plurality of the memory value decrement gears through the difference, and determining the decrement memory allocation value corresponding to the second target gear as a third memory allocation value; allocating memory for the memory address space by using the third memory allocation value, and storing the start file in the memory address space to start the network; wherein the second memory allocation value realizes the increase of continuous available memory addresses; before the step of allocating memory for the memory address space by using the historical memory prefetch information, and obtaining a first memory allocation value for the memory address space, the method further comprises: saving the memory type information and the historical memory prefetch information in the form of a manual block.

2. The method of claim 1, wherein, The method is applied to a client device loaded with a flash basic input output system configured with a non-volatile random access memory, and the step of generating a memory type information form further comprises: generating a memory type information form and storing the memory type information form in the non-volatile random access memory.

3. The method of claim 1, wherein, The step of adjusting the first memory allocation value to generate a second memory allocation value when the data byte number is greater than the first memory allocation value comprises: generating a plurality of memory value increment gears for the memory address space according to a preset rule; the memory value increment gears have corresponding increment memory allocation values; determining a first target gear from a plurality of the memory value increment gears through the difference, and determining the increment memory allocation value corresponding to the first target gear as a second memory allocation value.

4. A network booting apparatus characterized by comprising: The method comprises the following steps: a memory type information form generation module for generating a memory type information form; the memory type information form comprises memory type information and historical memory prefetch information; the memory type information has a corresponding memory address space; The first memory allocation value obtaining module is configured to allocate memory for the memory address space by using the historical memory prefetch information, and to obtain a first memory allocation value for the memory address space. The data byte number determining module is configured to obtain a startup file, and to determine a data byte number for the startup file. The second memory allocation value generating module is configured to, when the data byte number is greater than the first memory allocation value, adjust the first memory allocation value according to the data byte number and the first memory allocation value, and to generate a second memory allocation value. The second memory allocation value is greater than or equal to the data byte number. The network startup module is configured to allocate memory for the memory address space by using the second memory allocation value, and to store the startup file in the memory address space to start a network. The memory value decrement gear generating submodule is configured to, when the data byte number is less than the first memory allocation value, generate a plurality of memory value decrement gears for the memory address space according to a preset rule. The memory value decrement gears have corresponding decrement memory allocation values. The difference calculating submodule is configured to calculate a difference between the data byte number and the first memory allocation value. The third memory allocation value determining submodule is configured to determine a second target gear from the plurality of memory value decrement gears by using the difference, and to determine a decrement memory allocation value corresponding to the second target gear as a third memory allocation value. The network startup submodule is configured to allocate memory for the memory address space by using the third memory allocation value, and to store the startup file in the memory address space to start a network. The second memory allocation value enables an increase in the number of continuous available memory addresses. The apparatus further comprises: The manual block form saving module is configured to save the memory type information and the historical memory prefetch information in a manual block form.

5. The apparatus of claim 4, wherein, The second memory allocation value generating module comprises: The memory value increment gear generating submodule is configured to generate a plurality of memory value increment gears for the memory address space according to a preset rule. The memory value increment gears have corresponding increment memory allocation values. The second memory allocation value determining submodule is configured to determine a first target gear from the plurality of memory value increment gears by using the difference, and to determine an increment memory allocation value corresponding to the first target gear as a second memory allocation value.

6. An electronic device, comprising: The apparatus comprises a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory complete communication with each other through the communication bus. The memory is configured to store a computer program. The processor is configured to execute the program stored on the memory to implement the method of any one of claims 1-3.

7. A computer-readable storage medium having instructions stored thereon that, when executed by one or more processors, cause the processors to perform the method of any one of claims 1-3.

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