A high-precision full-CMOS curvature compensation reference voltage source

Abstract

The present invention discloses a high-precision full CMOS curvature compensation reference voltage source, wherein a PTAT current reference circuit and a CTAT current reference circuit respectively generate a reference current I positively correlated with temperature. P and the reference current I which is negatively correlated with temperature N The temperature compensation circuit will reference the current I N and I P The initial reference current I with low temperature dependence is obtained by summing different multiples. REF1 The curvature compensation circuit will reference the current I N and I P By performing different scaling and comparing two currents with opposite temperature coefficients according to Kirchhoff's current law, a concave compensation current I is obtained. V The reference voltage output circuit converts the initial reference current I REF1 and compensation current I V Add them according to appropriate weights to get the final reference current I with less temperature dependence REF Finally, the voltage generation circuit outputs the reference voltage V with low temperature drift coefficient. REF The reference voltage output by the present invention has low temperature drift, high power supply rejection ratio, low voltage regulation rate, and has the characteristics of low power consumption and production cost.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a high-precision full CMOS curvature compensation reference voltage source. Background Art

[0002] The reference voltage source is an indispensable module in analog integrated circuits and mixed analog and digital integrated circuits. It is widely used in circuit systems such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), power management units (Power Management Units), oscillators (Oscillators), and phase-locked loops (PLLs) to provide modules with a DC reference voltage that is not affected by process, power supply voltage, and temperature changes. Compared with traditional bandgap reference voltage sources, full CMOS reference voltage sources have lower power consumption. At the same time, not using resistors and transistors also greatly reduces the area and reduces costs. In recent years, domestic research on CMOS reference voltage sources has mainly focused on improving performance parameters, such as temperature drift, power supply rejection, and power consumption.

[0003] In the existing CMOS reference source technology, the subthreshold current-voltage characteristics of MOS tubes are similar to BJTs. By subtracting the gate-source voltage of the MOS tube, a voltage positively correlated with temperature is obtained; a MOS tube working in the linear region is used to replace the resistor to generate a current proportional to the absolute temperature; the current is mirrored by a current mirror and flows through two NMOS stacked reference voltage generation circuits to output the reference voltage. The temperature drift of these reference sources is mostly in the range of tens or even hundreds of ppm. However, sensitive analog modules such as ADC and PLL have high requirements for the accuracy of the reference voltage source, which requires the reference voltage source to have low power consumption, lower temperature coefficient and higher power supply rejection capability. Summary of the invention

[0004] The present invention aims to solve the problems of high temperature coefficient and low power supply rejection ratio of the existing CMOS reference voltage source, and provides a high-precision full CMOS curvature compensation reference voltage source.

[0005] To solve the above problems, the present invention is achieved through the following technical solutions:

[0006] A high-precision full CMOS curvature compensation reference voltage source includes a startup circuit, a CTAT current reference circuit, a PTAT current reference circuit, a temperature compensation circuit, a curvature compensation circuit, and a reference voltage output circuit. The startup circuit uses the charge and discharge of a capacitor to provide a bias voltage for the CTAT current reference circuit and the PTAT current reference circuit, so that the reference voltage source escapes from a degenerate bias point and enters a normal working state. The CTAT current reference circuit generates a reference current I that is inversely proportional to the temperature. N, providing a bias current that is negatively correlated with temperature for the temperature compensation circuit and curvature compensation circuit. The PTAT current reference circuit generates a reference current I that is proportional to temperature. P , providing a bias current that is positively correlated with temperature for the temperature compensation circuit and the curvature compensation circuit. The temperature compensation circuit converts the reference current I generated by the CTAT current reference circuit into N The reference current I generated by the PTAT current reference circuit P By summing different multiples, an initial reference current I with low temperature dependence is generated REF1 The curvature compensation circuit converts the reference current I generated by the CTAT current reference circuit into N The reference current I generated by the PTAT current reference circuit P By performing different scaling and comparing two currents with opposite temperature coefficients according to Kirchhoff's current law, a concave compensation current I is obtained. V The reference voltage output circuit converts the initial reference current I generated by the temperature compensation circuit into REF1 The compensation current I generated by the curvature compensation circuit V The final reference current I with lower temperature dependence is obtained by summing with certain weights. REF , and then use the final reference current I REF The MOS tube in the reference voltage output circuit is driven to output a reference voltage V that is not affected by power supply voltage and temperature changes. REF .

[0007] The above startup circuit consists of MOS tube M S1 -M S5 and capacitor C1; MOS tube M S1 And MOS tube M S2 The source of MOS tube M is connected to the power supply VDD; S1 The gate of MOS tube M S3 The source of and the lower plate of capacitor C1 are grounded to GND; MOS tube M S2 And MOS tube M S3 The drain of MOS tube M S4 And MOS tube M S5 The source of MOS tube M is connected; S1 The drain of MOS tube M S2 -M S5 The gate of the MOS tube M is connected to the upper plate of the capacitor C1; S4 The drain of the startup circuit forms the CTAT startup terminal N S , and the CTAT start terminal N of the CTAT current reference circuit S Connection: MOS tube M S5 The drain of the startup circuit forms the PTAT startup terminal P S, and the PTAT start terminal P of the PTAT current reference circuit S connect.

[0008] The above MOS tube M S1 It is composed of 5 inverse ratio tubes connected in series.

[0009] The above CTAT current reference circuit is composed of MOS tube M P1 -M P6 And M1-M6; MOS tube M P1 、M P3 and M P5 The source of MOS tubes M3, M5 and M6 is connected to the ground GND; the source of MOS tube M P1 、M P3 and M P5 The gate of MOS tube M P5 The drain of MOS tube M P6 The source of is connected to form the first inverse current terminal V of the CTAT current reference circuit. N1 , and the first inverse current terminal V of the temperature compensation circuit and the curvature compensation circuit N1 Connection: MOS tube M P2 、M P4 and M P6 The gate of the MOS tube M P6 Connected to the drain of M2, it forms the second inverse current terminal V of the CTAT current reference circuit. N2 , and the second inverse current terminal V of the temperature compensation circuit and the curvature compensation circuit N2 Connection: MOS tube M P1 The drain and MOS tube M P2 The source of MOS tube M is connected; P3 The drain and MOS tube M P4 The source of MOS tubes M1 and M2, as well as the gate of MOS tubes M1 and M P4 The drain of the CTAT current reference circuit is connected to form the CTAT start terminal N S , and the CTAT start terminal N of the start circuit S The gates of MOS tubes M3 and M4 are connected, and are connected to the source of MOS tube M1 and the drain of MOS tube M3; the source of MOS tube M2 is connected to the drain of MOS tube M4; the gates of MOS tubes M5 and M6 are connected to the gates of MOS tube M p2 and the drain of M6.

[0010] The above PTAT current reference circuit is composed of MOS tube M P7 -M P10 and M7-M 12 Composition: MOS tube M P7 and MP9 The source of MOS tube M is connected to the power supply VDD; 11 and M 12 The source of the MOS tube is grounded GND; P7 and M P9 The gate of MOS tube M P7 The drain of the MOS tube M P8 The source of is connected to form the first proportional current terminal V of the PTAT current reference circuit. P1 , and the first proportional current terminal V of the temperature compensation circuit and the curvature compensation circuit P1 Connection: MOS tube M P8 and M P10 The gate and MOS tube M P8 and M P7 The drain of the PTAT current reference circuit is connected to form the second proportional current terminal V P2 , and the second proportional current terminal V of the temperature compensation circuit and the curvature compensation circuit P2 Connection: MOS tube M P9 The drain and MOS tube M P10 The gates of MOS tubes M7 and M8 are connected to the source of MOS tube M P10 After being connected to the drain of M8, the PTAT start terminal P of the PTAT current reference circuit is formed. S , and the PTAT start-up terminal P of the start-up circuit S Connection; MOS tube M9 and M 10 The gate of the MOS tube M8 is connected to the source of the MOS tube M9 and the drain of the MOS tube M9; the source of the MOS tube M9 and the drain of the MOS tube M8 are connected to the gate of the MOS tube M8 and the drain of the MOS tube M9; 10 The drain of the MOS tube M is connected 12 Gate of MOS tube M 10 The source of MOS tube M 11 The gate and MOS tube M 12 The drain of MOS tube M7 is connected to the source of MOS tube M 11 of the drain.

[0011] The above temperature compensation circuit is composed of MOS tube M P11 -M P14 Composition: MOS tube M P11 and M P13 The source of MOS tube M is connected to the power supply VDD; P11 The gate forms the first inverse current terminal V of the first temperature compensation circuit N1 , and the first inverse current terminal V of the CTAT current reference circuit N1 Connection: MOS tube M P12 The gate of the temperature compensation circuit forms the second inverse current terminal V N2, and the second inverse current terminal V of the CTAT current reference circuit N2 Connection: MOS tube M P13 The gate of the temperature compensation circuit forms the first proportional current terminal V P1 , and the first proportional current terminal V of the PTAT current reference circuit P1 Connection: MOS tube M P14 The gate of the temperature compensation circuit forms the second proportional current terminal V P2 , and the second proportional current terminal V of the PTAT current reference circuit P2 Connection: MOS tube M P11 The drain of the MOS tube M P12 Source of MOS tube M P13 The drain of the MOS tube M P14 Source of MOS tube M P12 and M P14 The drain of the temperature compensation circuit is connected to form a current terminal for temperature compensation, which is connected to the current terminal of the reference voltage output circuit.

[0012] The curvature compensation circuit is composed of MOS tube M P15 -M P18 and M C1 -M C9 Composition: MOS tube M C1 、M C3 、M P15 and M P17 The source of MOS tube M is connected to the power supply VDD; C5 、M C8 and M C9 The source of the MOS tube is grounded GND; C1 The gate of the curvature compensation circuit forms the first inverse current terminal V N1 , and the first inverse current terminal of the CTAT current reference circuit is connected to V N1 ;MOS tube M C2 The gate of the curvature compensation circuit forms the second inverse current terminal V N2 , and the second inverse current terminal V of the CTAT current reference circuit N2 Connection: MOS tube M C3 The gate of the curvature compensation circuit forms the first proportional current terminal V P1 , and the first proportional current terminal V of the PTAT current reference circuit P1 Connection: MOS tube M C4 The gate of the curvature compensation circuit forms the second proportional current terminal V P2 , and the second proportional current terminal V of the PTAT current reference circuit P2 Connection: MOS tube M C1 The drain of the MOS tube M C2Source of MOS tube M C3 The drain of the MOS tube M C4 Source of MOS tube M C6 and M C7 The gate and MOS tube M C4 and M C6 The drain of MOS tube M is connected; C5 、M C8 and M C9 The gate and MOS tube M C2 and M C5 The drain of MOS tube M is connected; C6 The source and MOS tube M C8 The drain of MOS tube M is connected; C7 The source and MOS tube M C9 The drain of MOS tube M is connected; C7 and M P18 The drain of MOS tube M P16 and M P18 The gate of MOS tube M is connected; P15 and M P17 The gate of the MOS tube M P17 The drain and MOS tube M P18 Source of MOS tube M P15 The drain and M P16 The source connection of MOS tube M P16 The drain forms a current end of the curvature compensation circuit and is connected to the current end of the reference voltage output circuit.

[0013] The above-mentioned reference voltage output circuit is composed of MOS tube M 13 -M 14 and capacitor C2; MOS tube M 13 The drain of MOS tube M 13 and M 14 The gate of the MOS tube M is connected to form the current end of the reference voltage output circuit, and is connected to the current end of the temperature compensation and curvature compensation circuit; 13 The source of MOS tube M 14 The drain of MOS tube M is connected to the upper plate of capacitor C2 to form the output end of the entire reference voltage source; 14 The source of and the lower plate of capacitor C2 are grounded GND.

[0014] The above MOS tube M 14 MOS tube is 3.3V, MOS tube M 13 It is a 1.8V MOS tube.

[0015] Compared with the prior art, the present invention has the following characteristics:

[0016] 1. The output reference voltage has low temperature drift, high power supply rejection ratio and low voltage regulation rate;

[0017] 2. Low power consumption, only in the nanowatt range;

[0018] 3. No passive resistors or BJTs are used, which reduces the layout area and production costs;

[0019] 4. Use positive and negative temperature coefficient current addition and curvature compensation technology to achieve double temperature compensation. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 The circuit diagram of a high-precision full CMOS curvature compensation reference voltage source.

[0021] Figure 2 The schematic diagram of a high-precision all-CMOS curvature compensation reference voltage source.

[0022] Figure 3 This is a simulation diagram of a high-precision full CMOS curvature compensation reference voltage source. DETAILED DESCRIPTION

[0023] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific examples.

[0024] A high-precision full CMOS curvature compensation reference voltage source, such as Figure 1 As shown, it includes a startup circuit, a CTAT current reference circuit, a PTAT current reference circuit, a temperature compensation circuit, a curvature compensation circuit, and a reference voltage (V REF ) output circuit.

[0025] The startup circuit is connected to the CTAT current reference circuit and the PTAT current reference circuit. When the power is just turned on, the charging and discharging of the capacitor in the startup circuit is used to provide a bias voltage for the CTAT current reference circuit and the PTAT current reference circuit, so that the reference voltage source gets rid of the degenerate bias point and enters a normal working state. The startup circuit uses the change of the voltage of the two plates during the charging and discharging process of the capacitor to realize the opening of the PTAT current reference circuit and the CTAT current reference circuit through an inverter. When the power supply is turned on, the startup circuit provides a gate bias voltage to the MOS tube M1 and the MOS tube M8 to make the circuit work normally.

[0026] In this embodiment, the startup circuit is composed of a MOS tube M S1 -M S5 and capacitor C1. S1 It is composed of 5 inverse ratio tubes connected in series, which is equivalent to a large resistor. S1 And MOS tube M S2The source of MOS tube M is connected to the power supply VDD; S1 The gate of MOS tube M S3 The source of and the lower plate of capacitor C1 are grounded to GND; MOS tube M S2 And MOS tube M S3 The drain of MOS tube M S4 And MOS tube M S5 The source of MOS tube M is connected; S1 The drain of MOS tube M S2 -M S5 The gate of the MOS tube M is connected to the upper plate of the capacitor C1; S4 The drain of the startup circuit forms the CTAT startup terminal N S , and the CTAT start terminal N of the CTAT current reference circuit S Connection: MOS tube M S5 The drain of the startup circuit forms the PTAT startup terminal P S , and the PTAT start terminal P of the PTAT current reference circuit S connect.

[0027] The CTAT current reference circuit generates a reference current I that is inversely proportional to the temperature. N , providing a bias current that is negatively correlated with temperature for the temperature compensation circuit and the curvature compensation circuit. The CTAT current reference circuit is based on a self-biased (Oguey) current source, using the MOS tube M6 working in the linear region as a resistor to replace the passive resistor in the Oguey current source; the current I that is negatively correlated with temperature N The drain-source resistance R of MOS tube M6 ds6 and the drain-source voltage V of MOS tube M6 DS6 At the same time, a common source and common gate current mirror structure is adopted to improve the power supply rejection ratio and provide current bias for the temperature compensation circuit and the curvature compensation circuit.

[0028] In this embodiment, the CTAT current reference circuit is composed of a MOS tube M P1 -M P6 And M1-M6. MOS tube M P1 、M P3 and M P5 The source of MOS tubes M3, M5 and M6 is connected to the ground GND; the source of MOS tube M P1 、M P3 and M P5 The gate of MOS tube M P5 The drain of MOS tube M P6 The source of is connected to form the first inverse current terminal V of the CTAT current reference circuit. N1 , and the first inverse current terminal V of the temperature compensation circuit and the curvature compensation circuitN1 Connection: MOS tube M P2 、M P4 and M P6 The gate of the MOS tube M P6 Connected to the drain of M2, it forms the second inverse current terminal V of the CTAT current reference circuit. N2 , and the second inverse current terminal V of the temperature compensation circuit and the curvature compensation circuit N2 Connection: MOS tube M P1 The drain and MOS tube M P2 The source of MOS tube M is connected; P3 The drain and MOS tube M P4 The source of MOS tubes M1 and M2, as well as the gate of MOS tubes M1 and M P4 The drain of the CTAT current reference circuit is connected to form the CTAT start terminal N S , and the CTAT start terminal N of the start circuit S The gates of MOS tubes M3 and M4 are connected, and are connected to the source of MOS tube M1 and the drain of MOS tube M3; the source of MOS tube M2 is connected to the drain of MOS tube M4; the gates of MOS tubes M5 and M6 are connected to the gates of MOS tube M p2 and the drain of M6.

[0029] The PTAT current reference circuit generates a reference current I that is proportional to the temperature. P , providing bias current for the temperature compensation circuit and curvature compensation circuit. The PTAT current reference circuit uses the MOS tube M9 working in the saturation region as the MOS tube M 10 Provide bias voltage to make MOS tube M 10 Work in the linear region; and use the MOS tube M working in the linear region 10 The on-resistance and drain-source voltage difference generate a bias current I P , where MOS tube M 10 The drain-source voltage V DS10 The MOS tube M working in the subthreshold region 12 and M 11 At the same time, a common source and common gate current mirror is used to improve the power supply rejection ratio and provide current bias for the temperature compensation circuit and the curvature compensation circuit.

[0030] In this embodiment, the PTAT current reference circuit is composed of a MOS tube M P7 -M P10 and M7-M 12 Composition. MOS tube M P7 and M P9 The source of MOS tube M is connected to the power supply VDD; 11 and M 12The source of the MOS tube is grounded GND; P7 and M P9 The gate of MOS tube M P7 The drain of the MOS tube M P8 The source of is connected to form the first proportional current terminal V of the PTAT current reference circuit. P1 , and the first proportional current terminal V of the temperature compensation circuit and the curvature compensation circuit P1 Connection: MOS tube M P8 and M P10 The gate and MOS tube M P8 and M P7 The drain of the PTAT current reference circuit is connected to form the second proportional current terminal V P2 , and the second proportional current terminal V of the temperature compensation circuit and the curvature compensation circuit P2 Connection: MOS tube M P9 The drain and MOS tube M P10 The gates of MOS tubes M7 and M8 are connected to the source of MOS tube M P10 After being connected to the drain of M8, the PTAT start terminal P of the PTAT current reference circuit is formed. S , and the PTAT start-up terminal P of the start-up circuit S Connection; MOS tube M9 and M 10 The gate of the MOS tube M8 is connected to the source of the MOS tube M9 and the drain of the MOS tube M9; the source of the MOS tube M9 and the drain of the MOS tube M8 are connected to the gate of the MOS tube M8 and the drain of the MOS tube M9; 10 The drain of the MOS tube M is connected 12 Gate of MOS tube M 10 The source of MOS tube M 11 The gate and MOS tube M 12 The drain of MOS tube M7 is connected to the source of MOS tube M 11 of the drain.

[0031] The temperature compensation circuit uses a PMOS tube common source and common gate current mirror to convert the reference current I generated by the CTAT current reference circuit, which is inversely proportional to the temperature, into N The reference current I generated by the PTAT current reference circuit is proportional to the temperature. P By summing different multiples, an initial reference current I with low temperature dependence is generated REF1 The use of cascode current mirrors improves the power supply rejection ratio.

[0032] In this embodiment, the temperature compensation circuit is composed of MOS tube M P11 -M P14 Composition. MOS tube M P11 and M P13 The source of MOS tube M is connected to the power supply VDD; P11The gate forms the first inverse current terminal V of the first temperature compensation circuit N1 , and the first inverse current terminal V of the CTAT current reference circuit N1 Connection: MOS tube M P12 The gate of the temperature compensation circuit forms the second inverse current terminal V N2 , and the second inverse current terminal V of the CTAT current reference circuit N2 Connection: MOS tube M P13 The gate of the temperature compensation circuit forms the first proportional current terminal V P1 , and the first proportional current terminal V of the PTAT current reference circuit P1 Connection: MOS tube M P14 The gate of the temperature compensation circuit forms the second proportional current terminal V P2 , and the second proportional current terminal V of the PTAT current reference circuit P2 Connection: MOS tube M P11 The drain of the MOS tube M P12 Source of MOS tube M P13 The drain of the MOS tube M P14 Source of MOS tube M P12 and M P14 The drain of the temperature compensation circuit is connected to form a current terminal for temperature compensation, which is connected to the current terminal of the reference voltage output circuit.

[0033] The curvature compensation circuit uses the PMOS tube common source and common gate current mirror structure to convert the reference current I generated by the CTAT current reference circuit, which is inversely proportional to the temperature, into N The reference current I generated by the PTAT current reference circuit is proportional to the temperature. P By performing different scaling, at node X, according to Kirchhoff's current law, a concave compensation current I is obtained by comparing two currents with opposite temperature coefficients. V .

[0034] In this embodiment, the curvature compensation circuit is composed of a MOS tube M P15 -M P18 and M C1 -M C9 Composition. MOS tube M C1 、M C3 、M P15 and M P17 The source of MOS tube M is connected to the power supply VDD; C5 、M C8 and M C9 The source of the MOS tube is grounded GND; C1 The gate of the curvature compensation circuit forms the first inverse current terminal V N1 , and the first inverse current terminal of the CTAT current reference circuit is connected to VN1 ;MOS tube M C2 The gate of the curvature compensation circuit forms the second inverse current terminal V N2 , and the second inverse current terminal V of the CTAT current reference circuit N2 Connection: MOS tube M C3 The gate of the curvature compensation circuit forms the first proportional current terminal V P1 , and the first proportional current terminal V of the PTAT current reference circuit P1 Connection: MOS tube M C4 The gate of the curvature compensation circuit forms the second proportional current terminal V P2 , and the second proportional current terminal V of the PTAT current reference circuit P2 Connection: MOS tube M C1 The drain of the MOS tube M C2 Source of MOS tube M C3 The drain of the MOS tube M C4 Source of MOS tube M C6 and M C7 The gate and MOS tube M C4 and M C6 The drain of MOS tube M is connected; C5 、M C8 and M C9 The gate and MOS tube M C2 and M C5 The drain of MOS tube M is connected; C6 The source and MOS tube M C8 The drain of MOS tube M is connected; C7 The source and MOS tube M C9 The drain of MOS tube M is connected; C7 and M P18 The drain of MOS tube M P16 and M P18 The gate of MOS tube M is connected; P15 and M P17 The gate of the MOS tube M P17 The drain and MOS tube M P18 Source of MOS tube M P15 The drain and M P16 The source connection of MOS tube M P16 The drain forms a current end of the curvature compensation circuit and is connected to the current end of the reference voltage output circuit.

[0035] The reference voltage output circuit uses a PMOS tube common source and common gate current mirror to convert the initial reference current I generated by the temperature compensation circuit REF1 The compensation current I generated by the curvature compensation circuit VWith a certain weight, the concave curve current I V For the initial reference current I REF1 The highest point of the reference current is compensated, thereby greatly reducing the temperature drift coefficient and obtaining a final reference current I with lower temperature dependence. REF , and then use the final reference current I REF Driving the MOS tube M in the reference voltage output circuit 13 And MOS tube M 14 Get an output voltage V that is not affected by power supply voltage and temperature changes REF .

[0036] In this embodiment, the reference voltage output circuit is composed of a MOS tube M 13 -M 14 And capacitor C2. MOS tube M 13 The drain of MOS tube M 13 and M 14 The gate of the MOS tube M is connected to form the current end of the reference voltage output circuit, and is connected to the current end of the temperature compensation and curvature compensation circuit; 13 The source of MOS tube M 14 The drain of MOS tube M is connected to the upper plate of capacitor C2 to form the output end of the entire reference voltage source; 14 The source of and the lower plate of capacitor C2 are grounded GND.

[0037] See also Figure 2 The two current reference circuits (PTAT current reference circuit and CTAT current reference circuit) generate reference currents I that are positively correlated with temperature. P and the reference current I which is negatively correlated with temperature N The temperature compensation circuit converts the reference current I generated by the CTAT current reference circuit into N The reference current I generated by the PTAT current reference circuit P The initial reference current I with low temperature dependence is obtained by summing the multiples of K2 and K1 respectively. REF1 The curvature compensation circuit converts the reference current I generated by the CTAT current reference circuit into N The reference current I generated by the PTAT current reference circuit P By performing different scaling and comparing two currents with opposite temperature coefficients according to Kirchhoff's current law, a concave compensation current I is obtained. V The reference voltage output circuit converts the initial reference current I REF1 and compensation current I V Add them according to appropriate weights to get the final reference current I with less temperature dependence REF Finally, the voltage generation circuit outputs the reference voltage V with low temperature drift coefficient. REF .

[0038] The present invention does not use passive resistors and triodes, is compatible with CMOS technology, greatly reduces the layout area, reduces production costs, and achieves low temperature drift and low power consumption in terms of performance, while having high power supply rejection ratio and low voltage regulation rate. 14 The MOS tubes are 3.3V, and the rest are 1.8V. In the TSMC 0.18-μm CMOS standard process, the Cadence Spectre simulator is used to perform the design simulation. The simulation results are shown in the figure below. Figure 3 As shown. The simulation results show that under a power supply voltage of 1.8V, the power supply rejection ratio of the reference voltage source is -81dB at 100Hz and -61dB at 1KHz, and has a temperature coefficient of 3.26ppm / ℃ in the temperature range of -20-160℃, and its power consumption is 193nW; it has a power supply voltage regulation rate of 0.0526% / V in the power supply voltage range of 1.4V-3.3V. These simulation results verify the effectiveness of the above measures. In summary, the present invention has the characteristics of low temperature drift, high power supply rejection ratio, low linear regulation rate, etc., which meets the high-precision requirements, and also has the characteristics of small layout area and device matching with standard CMOS process.

[0039] It should be noted that although the embodiments of the present invention described above are illustrative, they are not intended to limit the present invention, and therefore the present invention is not limited to the above specific embodiments. Without departing from the principles of the present invention, any other embodiments obtained by those skilled in the art under the guidance of the present invention are deemed to be within the protection of the present invention.

Claims

1. A high-precision full CMOS curvature compensation reference voltage source, characterized in that: It includes a startup circuit, a CTAT current reference circuit, a PTAT current reference circuit, a temperature compensation circuit, a curvature compensation circuit, and a reference voltage output circuit; The startup circuit uses the charge and discharge of the capacitor to provide bias voltage for the CTAT current reference circuit and the PTAT current reference circuit, so that the reference voltage source gets rid of the degenerate bias point and enters a normal working state; The CTAT current reference circuit generates a reference current I that is inversely proportional to the temperature. N , providing a bias current negatively correlated with temperature for the temperature compensation circuit and the curvature compensation circuit; The PTAT current reference circuit generates a reference current I that is proportional to the temperature. P , providing a bias current positively correlated with temperature for the temperature compensation circuit and the curvature compensation circuit; The temperature compensation circuit converts the reference current I generated by the CTAT current reference circuit into N The reference current I generated by the PTAT current reference circuit P By summing different multiples, an initial reference current I with low temperature dependence is generated REF1 ; The curvature compensation circuit converts the reference current I generated by the CTAT current reference circuit into N The reference current I generated by the PTAT current reference circuit P By performing different scaling and comparing two currents with opposite temperature coefficients according to Kirchhoff's current law, a concave compensation current I is obtained. V The curvature compensation circuit is composed of MOS tube M P15 -M P18 and M C1 -M C9 Composition: MOS tube M C1 、M C3 、M P15 and M P17 The source of MOS tube M is connected to the power supply VDD; C5 、M C8 and M C9 The source of the MOS tube is grounded GND; C1 The gate of the curvature compensation circuit forms the first inverse current terminal V N1 , and the first inverse current terminal of the CTAT current reference circuit is connected to V N1 ;MOS tube M C2 The gate of the curvature compensation circuit forms the second inverse current terminal V N2 , and the second inverse current terminal V of the CTAT current reference circuit N2 Connection: MOS tube M C3 The gate of the curvature compensation circuit forms the first proportional current terminal V P1 , and the first proportional current terminal V of the PTAT current reference circuit P1 Connection: MOS tube M C4 The gate of the curvature compensation circuit forms the second proportional current terminal V P2 , and the second proportional current terminal V of the PTAT current reference circuit P2 Connection: MOS tube M C1 The drain of the MOS tube M C2 Source of MOS tube M C3 The drain of the MOS tube M C4 Source of MOS tube M C6 and M C7 The gate and MOS tube M C4 and M C6 The drain of MOS tube M is connected; C5 、M C8 and M C9 The gate and MOS tube M C2 and M C5 The drain of MOS tube M is connected; C6 The source and MOS tube M C8 The drain of MOS tube M is connected; C7 The source and MOS tube M C9 The drain of MOS tube M is connected; C7 and M P18 The drain of MOS tube M P16 and M P18 The gate of MOS tube M is connected; P15 and M P17 The gate of the MOS tube M P17 The drain and MOS tube M P18 Source of MOS tube M P15 The drain and M P16 The source connection of MOS tube M P16 The drain of the curvature compensation circuit forms a current terminal, which is connected to the current terminal of the reference voltage output circuit; The reference voltage output circuit converts the initial reference current I generated by the temperature compensation circuit into REF1 The compensation current I generated by the curvature compensation circuit V The final reference current I with lower temperature dependence is obtained by summing with certain weights. REF , and then use the final reference current I REF The MOS tube in the reference voltage output circuit is driven to output a reference voltage V that is not affected by power supply voltage and temperature changes. REF The reference voltage output circuit is composed of MOS tube M 13 -M 14 and capacitor C2; MOS tube M 13 The drain of MOS tube M 13 and M 14 The gate of the MOS tube M is connected to form the current end of the reference voltage output circuit, and is connected to the current end of the temperature compensation circuit and the curvature compensation circuit; 13 The source of MOS tube M 14 The drain of MOS tube M is connected to the upper plate of capacitor C2 to form the output end of the entire reference voltage source; 14 The source of and the lower plate of capacitor C2 are grounded GND.

2. A high-precision full-CMOS curvature compensation reference voltage source according to claim 1, characterized in that: The startup circuit consists of MOS tube M S1 -M S5 And capacitor C1; MOS tube M S1 And MOS tube M S2 The source of MOS tube M is connected to the power supply VDD; S1 The gate of MOS tube M S3 The source of and the lower plate of capacitor C1 are grounded to GND; MOS tube M S2 And MOS tube M S3 The drain of MOS tube M S4 And MOS tube M S5 The source of MOS tube M is connected; S1 The drain of MOS tube M S2 -M S5 The gate of the MOS tube M is connected to the upper plate of the capacitor C1; S4 The drain of the startup circuit forms the CTAT startup terminal N S , and the CTAT start terminal N of the CTAT current reference circuit S Connection: MOS tube M S5 The drain of the startup circuit forms the PTAT startup terminal P S , and the PTAT start terminal P of the PTAT current reference circuit S connect.

3. The high-precision full-CMOS curvature compensation reference voltage source according to claim 2, characterized in that: MOS tube M S1 It is composed of 5 inverse ratio tubes connected in series.

4. A high-precision full-CMOS curvature compensation reference voltage source according to claim 1, characterized in that CT AT current reference circuit is composed of MOS tube M P1 -M P6 It is composed of M1-M6; MOS tube M P1 、M P3 and M P5 The source of MOS tubes M3, M5 and M6 is connected to the ground GND; the source of MOS tube M P1 、M P3 and M P5 The gate of MOS tube M P5 The drain of MOS tube M P6 The source of is connected to form the first inverse current terminal V of the CTAT current reference circuit. N1 , and the first inverse current terminal V of the temperature compensation circuit and the curvature compensation circuit N1 Connection: MOS tube M P2 、M P4 and M P6 The gate of the MOS tube M P6 Connected to the drain of M2, it forms the second inverse current terminal V of the CTAT current reference circuit. N2 , and the second inverse current terminal V of the temperature compensation circuit and the curvature compensation circuit N2 Connection: MOS tube M P1 The drain and MOS tube M P2 The source of MOS tube M is connected; P3 The drain and MOS tube M P4 The source of MOS tubes M1 and M2, as well as the gate of MOS tubes M1 and M P4 The drain of the CTAT current reference circuit is connected to form the CTAT start terminal N S , and the CTAT start terminal N of the start circuit S The gates of MOS tubes M3 and M4 are connected, and are connected to the source of MOS tube M1 and the drain of MOS tube M3; the source of MOS tube M2 is connected to the drain of MOS tube M4; the gates of MOS tubes M5 and M6 are connected to the gates of MOS tube M p2 and the drain of M6.

5. The high-precision full-CMOS curvature compensation reference voltage source according to claim 1, characterized in that: The PTAT current reference circuit is composed of MOS tube M P7 -M P10 and M7-M 12 composition; MOS tube M P7 and M P9 The source of MOS tube M is connected to the power supply VDD; 11 and M 12 The source of the MOS tube is grounded GND; P7 and M P9 The gate of MOS tube M P7 The drain of the MOS tube M P8 The source of is connected to form the first proportional current terminal V of the PTAT current reference circuit. P1 , and the first proportional current terminal V of the temperature compensation circuit and the curvature compensation circuit P1 Connection: MOS tube M P8 and M P10 The gate and MOS tube M P8 and M P7 The drain of the PTAT current reference circuit is connected to form the second proportional current terminal V P2 , and the second proportional current terminal V of the temperature compensation circuit and the curvature compensation circuit P2 Connection: MOS tube M P9 The drain and MOS tube M P10 The gates of MOS tubes M7 and M8 are connected to the source of MOS tube M P10 After being connected to the drain of M8, the PTAT start terminal P of the PTAT current reference circuit is formed. S , and the PTAT start-up terminal P of the start-up circuit S Connection; MOS tube M9 and M 10 The gate of the MOS tube M8 is connected to the source of the MOS tube M9 and the drain of the MOS tube M9; the source of the MOS tube M9 and the drain of the MOS tube M8 are connected to the gate of the MOS tube M8 and the drain of the MOS tube M9; 10 The drain of the MOS tube M is connected 12 Gate of MOS tube M 10 The source of MOS tube M 11 The gate and MOS tube M 12 The drain of MOS tube M7 is connected to the source of MOS tube M 11 of the drain.

6. The high-precision full-CMOS curvature compensation reference voltage source according to claim 1, characterized in that: The temperature compensation circuit is composed of MOS tube M P11 -M P14 composition; MOS tube M P11 and M P13 The source of MOS tube M is connected to the power supply VDD; P11 The gate forms the first inverse current terminal V of the first temperature compensation circuit N1 , and the first inverse current terminal V of the CTAT current reference circuit N1 Connection: MOS tube M P12 The gate of the temperature compensation circuit forms the second inverse current terminal V N2 , and the second inverse current terminal V of the CTAT current reference circuit N2 Connection: MOS tube M P13 The gate of the temperature compensation circuit forms the first proportional current terminal V P1 , and the first proportional current terminal V of the PTAT current reference circuit P1 Connection: MOS tube M P14 The gate of the temperature compensation circuit forms the second proportional current terminal V P2 , and the second proportional current terminal V of the PTAT current reference circuit P2 Connection: MOS tube M P11 The drain of the MOS tube M P12 Source of MOS tube M P13 The drain of the MOS tube M P14 Source of MOS tube M P12 and M P14 The drain of the temperature compensation circuit is connected to form the current end of the temperature compensation circuit, which is connected to the current end of the reference voltage output circuit.

7. The high-precision full-CMOS curvature compensation reference voltage source according to claim 1, characterized in that: MOS tube M 14 MOS tube is 3.3V, MOS tube M 13 It is a 1.8V MOS tube.

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