A trigger circuit, chip, and electronic device

Abstract

This application provides a trigger circuit, chip, and electronic device. The circuit includes: a temporary storage module and an inverting module; the input terminal of the inverting module is electrically connected to the output terminal of the temporary storage module, and the output terminal of the inverting module is electrically connected to the input terminal of the temporary storage module; the inverting module is used to invert the signal output from the output terminal of the temporary storage module to obtain a first target signal, and transmit the first target signal to the input terminal of the temporary storage module; the control terminal of the temporary storage module is used to receive a trigger signal; the temporary storage module is used to update its latched control signal according to the first target signal received at the input terminal when the trigger signal received at the control terminal is valid, and output a control signal through the output terminal, or, when the trigger signal received at the control terminal is invalid, output the latched control signal through the output terminal. This is used to reduce the trigger switching operation time of the temporary storage module.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, specifically to a trigger circuit, chip, and electronic device. Background Technology

[0002] Currently, in electronic devices, processors often use buses to control other devices. For example, in mobile phones, the main controller in current mobile phone RF front-end systems commonly uses the MIPI RFFE (Mobile Industry Processor Interface RF Front-end) bus to control RFFE devices. MIPI communication primarily controls the relevant target registers of the controlled devices. The controlled devices trigger different operations to achieve different functions based on different signals output from their relevant target registers. Before the main controller simultaneously triggers multiple target registers of one or more controlled devices on the bus, it first uses a register write command to save the signal expected to be written to the target register at the same address as the target register into a shadow register. Then, through a trigger instruction, the signal stored in the shadow register is simultaneously saved to the target register to trigger the corresponding operation simultaneously.

[0003] When multiple target registers have different addresses, or when the addresses are the same (but different devices require different signals to be written), it is often necessary to execute multiple individual register write commands first, which results in a longer trigger preparation time. When the time interval between two trigger operations is required to be short, the trigger preparation time may be too long, exceeding the time interval limit between two trigger operations, leading to abnormal operation of the electronic device. Summary of the Invention

[0004] In view of this, this application provides a trigger circuit, chip, and electronic device to help solve the problem of excessively long trigger switching operation time in the prior art.

[0005] In a first aspect, embodiments of this application provide a control circuit, including: a temporary storage module and an inversion module;

[0006] The input terminal of the inverting module is electrically connected to the output terminal of the temporary storage module, and the output terminal of the inverting module is electrically connected to the input terminal of the temporary storage module.

[0007] The inverting module is used to invert the signal output from the output terminal of the temporary storage module to obtain a first target signal, and transmit the first target signal to the input terminal of the temporary storage module.

[0008] The control terminal of the temporary storage module is used to receive a trigger signal; the temporary storage module is used to update its latched control signal according to the first target signal received by the input terminal when the trigger signal received by the control terminal is valid, and output the control signal through the output terminal, or, when the trigger signal received by the control terminal is invalid, output the latched control signal through the output terminal.

[0009] Preferably, it further includes: a first selection module and a writing module;

[0010] The first input terminal of the first selection module is electrically connected to the output terminal of the inverting module, the second input terminal of the first selection module is electrically connected to the output terminal of the writing module, and the output terminal of the first selection module is electrically connected to the input terminal of the temporary storage module.

[0011] The first selection module is used to transmit the signal output from the output terminal of the inverting module to the input terminal of the temporary storage module, or to transmit the signal output from the output terminal of the writing module to the input terminal of the temporary storage module.

[0012] The write module has the same address as the temporary storage module and is used to store the first target signal required by the temporary storage module.

[0013] Preferably, the write module includes: a first register;

[0014] The first register is used to store the first target signal required by the temporary storage module.

[0015] Preferably, the first control module;

[0016] The output terminal of the first control module is electrically connected to the control terminal of the first selection module; the first control module is used to output a first selection signal and a second selection signal to the control terminal of the first selection module.

[0017] The first selection module is specifically used to transmit the signal output by the output terminal of the inverting module to the input terminal of the temporary storage module when the control terminal of the first selection module receives the first selection signal; or, when the control terminal of the first selection module receives the second selection signal, transmit the signal output by the output terminal of the writing module to the input terminal of the temporary storage module.

[0018] Preferably, the first control module includes: a second register;

[0019] The second register is used to output a first selection signal or a second selection signal to the control terminal of the first selection module.

[0020] Preferably, the control terminals of multiple first selection modules are electrically connected to the output terminal of the same first control module.

[0021] Preferably, it further includes: a second selection module;

[0022] The first input terminal of the second selection module is electrically connected to the output terminal of the first selection module, the second input terminal of the second selection module is used to receive the second target signal, and the output terminal of the second selection module is electrically connected to the input terminal of the temporary storage module.

[0023] The second selection module is used to transmit the signal output from the output terminal of the first selection module to the input terminal of the temporary storage module, or to transmit the second target signal to the input terminal of the temporary storage module;

[0024] The control terminal of the temporary storage module is also used to receive a first data latch signal; the temporary storage module is also used to update its latched signal according to the second target signal received by the input terminal when the control terminal receives the first data latch signal.

[0025] Preferably, it further includes: a second control module;

[0026] The output terminal of the second control module is electrically connected to the control terminal of the second selection module; the second control module is used to output a third selection signal and a fourth selection signal to the control terminal of the second selection module.

[0027] The second selection module is specifically used to transmit the signal output by the output terminal of the first selection module to the input terminal of the temporary storage module when the control terminal of the second selection module receives the third selection signal; or, when the control terminal of the second selection module receives the fourth selection signal, transmit the second target signal to the input terminal of the temporary storage module.

[0028] Preferably, the second control module includes: a third register;

[0029] The third register is used to output a third selection signal and a fourth selection signal to the control terminal of the second selection module.

[0030] Preferably, it further includes: a third selection module;

[0031] The output terminal of the third selection module is electrically connected to the control terminal of the temporary storage module. The first input terminal of the third selection module is used to receive a trigger signal, and the second input terminal of the third selection module is used to receive a first data latch signal. The control terminal of the third selection module is electrically connected to the output terminal of the second control module.

[0032] The third selection module is configured to transmit the trigger signal to the control terminal of the temporary storage module when the control terminal of the third selection module receives the third selection signal; and to transmit the first data latch signal to the control terminal of the temporary storage module when the control terminal of the third selection module receives the fourth selection signal.

[0033] Secondly, embodiments of this application provide a control chip, including the control circuit described in any of the first aspects above.

[0034] Thirdly, embodiments of this application provide an electronic device that includes the control circuit described in any of the first aspects or the control chip described in the second aspect.

[0035] The control circuit using the solution provided in this application includes a temporary storage module and an inverting module. When the trigger signal received by the temporary storage module at its control terminal is valid, it updates the control signal latched in it according to the signal received at its input terminal and outputs the control signal through its output terminal. Alternatively, when the trigger signal received by the temporary storage module at its control terminal is invalid, it outputs the control signal already latched in it through its output terminal. The input terminal of the inverting module is connected to the output terminal of the temporary storage module, and the output terminal of the inverting module is connected to the input terminal of the temporary storage module. The inverting module is used to invert the control signal output by the output terminal of the temporary storage module to obtain a first target signal, and transmit the first target signal to the input terminal of the temporary storage module. Thus, in this application embodiment, the first target signal is obtained by inverting the signal output by the output terminal of the temporary storage module through the inverting module, and the first target signal is transmitted to the input terminal of the temporary storage module. When the trigger signal received by the control terminal of the temporary storage module is invalid, and the temporary storage module does not change the control signal output by its output terminal, it outputs the control signal latched in it through its output terminal. When the trigger signal received at the control terminal of the temporary storage module is valid, the temporary storage module updates its latched control signal according to the first target signal received at the input terminal, and outputs the updated control signal through the output terminal. That is, in this application, the switching between the two signals stored in the temporary storage module can be achieved through the inversion module. When the temporary storage module needs to switch its output signal, only one valid trigger signal needs to be sent to the temporary storage module, reducing the trigger switching operation time of the temporary storage module, lowering the trigger complexity of the temporary storage module, and saving power consumption. Attached Figure Description

[0036] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 A schematic diagram of a control circuit provided in an embodiment of this application;

[0038] Figure 2 A schematic diagram of another control circuit provided in an embodiment of this application;

[0039] Figure 3 This is a schematic diagram of a control circuit provided in an embodiment of this application;

[0040] Figure 4 This is a schematic diagram of another control circuit provided in an embodiment of this application;

[0041] Figure 5 A schematic diagram of another control circuit provided in an embodiment of this application;

[0042] Figure 6 This is a schematic diagram of another control circuit provided in an embodiment of this application;

[0043] Figure 7a This is a schematic diagram of another control circuit provided in an embodiment of this application;

[0044] Figure 7b This is a schematic diagram of another control circuit provided in an embodiment of this application;

[0045] Figure 8 This is a schematic diagram of another control circuit provided in an embodiment of this application;

[0046] Figure 9 This is a schematic diagram of another control circuit provided in an embodiment of this application. Detailed Implementation

[0047] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0048] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0049] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0050] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0051] In related technologies, currently, when processors control other devices in electronic devices, they often use a bus-based approach. For example, in mobile phones, the current mobile phone RF front-end system commonly uses the MIPI RFFE (Mobile Industry Processor Interface RF Front-end) bus to control RFFE devices. MIPI communication primarily achieves control over the controlled devices by controlling their relevant target registers. The controlled devices trigger different operations to achieve different functions based on different signals output from their relevant target registers. Before the master controller simultaneously triggers multiple target registers of one or more controlled devices on the bus, it first uses a register write command to save the signal expected to be written to the target register at the same address as the target register into a shadow register. Then, through a trigger instruction, the signal stored in the shadow register is simultaneously saved to the target register to trigger the corresponding operation simultaneously.

[0052] When multiple target registers have different addresses, or when different devices have the same address but require different signals to be written, multiple individual register write commands often need to be executed first, which results in a longer trigger preparation time. In some scenarios, the time interval between two trigger operations is strictly limited, such as the switching between transmitting and receiving in a wireless communication system of electronic devices, i.e., the transmit-to-receive switch and the receive-to-transmit switch. If too many devices or registers are triggered simultaneously, the trigger preparation time will exceed the time interval limit of the trigger action, leading to wireless communication abnormalities.

[0053] For example, assuming the electronic device is a mobile phone, during wireless communication, some RFFE devices in the phone only switch between two states. For instance, the PA (Power Amplifier) ​​switches between ON and OFF, and the ASM (Antenna Switch Module) switches between TX (transmit) and RX (receive) paths. Internally, in devices supporting the MIPI RFFE interface, this switching between the different states of the two devices is controlled by a 1-bit or 2-bit target register. For example, 1 represents ON, and 0 represents OFF; 1 represents TX, and 0 represents RX. The control signal output from the target register controls the controlled device to switch to different states. In a mobile phone wireless communication system, when the PA and ASM need to switch to another state simultaneously, it is achieved by the baseband chip issuing a trigger command on the MIPI RFFE bus using a broadcast or group address. Figure 1 As shown, in a mobile phone wireless communication system, the PA only amplifies the signal that the phone needs to transmit, and does not amplify the signal it receives. Furthermore, during mobile phone wireless communication, it is necessary to periodically and accurately switch between signal transmission and reception modes. When the phone switches from signal reception to transmission mode, the PA is activated, and the ASM switches to the TX state. When the phone switches from signal transmission to reception mode, the PA is deactivated, and the ASM switches to the RX state. When the phone switches from signal reception to transmission mode, before triggering the PA to activate and the ASM to switch to the TX state, the first write instruction needs to write the first target signal 1 to the PA's shadow register, and the second write instruction needs to write the second target signal 1 to the ASM's shadow register. When the phone switches from signal transmission to reception mode, before triggering the PA to deactivate and the ASM to switch to the RX state, the third write instruction needs to write the third target signal 0 to the PA's shadow register, and the fourth write instruction needs to write the fourth target signal 0 to the ASM's shadow register, as shown below. Figure 2 As shown.

[0054] It should be noted that, for simplicity, the target register is defined as 1 bit. In practical applications, the target register can be 8 bits. During state switching, only 1 bit of the register data changes. The other bits can remain unchanged when switching between the phone's signal transmission and reception modes. This simplification does not affect the timing logic. Furthermore, in Figure 2 The diagram only shows a portion of the timing sequence for the switching between the signal transmission and reception modes of the mobile phone.

[0055] pass Figure 2It can be seen that at least two write instructions need to be executed before each trigger instruction is executed. When the time interval between the two trigger instructions is relatively small, the trigger preparation time may be too long, exceeding the time interval limit between two trigger operations, which may cause the electronic device to malfunction.

[0056] To address the aforementioned problems, this application provides a control circuit comprising a temporary storage module and an inverting module. When a trigger signal received at the control terminal of the temporary storage module is valid, the temporary storage module updates its internally latched control signal according to the signal received at its input terminal and outputs a control signal through its output terminal. Alternatively, when the trigger signal received at the control terminal of the temporary storage module is invalid, the temporary storage module outputs its internally latched control signal through its output terminal. The input terminal of the inverting module is connected to the output terminal of the temporary storage module, and the output terminal of the inverting module is connected to the input terminal of the temporary storage module. The inverting module is used to invert the control signal output from the output terminal of the temporary storage module to obtain a first target signal, and transmit the first target signal to the input terminal of the temporary storage module. Thus, in this application embodiment, the inverting module inverts the signal output from the output terminal of the temporary storage module to obtain the first target signal, and transmits the first target signal to the input terminal of the temporary storage module. When the trigger signal received at the control terminal of the temporary storage module is invalid, the temporary storage module does not change the control signal output from its output terminal, but outputs its internally latched control signal through its output terminal. When the trigger signal received at the control terminal of the temporary storage module is valid, the temporary storage module updates its latched control signal according to the first target signal received at the input terminal, and outputs the updated control signal through the output terminal. That is, in this application, the switching between the two signals stored in the temporary storage module can be achieved through the inversion module. When the temporary storage module needs to switch its output signal, only one valid trigger signal needs to be sent to the temporary storage module, reducing the trigger switching operation time of the temporary storage module, lowering the trigger complexity of the temporary storage module, and saving power consumption. A detailed explanation follows.

[0057] See Figure 3 This is a schematic diagram of a control circuit provided in an embodiment of this application. Figure 3 As shown, the control circuit includes a temporary storage module 301 and an inversion module 302.

[0058] The input terminal of the inverting module 302 is electrically connected to the output terminal of the temporary storage module 301, and the output terminal of the inverting module 302 is electrically connected to the input terminal of the temporary storage module 301.

[0059] The inverting module 302 is used to invert the signal output from the output terminal of the temporary storage module 301 to obtain the first target signal, and transmit the first target signal to the input terminal of the temporary storage module 301.

[0060] The control terminal of the temporary storage module 301 is used to receive trigger signals. When the trigger signal received by the control terminal is valid, the temporary storage module 301 updates its latched control signal according to the first target signal received by the input terminal and outputs the control signal through the output terminal; or, when the trigger signal received by the control terminal is invalid, it outputs the latched control signal through the output terminal.

[0061] The trigger signals include valid and invalid trigger signals. A valid trigger signal can trigger the temporary storage module 301 to update its internally latched control signal based on the first target signal received at the input terminal. An invalid trigger signal cannot trigger the temporary storage module 301 to update its internally latched control signal based on the first target signal received at the input terminal. That is, when the control terminal of the temporary storage module 301 receives an invalid trigger signal, it does not update its internally latched control signal, and the output terminal outputs the internally latched control signal. Whether the trigger signal is valid depends on the requirements of the temporary storage module 301 itself. For example, if the control terminal of the temporary storage module 301 receives a high-level signal and triggers the update of its internally latched control signal based on the first target signal received at the input terminal, then a high-level trigger signal is a valid trigger signal. A low-level trigger signal is an invalid trigger signal. Alternatively, if the control terminal of the temporary storage module 301 receives a rising edge signal and triggers the update of its internally latched control signal based on the first target signal received at the input terminal, then a rising edge trigger signal is a valid trigger signal. Other trigger signals are invalid trigger signals. Of course, the effective trigger signal can also be other types of signals, depending on the settings of the temporary storage module 301, and this application does not limit it.

[0062] It should be understood that, in the embodiments of this application, "valid trigger signal" refers to a valid trigger signal, and "invalid trigger signal" refers to an invalid trigger signal.

[0063] In this embodiment, the control circuit includes a temporary storage module 301 and an inverting module 302. The temporary storage module 301 includes a control terminal, an input terminal, and an output terminal. The input terminal of the inverting module 302 is connected to the output terminal of the temporary storage module 301, and the output terminal of the inverting module 302 is connected to the input terminal of the temporary storage module 301. The control terminal of the temporary storage module 301 receives a trigger signal. When the trigger signal received by the control terminal is valid, the temporary storage module 301 updates its latched control signal according to the first target signal received by the input terminal and outputs the updated control signal through its output terminal. Alternatively, when the trigger signal received by the control terminal is invalid, the temporary storage module 301 outputs its latched control signal through its output terminal. In other words, when the received trigger signal is valid, the control terminal of the temporary storage module 301 needs to update its internally latched control signal according to the first target signal received by the input terminal and output the updated control signal through its output terminal. When the received trigger signal is invalid, the latched control signal does not need to be updated, and the already latched control signal continues to be output through its output terminal. The inverting module 302 is connected to the output of the temporary storage module 301 at its input terminal, and the output of the inverting module 302 is connected to the input of the temporary storage module 301. That is, the inverting module 302 can invert the control signal output from the temporary storage module 301 to obtain the first target signal, and transmit the first target signal to the input of the temporary storage module 301 through its output terminal. At this time, if the trigger signal received by the control terminal of the temporary storage module 301 is invalid, the temporary storage module 301 will not update the latched control signal, but will continue to output the currently latched control signal through its output terminal. If the trigger signal received by the control terminal of the temporary storage module 301 is valid, the temporary storage module 301 can update its latched control signal according to the first target signal received at its input terminal, and output the updated control signal through its output terminal. In this way, since the inverting module 302 can invert the control signal output from the output terminal of the temporary storage module 301 and transmit it to the input terminal of the temporary storage module 301, when it is necessary to switch the control signal output from the output terminal of the temporary storage module 301, it is only necessary to send a valid trigger signal to the control terminal of the temporary storage module 301 to realize the switching of the control signal output from the output terminal of the temporary storage module 301.

[0064] In other words, in this application, the switching between the two signals stored in the temporary storage module can be achieved through the inversion module. When the temporary storage module needs to switch its output signal, only one valid trigger signal needs to be sent to the temporary storage module, which reduces the trigger switching operation time of the temporary storage module, reduces the triggering complexity of the temporary storage module, and saves power consumption.

[0065] As one possible implementation, the trigger signal can be transmitted from a device other than the control circuit to the control terminal of the temporary storage module 301. When this other device determines that it needs to switch the output control signal of the temporary storage module 301, it transmits a valid trigger signal to the control terminal of the temporary storage module 301. When it determines that it does not need to switch the output control signal of the temporary storage module 301, it transmits an invalid trigger signal to the control terminal of the temporary storage module 301. The valid trigger signal and the invalid trigger signal are different signals; for example, the valid trigger signal can be a high-level signal, and the invalid trigger signal can be a low-level signal. Of course, the valid trigger signal can also be a low-level signal, and the invalid trigger signal can be a high-level signal; this application does not impose any limitation on this.

[0066] It should be noted that after the control circuit is powered on, the control terminal of the temporary storage module 301 will continuously receive trigger signals. For example, when there is no need to switch the control signal output from the output terminal of the temporary storage module 301, the control terminal of the temporary storage module 301 will receive an invalid trigger signal. When it is necessary to switch the control signal output from the output terminal of the temporary storage module 301, the control terminal of the temporary storage module 301 will receive a valid trigger signal. However, in subsequent moments after the switch of the output control signal, if there is no need to continue switching the control signal output from the output terminal of the temporary storage module 301, the control terminal of the temporary storage module 301 will receive an invalid trigger signal.

[0067] As one possible implementation, the temporary storage module 301 includes a fourth register. The input of the fourth register is electrically connected to the output of the inverting module 302, and the output of the fourth register is electrically connected to the input of the inverting module 302. The control terminal of the fourth register is used to receive trigger signals, such as... Figure 9 As shown.

[0068] As one possible implementation, the above-mentioned control circuit, such as Figure 4 As shown, it also includes: a first selection module 303 and a writing module 304.

[0069] The first input terminal of the first selection module 303 is electrically connected to the output terminal of the inverting module 302, the second input terminal of the first selection module 303 is electrically connected to the output terminal of the writing module 304, and the output terminal of the first selection module 303 is electrically connected to the input terminal of the temporary storage module 301.

[0070] The first selection module 303 is used to transmit the signal output from the output terminal of the inverting module 302 to the input terminal of the temporary storage module 301, or to transmit the signal output from the output terminal of the writing module 304 to the input terminal of the temporary storage module 301.

[0071] The write module 304 has the same address as the temporary storage module 301 and is used to store the first target signal required by the temporary storage module 301.

[0072] In this embodiment, the control circuit further includes a first selection module 303 and a writing module 304. The writing module 304 shares the same address as the temporary storage module 301 and is used to store the first target signal required by the temporary storage module 301. That is, the writing module 304 is a shadow storage module of the temporary storage module 301. The first input terminal of the first selection module 303 is connected to the output terminal of the inverting module 302, the second input terminal of the first selection module 303 is connected to the output terminal of the writing module 304, and the output terminal of the first selection module 303 is connected to the input terminal of the temporary storage module 301. The first selection module 303 can choose to transmit the signal received at its first input terminal to the input terminal of the temporary storage module 301 through its output terminal, or it can choose to transmit the signal received at its second input terminal to the input terminal of the temporary storage module 301 through its output terminal. That is, the control circuit can use the first selection module 303 to select the first target signal obtained by the inverting module 302 to be transmitted to the input terminal of the temporary storage module 301 for latching. When the first selection module 303 selects its first input and output terminals to be connected, the control circuit activates the inverting function. The output terminal of the inverting module 302 is connected to the input terminal of the temporary storage module 301 through the first input and output terminals of the first selection module 303. When it is necessary to switch the signal output by the temporary storage module 301, the switching can be achieved when the control terminal of the temporary storage module 301 receives a valid trigger signal. At this time, only one valid trigger signal needs to be sent to the control terminal of the temporary storage module 301.

[0073] Alternatively, when the inverting function is not enabled in the control circuit, the first selection module 303 selects its second input terminal and output terminal to be connected. The output terminal of the write module 304 is connected to the input terminal of the temporary storage module 301 through the first selection module 303. At this time, the signal stored in the write module 304 is transmitted to the input terminal of the temporary storage module 301 through its output terminal. Therefore, when it is necessary to switch the signal output from the output terminal of the temporary storage module 301, the first target signal to be switched by the temporary storage module 301 needs to be stored in the write module 304 first, and then transmitted to the input terminal of the temporary storage module 301 through the write module 304. Switching can be achieved when the trigger signal received at the control terminal of the temporary storage module 301 is valid.

[0074] Since the inverting module 302 inverts the signal output from the output terminal of the temporary storage module 301, in the initial power-on phase of the control circuit, when the control circuit is not initially powered on and the temporary storage module 301 has not latched the control signal, the output terminal of the temporary storage module 301 cannot output a signal, and therefore the input terminal of the inverting module 302 cannot acquire a signal. Thus, the inverting function is not activated during the initial power-on phase. At this time, the first selection module 303 controls its second input terminal to conduct with its output terminal, and the output terminal of the writing module 304 is connected to the input terminal of the temporary storage module 301 through the second input terminal and output terminal of the first selection module 303. This allows the first target signal required by the temporary storage module 301 to be stored in the writing module 304 during the initial power-on phase of the control circuit. In this way, the output terminal of the writing module 304 transmits the first target signal to the input terminal of the temporary storage module 301 through the second input terminal and output terminal of the first selection module 303. When the trigger signal received at the control terminal of the temporary storage module 301 is valid, the control signal is determined and latched based on the first target signal received at the input terminal, and then output through the output terminal of the temporary storage module 301. Alternatively, for ease of implementation, the first target signal can be directly used as the control signal. In this case, when the trigger signal received at its control terminal is valid, the temporary storage module 301 directly latches the first target signal received at its input terminal as the control signal and outputs it through the output terminal of the temporary storage module 301.

[0075] In this embodiment, to reduce the triggering and switching operation time of the temporary storage module 301, after latching the signal in the temporary storage module 301, the inversion function of the control circuit can be enabled. Thus, when it is necessary to switch the signal output from the output terminal of the temporary storage module 301, the inversion module 302 can input the switched signal to the input terminal of the temporary storage module 301. At this time, the first selection module 303 can disconnect the second input terminal from the output terminal and connect the first input terminal from the output terminal, enabling the inversion function of the control circuit. The output terminal of the inversion module 302 is connected to the input terminal of the temporary storage module 301 through the first input terminal and output terminal of the first selection module 303. Since the input terminal of the inversion module 302 is connected to the output terminal of the temporary storage module 301, the inversion module 302 can invert the control signal output from the output terminal of the temporary storage module 301 to obtain the first target signal. The output terminal of the inversion module 302 transmits the first target signal to the input terminal of the temporary storage module 301 through the first input terminal and output terminal of the first selection module 303. At this time, the first target signal and the control signal output by the output terminal of the temporary storage module 301 are opposite signals. For example, if the control signal output by the output terminal of the temporary storage module 301 is a high-level signal, then the first target signal is a low-level signal. Or, if the control signal output by the output terminal of the temporary storage module 301 is 1, then the first target signal is 0. When the trigger signal received by the control terminal of the temporary storage module 301 is invalid, the temporary storage module 301 does not perform signal switching. At this time, the temporary storage module 301 continues to output its latched control signal through its output terminal. Alternatively, when the trigger signal received by the control terminal of the temporary storage module 301 is valid, the temporary storage module 301 needs to perform signal switching. At this time, the temporary storage module 301 updates the latched control signal according to the first target signal received by its input terminal. For example, it determines the first target signal received by its input terminal as new control information, latches it, and outputs the updated control signal through its output terminal.

[0076] Each time a signal switching is required in the temporary storage module 301, it can be achieved through the aforementioned inverting module 302. This way, switching can be initiated by receiving only a valid trigger signal, such as... Figure 5 As shown, no writing instructions are required, which greatly reduces the triggering and switching operation time of the temporary storage module, reduces the triggering complexity of the temporary storage module, and saves power consumption.

[0077] As one possible implementation, the write module 304 includes a first register. The first register is used to store the first target signal required by the temporary storage module 301. That is, the write module 304 is a shadow register of the temporary storage module 301.

[0078] When the write module 304 is the first register, the output terminal of the first register is connected to the second input terminal of the first selection module 303. The input terminal of the first register is used to receive the first target signal and can be connected to the first signal line. The first signal line is used to transmit the first target signal required by the first register. The control terminal of the first register is used to receive the second data latch signal. When the second data latch signal received by the control terminal of the first register is valid, the first register latches the first target signal received by its input terminal, that is, updates the signal latched by the first register to the first target signal, and outputs the first target signal through its output terminal. When the second data latch signal received by the control terminal of the first register is invalid, the first register does not update the latched signal and directly outputs the signal already latched in it through its output terminal, such as... Figure 9 As shown.

[0079] It should be noted that the validity of the second data latch signal depends on the settings of the first register itself. For example, if the first target signal received at the latch input is latched when the control terminal of the first register receives a high-level signal, then the second data latch signal is valid when it is high. The second data latch signal is invalid when it is low. Alternatively, if the first target signal received at the latch input is latched when the control terminal of the first register receives a rising edge signal, then the second data latch signal is valid when it is rising. The second data latch signal is invalid when it is any other signal. Of course, a valid second data latch signal can also be other types of signals, depending on the settings of the first register, and this application does not impose any restrictions on this.

[0080] As one possible implementation, for ease of implementation, the first selection module 303 is an analog switch, as shown in the reference. Figure 9 As shown.

[0081] As one possible implementation, such as Figure 6 As shown, the control circuit also includes a first control module 305.

[0082] The output terminal of the first control module 305 is electrically connected to the control terminal of the first selection module 303; the first control module 305 is used to output a first selection signal and a second selection signal to the control terminal of the first selection module 303.

[0083] The first selection module 303 is specifically used to transmit the signal output from the output terminal of the inverting module 302 to the input terminal of the temporary storage module 301 when the control terminal of the first selection module 303 receives the first selection signal. Alternatively, when the control terminal of the first selection module 303 receives the second selection signal, it transmits the signal output from the output terminal of the writing module 304 to the input terminal of the temporary storage module 301.

[0084] In this embodiment, a first control module 305 is configured to control the first selection module 303 to select whether the first input terminal and output terminal are connected, or whether the second input terminal and output terminal are connected. The output terminal of the first control module 305 is connected to the control terminal of the first selection module 303, and is used to input a first selection signal and a second selection signal to the control terminal of the first selection module 303. When the first selection module 303 receives the first selection signal at its control terminal, it connects the first input terminal and output terminal. At this time, the control circuit activates the inversion function, transmitting the signal output from the output terminal of the inverting module 302 to the input terminal of the temporary storage module 301. When it receives the second selection signal at its control terminal, it connects the second input terminal and output terminal. At this time, the control circuit deactivates the inversion function, transmitting the signal output from the output terminal of the writing module 304 to the input terminal of the temporary storage module 301. That is, the first selection signal or the second selection signal output from the output terminal of the first control module 305 controls the connection between the first input terminal and output terminal or the second input terminal and output terminal of the first selection module 303.

[0085] As one possible implementation, refer to Figure 9 As shown, the first control module 305 includes: a second register.

[0086] The second register is used to output a first selection signal or a second selection signal to the control terminal of the first selection module 303.

[0087] For ease of implementation, the first control module 305 is configured as the second register, and the signal output from the second register is either the first selection signal or the second selection signal. The output of the second register is connected to the control terminal of the first selection module 303 to output the first selection signal or the second selection signal to the control terminal of the first selection module 303. At this time, the input of the second register is connected to the second signal line to receive the first selection signal or the second selection signal. The second signal line is used to transmit the first selection signal or the second selection signal. The control terminal of the second register is used for the third data latch signal. When the third data latch signal received at the control terminal of the second register is valid, the second register latches the first selection signal or the second selection signal received at its input terminal, that is, updates the latched signal of the second register to the first selection signal or the second selection signal, and outputs the first selection signal or the second selection signal through its output terminal. When the third data latch signal received at the control terminal of the second register is invalid, the second register does not update the latched signal and directly outputs the latched signal through its output terminal.

[0088] For example, the input terminal of the second register receives the first selection signal through the second signal line. When the third data latch signal received at the control terminal of the second register is invalid, the second register does not change its currently latched signal. Assume that the signal currently latched by the second register is the second selection signal. At this time, when the third data latch signal received at the control terminal of the second register is invalid, the second register continues to output its currently latched second selection signal through the output terminal. At this time, when the control terminal of the first selection module 303 receives the second selection signal, it connects the second input terminal and the output terminal of the first selection module 303. At this time, the signal output by the output terminal of the write module 304 is transmitted to the input terminal of the temporary storage module 301. Alternatively, when the third data latch signal received at the control terminal of the second register is valid, the second register latches the first selection signal, that is, it updates the signal currently latched in it from the second selection signal to the first selection signal, and outputs the first selection signal through the output terminal. At this time, the control terminal of the first selection module 303 receives the first selection signal and connects the first input terminal and the output terminal of the first selection module 303. At this time, the inverting module 302 can transmit the signal output by its output terminal to the input terminal of the temporary storage module 301.

[0089] It should be noted that the validity of the third data latch signal depends on the settings of the second register itself. For example, if the control terminal of the second register receives a high-level signal and the latch input receives the first or second selection signal, then the third data latch signal is valid when it is high. The third data latch signal is invalid when it is low. Alternatively, if the control terminal of the second register receives a rising edge signal and the latch input receives the first or second selection signal, then the third data latch signal is valid when it is rising. The third data latch signal is invalid when it is any other signal. Of course, a valid third data latch signal can also be other types of signals, depending on the settings of the second register, and this application does not impose any restrictions on this.

[0090] As one possible implementation, the control terminals of multiple first selection modules 303 are electrically connected to the output terminal of the same first control module 305.

[0091] In this embodiment of the application, when multiple temporary storage modules 301, multiple inverting modules 302, multiple writing modules 304, and multiple first selection modules 303 are included, when multiple first selection modules 303 simultaneously select to start the inverting module 302 or simultaneously select to start the writing module 304, the control terminals of the multiple first selection modules 303 can be connected to the output terminal of the same first control module 305, such as... Figure 7aAs shown, multiple first selection modules 303 can receive the same first selection signal or second selection signal output by the first control module 305, thereby selecting whether to connect their first input terminal to the output terminal or to their second input terminal. In other words, multiple first selection modules 303 can simultaneously enable or disable the inversion function.

[0092] It should be noted that, in this embodiment of the application, an inverting module 302 is provided for each temporary storage module 301. In this way, when it is necessary to trigger the switching state of at least two temporary storage modules 301 at the same time, a valid trigger signal can be sent to at least two temporary storage modules 301 at the same time, thereby realizing the state switching of the temporary storage modules 301. This avoids the operation of writing switching data to the shadow register of at least two temporary storage modules 301 before triggering, and shortens the operation time of triggering at least two temporary storage modules 301 at the same time.

[0093] Alternatively, if at least two of the multiple first selection modules 303 activate the inversion function at different times, i.e., they do not simultaneously start the inversion module 302 or the write module 304, then these at least two first selection modules 303 are connected to different first control modules 305, such as... Figure 7b As shown. That is, when at least two first selection modules 303 select to enable or disable the inversion function at the same time, they can be connected to the same first control module 305, so that the same first control module 305 can simultaneously control at least two first selection modules 303 to enable or disable the inversion function through signals output from its output terminal. When at least two first selection modules 303 select to enable or disable the inversion function at different times, they need to be connected to different first control modules 305, so that each of the different first control modules 305 can control at least two first selection modules 303 to enable or disable the inversion function.

[0094] As one possible implementation, such as Figure 8 As shown, the control circuit also includes a second selection module 306.

[0095] The first input terminal of the second selection module 306 is electrically connected to the output terminal of the first selection module 303. The second input terminal of the second selection module 306 is used to receive the second target signal. The output terminal of the second selection module 306 is electrically connected to the input terminal of the temporary storage module 301.

[0096] The second selection module 306 is used to transmit the signal output from the output terminal of the first selection module 303 to the input terminal of the temporary storage module 301, or to transmit the second target signal to the input terminal of the temporary storage module 301.

[0097] The control terminal of the temporary storage module 301 is also used to receive a first data latch signal. The temporary storage module 301 is also used to update its latched signal according to the second target signal received at the input terminal when the control terminal receives the first data latch signal.

[0098] In this embodiment, the temporary storage module 301 has two operating modes: a trigger mode and a storage mode. When the temporary storage module 301 is in trigger mode, its control terminal receives a trigger signal and outputs a control signal through its output terminal. That is, when the temporary storage module 301 is in trigger mode, its control terminal receives the trigger signal, and the temporary storage module 301 can latch and output the control signal, thus sending the control signal to other components so that the other components can perform corresponding functions according to the control signal. When the temporary storage module 301 is in storage mode, its control terminal receives a first data latch signal and latches the signal received at its input terminal to achieve the storage purpose. That is, when the temporary storage module 301 is in storage mode, the signal received at the input terminal of the temporary storage module 301 is a second target signal. When the control terminal receives the first data latch signal, it updates the second target signal received at the input terminal to a latch signal to store the second target signal.

[0099] Based on this, the control circuit also includes a second selection module 306. The second selection module 306 is used to select the function that the temporary storage module needs to enable. The first input terminal of the second selection module 306 is connected to the output terminal of the first selection module 303, the second input terminal of the second selection module 306 is used to receive the second target signal, and the output terminal of the second selection module 303 is electrically connected to the input terminal of the temporary storage module 301. Thus, when the temporary storage module 301 is in trigger mode, the second selection module 306 controls its first input terminal and output terminal to be connected. At this time, the output terminal of the first selection module 303 is electrically connected to the input terminal of the temporary storage module 301 through the first input terminal and output terminal of the second selection module 306. At this time, the first selection module 303 can transmit the first target signal output from the output terminal of the write module 304, or the first target signal output from the output terminal of the inverting module 302, to the input terminal of the temporary storage module 301, so that the temporary storage module 301 outputs a control signal according to the first target signal. Alternatively, when the temporary storage module 301 is in storage mode, the second selection module 306 controls its second input terminal and output terminal to be connected. At this time, when the second target signal is received at the second input terminal, the second target signal can be transmitted to the input terminal of the temporary storage module 301. Thus, when the control terminal of the temporary storage module 301 receives the first data latch signal, the second target signal is latched into the temporary storage module 301 for storage.

[0100] As one possible implementation, the second selection module 306 described above includes an analog switch.

[0101] As one possible implementation, refer to Figure 8 As shown, the control circuit also includes a second control module 307.

[0102] The output terminal of the second control module 307 is electrically connected to the control terminal of the second selection module 306; the second control module 307 is used to output a third selection signal and a fourth selection signal to the control terminal of the second selection module 306.

[0103] The second selection module 306 is specifically used to transmit the signal output from the output terminal of the first selection module 303 to the input terminal of the temporary storage module 301 when the control terminal of the second selection module 306 receives the third selection signal; or, when the control terminal of the second selection module 306 receives the fourth selection signal, transmit the second target signal to the input terminal of the temporary storage module 301.

[0104] In this embodiment, a second control module 307 is configured to control the second selection module 306 to select whether the first input terminal and output terminal are connected, or whether the second input terminal and output terminal are connected. When the temporary storage module 301 needs to implement the trigger mode, the output terminal of the second control module 307 outputs a third selection signal to the control terminal of the second selection module 306. At this time, when the second selection module 306 receives the third selection signal at its control terminal, it controls the first input terminal and output terminal of the second selection module 306 to be connected. The first input terminal of the second selection module 306 transmits the first target signal output by the output terminal of the first selection module 303 to the input terminal of the temporary storage module 301, and when the trigger signal received by the temporary storage module 301 at its control terminal is valid, it updates the latched control signal according to the first target signal and outputs the updated control signal through its output terminal.

[0105] Alternatively, when the temporary storage module 301 only implements storage mode, the output of the second control module 307 outputs a fourth selection signal to the control terminal of the second selection module 306. In this case, when the second selection module 306 receives the fourth selection signal at its control terminal, it controls the second input terminal of the second selection module 306 to be connected to its output terminal. The second input terminal of the second selection module 306 transmits the received second target signal to the input terminal of the temporary storage module 301, and when the temporary storage module 301 receives the first data latch signal at its control terminal, it updates the latched signal according to the second target signal.

[0106] The second control module 307 controls the first input terminal and the output terminal of the second selection module 306 to be connected, or the second input terminal and the output terminal to be connected, thereby controlling the functions required by the temporary storage module 301.

[0107] As one possible implementation, for ease of implementation, the second control module 307 includes: a third register, referenced... Figure 9 As shown.

[0108] The third register is used to output the third selection signal and the fourth selection signal to the control terminal of the second selection module.

[0109] In this embodiment, the second control module 307 is configured as a third register for ease of implementation. The output of the third register is connected to the second selection module 306 to output a third selection signal or a fourth selection signal to the control terminal of the second selection module 303. At this time, the input of the third register is connected to a third signal line to receive the third and fourth selection signals. The third signal line is used to transmit the third and fourth selection signals. The control terminal of the third register is used for a fourth data latch signal. When the fourth data latch signal received at the control terminal of the third register is valid, the third register latches the third or fourth selection signal received at its input terminal, that is, updates the latched signal to the third or fourth selection signal, and outputs the third or fourth selection signal through its output terminal. When the fourth data latch signal received at the control terminal of the third register is invalid, the third register does not update the latched signal and directly outputs the latched signal through its output terminal.

[0110] For example, the input terminal of the third register receives the third selection signal through the third signal line. When the fourth data latch signal received at the control terminal of the third register is invalid, the third register does not change its currently latched signal. Assume that the signal currently latched by the third register is the fourth selection signal. At this time, when the fourth data latch signal received at the control terminal of the third register is invalid, the third register continues to output its currently latched fourth selection signal through the output terminal. At this time, when the control terminal of the second selection module 306 receives the fourth selection signal, it connects the second input terminal and the output terminal of the second selection module 306. At this time, the second input terminal of the second selection module 306 transmits the received second target signal to the input terminal of the temporary storage module 301. At this time, the temporary storage module 301 operates in storage mode. When the control terminal of the temporary storage module 301 receives the first data latch signal, it latches the second target signal into the temporary storage module 301, realizing the storage mode. Alternatively, when the fourth data latch signal received at the control terminal of the third register is valid, the third register latches the third selection signal, that is, it updates the latched signal in its memory from the fourth selection signal to the third selection signal, and outputs the third selection signal through its output terminal. At this time, the control terminal of the second selection module 306 receives the third selection signal and connects the first input terminal and the output terminal of the second selection module 306. The second selection module 306 then transmits the first target signal received at its first input terminal to the input terminal of the temporary storage module 301. At this time, the temporary storage module 301 operates in trigger mode. When the trigger signal received at the control terminal of the temporary storage module 301 is valid, it latches the first target signal into the temporary storage module 301 and outputs it through its output terminal, thus realizing the trigger mode.

[0111] It should be noted that the validity of the fourth data latch signal depends on the settings of the third register itself. For example, if the first or second selection signal received at the latch input is latched when a high-level signal is received at the control terminal of the third register, then the fourth data latch signal is valid when it is high. The fourth data latch signal is invalid when it is low. Alternatively, if the first or second selection signal received at the latch input is latched when a rising edge signal is received at the control terminal of the third register, then the fourth data latch signal is valid when it is rising. The fourth data latch signal is invalid when it is any other signal. Of course, a valid fourth data latch signal can also be other types of signals, depending on the settings of the third register, and this application does not impose any restrictions on this.

[0112] As one possible implementation, refer to Figure 8 As shown, the control circuit described above also includes a third selection module 308.

[0113] The output terminal of the third selection module 308 is electrically connected to the control terminal of the temporary storage module 301. The first input terminal of the third selection module 308 is used to receive a trigger signal, and the second input terminal of the third selection module 308 is used to receive a first data latch signal.

[0114] The control terminal of the third selection module 308 is electrically connected to the output terminal of the second control module 307.

[0115] The third selection module 308 is used to transmit a trigger signal to the control terminal of the temporary storage module 301 when the control terminal of the third selection module 308 receives a third selection signal; and to transmit a first data latch signal to the control terminal of the temporary storage module 301 when the control terminal of the third selection module 308 receives a fourth selection signal.

[0116] In this embodiment, the control terminal of the temporary storage module 301 receives different signals when performing different functions. Therefore, in this embodiment, to facilitate the switching of different functions by the temporary storage module 301, a third selection module 308 can be provided. The third selection module 308 is used to control the signals received by the control terminal of the temporary storage module 301. The control terminal of the third selection module 308 is connected to the output terminal of the second control module 307, and the output terminal of the third selection module 308 is connected to the control terminal of the temporary storage module 301. The first input terminal of the third selection module 308 is used to receive a trigger signal, and the second input terminal of the third selection module 308 is used to receive a first data latch signal. When the temporary storage module 301 needs to start the trigger mode, the second control module 307 outputs a third selection signal. At this time, the control terminal of the second selection module 306 receives the third selection signal, and the second selection module 306 connects its first input terminal and output terminal to transmit the first target signal output by the output terminal of the first selection module 303 to the input terminal of the temporary storage module 301. Furthermore, upon receiving the third selection signal, the control terminal of the third selection module 308 connects its first input and output terminals, and the temporary storage module 301 initiates the trigger mode. The third selection module 308 can receive the trigger signal through its first input terminal and transmits the received trigger signal to the control terminal of the temporary storage module 301. Upon receiving the trigger signal, the temporary storage module 301 performs the corresponding trigger function.

[0117] When the temporary storage module 301 needs to activate the storage mode, the second control module 307 outputs a fourth selection signal. At this time, the control terminal of the second selection module 306 receives the fourth selection signal and connects its second input terminal and output terminal to transmit the second target signal to the input terminal of the temporary storage module 301. Simultaneously, the control terminal of the third selection module 308 receives the fourth selection signal and connects its second input terminal and output terminal, activating the storage mode of the temporary storage module 301. At this time, the third selection module 308 can receive a first data latch signal through its second input terminal and transmits the received first data latch signal to the control terminal of the temporary storage module 301. Upon receiving the first data latch signal, the temporary storage module 301 performs the corresponding storage function.

[0118] As one possible implementation, the second selection module 306 and the third selection module 308 mentioned above include analog switches.

[0119] It should be noted that the first selection module 303, the second selection module 306 and the third selection module 308 can also be other types of switches, and this application does not limit them.

[0120] In this embodiment, the signal output from the output terminal of the temporary storage module is inverted by the inversion module to obtain the first target signal, which is then transmitted to the input terminal of the temporary storage module. When the trigger signal received at the control terminal of the temporary storage module is invalid, the temporary storage module does not change the control signal output from its output terminal and outputs its internally latched control signal through the output terminal. When the trigger signal received at the control terminal of the temporary storage module is valid, the temporary storage module updates its latched control signal according to the first target signal received at the input terminal and outputs the updated control signal through the output terminal. That is, in this application, the inversion module can realize the switching between the two signals stored in the temporary storage module. When the temporary storage module needs to switch its output signal, only a valid trigger signal needs to be sent to the temporary storage module, which reduces the trigger switching operation time of the temporary storage module, reduces the triggering complexity of the temporary storage module, and saves power consumption.

[0121] Corresponding to the above embodiments, this application also provides a control chip, including the control circuit described in the above embodiments.

[0122] Corresponding to the above embodiments, this application also provides an electronic device, including the control circuit or control chip described in the above embodiments.

[0123] Those skilled in the art will clearly understand that the techniques in the embodiments of the present invention can be implemented using software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solutions in the embodiments of the present invention, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in various embodiments or certain parts of the embodiments of the present invention.

[0124] The same or similar parts between the various embodiments in this specification can be referred to mutually. In particular, the device embodiments and terminal embodiments are basically similar to the method embodiments, so the description is relatively simple, and the relevant parts can be referred to the description in the method embodiments.

Claims

1. A control circuit, characterized in that, include: Temporary storage module, invert module, first selection module, write module; The input terminal of the inverting module is electrically connected to the output terminal of the temporary storage module, and the output terminal of the inverting module is electrically connected to the input terminal of the temporary storage module. The inverting module is used to invert the signal output from the output terminal of the temporary storage module to obtain a first target signal, and transmit the first target signal to the input terminal of the temporary storage module. The control terminal of the temporary storage module is used to receive a trigger signal; the temporary storage module is used to update its latched control signal according to the first target signal received by the input terminal when the trigger signal received by the control terminal is valid, and output the control signal through the output terminal, or, when the trigger signal received by the control terminal is invalid, output the latched control signal through the output terminal. The first input terminal of the first selection module is electrically connected to the output terminal of the inverting module, the second input terminal of the first selection module is electrically connected to the output terminal of the writing module, and the output terminal of the first selection module is electrically connected to the input terminal of the temporary storage module. The first selection module is used to transmit the signal output from the output terminal of the inverting module to the input terminal of the temporary storage module, or to transmit the signal output from the output terminal of the writing module to the input terminal of the temporary storage module. The write module has the same address as the temporary storage module and is used to store the first target signal required by the temporary storage module.

2. The circuit according to claim 1, characterized in that, The write module includes: a first register; The first register is used to store the first target signal required by the temporary storage module.

3. The circuit according to claim 1, characterized in that, Also includes: First control module; The output terminal of the first control module is electrically connected to the control terminal of the first selection module; The first control module is used to output a first selection signal and a second selection signal to the control terminal of the first selection module; The first selection module is specifically used to transmit the signal output by the output terminal of the inverting module to the input terminal of the temporary storage module when the control terminal of the first selection module receives the first selection signal; or, when the control terminal of the first selection module receives the second selection signal, transmit the signal output by the output terminal of the writing module to the input terminal of the temporary storage module.

4. The circuit according to claim 3, characterized in that, The first control module includes: a second register; The second register is used to output a first selection signal or a second selection signal to the control terminal of the first selection module.

5. The circuit according to claim 3, characterized in that, The control terminals of multiple first selection modules are electrically connected to the output terminal of the same first control module.

6. The circuit according to claim 1, characterized in that, Also includes: Second selection module; The first input terminal of the second selection module is electrically connected to the output terminal of the first selection module, the second input terminal of the second selection module is used to receive the second target signal, and the output terminal of the second selection module is electrically connected to the input terminal of the temporary storage module. The second selection module is used to transmit the signal output from the output terminal of the first selection module to the input terminal of the temporary storage module, or to transmit the second target signal to the input terminal of the temporary storage module; The control terminal of the temporary storage module is also used to receive a first data latch signal; the temporary storage module is also used to update its latched signal according to the second target signal received by the input terminal when the control terminal receives the first data latch signal.

7. The circuit according to claim 6, characterized in that, Also includes: Second control module; The output terminal of the second control module is electrically connected to the control terminal of the second selection module; The second control module is used to output a third selection signal and a fourth selection signal to the control terminal of the second selection module; The second selection module is specifically used to transmit the signal output by the output terminal of the first selection module to the input terminal of the temporary storage module when the control terminal of the second selection module receives the third selection signal; or, when the control terminal of the second selection module receives the fourth selection signal, transmit the second target signal to the input terminal of the temporary storage module.

8. The circuit according to claim 7, characterized in that, The second control module includes: a third register; The third register is used to output a third selection signal and a fourth selection signal to the control terminal of the second selection module.

9. The circuit according to claim 7, characterized in that, Also includes: Third selection module; The output terminal of the third selection module is electrically connected to the control terminal of the temporary storage module. The first input terminal of the third selection module is used to receive a trigger signal, and the second input terminal of the third selection module is used to receive a first data latch signal. The control terminal of the third selection module is electrically connected to the output terminal of the second control module. The third selection module is configured to transmit the trigger signal to the control terminal of the temporary storage module when the control terminal of the third selection module receives the third selection signal; and to transmit the first data latch signal to the control terminal of the temporary storage module when the control terminal of the third selection module receives the fourth selection signal.

10. A control chip, characterized in that, Includes the control circuit described in any one of claims 1-9.

11. An electronic device, characterized in that, It includes the control circuit according to any one of claims 1-9, or the control chip according to claim 10.

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