Display control methods, electronic devices, and storage media

Abstract

This disclosure relates to a display control method, an electronic device, and a storage medium. The electronic device includes: a display screen with a first display area and a second display area; the pixel density in the first display area is less than the pixel density in the second display area; the pixels in the first display area use a first pixel circuit, and the pixels in the second display area use a second pixel circuit; the charging times of the storage capacitors in the first pixel circuit and the second pixel circuit are different. This embodiment can achieve a display effect where the brightness of the first display area and the second display area remains consistent, which is beneficial for improving the viewing experience.

Description

Technical Field

[0001] This disclosure relates to the field of data processing technology, and in particular to a display control method, electronic device, and storage medium. Background Technology

[0002] With the increasing popularity of electronic devices, their screen sizes are getting larger and larger, and full-screen devices are gradually gaining favor among users. Full-screen devices not only have a good appearance, but also have a higher screen utilization rate, allowing more screen content to be displayed.

[0003] To ensure the front-facing camera can capture clear images, related technologies employ special processing on the display screen within the camera's field of view. This includes reducing pixel density in this area, minimizing metal traces, or having a single transistor TFT drive multiple sub-pixels, thereby increasing light transmittance. For ease of explanation, the display area corresponding to the under-display camera will be referred to as the under-display camera display area (CUP), while the area outside will be called the normal area.

[0004] Taking a single transistor TFT driving multiple sub-pixels as an example, the driving current of the TFT in the CUP region is greater than that of the TFT in the Normal region. This results in a difference in the characteristic offset of the TFTs in the two regions, ultimately leading to a brightness difference between the CUP region and the Normal region, as shown in the image. Figure 1 As shown. See also Figure 1 (a) shows the brightness effect of the display screen at the initial moment; (b) shows the brightness effect of the display screen after 30 minutes of display; (c) shows the brightness effect of the display screen after 60 minutes of display. Summary of the Invention

[0005] This disclosure provides a display control method, an electronic device, and a storage medium to address the shortcomings of related technologies.

[0006] According to a first aspect of the present disclosure, an electronic device is provided, comprising: a display screen having a first display area and a second display area; the pixel density in the first display area is less than the pixel density in the second display area; the pixels in the first display area employ a first pixel circuit, and the pixels in the second display area employ a second pixel circuit; the charging times of the storage capacitors in the first pixel circuit and the second pixel circuit are different.

[0007] Optionally, the compensation signal of the first pixel circuit is related to the pixel data; the compensation signal of the second pixel circuit is related to the preset control signal, and the preset control signals of two adjacent rows of pixels have an overlapping area.

[0008] Optionally, the first pixel circuit is implemented using a 7T1C circuit structure, and the second pixel circuit is implemented using a 6T2C circuit structure.

[0009] Optionally, it further includes a driving circuit; the driving circuit includes a plurality of driving transistors; each driving transistor is used to drive a preset number of sub-pixels within the first display area; the preset number is greater than or equal to 2;

[0010] The charging time is positively correlated with the preset quantity.

[0011] Optionally, the charging time is positively correlated with the display duration of the display screen.

[0012] Optionally, the system further includes a processor; the processor is configured to obtain the current display duration of the display screen; and determine a target charging time that matches the current display duration based on a preset correspondence between display duration and charging time; and control the charging time of the storage capacitor to be the target charging time.

[0013] Optionally, it also includes a processor; the processor is used to acquire the current image of the display screen; the current image is captured by the display screen when displaying the target image after displaying a preset time; when the brightness difference between the first display area and the second display area in the current image exceeds a set threshold, the charging time of the storage capacitor in the second pixel circuit is adjusted until the brightness difference is less than the set threshold.

[0014] According to a second aspect of the present disclosure, a display control method is provided, the method comprising:

[0015] Get the current display duration of the screen;

[0016] Based on the preset correspondence between display duration and charging time, a target charging time that matches the current display duration is determined;

[0017] The charging time of the storage capacitor in the second pixel circuit is controlled to be the target charging time.

[0018] According to a third aspect of the present disclosure, a display control method is provided, the method comprising:

[0019] Acquire the current image of the display screen; the current image is captured when the display screen displays the target image after displaying a preset time period;

[0020] When the brightness difference between the first display area and the second display area in the current image exceeds a set threshold, the charging time of the storage capacitor in the second pixel circuit is adjusted until the brightness difference is less than the set threshold.

[0021] According to a fourth aspect of the present disclosure, an electronic device is provided, comprising:

[0022] processor;

[0023] Memory for storing computer programs executable by the processor;

[0024] The processor is configured to execute a computer program in the memory to implement the method as described in any of the preceding descriptions.

[0025] According to a fifth aspect of the present disclosure, a computer-readable storage medium is provided that, when an executable computer program in the storage medium is executed by a processor, enables the implementation of the method described in any of the preceding claims.

[0026] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects:

[0027] As can be seen from the above embodiments, the solution provided by this disclosure, by using a first pixel circuit for pixels in the first display area and a second pixel circuit for pixels in the second display area, and by making the charging time of the storage capacitors in the first pixel circuit and the second pixel circuit different, can achieve a display effect in which the brightness of the first display area and the second display area are consistent, which is beneficial to improving the viewing experience.

[0028] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0029] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0030] Figure 1 It refers to the display effect of the screen of an electronic device shown in related technologies.

[0031] Figure 2 This is a schematic diagram of the structure of an electronic device according to an exemplary embodiment.

[0032] Figure 3 This is a schematic diagram of the structure of an electronic device according to an exemplary embodiment.

[0033] Figure 4(a) is a circuit diagram of the initialization phase of a 6T2C circuit structure according to an exemplary embodiment.

[0034] Figure 4(b) is the timing diagram of the circuit shown in Figure 4(a).

[0035] Figure 5(a) is a circuit diagram of the compensation stage of a 6T2C circuit structure according to an exemplary embodiment.

[0036] Figure 5(b) is the timing diagram of the circuit shown in Figure 5(a).

[0037] Figure 6(a) is a circuit diagram of the data writing stage of a 6T2C circuit structure according to an exemplary embodiment.

[0038] Figure 6(b) is the timing diagram of the circuit shown in Figure 6(a).

[0039] Figure 7(a) is a schematic diagram of the light-emitting stage of a 6T2C circuit structure according to an exemplary embodiment.

[0040] Figure 7(b) is the timing diagram of the circuit shown in Figure 7(a).

[0041] Figure 8(a) is a circuit diagram of the initialization phase of a 7T1C circuit structure according to an exemplary embodiment.

[0042] Figure 8(b) is the timing diagram of the circuit shown in Figure 8(a).

[0043] Figure 9(a) is a circuit diagram of the compensation stage of a 7T1C circuit structure according to an exemplary embodiment.

[0044] Figure 9(b) is the timing diagram of the circuit shown in Figure 9(a).

[0045] Figure 10(a) is a schematic diagram of the light-emitting stage of a 7T1C circuit structure according to an exemplary embodiment.

[0046] Figure 10(b) is the timing diagram of the circuit shown in Figure 10(a).

[0047] Figure 11 This is a schematic diagram of the overlapping region of the comp signal storage in a 6T2C circuit structure according to an exemplary embodiment.

[0048] Figure 12 This is a schematic diagram illustrating a 7T1C circuit structure where the period of the low-level signal at scan is equal to the row period, according to an exemplary embodiment.

[0049] Figure 13 This is a flowchart illustrating a display control method according to an exemplary embodiment.

[0050] Figure 14 This is a flowchart illustrating another display control method according to an exemplary embodiment.

[0051] Figure 15This is a block diagram illustrating an electronic device according to an exemplary embodiment. Detailed Implementation

[0052] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described below by way of example do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatus consistent with some aspects of this disclosure as detailed in the appended claims.

[0053] To address the aforementioned technical problems, this disclosure provides a display control method, an electronic device, and a storage medium. The inventive concept lies in analyzing the compensation principle of pixel circuits based on the discovered causes of characteristic shifts in transistor TFTs. Different pixel circuits can be used in different display areas (i.e., a first display area such as the CUP area and a second display area such as the normal area). For example, a first pixel circuit can be used in the first display area and a second pixel circuit in the second display area. By controlling the charging time of the storage capacitors in the first and second pixel circuits to be different, the brightness difference between the two display areas can be eliminated or mitigated. This achieves a display effect where the brightness of the first and second display areas remains consistent, which is beneficial for improving the viewing experience.

[0054] Figure 2 This is a block diagram illustrating an electronic device according to an exemplary embodiment. Figure 3 This is a schematic diagram illustrating the effect of two display areas of a display screen according to an exemplary embodiment. See also Figure 2 and Figure 3 An electronic device includes a display screen 10 having a first display area 11 and a second display area 12. The pixel density in the first display area 11 is lower than the pixel density in the second display area 12. Pixels in the first display area 11 use a first pixel circuit (not shown in the figure), and pixels in the second display area 12 use a second pixel circuit (not shown in the figure); the charging times of the storage capacitors (Cst) in the first and second pixel circuits are different. The storage capacitors are used to store pixel data corresponding to the pixels, so that the pixels display grayscale or brightness matching the pixel data.

[0055] It should be noted that the pixel density in the first display area 11 is lower than that in the second display area 12 in order to improve the light transmittance of the first display area 11. At this time, an optical device such as a camera or a light sensor can be set below the first display area 11 to ensure the detection efficiency of the optical device.

[0056] In one embodiment, the compensation signal of the first pixel circuit is related to the pixel data (i.e., data). That is, when the first pixel circuit compensates for the characteristic offset of the driving transistor TFT, its compensation signal comes from the pixel data. Alternatively, when compensating for the characteristic offset of the driving transistor TFT in a given pixel, because the pixel data displayed in each row of pixels needs to be updated, the compensation signals of adjacent rows of pixels are unrelated. Therefore, it is impossible to compensate for the characteristic offset of the next row of pixels, or in other words, the compensation period of the first pixel circuit is equal to the row period. In one example, the first pixel circuit can be implemented using a 7T1C circuit structure.

[0057] In one embodiment, the compensation signal of the second pixel circuit is related to a preset control signal (such as a preset control signal comp), and the preset control signals of adjacent rows of pixels overlap. That is, the compensation period of the second pixel circuit is independent of the row period, allowing for simultaneous compensation for characteristic offsets for both the current row of pixels and the next row of pixels. In one example, the second pixel circuit can be implemented using a 6T2C circuit structure.

[0058] Thus, the solution provided in this embodiment of the present disclosure, by employing a first pixel circuit for pixels in the first display area and a second pixel circuit for pixels in the second display area, and by making the charging time of the storage capacitors in the first pixel circuit and the second pixel circuit different, can achieve a display effect in which the brightness of the first display area and the second display area are consistent, which is beneficial to improving the viewing experience.

[0059] In one embodiment, see further. Figure 2 The electronic device also includes a driving circuit 30. This driving circuit 30 can drive pixels within a first display area. The driving circuit 30 may include multiple driving transistors (not shown in the figure), each driving transistor driving a preset number of sub-pixels within the first display area 11, where the preset number is an integer greater than or equal to 2. For example, each driving transistor can drive 2, 3, or 4 sub-pixels. Understandably, as the number of sub-pixels driven by each driving transistor increases, the current flowing through the driving transistor increases, and the characteristic offset of the driving transistor increases, causing the brightness of the first display area to be greater than the brightness of the second display area. Therefore, a compensation signal for the second display area is increased, i.e., the charging time of the storage capacitor in the second display area is extended. In other words, the charging time is positively correlated with the preset number.

[0060] It should be noted that extending the charging time increases the overlap time of the preset control signals of two adjacent rows of pixels, which means increasing the width of the overlap area of ​​the preset control signals of two adjacent rows of pixels. Since the width of the overlap area has a maximum value, as will be discussed later... Figure 11When the rightmost edge of comp(n) coincides with the leftmost edge of scan(n) when it is a low-level signal, the width of the overlapping region of comp(n) and comp(n+1) is at its maximum value. It is understandable that the charging time cannot exceed this maximum value. In other words, the positive correlation between the charging time and the preset quantity is within a certain range.

[0061] Thus, the solution provided in this embodiment adjusts the charging time of the stored content in the second display area according to the number of sub-pixels driven by the driving transistor in the first display area, which can achieve a display effect in which the brightness of the first display area and the second display area are consistent, which is beneficial to improving the viewing experience.

[0062] In practical applications, considering that the charging time is fixed after the electronic device leaves the factory, the brightness difference between the first and second display areas increases with the duration of screen display. Therefore, in one embodiment, the electronic device can dynamically adjust the charging time. The electronic device stores a preset correspondence between display duration and charging time; for example, when the display duration is 30 minutes, the charging time is a1 ns, and when the display duration is 60 minutes, the charging time is a2 ns. Thus, in this example, by dynamically adjusting the charging time of the content stored in the second display area, a consistent brightness between the first and second display areas can be achieved, which is beneficial for improving the viewing experience.

[0063] The adjustment process of the above-mentioned electronic device is described below, with the first pixel circuit in the first display area implemented using a 6T2C circuit structure and the second pixel circuit in the second display area implemented using a 7T1C circuit structure.

[0064] First, the working process of the first pixel circuit using the 6T2C circuit structure includes:

[0065] 1. Initialization Phase

[0066] Referring to Figures 4(a) and 4(b), when em is a low-level signal, scan(n) is a high-level signal, and comp is a low-level signal, transistors T2, T3, T4, and T6 are in the on state, and the driving transistor DTFT is in the on state, while the other transistors are in the off state. At this time, the potentials at nodes a and b are equal, that is, the storage capacitor Cst is initialized VA=VB=Vint in preparation for writing pixel data Vdata later.

[0067] It should be noted that, for ease of understanding of the accompanying drawings, a rectangular marker block is provided near the transistor in the on state in each example of this disclosure. At the same time, an arrow indicating the direction of current flow is set.

[0068] 2. Compensation Phase

[0069] Referring to Figures 5(a) and 5(b), when em is a high-level signal, scan(n) is a high-level signal, and comp is a low-level signal, transistors T3, T4, and T6 are in the on state, and the driving transistor DTFT is also in the on state, while the other transistors are in the off state. At this time, the potential Va at node a is Vint, and the potential Vb at node b is ELVDD-|vth|.

[0070] 3. Data writing stage

[0071] Referring to Figures 6(a) and 6(b), when em and comp are both high-level signals and scan(n) is low-level signal, transistor T5 is in the on state, and the driving transistor DTFT is also in the on state, while the other transistors are in the off state. At this time, the potential Va at node a is Vdata, and the potential Vb at node b is (Vdata-Vint)*C1 / (C1+Cst)+ELVDD-|Vth|.

[0072] 4. Luminescence stage

[0073] Referring to Figures 7(a) and 7(b), when em is a low-level signal, comp is a high-level signal, and scan(n) is a high-level signal, transistor T2 is in the on state, and the driving transistor DTFT is also in the on state, while the other transistors are in the off state. At this time, the final DTFT VGS+|vth|=(Vdata-Vint)*C1 / (C1+Cst)+ELVDD-|Vth|-ELVDD+|Vth|=(Vdata-Vint)*C1 / (C1+Cst).

[0074] Based on stages 1 to 4 above, under ideal conditions, i.e., when the charging time for the storage capacitor Cst is sufficiently long, VGS + |Vth| = (Vdata - Vint) * C1 / (C1 + Cst). However, in reality, the charging time for the storage capacitor Cst is not infinitely long, and the ideal value (Vdata - Vint) * C1 / (C1 + Cst) cannot be reached within a finite time. This results in an error α * |Vth| between the actual and ideal values, meaning the actual value is (Vdata - Vint) * C1 / (C1 + Cst) + α * |Vth|. Based on the relationship between current and compensation information |vth|, I = 0.5K(VGS + |vth|). 2It can be seen that there is a positive correlation between current and compensation information |vth|. The longer the charging time, the greater the compensation information. Assuming that the error α*|Vth| remains unchanged, the longer the charging time, the smaller α becomes. This indicates that the pixel circuit has a stronger ability to reduce the influence of Vth on current, eventually causing the error to tend to 0.

[0075] Second, the working process of the second pixel circuit using the 7T1C circuit structure includes:

[0076] 1. Initialization Phase

[0077] Referring to Figures 8(a) and 8(b), when em is a high-level signal, scan(n) is a low-level signal, and scan(n+1) is a high-level signal, transistor T6 is in the on state, and the other transistors are in the off state. At this time, the potential VQ at node Q is Vint. If Vint is equal to elvdd, the storage capacitor Cst can be initialized, i.e., reset, in preparation for subsequent compensation.

[0078] 2. Compensation Phase

[0079] Referring to Figures 9(a) and 9(b), when em is a high-level signal, scan(n) is a high-level signal, and scan(n+1) is a low-level signal, transistors T4, T4, and T7 are turned on, and the driving transistor DTFT is also turned on. The remaining transistors are turned off. At this time, the ideal potential at node Q is VQ = Vdata - |vth|. The anode of the light-emitting diode D is reset to Vint.

[0080] In practical applications, the potential at node Q is related to the charging time. The driving transistor DTFT VGS = Vdata - |vth| + α * |vth|; the longer the compensation time, the smaller α becomes.

[0081] 3. Luminescence stage

[0082] Referring to Figures 10(a) and 10(b), when em is a low-level signal, scan(n) is a high-level signal, and scan(n+1) is a high-level signal, transistor T2 is turned on, and driving transistor DTFT is in the on state, while the other transistors are in the off state. At this time, VGS = Vdata - |vth| - elvdd.

[0083] Based on stages 1 to 3 above, in practical applications, I = 0.5K(VGS + |Vth|). 2 =0.5k(vdata-elvdd) 2 Ideally, the current in the light-emitting diode D is independent of the compensation signal Vth of the offset characteristic of the driving transistor DTFT.

[0084] Based on the analysis of the working process of the first pixel circuit (6T2C) and the second pixel circuit (7T1C), the following differences exist between the two in the compensation process: The 6T2C circuit structure provides the compensation signal Vth through a preset control signal elvdd. At this time, the comp signals of adjacent rows of pixel circuits in the display screen can have overlapping areas, with the effect as follows: Figure 11 As shown. In other words, the 6T2C circuit structure can extend the charging time of the storage capacitor Cst by increasing the overlap time of the low-level signals of adjacent rows of comp signals, thereby ensuring an increase in the compensation signal Vth and improving the current compensation effect of the driving transistor DTFT in the saturation-subthreshold operating state. The 7T1C circuit structure provides the compensation signal Vth through pixel data data. Since the pixel data data of adjacent rows of pixels are different, there cannot be an overlapping area. Therefore, the period of the low-level signal at scan is positively correlated with the row period, and the effect is as follows. Figure 12 As shown. At this point, the current compensation effect can be improved when the driving transistor DTFT is operating in the linear-saturation region.

[0085] Furthermore, since the driving transistor DTFT in the first display area is in the linear-saturation region and the driving transistor DTFT in the second display area is in the saturation-subthreshold region, the compensation for the characteristic shift can be enhanced by adjusting the charging time (or compensation time) of the second pixel circuit (i.e., the 6T2C circuit structure) in the second display area. This will make the brightness difference between the first and second display areas less than the set threshold, i.e., the brightness of the first and second display areas tend to be consistent.

[0086] exist Figures 1-12 Based on the illustrated electronic device, this disclosure also provides a display control method, see [link to relevant documentation]. Figure 13 The method includes:

[0087] In step 131, the current display duration of the display screen is obtained;

[0088] In step 132, based on the preset correspondence between display duration and charging time, a target charging time that matches the current display duration is determined;

[0089] In step 132, the charging time of the storage capacitor in the second pixel circuit is controlled to be the target charging time.

[0090] It should be noted that the current display duration can be counted from when the screen switches from black to light, and the current value read from the timer is the current display duration.

[0091] In this way, by dynamically adjusting the charging time of the stored content in the second display area, the brightness of the first and second display areas can be kept consistent, which is beneficial to improving the viewing experience.

[0092] exist Figures 1-12 Based on the illustrated electronic device, this disclosure also provides a display control method, see [link to relevant documentation]. Figure 14 The method includes:

[0093] In step 141, the current image of the display screen is acquired; the current image is captured when the display screen displays the target image after displaying a preset duration.

[0094] In step 142, when the brightness difference between the first display area and the second display area in the current image exceeds a set threshold, the charging time of the storage capacitor in the second pixel circuit is adjusted until the brightness difference is less than the set threshold.

[0095] It should be noted that the current image on the display screen can be captured using an external camera, such as... Figure 1 The image is captured when the display status is displayed and then stored in a designated location. This way, when the electronic device needs to adjust the display, such as when a user triggers a corresponding operation button, the electronic device can read the image from the designated location as the current image for processing. To ensure optimal adjustment, the time interval between capturing the image using the camera and triggering the operation button should be as short as possible (e.g., less than or equal to 5 minutes).

[0096] In this way, by using the current image on the display screen, the charging time of the stored content in the second display area can be dynamically adjusted, so as to achieve a display effect where the brightness of the first and second display areas is consistent, which is beneficial to improving the viewing experience.

[0097] Figure 15 This is a block diagram illustrating an electronic device according to an exemplary embodiment. For example, the electronic device 1500 may be a smartphone, computer, digital broadcasting terminal, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0098] Reference Figure 15 The electronic device 1500 may include one or more of the following components: a processing component 1502, a memory 1504, a power supply component 1506, a multimedia component 1508, an audio component 1510, an input / output (I / O) interface 1512, a sensor component 1514, a communication component 1516, an image acquisition component 1518, and the aforementioned housing.

[0099] Processing component 1502 typically controls the overall operation of electronic device 1500, such as operations associated with display, telephone calls, data communication, camera operation, and recording operations. Processing component 1502 may include one or more processors 1520 to execute computer programs. Furthermore, processing component 1502 may include one or more modules to facilitate interaction between processing component 1502 and other components. For example, processing component 1502 may include a multimedia module to facilitate interaction between multimedia component 1508 and processing component 1502.

[0100] Memory 1504 is configured to store various types of data to support the operation of electronic device 1500. Examples of such data include computer programs for any application or method operating on electronic device 1500, contact data, phone book data, messages, pictures, videos, etc. Memory 1504 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0101] Power supply component 1506 provides power to various components of electronic device 1500. Power supply component 1506 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 1500. Power supply component 1506 may include a power chip, and a controller may communicate with the power chip to control the power chip to turn on or off switching devices, enabling or disabling battery power to the motherboard circuitry.

[0102] Multimedia component 1508 includes a screen that provides an output interface between electronic device 1500 and target object. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input information from the target object. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation.

[0103] Audio component 1510 is configured to output and / or input audio file information. For example, audio component 1510 includes a microphone (MIC) configured to receive external audio file information when electronic device 1500 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio file information may be further stored in memory 1504 or transmitted via communication component 1516. In some embodiments, audio component 1510 also includes a speaker for outputting audio file information.

[0104] I / O interface 1512 provides an interface between processing component 1502 and peripheral interface modules, such as keyboards, click wheels, buttons, etc.

[0105] Sensor assembly 1514 includes one or more sensors for providing state assessments of various aspects of electronic device 1500. For example, sensor assembly 1514 can detect the on / off state of electronic device 1500, the relative positioning of components (e.g., the display screen and keypad of electronic device 1500), changes in position of electronic device 1500 or a component, the presence or absence of contact between a target object and electronic device 1500, the orientation or acceleration / deceleration of electronic device 1500, and temperature changes of electronic device 1500. In this example, sensor assembly 1514 may include a magnetic sensor, a gyroscope, and a magnetic field sensor, wherein the magnetic field sensor includes at least one of the following: a Hall sensor, a thin-film magnetoresistive sensor, and a magnetic fluid accelerometer.

[0106] Communication component 1516 is configured to facilitate wired or wireless communication between electronic device 1500 and other devices. Electronic device 1500 can access wireless networks based on communication standards, such as WiFi, 2G, 3G, 4G, 5G, or combinations thereof. In one exemplary embodiment, communication component 1516 receives broadcast information or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 1516 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0107] In an exemplary embodiment, the electronic device 1500 may be implemented by one or more application-specific integrated circuits (ASICs), digital information processors (DSPs), digital information processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components.

[0108] In an exemplary embodiment, an electronic device is also provided, comprising:

[0109] processor;

[0110] Memory for storing computer programs executable by the processor;

[0111] The processor is configured to execute a computer program in the memory to perform the steps of the method described above.

[0112] In an exemplary embodiment, a computer-readable storage medium is also provided, such as a memory including instructions, wherein the executable computer program described above can be executed by a processor to implement the steps of the method as described. The readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, or optical data storage device, etc.

[0113] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This disclosure is intended to cover any variations, uses, or adaptations that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0114] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. An electronic device, comprising: The display screen comprises a first display area and a second display area; the pixel density in the first display area is less than the pixel density in the second display area; The pixels in the first display area adopt a first pixel circuit, and the pixels in the second display area adopt a second pixel circuit; the charging time of a storage capacitor in the first pixel circuit and the second pixel circuit is different; the storage capacitor is used to connect the gate of a driving transistor and an elvdd signal; The compensation signal of the first pixel circuit is related to the pixel data of a local pixel; the compensation signal of the second pixel circuit is related to a preset control signal; the preset control signal is used to ensure that the compensation period of the second pixel circuit is irrelevant to the row period; There is an overlapping area of the preset control signals of two adjacent rows of pixels; the width of the overlapping area of the preset control signals of two adjacent rows of pixels is increased to prolong the charging time of the second pixel circuit; the charging time is in a positive correlation with the display time length of the display screen; The first pixel circuit is implemented by using a 7T1C circuit structure, and the second pixel circuit is implemented by using a 6T2C circuit structure. The driving circuit comprises a plurality of driving transistors; each driving transistor is used to drive a preset number of sub-pixels in the first display area; the preset number is greater than or equal to 2; 2. The electronic device of claim 1, wherein, The charging time is in a positive correlation with the preset number. The charging time is in a positive correlation with the display time length of the display screen.

3. The electronic device of claim 1, wherein, The processor is used to acquire the current display time length of the display screen; and based on a preset corresponding relationship between the display time length and the charging time, a target charging time matched with the current display time length is determined; and the charging time of the storage capacitor is controlled to be the target charging time.

4. The electronic device of claim 1, wherein, The processor is used to acquire a current image of the display screen; the current image is obtained by photographing when the display screen displays a target image after displaying for a preset time length; when the luminance difference between the first display area and the second display area in the current image exceeds a set threshold, the charging time of the storage capacitor in the second pixel circuit is adjusted until the luminance difference is less than the set threshold.

5. The electronic device of claim 1, wherein, The method is suitable for the electronic device of any one of claims 1-5, and the method comprises:

6. A display control method characterized by comprising: acquiring the current display time length of the display screen; based on a preset corresponding relationship between the display time length and the charging time, determining a target charging time matched with the current display time length; controlling the charging time of the storage capacitor in the second pixel circuit to be the target charging time. The method is suitable for the electronic device of any one of claims 1-5, and the method comprises:

7. A display control method characterized by comprising: acquiring a current image of the display screen; the current image is obtained by photographing when the display screen displays a target image after displaying for a preset time length; when the luminance difference between the first display area and the second display area in the current image exceeds a set threshold, adjusting the charging time of the storage capacitor in the second pixel circuit until the luminance difference is less than the set threshold. The electronic device comprises:

8. An electronic device, comprising: a processor; a memory used to store a computer program executable by the processor. ​ The processor is configured to execute a computer program in the memory to implement the method of claim 6 or 7.

9. A computer-readable storage medium, characterized in that, The executable computer program in the storage medium, when executed by the processor, can implement the method of claim 6 or 7.

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