An LED driver chip with power supply buffer circuit supporting no external input capacitor.

Abstract

This invention belongs to the field of LED driver technology, and particularly relates to an LED driver chip with a power buffer circuit that supports the elimination of external input capacitors. This invention, in traditional LED driver chips, adds an independent buffer capacitor to the driver stage of each channel. Utilizing the PWM period signal of the driver stage itself, in conjunction with the switching action of the large switching transistor in the driver stage, a power buffer circuit is constructed between the input power supply and the driver stage circuit. Timing control is then used to charge and discharge the buffer capacitor at appropriate times, thereby reducing interference and noise to the front-end input power supply and protecting the stability of the chip's internal power-sensitive circuitry. Compared to the traditional method of directly adding on-chip integrated capacitors to the input power supply, the total required capacitance can be significantly reduced.

Description

Technical Field

[0001] This invention belongs to the field of LED driver technology, and particularly relates to an LED driver chip with a power supply buffer circuit that supports no external input capacitor. Background Technology

[0002] LED driver chips are widely used in various display fields, broadly categorized into direct-view chips and backlight chips. As a type of power supply chip, LED driver chips typically require an input power filter capacitor at the input power supply pin to filter the input and regulate any sudden current surges within the chip's internal circuitry. This prevents power supply fluctuations generated by the chip itself from interfering with other internal circuits, particularly power-sensitive circuits such as reference generation circuits and PWM clock generation circuits. However, in practical applications, customers often desire LED driver chips that support no external input capacitor, primarily because:

[0003] 1. The cost of input capacitors. For example, in the field of local dimming LED backlighting, there may be hundreds of LED zone backlight driver chips in a system. If each chip requires an input capacitor for voltage regulation, the cost of the capacitor will greatly contribute to the system cost.

[0004] 2. Due to the presence of the input capacitor, the overall solution occupies too much PCB area, resulting in insufficient competitiveness;

[0005] 3. External input capacitors affect the uniform light distribution of peripheral LED chips, especially given the current industry trend towards zero OD (out-of-chip) performance, which places new demands on the size and even height of the overall PCB solution. Therefore, supporting LED driver chips without external input capacitors (VIN capless) presents a significant new challenge in this field.

[0006] As the circuit module that generates the largest current and suffers the worst inrush current within an LED driver chip, the design of the driver stage is crucial. Since the driver stage typically occupies half or even more of the LED chip area, and the ultra-large switching transistors within it continuously switch on and off at high frequencies, the driver stage presents the greatest challenge to achieving VIN capless operation in LED driver chips.

[0007] Currently, there are roughly two ways to achieve the voltage regulation requirement of LED driver chips:

[0008] 1. Traditional Method 1: This involves adding an input voltage regulator capacitor around each chip to ensure that the inrush current generated by different modules within the chip does not interfere with each other. The advantage is that the capacitor value is generally large, resulting in a noticeable effect. The disadvantages are, as mentioned above, increased cost, increased solution area, and uneven light distribution on the surrounding LED chips. Figure 1 In the diagram, capacitor C1 is the external input voltage regulator capacitor. In a large-scale multi-string LED system, there will be many such LED_DRIVER_ICs, meaning that each chip needs a capacitor like C1 connected externally to each chip.

[0009] 2. Traditional Method 2: This involves designing a large number of input capacitors inside the chip, essentially moving external capacitors to the chip's internal structure to help customers save on external components. For example, if the parasitic ripple of the driver-stage switch is in the 50pF range with a 5V turn-on voltage, and the desired input voltage ripple is filtered to 0.2V, at least 1.3nF of capacitors are required on-chip. However, due to limited internal chip area, the integrated capacitors are typically only in the hundreds of pF range. Integrating nF-level capacitors results in significant chip overhead and is much smaller than external uF-level capacitors. The actual voltage regulation and filtering effect is poor. Figure 2 The capacitor C2 in the figure is the power supply regulator capacitor inside the integrated chip. Due to the limitations of chip manufacturing process, the capacitance density cannot be made high, and the capacitance value of the chip is generally around 100pF. Summary of the Invention

[0010] To address the aforementioned issues, this invention proposes an LED driver chip with a power supply buffer circuit that supports the elimination of external input capacitors.

[0011] The technical solution of this invention is as follows:

[0012] An LED driver chip with a power buffer circuit supporting no external input capacitor is disclosed. The LED driver chip includes multiple PWM drive circuits and switching transistors. The power input terminal of each PWM drive circuit is connected to the power supply terminal of the LED driver chip. The output of each PWM drive circuit is connected to the gate of a switching transistor, the drain of the switching transistor is connected to an external LED path, and the source of the switching transistor is connected to a current source. A power buffer circuit is also provided between each PWM drive circuit and the power supply terminal of the LED driver chip. The power buffer circuit includes a first switch, a second switch, a third switch, a first resistor, a second resistor, and a capacitor. One end of the third switch is connected to the power supply terminal, and the other end is connected to the power input terminal of the PWM drive circuit. The first resistor is connected in parallel with the third switch. One end of the second resistor is connected to the power supply terminal. The first switch is connected to a second switch, the other end of which is connected to one end of the first switch and one end of a capacitor. The other end of the first switch is connected to the power input terminal of the PWM drive circuit, and the other end of the capacitor is grounded. The control signal of the first switch is defined as the first switch control signal. Compared with the PWM input signal of the PWM drive circuit, the rising edge of the first switch control signal arrives earlier than the rising edge of the PWM input signal, and its falling edge also arrives earlier than the falling edge of the PWM input signal (the specific pulse width of the first switch control signal is flexibly set according to the specific actual situation). The control signals of the second and third switches are the same and are defined as the second switch control signal, which is the inverse of the first switch control signal.

[0013] The beneficial effects of this invention are as follows: By adding an independent buffer capacitor to the driver stage of each channel in a traditional LED driver chip, and utilizing the PWM period signal of the driver stage itself, in conjunction with the switching action of the large switching transistor in the driver stage, a power buffer circuit is constructed between the input power supply and the driver stage circuit. Then, timing control is used to charge and discharge the buffer capacitor at appropriate times, thereby reducing interference and noise to the front-end input power supply and protecting the stability of the power-sensitive circuit inside the chip. Compared with the traditional method of directly adding an on-chip integrated capacitor to the input power supply, the total capacitance value required can be greatly reduced. Attached Figure Description

[0014] Figure 1 A schematic diagram illustrating the traditional method of adding an input voltage regulator capacitor to each chip to achieve power supply regulation;

[0015] Figure 2 A schematic diagram illustrating a method for achieving power supply regulation by integrating the input voltage regulator capacitor onto a single chip.

[0016] Figure 3 A schematic diagram of the internal driver stage and power supply module of a typical LED driver chip;

[0017] Figure 4 This is a schematic diagram of the driver stage for implementing a power supply buffer circuit that does not require an external input capacitor, as proposed in this invention.

[0018] Figure 5 This is a timing diagram of the control signals for implementing a power supply buffer circuit that does not require an external input capacitor, as proposed in this invention. Detailed Implementation

[0019] The technical solution of the present invention will now be described in detail with reference to the accompanying drawings.

[0020] Figure 3 This is a typical schematic diagram of the internal driver stage and power supply of an LED driver chip. To ensure high accuracy of the output current VLED1–VLEDn, the output stage generally consists of two layers of circuitry: a high-precision tail current source at the bottom and a power switching transistor at the top, namely "PWR_FET" in the diagram. Due to the application's requirement for dropout voltage, the PWR_FET is relatively large to ensure support for a small dropout voltage. This places demands on the power supply capability of the driver circuits in its front-end channels, resulting in a large inrush current during switching, which in turn generates significant interference and noise in the power supply. Because the PWR_FET turns on and off according to the switching requirements of the front-end logic signals "PWM_CH1"–"PWM_CHn", each turn-on and turn-off of the PWR_FET actually charges and discharges the parasitic capacitances of the switching transistor, namely Cgd and Cgs in the diagram. The power supply for charging and discharging is directly obtained from the input power supply, VIN, through the driver stage. In addition to the driver stage circuitry, the chip also requires many other analog sensitive circuits, such as voltage references, current references, internal clock generation circuits, phase-locked loops, etc. When the driver switches the PWR_FET, it introduces significant power-draining interference to VIN, directly affecting other noise-sensitive analog circuits on the chip. Therefore, power supply regulation is essential.

[0021] This invention proposes a driver-stage power supply design for LED driver chips that supports VIN capless operation by utilizing a power supply buffer circuit. Figure 4 The diagram shows a single-channel circuit design extracted from the chip's internal structure. When the LED driver chip requires multiple outputs, this can be achieved by continuously replicating the relevant driver stage and the power buffer circuit of this invention. The specific working principle is as follows:

[0022] When the current channel driver receives a periodic level signal from the front end, i.e., PWM_CHx, and requests VLEDx to output current to light up the external LED, the driver stage needs to instantaneously charge the PWR_FET. This is due to the existence of the power supply buffer circuit. Figure 4 The "AUX supply network" refers to a power supply network where the inrush current is not directly drawn from Cvin or the on-chip power supply. Specifically, switch SW3 is turned off early, while switch SW1 is turned on early, connecting Caux to the driver stage. Caux and Raux together form a power network, ensuring the inrush current supplies power to the driver stage through path I1 in the diagram. Simultaneously, Raux provides a subsequent gradually decreasing supplementary current, i.e., path I2 in the diagram. Both work together to ensure that no inrush current is seen at the VIN input power supply. After ensuring the PWR_FET is fully turned on (this time is typically between 10ns and 100ns; this patent designs the PWM_CHx_pulse width according to the specific application scenario), switch SW1 is turned off, and switches SW2 and SW3 are turned on. The activation of SW3 ensures strong noise immunity for the subsequent driver stage. Since the driver stage has already charged the PWR_FET, there is no large inrush current; SW3's primary function is noise suppression. Additionally, by turning on SW2, the voltage regulator capacitor Caux, which was previously drained due to a rapid power surge, is recharged, as shown in the recharge path I3 in the diagram. Although there is a significant voltage difference between Caux and the input voltage due to the previous power drain, the addition of Rchg ensures that there is no large inrush current when recharging the power supply buffer capacitor Caux. This is because Caux can be charged for almost the entire cycle of PWM_CHx_pulse, so Rchg can be appropriately large to further reduce the surge current seen by the input power supply. This ensures that there is no large surge current (inrush current) at any stage of PWM (i.e., the instant PWR_FET turns on and the Caux recharge time). The value of Caux only needs to be slightly larger than the values ​​of the parasitic capacitances Cgd and Cgs. Cvin in the diagram is a simple input power supply filter capacitor. Due to the presence of the driver-stage power supply buffer circuit, the capacitance requirement of Cvin is greatly reduced, compared to the requirement of 10 times or even higher for on-chip integration, significantly reducing on-chip capacitor overhead. Figure 5 This is a timing diagram of the corresponding control signal of the power supply buffer circuit proposed in this invention. It can be seen that its switching time is earlier than that of the PWM drive circuit, but the specific pulse width is set according to the actual application scenario.

Claims

1. An LED driver chip with a power buffer circuit supporting no external input capacitor, the LED driver chip comprising multiple PWM drive circuits and switching transistors, wherein the power input terminal of each PWM drive circuit is connected to the power supply terminal of the LED driver chip, the output of the PWM drive circuit is connected to the gate of a switching transistor, the drain of the switching transistor is connected to an external LED path, and the source of the switching transistor is connected to a current source; characterized in that, A power buffer circuit is also provided between the power supply terminals of each PWM drive circuit and the LED driver chip. The power buffer circuit includes a first switch, a second switch, a third switch, a first resistor, a second resistor, and a capacitor. One end of the third switch is connected to the power supply terminal, and the other end is connected to the power input terminal of the PWM drive circuit. The first resistor is connected in parallel with the third switch. One end of the second resistor is connected to the power supply terminal, and the other end is connected to one end of the second switch. The other end of the second switch is connected to one end of the first switch and one end of the capacitor. The other end of the first switch is connected to the power input terminal of the PWM drive circuit, and the other end of the capacitor is grounded. The control signal of the first switch is defined as the first switch control signal. Compared with the PWM input signal of the PWM drive circuit, the rising edge of the first switch control signal arrives earlier than the rising edge of the PWM input signal, and its falling edge also arrives earlier than the falling edge of the PWM input signal. At the same time, the falling edge of the first switch control signal arrives later than the rising edge of the PWM input signal. The control signals of the second switch and the third switch are the same and are defined as the second switch control signal, which is the inverted signal of the first switch control signal.

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