Source chip voltage configuration method, device and electronic equipment

Abstract

The disclosed embodiments provide a method, device, and electronic device for configuring the voltage of a source chip. The method includes: determining the current first voltage value of the source chip, wherein the first voltage value includes at least a gamma reference high voltage value and a gamma reference low voltage value; determining a second voltage value that satisfies a predetermined condition among the first voltage values ​​of all source chips; and sending the second voltage value to each source chip to configure each source chip according to the second voltage value. In the disclosed embodiments, each source chip sends its current first voltage value to a timing controller. The timing controller determines a second voltage value that satisfies the condition among all received first voltage values, and then uses the second voltage value to configure each source chip. The voltage values ​​configured to each source chip are consistent, and the working states are completely consistent. The screen will not have poor image quality issues such as split screen display, thereby improving product performance.

Description

Technical Field

[0001] The present disclosure relates to the field of communications, and in particular to a voltage configuration method and device for a source chip, and an electronic device. Background Art

[0002] As OLED technology continues to mature, more and more electronic products are adopting OLED as their display panels. OLED screens are already widely used in mobile phones, enhancing display quality and boosting their market competitiveness. Simultaneously, OLED is also making its way into medium- and large-sized electronic products (such as tablets and notebooks). The widespread adoption of OLED in medium- and large-sized electronic products clearly marks a new phase in the development of OLED technology.

[0003] Since medium and large-sized products use RealRGB pixel design, they need SourceIC (source chip) to support more Source (data source) channels than small-sized products. However, considering factors such as IC cost and volume, the number of supported channels cannot be increased indefinitely. To solve this problem, current designs all use multiple SourceICs (greater than or equal to 3 SourceICs), for example. Figure 1 The structural diagram shown.

[0004] Obviously, to ensure a good display effect, the theoretical requirement is that the operating states of multiple source ICs be completely synchronized and consistent. However, existing methods cannot achieve completely consistent operating states for multiple source ICs. When the VGMAH / L (gamma reference high / low voltage) input voltages between source ICs are inconsistent, poor image quality issues such as display splitting can occur, affecting product performance. Summary of the Invention

[0005] In view of this, the embodiments of the present disclosure propose a voltage configuration method, device, and electronic device for a source chip to solve the following problems in the prior art: the operating states of multiple Source ICs cannot be completely consistent. When the VGMAH / L voltages input between the Source ICs are inconsistent, poor image quality problems such as display splitting will occur, affecting product performance.

[0006] On the one hand, an embodiment of the present disclosure proposes a voltage configuration method for a source chip, including: determining a current first voltage value of the source chip, wherein the first voltage value includes at least a gamma reference high voltage value and a gamma reference low voltage value; determining a second voltage value that meets a predetermined condition among the first voltage values ​​of all source chips; and sending the second voltage value to each source chip to configure each source chip according to the second voltage value.

[0007] In some embodiments, determining the current first voltage value of the source chip includes: receiving a first register value from the source chip; and determining the first voltage value of the source chip according to a mapping relationship between the first register value and a predetermined voltage register.

[0008] In some embodiments, determining a second voltage value that satisfies a predetermined condition among the first voltage values ​​of all source chips includes: determining a gamma reference high voltage value with the largest voltage value among all gamma reference high voltage values, and determining a gamma reference low voltage value with the smallest voltage value among all gamma reference low voltage values.

[0009] In some embodiments, the sending the second voltage value to each source chip includes: determining a second register value according to a mapping relationship between the second voltage value and the predetermined voltage register;

[0010] The second register value is sent to each source chip.

[0011] In some embodiments, before determining the current first voltage value of the source chip, it also includes: the source chip determines the predetermined voltage range in which the first voltage value is located among multiple predetermined voltage ranges, and determines the first register value based on the determined predetermined voltage range and the predetermined voltage register mapping relationship; or, the source chip determines the first register value based on the first voltage value and the predetermined voltage register mapping relationship; the source chip sends the first register value to the timing controller.

[0012] On the other hand, an embodiment of the present disclosure proposes a voltage configuration device for a source chip, including: a first determination module for determining the current first voltage value of the source chip, wherein the first voltage value includes at least a gamma reference high voltage value and a gamma reference low voltage value; a second determination module for determining a second voltage value that meets a predetermined condition among the first voltage values ​​of all source chips; and a sending module for sending the second voltage value to each source chip to configure each source chip according to the second voltage value.

[0013] In some embodiments, the first determining module is specifically configured to: receive a first register value from a source chip; and determine the first voltage value of the source chip according to a mapping relationship between the first register value and a predetermined voltage register.

[0014] In some embodiments, the second determining module is specifically configured to: determine a gamma reference high voltage value with a maximum voltage value among all gamma reference high voltage values, and determine a gamma reference low voltage value with a minimum voltage value among all gamma reference low voltage values.

[0015] In some embodiments, the sending module is specifically configured to: determine a second register value according to a mapping relationship between the second voltage value and the predetermined voltage register; and send the second register value to each source chip.

[0016] On the other hand, an embodiment of the present disclosure provides an electronic device, which includes at least a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the method provided in any embodiment of the present disclosure when executing the computer program in the memory.

[0017] In the disclosed embodiment, the source chips will all send their current first voltage values ​​to the timing controller. The timing controller determines a second voltage value that meets the conditions from all the received first voltage values, and then uses the second voltage value to configure each source chip. The voltage values ​​configured to each source chip are consistent, and the working states are completely consistent. The screen will not have poor image quality problems such as split screen display, thereby improving product performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0019] Figure 1 Design schematics of multiple Source ICs provided by existing technologies;

[0020] Figure 2 Schematic diagram of the improved design of multiple Source ICs provided by existing technology Figure 1 ;

[0021] Figure 3 Schematic diagram of the improved design of multiple Source ICs provided by existing technology Figure 2 ;

[0022] Figure 4 A flow chart of a voltage configuration method for a source chip provided in the first embodiment of the present disclosure;

[0023] Figure 5 A schematic diagram of an interactive system between a source chip and a timing controller provided in the first embodiment of the present disclosure;

[0024] Figure 6 Schematic diagram of the predetermined voltage register mapping relationship provided in the first embodiment of the present disclosure Figure 1 ;

[0025] Figure 7Schematic diagram of the predetermined voltage register mapping relationship provided in the first embodiment of the present disclosure Figure 2 ;

[0026] Figure 8 A schematic structural diagram of a voltage configuration device for a source chip provided in a second embodiment of the present disclosure;

[0027] Figure 9 A schematic structural diagram of an electronic device provided in the third embodiment of the present disclosure. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0029] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0030] In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of known functions and known components.

[0031] In the prior art, in order to solve the synchronization problem, a TCON (timing controller) is added to the product design to adjust the coordination of multiple Source ICs.

[0032] Existing designs can be Figure 2 As shown, the display consistency issue is achieved by simply connecting the source IC gamma voltages (i.e., VGMAH / L) in parallel. This obviously places certain demands on the PCB and FPC trace design, requiring ample trace space to connect the gamma voltages between the source ICs in parallel.

[0033] As we all know, each Source IC can actually generate Gamma voltage, so the existing design is as follows Figure 3 The solution shown only connects the VGMAH / L of each Source IC in parallel. This solution relieves routing pressure and saves PCB and FPC routing space. However, if the VGMAH / L voltages between the input Source ICs are inconsistent, poor image quality problems such as display splitting may occur.

[0034] In order to solve the above problems, the first embodiment of the present disclosure provides a voltage configuration method for a source chip. The process of the method is as follows: Figure 4 As shown, the interactive system between the source chip and the timing controller is as follows Figure 5 As shown, it includes steps S401 to S403:

[0035] S401 , determining a current first voltage value of a source chip, wherein the first voltage value at least includes a gamma reference high voltage value and a gamma reference low voltage value.

[0036] The above-mentioned first voltage value is determined by the source chip according to the voltage value configured by the power management chip (PMIC for short). The voltage values ​​configured by the power management chip for each source chip are the same, but due to the differences in the routing due to the setting positions of each source chip, the first voltage values ​​actually received by each source chip will be different.

[0037] In the process of determining the current first voltage value of the source chip, the timing controller exchanges digital signals with the source chip. Therefore, the processing of the digital signal can be simplified by configuring a predetermined voltage register mapping relationship. The predetermined voltage register mapping relationship can be as follows: Figure 6 The mapping relationship table shown records the first register value corresponding to the first voltage value. By sending the first register value, the first voltage value can be digitized; of course, the first voltage value can also be directly binary digitized, which is not limited in the embodiment of the present disclosure.

[0038] In the case that a predetermined voltage register mapping relationship exists, the timing controller receives a first register value from the source chip, and then determines a first voltage value of the source chip according to the first register value and the predetermined voltage register mapping relationship.

[0039] During the interaction process, the source chip needs to generate the first register value first, that is, before determining the current first voltage value of the source chip, the source chip can determine the first register value based on the first voltage value and the predetermined voltage register mapping relationship, and then send the first register value to the timing controller. Of course, the predetermined voltage register mapping relationship can also be as follows Figure 7The mapping relationship table shown is relative to Figure 6 , multiple predetermined voltage ranges are added, then the source chip determines the predetermined voltage range in which the first voltage value is located in the multiple predetermined voltage ranges, and determines the first register value according to the determined predetermined voltage range and the predetermined voltage register mapping relationship. In this case, when the number of source chips is large, the different first voltage values ​​received by the multiple source chips may fall into the same predetermined voltage range. For example, when there are three source chips with first voltage values ​​of 6.85V, 6.9V and 6.91V, according to Figure 7 The predetermined voltage register mapping relationship shown can determine that they all fall within the same predetermined voltage range, the corresponding first register value is the same, and the first register value sent to the timing controller is also the same value. This method is conducive to data normalization processing.

[0040] S402 , determining a second voltage value that meets a predetermined condition among the first voltage values ​​of all source chips.

[0041] For example, there are three source chips. When the first voltage value is the gamma reference high voltage value, the second voltage value that meets the predetermined conditions is a gamma reference high voltage value with the largest voltage value determined among all gamma reference high voltage values. The gamma reference high voltage value with the largest voltage value is the second voltage value; the first voltage value received by the first source chip is 6.9V, the first voltage value received by the second source chip is 6.7V, and the first voltage value received by the third source chip is 6.5V. At this time, the second voltage value is 6.9V.

[0042] For example, there are three source chips. When the first voltage value is the gamma reference low voltage value, the second voltage value that meets the predetermined conditions is to determine a gamma reference low voltage value with the smallest voltage value among all gamma reference low voltage values, and the gamma reference low voltage value with the smallest voltage value is the second voltage value; the first voltage value of the first source chip received is 6.9V, the first voltage value of the second source chip received is 6.7V, and the first voltage value of the third source chip received is 6.5V. At this time, the second voltage value is 6.5V.

[0043] Since gamma voltages exist in pairs, the first voltage value at least includes a pair of gamma voltage values, ie, a gamma reference high voltage value and a gamma reference low voltage value.

[0044] S403: Send the second voltage value to each source chip to configure each source chip according to the second voltage value.

[0045] If the first voltage value is a digitized first register value, then in a specific implementation, the second register value can be determined based on the second voltage value and the predetermined voltage register mapping relationship, and the second register value can be sent to each source chip. Then, each source chip receives digitized data, and the source chip then determines the second voltage value to be configured based on the predetermined voltage register mapping relationship stored locally with the second register value.

[0046] In the disclosed embodiment, the source chips will all send their current first voltage values ​​to the timing controller. The timing controller determines a second voltage value that meets the conditions from all the received first voltage values, and then uses the second voltage value to configure each source chip. The voltage values ​​configured to each source chip are consistent, and the working states are completely consistent. The screen will not have poor image quality problems such as split screen display, thereby improving product performance.

[0047] The disclosed embodiment proposes a design solution for maintaining the consistency of Gamma voltage of multiple Source ICs suitable for medium and large sizes. Through this design solution, on the one hand, the wiring pressure of PCB & FPC can be alleviated and space can be saved, and the problem of poor display caused by inconsistent Gamma voltage can be fundamentally solved. In specific implementation, the input voltage of Source IC can be divided into two parts: analog power supply and digital power supply. Among them, VGMAH / L is used as the Gamma reference voltage to determine the Gamma voltage of each Source IC. Taking VGMAH as an example, when the PMIC outputs VGMAH to multiple Source ICs at the same time, due to factors such as wiring impedance, the voltage actually received by each Source IC cannot be guaranteed to be consistent. In this case, different gears can be set inside the Source IC (i.e., the predetermined voltage register mapping relationship table, please refer to the above Figure 7 ), when the voltage received by the Source IC falls between 6.8 and 7.0V, the register value for the configured voltage is directly mapped to 00, and the actual voltage value is directly set to 6.9V, and so on. When the Source IC receives the voltage, it first determines it internally and passes the register value mapped by the lookup table to the TCON. The TCON then determines the register values ​​of multiple Source ICs and selects the maximum value. Finally, the TCON passes the maximum register value to each Source IC. At this time, each Source IC will configure VGMAH according to the same register value received from the TCON. This ensures that each Source IC uses the same reference voltage when generating the gamma voltage, thereby ensuring the uniformity of the display.

[0048] The second embodiment of the present disclosure provides a voltage configuration device for a source chip. The structure of the device is shown in FIG. Figure 8As shown, including:

[0049] A first determination module 10 is used to determine the current first voltage value of the source chip, wherein the first voltage value includes at least a gamma reference high voltage value and a gamma reference low voltage value; a second determination module 20 is coupled to the first determination module 10, and is used to determine a second voltage value that meets a predetermined condition among the first voltage values ​​of all source chips; a sending module 30 is coupled to the second determination module 20, and is used to send the second voltage value to each source chip so as to configure each source chip according to the second voltage value.

[0050] The above-mentioned first voltage value is determined by the source chip according to the voltage value configured by the power management chip (PMIC for short). The voltage values ​​configured by the power management chip for each source chip are the same, but due to the differences in the routing due to the setting positions of each source chip, the first voltage values ​​actually received by each source chip will be different.

[0051] In the process of determining the current first voltage value of the source chip, the timing controller interacts with the source chip via digital signals. Therefore, the digital signal processing process can be simplified by configuring a predetermined voltage register mapping relationship. The mapping relationship records the first register value corresponding to the first voltage value. By sending the first register value, the first voltage value can be digitized. Of course, the first voltage value can also be directly processed into binary digitization, which is not limited in the embodiments of the present disclosure.

[0052] In the case where a predetermined voltage register mapping relationship exists, the first determining module is specifically configured to: receive a first register value from the source chip; and determine a first voltage value of the source chip according to the first register value and the predetermined voltage register mapping relationship.

[0053] During the interaction process, the source chip needs to generate a first register value first, that is, before determining the current first voltage value of the source chip, the source chip can determine the first register value based on the first voltage value and the predetermined voltage register mapping relationship, and then send the first register value to the timing controller. Of course, the above-mentioned predetermined voltage register mapping relationship can also be a mapping relationship table with multiple predetermined voltage ranges added. The source chip determines the predetermined voltage range in which the first voltage value is located in the multiple predetermined voltage ranges, and determines the first register value based on the determined predetermined voltage range and the predetermined voltage register mapping relationship. In this case, when the number of source chips is large, the different first voltage values ​​received by multiple source chips may fall into the same predetermined voltage range. For example, when there are three source chips with first voltage values ​​of 6.85V, 6.9V and 6.91V, according to Figure 7The predetermined voltage register mapping relationship shown can determine that they all fall within the same predetermined voltage range, the corresponding first register value is the same, and the first register value sent to the timing controller is also the same value. This method is conducive to data normalization processing.

[0054] The second determining module is specifically configured to: determine a gamma reference high voltage value with a maximum voltage value among all gamma reference high voltage values, and determine a gamma reference low voltage value with a minimum voltage value among all gamma reference low voltage values.

[0055] Since gamma voltages exist in pairs, the first voltage value at least includes a pair of gamma voltage values, ie, a gamma reference high voltage value and a gamma reference low voltage value.

[0056] For example, there are three source chips. When the first voltage value is the gamma reference high voltage value, the second voltage value that meets the predetermined conditions is a gamma reference high voltage value with the largest voltage value determined among all gamma reference high voltage values. The gamma reference high voltage value with the largest voltage value is the second voltage value; the first voltage value received by the first source chip is 6.9V, the first voltage value received by the second source chip is 6.7V, and the first voltage value received by the third source chip is 6.5V. At this time, the second voltage value is 6.9V.

[0057] For example, there are three source chips. When the first voltage value is the gamma reference low voltage value, the second voltage value that meets the predetermined conditions is to determine a gamma reference low voltage value with the smallest voltage value among all gamma reference low voltage values, and the gamma reference low voltage value with the smallest voltage value is the second voltage value; the first voltage value of the first source chip received is 6.9V, the first voltage value of the second source chip received is 6.7V, and the first voltage value of the third source chip received is 6.5V. At this time, the second voltage value is 6.5V.

[0058] If the first voltage value is a digitized first register value, the sending module is specifically configured to: determine the second register value based on the second voltage value and a predetermined voltage register mapping relationship; and send the second register value to each source chip. Each source chip receives digitized data, and then determines the second voltage value to be configured based on the second register value and the predetermined voltage register mapping relationship stored locally.

[0059] In the disclosed embodiment, the source chips will all send their current first voltage values ​​to the timing controller. The timing controller determines a second voltage value that meets the conditions from all the received first voltage values, and then uses the second voltage value to configure each source chip. The voltage values ​​configured to each source chip are consistent, and the working states are completely consistent. The screen will not have poor image quality problems such as split screen display, thereby improving product performance.

[0060] The third embodiment of the present disclosure provides an electronic device. The structural diagram of the electronic device can be as follows: Figure 9 As shown, the electronic device comprises at least a memory 901 and a processor 902. The memory 901 stores a computer program. The processor 902 implements the method provided by any embodiment of the present disclosure when executing the computer program on the memory 901. Exemplarily, the electronic device computer program steps S21 to S23 are as follows:

[0061] S21, determining a current first voltage value of the source chip, wherein the first voltage value at least includes a gamma reference high voltage value and a gamma reference low voltage value;

[0062] S22, determining a second voltage value that meets a predetermined condition among the first voltage values ​​of all source chips;

[0063] S23, sending the second voltage value to each source chip to configure each source chip according to the second voltage value.

[0064] When the processor executes the computer program stored in the memory for determining the current first voltage value of the source chip, it specifically executes the following computer program: receiving the first register value from the source chip; and determining the first voltage value of the source chip according to the mapping relationship between the first register value and the predetermined voltage register.

[0065] When the processor executes a computer program stored in the memory for determining a second voltage value that meets a predetermined condition among the first voltage values ​​of all source chips, the processor specifically executes the following computer program: determining a gamma reference high voltage value with the largest voltage value among all gamma reference high voltage values, and determining a gamma reference low voltage value with the smallest voltage value among all gamma reference low voltage values.

[0066] When executing the computer program stored in the memory for sending the second voltage value to each source chip, the processor specifically executes the following computer program: determining the second register value according to the second voltage value and the predetermined voltage register mapping relationship; and sending the second register value to each source chip.

[0067] Before the processor executes the computer program stored in the memory for determining the current first voltage value of the source chip, the source chip side also executes the following computer program: determining the predetermined voltage range in which the first voltage value is located among multiple predetermined voltage ranges, and determining the first register value based on the determined predetermined voltage range and the predetermined voltage register mapping relationship; or, determining the first register value based on the first voltage value and the predetermined voltage register mapping relationship; and sending the first register value to the timing controller.

[0068] In the disclosed embodiment, the source chips will all send their current first voltage values ​​to the timing controller. The timing controller determines a second voltage value that meets the conditions from all the received first voltage values, and then uses the second voltage value to configure each source chip. The voltage values ​​configured to each source chip are consistent, and the working states are completely consistent. The screen will not have poor image quality problems such as split screen display, thereby improving product performance.

[0069] The design scheme for maintaining the gamma voltage consistency of multiple Source ICs in the disclosed embodiment can not only solve the problem of the existing parallel design scheme occupying a large amount of routing space, but also avoid the risk of split-screen display in the existing design scheme and improve the reliability of the product. The feasibility of this design scheme has been discussed with relevant IC design manufacturers. It will not bring negative impacts such as cost to IC design, and greatly reduces the complexity of subsequent medium and large-size designs. It is also conducive to reducing the size of PCB & FPC and has certain benefits for the overall product cost.

[0070] Furthermore, although exemplary embodiments have been described herein, the scope includes any and all embodiments based on the present disclosure with equivalent elements, modifications, omissions, combinations (e.g., solutions that intersect various embodiments), adaptations, or changes. The elements in the claims are to be interpreted broadly based on the language employed in the claims and are not limited to the examples described in this specification or during the prosecution of this application, which examples are to be interpreted as non-exclusive. Therefore, this specification and examples are intended to be considered as examples only, with the true scope and spirit being indicated by the following claims and the full scope of their equivalents.

[0071] The above description is intended to be illustrative and not restrictive. For example, the above examples (or one or more schemes thereof) can be used in combination with each other. For example, a person of ordinary skill in the art may use other embodiments when reading the above description. In addition, in the above-mentioned specific embodiments, various features can be grouped together to simplify the present disclosure. This should not be interpreted as an intention that a disclosed feature that is not required to be protected is necessary for any claim. On the contrary, the subject matter of the present disclosure may be less than all the features of a specific disclosed embodiment. Thus, the following claims are incorporated into the specific embodiments as examples or embodiments, wherein each claim is independently a separate embodiment, and it is considered that these embodiments can be combined with each other in various combinations or arrangements. The scope of the present disclosure should be determined with reference to the appended claims and the full scope of equivalents to which these claims are entitled.

[0072] The above describes in detail multiple embodiments of the present disclosure, but the present disclosure is not limited to these specific embodiments. Those skilled in the art can make various variations and modifications to the embodiments based on the concepts of the present disclosure, and these variations and modifications should all fall within the scope of protection claimed by the present disclosure.

Claims

1. A voltage configuration method for a source chip, characterized in that: include: Determine a current first voltage value of the source chip, wherein the first voltage value at least includes a gamma reference high voltage value and a gamma reference low voltage value; Determining a second voltage value that meets a predetermined condition among the first voltage values ​​of all source chips; sending the second voltage value to each source chip to configure each source chip according to the second voltage value; The determining of the current first voltage value of the source chip includes: receiving a first register value from a source chip; The first voltage value of the source chip is determined according to a mapping relationship between the first register value and a predetermined voltage register.

2. The method according to claim 1, wherein The determining of a second voltage value satisfying a predetermined condition from among the first voltage values ​​of all source chips includes: A gamma reference high voltage value having a maximum voltage value is determined among all the gamma reference high voltage values, and a gamma reference low voltage value having a minimum voltage value is determined among all the gamma reference low voltage values.

3. The method according to claim 2, wherein The sending the second voltage value to each source chip includes: Determine a second register value according to a mapping relationship between the second voltage value and the predetermined voltage register; The second register value is sent to each source chip.

4. The method according to any one of claims 1 to 3, characterized in that Before determining the current first voltage value of the source chip, the method further includes: The source chip determines a predetermined voltage range in which the first voltage value is located from a plurality of predetermined voltage ranges, and determines the first register value according to a mapping relationship between the determined predetermined voltage range and the predetermined voltage register; or the source chip determines the first register value according to the first voltage value and the predetermined voltage register mapping relationship; The source chip sends the first register value to the timing controller.

5. A voltage configuration device for a source chip, characterized in that: include: A first determining module is configured to determine a current first voltage value of the source chip, wherein the first voltage value at least includes a gamma reference high voltage value and a gamma reference low voltage value; a second determining module, configured to determine a second voltage value that satisfies a predetermined condition among the first voltage values ​​of all source chips; a sending module, configured to send the second voltage value to each source chip, so as to configure each source chip according to the second voltage value; The first determining module is specifically configured to: receiving a first register value from a source chip; The first voltage value of the source chip is determined according to a mapping relationship between the first register value and a predetermined voltage register.

6. The device according to claim 5, characterized in that The second determining module is specifically configured to: A gamma reference high voltage value having a maximum voltage value is determined among all the gamma reference high voltage values, and a gamma reference low voltage value having a minimum voltage value is determined among all the gamma reference low voltage values.

7. The device according to claim 6, characterized in that The sending module is specifically used for: Determine a second register value according to a mapping relationship between the second voltage value and the predetermined voltage register; The second register value is sent to each source chip.

8. An electronic device comprising at least a memory and a processor, wherein the memory stores a computer program, wherein: The processor implements the steps of the method of any one of claims 1 to 4 when executing the computer program on the memory.

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