Alternating etch and passivation processes

Abstract

Tin oxide films are used as spacers and hard masks in semiconductor device manufacturing. In one approach, it is desirable to selectively etch a tin oxide layer (e.g., a spacer footing) in the presence of an exposed silicon-containing layer, such as SiOC, SiON, SiONC, amorphous silicon, SiC, or SiN. To reduce damage to the silicon-containing layer, the process involves passivating the silicon-containing layer relative to the tin oxide etch chemistry, etching the tin oxide, and repeating the passivation and etching in an alternating fashion. For example, the passivation and etching can each be performed between 2-50 times. In one implementation, the passivation is performed by treating the substrate with an oxygen-containing reactant that is activated in a plasma, and the tin oxide etch is performed by a chlorine-based chemistry (e.g., using a mixture of Cl2and BCl3).

Description

[0001] This application is a divisional application of the PCT application filed on June 22, 2020, with PCT application number PCT / US2020 / 038996 and applicant "Rum Research, Inc.", which has entered the Chinese national phase (national application number 202080056237.5, invention title "Alternating Etching and Passivation Process").

[0002] By incorporating via reference

[0003] The PCT application form is filed together with this specification as part of this application. Each application claiming a benefit or priority under this application identified in the concurrently filed PCT application form is incorporated herein by reference in its entirety for all purposes. Technical Field

[0004] This invention relates to methods for manufacturing semiconductor devices. Specifically, embodiments of the invention relate to a method for using tin oxide films in semiconductor processing. Background Technology

[0005] In integrated circuit (IC) manufacturing, deposition and etching techniques are used to pattern materials, such as metal lines embedded in dielectric layers. Some patterning schemes involve the use of spacers capable of precisely patterning and forming small-sized features. Spacers are formed on a substrate such that they are spaced at defined distances (usually determined by prior patterning) and serve as masks for patterning the underlying layer. The materials of the spacers and surrounding layers are chosen to have appropriate etch selectivity, which allows for the formation of the spacers and the patterning of the underlying layer. After patterning is complete, the spacers are removed by etching, and the spacers are not part of the final manufactured semiconductor device.

[0006] Spacers are used for patterning in a variety of applications, including forming fins in dynamic random access memory (DRAM), patterning fin field-effect transistors (finFETs), and back-end line (BEOL) processing.

[0007] The background description provided herein is for the purpose of presenting the general context of this disclosure. The work of the currently designated inventors, within the scope described in this background section and in the various aspects of the specification that could not be identified as prior art at the time of filing, neither expressly nor impliedly acknowledges that it is prior art to this disclosure. Summary of the Invention

[0008] In one aspect, a method of processing a semiconductor substrate is provided, wherein the method comprises: (a) providing a semiconductor substrate having a plurality of protruding features above a silicon-containing layer, wherein the semiconductor substrate comprises exposed tin oxide and exposed silicon-containing material of the silicon-containing layer; (b) passivating the exposed silicon-containing material relative to a tin oxide etch chemical; (c) etching the exposed tin oxide using the tin oxide etch chemical; and (d) repeating operations (b) and (c) to perform operations (b) and (c) alternately. Using this method, tin oxide feet near the protruding features can be reduced without damaging the silicon-containing layer.

[0009] In some embodiments, the silicon-containing material is at least one selected from amorphous silicon, silicon oxide, SiON, SiOC, SiONC, SiC, and SiN. In one embodiment, etching the tin oxide in (c) comprises using a chlorine-based etching chemical and exposing the semiconductor substrate to a plasma-activated chlorine-containing reactant selected from the group consisting of Cl2, BCl3, and combinations thereof. In one implementation, a plasma is formed in a process gas comprising a chlorine-containing reactant and a dilution gas, the chlorine-containing reactant being selected from the group consisting of Cl2, BCl3, and combinations thereof, and the dilution gas being selected from the group consisting of helium, neon, argon, xenon, and combinations thereof.

[0010] In one embodiment, etching the tin oxide in (c) involves etching the tin oxide using a hydrogen-based etching chemical, thereby resulting in the formation of tin hydride. For example, etching the tin oxide using a hydrogen-based etching chemical can be performed by contacting the semiconductor substrate with a plasma-activated hydrogen-containing reactant selected from the group consisting of H2, HBr, NH3, H2O, hydrocarbons, and combinations thereof.

[0011] In one embodiment, passivation of the silicon-containing layer is performed by treating the substrate with an oxygen-containing reactant. For example, the silicon-containing layer can be passivated by treating the substrate with a plasma-activated oxygen-containing reactant. In a particular embodiment, a plasma is formed in a process gas comprising a gas selected from the group consisting of O2, O3, SO2, and CO2.

[0012] In some embodiments, the passivation step (b) is performed before the etching step (c). In some embodiments, the etching step (c) is performed before the passivation step (b). In some embodiments, steps (b) and (c) are performed a number of times between 2 and 50.

[0013] In some embodiments, the protruding feature comprises a horizontal surface and sidewalls, and the method reduces the tin oxide base at the sidewalls of the protruding feature.

[0014] In one implementation, the silicon-containing material is selected from the group consisting of amorphous silicon, silicon oxide, SiON, SiOC, SiONC, SiC, and SiN; the passivation in (b) comprises treating the substrate with a plasma-activated oxygen-containing reactant; and the etching in (c) comprises etching the tin oxide with a chlorine-based etching chemical substance, which comprises exposing the semiconductor substrate to a plasma-activated chlorine-containing reactant selected from the group consisting of Cl2, BCl3, and combinations thereof.

[0015] In some embodiments, passivation in (b) involves treating the semiconductor substrate with a nitrogen-containing reactant.

[0016] In some embodiments, the method further includes: applying a photoresist to a semiconductor substrate; exposing the photoresist to light; patterning the photoresist and transferring the pattern to the semiconductor substrate; and selectively removing the photoresist from the semiconductor substrate.

[0017] In another aspect, an apparatus for processing a semiconductor substrate is provided, wherein the apparatus comprises: (a) a processing chamber having a support for the semiconductor substrate and an inlet for introducing one or more reactants into the processing chamber; and (c) a controller comprising program instructions for: (i) passivating a silicon-containing layer on the semiconductor substrate relative to a tin oxide etch chemical; (ii) etching the tin oxide on the semiconductor substrate; and (iii) repeating (i) and (ii) alternately. In some embodiments, (i) comprises processing the semiconductor substrate using a plasma-activated oxygen-containing reactant (e.g., plasma-activated O2). In some embodiments, (ii) comprises etching the tin oxide using a chlorine-based chemical. In some embodiments, (ii) comprises etching the tin oxide using a hydrogen-based chemical. In some embodiments, the program instructions comprise instructions to perform (i) and (ii) alternately a number of times between 2 and 50.

[0018] On the other hand, an apparatus is provided, comprising a processing chamber and a controller having program instructions for inducing any of the methods provided herein.

[0019] On the other hand, a non-transitory computer-readable medium containing code configured to perform any of the methods described herein is provided.

[0020] These and other aspects of the implementation of the subject matter described in this specification are illustrated in the accompanying drawings and the following description. Attached Figure Description

[0021] Figure 1A-1FA schematic cross-sectional view of a semiconductor substrate undergoing a process involving spacer formation is shown.

[0022] Figure 2 This is a process flow diagram of a method according to one embodiment provided in this document.

[0023] Figures 3A-3E A schematic cross-sectional view of a semiconductor substrate undergoing processing according to one embodiment provided herein is shown.

[0024] Figure 4 This is a process flow diagram of a method for forming tin oxide spacers according to one embodiment provided herein.

[0025] Figures 5A-5C A schematic cross-sectional view of a semiconductor substrate undergoing processing according to one embodiment provided herein is shown.

[0026] Figure 5D-5G A schematic cross-sectional view of a semiconductor substrate undergoing processing according to another embodiment provided herein is shown.

[0027] Figure 5H-5K A schematic cross-sectional view of a semiconductor substrate undergoing processing according to another embodiment provided herein is shown.

[0028] Figure 5L-5O A schematic cross-sectional view of a semiconductor substrate undergoing processing according to another embodiment provided herein is shown.

[0029] Figure 6 This is a process flow diagram of a semiconductor method according to one embodiment provided herein.

[0030] Figures 7A-7C A schematic cross-sectional view of a semiconductor substrate undergoing processing according to one embodiment provided herein is shown.

[0031] Figure 8 This is a process flow diagram of a method according to one embodiment provided in this document.

[0032] Figures 9A-9C A schematic cross-sectional view of a semiconductor substrate undergoing processing according to one embodiment provided herein is shown.

[0033] Figure 10 This is a process flow diagram of a method according to one embodiment provided in this document.

[0034] Figure 11 This is a schematic diagram of an apparatus suitable for etching tin oxide using the etching chemicals provided herein.

[0035] Figure 12A schematic diagram of a multi-station processing system according to an embodiment provided herein is shown.

[0036] Figure 13 This is a process flow diagram of the method according to the implementation scheme provided in this article.

[0037] Figures 14A-14C A schematic cross-sectional view of a semiconductor substrate processed according to the embodiments provided herein is shown. Detailed Implementation Plan

[0038] A method for using tin oxide films in semiconductor device fabrication is provided. The method utilizes a variety of etching processes with tunable etch rates and selectivity, enabling the integration of tin oxide films into process schemes employing a variety of materials, such as silicon-containing compounds (e.g., silicon oxide (SiO2), silicon carbide (SiC), silicon nitride (SiN), silicon carbide (SiOC), silicon oxynitride (SiNO), silicon carbonitride (SiCNO), and silicon carbonitride (SiCN)), elemental silicon (Si), carbon (including amorphous carbon and diamond-like carbon), photoresists, carbon-containing compounds (e.g., organic polymers, metal carbides, tungsten-containing carbon), metals (e.g., tungsten), metal oxides (e.g., titanium oxide, hafnium oxide, zirconium oxide, tantalum oxide), and metal nitrides (e.g., tantalum nitride (TaN) and titanium nitride (TiN)). In some embodiments, the tin oxide is etched in the presence of any of these materials, wherein the etch selectivity ratio is at least about 10:1, for example, at least about 20:1. In some embodiments, any of these materials are etched in the presence of tin oxide, wherein the etch selectivity is at least about 10:1, for example at least about 20:1.

[0039] In some implementations, tin oxide is used in patterning processes where the tin oxide film serves as a spacer or a hard mask (e.g., an intermediate layer located below the photoresist and above the target layer). For example, tin oxide can be a spacer in self-aligned spacer-assisted patterning, an intermediate layer in self-aligned double patterning (SADP) or self-aligned quadruple patterning (SAQP), a contact hole hard mask, an extreme UV (EUV) hard mask, an inverted tone mask, or a line-end-of-line (BEOL) hard mask. Combined with selective etching processes, tin oxide meets the stringent critical dimension (CD) / profile and selectivity requirements imposed by these applications. The etching process can be implemented on a variety of tools that allow plasma etching, such as those available from Lam Research Corporation. and Flex TM The etching is performed on the etching tool.

[0040] Hydrogen-based etching can be used to selectively etch tin oxide onto a variety of materials, thereby converting the tin oxide into volatile tin hydride products (e.g., tin tetrahydride). As used herein, the term "tin hydride" includes a variety of tin hydrides (compounds with tin-hydrogen bonds) and is not limited to tin tetrahydride (SnH4). Terms such as "tin chloride" and "silicon fluoride" similarly include a variety of chlorides and fluorides. Unlike hydrides of many other metals, tin tetrahydride has a low boiling point and can therefore be easily removed from the processing chamber by sweeping and / or pumping, making hydrogen-based etching a particularly attractive process for selective tin oxide etching.

[0041] As used herein, tin oxide refers to a material containing tin (Sn) and oxygen (O), and optionally includes hydrogen. Tin oxide may also contain small amounts of other elements, such as carbon and nitrogen, as used herein, wherein the total amount of the other elements is 10 atomic% or less (where hydrogen is not included in the content calculation). For example, tin oxide deposited by ALD may contain about 0.5-5 atomic% carbon. Tin oxide can be deposited, for example, by ALD, PECVD, or PVD. The stoichiometry of tin oxide can generally vary. In some embodiments, the atomic ratio of tin to oxygen is about 1:2 (SnO2). It should be understood that small deviations from the 1:2 stoichiometry of tin to oxygen may exist in SnO2 and are within the range of SnO2 structures. For example, in some examples of SnO2, the atomic ratio of O to Sn is between about 2.0 and 2.3. Tin oxide with an O to Sn ratio of about 1.5-2.5 is within the range of SnO2 materials as used herein. The tin oxide materials described herein differ from indium tin oxide materials and other mixed oxides.

[0042] It should be understood that, unless otherwise stated, stoichiometry may vary in other chemical compounds used herein. For example, chemical formulas such as SiN and HfO specify elements present but not stoichiometrically. Furthermore, it should be understood that the materials described herein may contain hydrogen (even if not specified in the chemical formula) and small amounts of dopants not explicitly listed in the chemical name (e.g., less than 10 atomic percent dopants).

[0043] As used herein, the term "semiconductor substrate" refers to a substrate containing semiconductor material at any stage of semiconductor device fabrication, within its structure, and at any location. It should be understood that the semiconductor material in a semiconductor substrate does not need to be exposed. A semiconductor wafer having multiple layers of other materials (e.g., dielectrics) covering the semiconductor material is an example of a semiconductor substrate. The following detailed description assumes that the disclosed implementation is implemented on a wafer. However, the disclosed implementation is not limited thereto. Workpieces can have various shapes, sizes, and materials. Besides semiconductor wafers, other workpieces that can utilize the disclosed implementation include various articles of manufacture, such as printed circuit boards, etc.

[0044] In some embodiments, the provided selective etching chemicals are used to remove certain materials or features on a substrate without removing others. As used herein, an etching chemical “removes” said material or feature when at least 90% (e.g., 100%) (referring to thickness in the vertical direction) of the material or feature is removed. As used herein, the term “not removed” means that at least 50% (e.g., at least 80%) of the material or feature remains after etching, where % refers to thickness in the vertical direction.

[0045] In some embodiments, the provided method is used to remove material from the horizontal surface of the protruding feature without removing material residing on the sidewalls of the protruding feature. It should be understood that the horizontal surface, as used herein, includes surfaces with local deviations relative to the horizontal plane, such as a convex cap on the top of the protruding feature.

[0046] Various etching chemicals have been developed for the selective etching of tin oxide in the presence of other materials, and for the selective etching of other materials in the presence of tin oxide. Selective etching of tin oxide in the presence of another material is called tin oxide etching, wherein the ratio of the etch rate of tin oxide to the etch rate of the other material is greater than 1, and wherein the other material and tin oxide are exposed to the same etching chemical at any point in the etching process. For example, the other material may be exposed at the start of etching or during the etching process. The etching selectivity of selective etching of tin oxide in the presence of another material refers to the ratio of the etch rate of tin oxide to the etch rate of the other material for a given chemical. For example, tin oxide can be selectively etched using a hydrogen-based etching chemical in the presence of a silicon-containing compound, wherein the etching selectivity is greater than 50.

[0047] Similarly, selective etching of a material in the presence of tin oxide refers to etching of the material in which the etch rate of the material is greater than the etch rate of tin oxide by a ratio greater than 1, and where the tin oxide is exposed to the same etching chemical as the material being etched at any point during the etching process. For example, the tin oxide may be exposed at the start of etching or during the etching process. The etching selectivity of selective etching of a material in the presence of tin oxide refers to the ratio of the etch rate of the material to the etch rate of tin oxide for a given chemical. For example, carbon can be selectively etched in the presence of tin oxide using an oxygen-based etching chemical, where the etching selectivity is greater than 50.

[0048] In some embodiments, a semiconductor substrate is provided, comprising an exposed tin oxide layer and a second material layer, wherein the second material may or may not be exposed. Next, the tin oxide is selectively etched in the presence of the second material using one of the selective tin oxide etching chemicals described herein. For example, hydrogen-based chemicals and / or chlorine-based chemicals can be used to selectively etch the tin oxide. The second material may be exposed prior to this etching or may be exposed during the tin oxide etching process.

[0049] In some embodiments, a semiconductor substrate is provided, comprising a first material exposure layer and a tin oxide layer, wherein the tin oxide may or may not be exposed. Next, the first material is selectively etched in the presence of tin oxide using one of the selective chemicals described herein. The tin oxide may be exposed prior to this etching or may be exposed during the tin oxide etching process.

[0050] Hydrogen-based etching. In some embodiments, selective tin oxide etching is performed using hydrogen-based etching. Hydrogen-based etching involves exposing tin oxide to a hydrogen-containing reactant (typically in the case of plasma activation of the reactant), causing the tin oxide to convert into volatile tin hydride. SnH4 has a boiling point of -52°C and can be readily removed from the processing chamber. Examples of hydrogen-containing reactants include H2, HBr, NH3, H2O, and hydrocarbons (such as CH4). Mixtures of hydrogen-containing reactants may also be used. Hydrogen-based etching involves forming a plasma in a processing gas containing the hydrogen-containing reactant and optionally an inert gas, and contacting the substrate with the formed plasma. Examples of inert gases include nitrogen (N2), helium (He), argon (Ar), neon (Ne), and xenon (Xe). In some embodiments, H2 is a preferred hydrogen-containing reactant, and in some embodiments, it is preferred to form the plasma in a gas containing at least 50%, for example, at least 80%, of H2 by volume. In other embodiments, HBr is used as the hydrogen-containing reactant. For example, tin oxide can be selectively etched using a plasma formed in a process gas consisting essentially of HBr and an inert gas (e.g., a mixture of HBr, N2, and argon). Hydrogen-based etching is typically performed using a process gas that does not contain oxygen- or fluorine-containing substances. In some embodiments, the process gas consists essentially of one or more hydrogen-containing reactants and optionally an inert gas.

[0051] Hydrogen-based etching can selectively remove tin oxide in the presence of: silicon-containing compounds such as SiO2, SiN, SiC, SiOC, SiCN, SiON, SiCNO, spin-coated glass; metal oxides such as titanium oxide, tungsten oxide, and zirconium oxide; metal nitrides such as titanium nitride and tantalum nitride; metals such as tungsten; photoresists; and organic polymers. Furthermore, hydrogen-based etching can be used to selectively etch tin oxide in the presence of silicon oxide-covered silicon. Silicon oxide typically forms on the silicon surface when silicon is exposed to the atmosphere. Hydrogen-based etching can also be used to selectively etch tin oxide in the presence of elemental silicon (e.g., amorphous silicon) and carbon. Additionally, hydrogen-based etching can be used to selectively etch tin oxide in the presence of metal carbides and materials containing metals and carbon. For example, tin oxide can be selectively etched using hydrogen-based etching in the presence of tungsten-carbon materials (also known as tungsten-doped carbon). In some embodiments, the tungsten-carbon material comprises between about 20-60 atomic percent tungsten.

[0052] In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate includes an exposed tin oxide layer and layers of any of these materials. The tin oxide is then selectively etched in the presence of these materials. These materials may be exposed prior to the etching or may be exposed during the tin oxide etching process.

[0053] In some implementations, hydrogen-based etching exhibits an etch selectivity greater than 10, for example, greater than 30, or greater than 50, or greater than 80. Etching selectivity refers to the ratio of the etching rate of tin oxide to the etching rate of other materials for selected process conditions. In some examples, using H2 plasma, etching tin oxide achieved an etch selectivity of 100 relative to SiO2.

[0054] Tin oxide etching using hydrogen plasma (referring to plasma formed in hydrogen-containing reactants) can be implemented in various apparatuses under various process conditions. In one implementation, the method includes: providing a semiconductor substrate with an exposed tin oxide layer to an etching chamber and contacting the substrate with a plasma formed in a process gas containing H2 (or another hydrogen-containing gas) and optionally a carrier gas (such as helium or other inert gas). The terms "etching chamber" or "etching apparatus" refer to a chamber and apparatus configured for etching. In some embodiments, the "etching chamber" or "etching apparatus" is specifically configured for etching operations. In other embodiments, the "etching chamber" or "etching apparatus" may be configured to perform other operations besides etching, such as deposition. For example, in some embodiments, the etching chamber may also be used for ALD deposition.

[0055] In some embodiments, the plasma used for hydrogen plasma etching is generated in the same processing chamber containing the semiconductor substrate. In other embodiments, the plasma is generated remotely and introduced into the processing chamber containing the substrate through one or more inlets within the processing chamber.

[0056] Etching is controlled to convert tin oxide into volatile tin hydride. In one embodiment, the H2 content in the process gas is at least 50% by volume, for example at least 80% by volume (which can be up to and include 100%). In some embodiments, the process gas may also include hydrocarbons, such as CH4. In some embodiments, the process gas also includes Cl2. For example, the process gas may consist essentially of H2 and an inert gas (e.g., He), or the process gas may consist essentially of H2, an inert gas, and hydrocarbons (e.g., CH4). Etching is performed at a temperature less than about 100°C, measured near the substrate. Advantageously, the etching reaction produces only volatile materials, such as SnH4, which can be easily removed from the etching chamber by extraction and / or sweeping. The etching process temperature is preferably selected to be less than about 100°C, because higher temperatures can cause the formed SnH4 to decompose and form particles that can contaminate the processing chamber and the substrate. The composition of the process gas and process conditions are selected to reduce or eliminate particle formation during etching. It is worth noting that the etching reaction does not require any significant sputtering components and can be carried out without external bias at the substrate and in the absence of heavy ions (e.g., argon ions). Reducing the sputtering components can benefit from improved etching selectivity relative to a second material on the substrate. Therefore, in some embodiments, etching is performed without providing external bias to the substrate and / or involving the use of helium (a light gas) as a carrier gas in order to reduce sputtering.

[0057] Plasma for hydrogen plasma etching can be generated using various frequencies (low and high). Examples of suitable frequencies include 400 kHz, 2 MHz, 13.56 MHz, 27 MHz, or 2.45 GHz. In some implementations, the power used for plasma generation can range from approximately 50 W to 1000 W, corresponding to approximately 0.0018 W / cm². 2 Up to 0.36W / cm 2 The power density is between [specific values]. The bias at the substrate is optional, and the bias power can range from approximately 0 to 500 W. The suitable gas flow rate for each nozzle (for processing a 300mm wafer) is:

[0058] H2: 25 to 750 sccm;

[0059] Cl2: 0 to 500 sccm (e.g., 5-200 sccm);

[0060] He: 0 to 500 sccm (e.g., 5-100 sccm); and

[0061] CH4: 0 to 500 sccm (e.g., 5-100 sccm).

[0062] In some implementations, the etching process can be carried out at pressures ranging from approximately 1 to 175 millitors.

[0063] In some specific implementations, high-frequency generation (e.g., 13.56 MHz or 27 MHz) is used to generate the plasma, and a frequency corresponding to 0.07 W / cm² is used. 2 and 0.18W / cm 2 The plasma is supplied with a power density between approximately 200 and 500 W. The bias power at the substrate is between approximately 0 and 200 W. The suitable gas rate for each nozzle (for processing a 300mm wafer) is:

[0064] H2: 100 to 300 sccm;

[0065] Cl2: 0 to 200 sccm (e.g., 5-100 sccm);

[0066] He: 0 to 100 sccm (e.g., 5-50 sccm);

[0067] CH4: 0 to 100 sccm (e.g., 5-50 sccm).

[0068] In these implementations, the etching process is performed at a pressure of approximately 1 to 30 millitor.

[0069] It was found that using carbon-containing reactants in the processing gas significantly improved the selectivity of hydrogen-based etching, wherein the carbon-containing reactants form carbon-containing polymers (e.g., CH4) on the substrate surface during etching. x (Polymer). In some embodiments, the process gas used in this embodiment comprises H2 and hydrocarbons (e.g., methane (CH4)). The process gas typically also contains an inert gas. In some embodiments, the H2 to hydrocarbon ratio is preferably at least 5, for example at least 10. In some embodiments, the H2 to hydrocarbon volume ratio is between about 5 and 500, for example between about 10 and 300. In some embodiments, selective etching of tin oxide in the presence of another material (or more materials) comprises exposing the substrate to a plasma formed in a process gas comprising H2 and hydrocarbons (e.g., CH4). In one implementation, H2 is provided at a flow rate between about 100 and 500 sccm, and hydrocarbons are provided at a flow rate between about 1 and 20 sccm (e.g., between about 5 and 10 sccm). The process can use a flow rate corresponding to between about 0.14 and 1.3 W / cm.2 (e.g., 0.28-0.71 W / cm) 2 The plasma power is between about 100-1000W (e.g., about 200-500W for a single 300mm wafer) at a power density between 100-1000W. In some embodiments, etching is performed using a substrate bias between about 50-500Vb (e.g., between about 100-200Vb). The process is preferably performed at a temperature below about 100°C. In one specific example, the following gases are provided: 100 sccm of H2; 5 sccm of CH4; and 100 sccm of helium. A plasma is formed in the process gas using a power of 300W, and a substrate bias of 100Vb is used at a 25% duty cycle. The process is performed at 30°C and a pressure of 5 mTorr. Forming a carbon-containing polymer on the substrate, as described herein, can improve the etch selectivity of tin oxide relative to any of the materials listed herein. This effect is particularly useful when etching tin oxide in the presence of photoresist, carbon, carbon-containing materials, and silicon (Si). For example, when etching is performed in the presence of photoresist, the etch selectivity can be greater than 100, and in some cases almost infinite. Using this high-selectivity etching allows for the use of smaller photoresist thicknesses to reduce photolithographic exposure dose and / or prevent photoresist line collapse due to high aspect ratios at fine pitches. In the method, CH x The polymer protects the photoresist from etching. Furthermore, this etching can be used to improve the geometry of the photoresist layer. In some embodiments, when a photoresist disposed above a tin oxide layer is present, and when a material is present below the tin oxide, the etching is used to selectively etch the tin oxide on the semiconductor substrate, wherein the etching selectivity is at least 10 relative to the photoresist and the material below the tin oxide. In some embodiments, the material below the tin oxide includes one or more of silicon (e.g., amorphous silicon), silicon-containing compounds (e.g., SiO2, SiN, SiC, SiON, SiOC), carbon (e.g., amorphous carbon), and carbon-containing compounds (e.g., tungsten carbide).

[0070] In some implementations, HBr is used as a hydrogen-containing reactant in hydrogen-based etching. In one implementation, the etching method includes flowing HBr at a flow rate of 100-50 sccm and flowing an inert gas (e.g., helium) at a flow rate of 100-500 sccm, using a concentration corresponding to 0.14-0.71 W / cm². 2An RF power of 100-500W (per 300mm wafer) is used to form plasma in the process gas. This etching can be performed with or without a substrate bias. For example, the substrate bias can be between 0-200Vb, such as between 50-200Vb. The process can be performed at temperatures below 100°C and pressures of 5-50 millitors.

[0071] Chlorine-based etching. In some embodiments, selective tin oxide etching is performed using chlorine-based etching. Chlorine-based etching involves exposing tin oxide to a chlorine-containing reactant (typically in the case of plasma activation of the reactant), causing it to convert the tin oxide to tin chloride. SnCl4, with a boiling point of 114°C, can be removed from the processing chamber. Examples of suitable chlorine-containing reactants include Cl2 and BCl3. A mixture of Cl2 and BCl3 is used in one embodiment. In one implementation, chlorine-based etching involves forming a plasma in a process gas containing a chlorine-containing reactant and optionally an inert gas, and contacting the substrate with the formed plasma. Chlorine-based etching can selectively remove tin oxide in the presence of silicon-containing compounds (e.g., SiO2, SiN, SiC, SiOC, SiCN, SiON, SiCNO, spin-coated glass), carbon, and photoresists, but the selectivity for silicon-containing materials is generally lower than that using hydrogen-based etching. In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate comprises an exposed tin oxide layer and any of these materials. The tin oxide is then selectively etched using chlorine-based etching in the presence of these materials. These materials can be exposed before the etching or during the tin oxide etching process. In one implementation, tin oxide is selectively etched using BCl3 / Cl2 etching in the presence of any of these materials. In one implementation, the etching method includes flowing BCl3 at a flow rate of 5-100 sccm, flowing Cl2 at a flow rate of 50-500 sccm, and flowing an inert gas (e.g., helium) at a flow rate of 100-500 sccm, using an amount equivalent to 0.14-0.71 W / cm³. 2 An RF power of 100-500W (per 300mm wafer) is used to form plasma in the process gas. This etching can be performed with or without a substrate bias. For example, the substrate bias can be between 0-100Vb, such as between 10-100Vb. The process can be performed at temperatures below 100°C and pressures of 5-50 millitors.

[0072] In some embodiments, chlorine-based etching is used to selectively etch certain metal oxides in the presence of tin oxide. For example, chlorine-based etching can be used to selectively etch titanium oxide in the presence of tin oxide. In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate includes an exposed titanium oxide layer and a tin oxide layer. Next, a chlorine-based etching chemical is used to selectively etch the titanium oxide in the presence of tin oxide. The tin oxide may be exposed prior to this etching or may be exposed during the tin oxide etching process.

[0073] Etching based on fluorocarbons. In some embodiments, fluorocarbon-based etching is used to selectively etch silicon-containing compounds, such as SiO2, SiN, SiC, SiOC, SiCN, SiON, SiCNO, and spin-coated glass, in the presence of tin oxide. Fluorocarbon-based etching involves exposing the silicon-containing compound to plasma-activated fluorocarbons (C... x F y This process converts them into volatile compounds containing Si-F bonds. Examples of suitable fluorocarbon reactants include CF4, C2F6, etc. In one implementation, fluorocarbon-based etching involves forming a plasma in a process gas containing fluorocarbons and optionally an inert gas, and contacting the substrate with the formed plasma. Fluorocarbon etching can selectively remove silicon-containing compounds in the presence of tin oxide. In some embodiments, a semiconductor substrate is provided, comprising a silicon-containing compound exposure layer and a tin oxide layer. The substrate is then contacted with a fluorocarbon plasma, and the silicon-containing compounds are selectively etched in the presence of tin oxide. The tin oxide may be exposed prior to this etching or may be exposed during the etching process. Fluorocarbon-based etching is a type of fluorine-based etching.

[0074] Fluorine-based etching. In some embodiments, fluorine-based etching is used to selectively etch elemental silicon and silicon-containing compounds, such as SiO2, SiN, SiC, SiOC, SiCN, SiON, SiCNO, and spin-coated glass, in the presence of tin oxide. Fluorine-based etching involves exposing the silicon-containing material to a fluorine-containing agent (e.g., NF3, SF6, or a fluorocarbon), which in some embodiments is plasma-activated, and converting the silicon-containing material into volatile silicon fluoride. However, tin oxide does not form volatile fluorides and is therefore essentially not etched by this chemical. In addition to silicon-containing materials, fluorine-based etching can also be used to selectively etch titanium oxide, tungsten, and tungsten carbide in the presence of tin oxide. In one implementation, fluorine-based etching involves forming a plasma in a process gas containing a fluorine-containing reactant (e.g., NF3) and optionally an inert gas, and contacting the substrate with the formed plasma. Fluorine-based etching can selectively remove silicon-containing compounds and elemental silicon in the presence of tin oxide. In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate includes a silicon-containing compound exposed layer and / or an elemental silicon (Si) layer and a tin oxide layer. Next, the substrate is contacted with a fluorine-containing reactant in a plasma, and the silicon-containing compound and / or Si are selectively etched in the presence of tin oxide. The tin oxide may be exposed prior to this etching or may be exposed during the etching process.

[0075] In one implementation, silicon (Si) is selectively etched in the presence of tin oxide using fluorine-based etching. In one implementation, the etching method includes flowing NF3 at a flow rate of 5-100 sccm, flowing Cl2 at a flow rate of 50-500 sccm, and flowing an inert gas (e.g., nitrogen and / or helium) at a flow rate of 100-500 sccm, using a concentration corresponding to 0.14-1.4 W / cm². 2 An RF power of 100-1000W (per 300mm wafer) is used to form plasma in the process gas. This etching can be performed with or without a substrate bias. For example, the substrate bias can be between 0-100Vb, such as between 10-100Vb. The process can be performed at temperatures below 100°C and pressures of 10-300 millitors.

[0076] In some embodiments, a semiconductor substrate is provided, comprising a titanium oxide, tungsten, and / or tungsten carbide exposed layer; and a tin oxide layer. Next, the substrate is contacted with a fluorine-containing reactant in a plasma, and the titanium oxide, tungsten, and / or tungsten carbide are selectively etched in the presence of tin oxide. The tin oxide may be exposed prior to this etching or may be exposed during the etching process.

[0077] In one implementation, titanium oxide is selectively etched in the presence of tin oxide using fluorine-based etching. In another implementation, the etching method includes flowing CF4 at a flow rate of 5-500 sccm, flowing CHF3 at a flow rate of 0-500 sccm (e.g., 10-500 sccm), and flowing an inert gas (e.g., argon) at a flow rate of 100-500 sccm, using a flow rate corresponding to 0.71-1.4 W / cm². 2 An RF power of 500-1000W (per 300mm wafer) is used to form plasma in the process gas. This etching can be performed with or without a substrate bias. For example, the substrate bias can be between 0-300Vb, such as between 10-300Vb. The process can be performed at temperatures below 100°C and pressures of 5-50 millitors.

[0078] In one implementation, fluorine-based etching is used to selectively etch tungsten carbide in the presence of tin oxide. In another implementation, the etching method involves flowing NF3 at a flow rate of 5-100 sccm, flowing Cl2 at a flow rate of 5-500 sccm, and flowing an inert gas (e.g., argon and / or nitrogen) at a flow rate of 100-500 sccm, using a concentration corresponding to 0.14-1.4 W / cm². 2 An RF power of 100-1000W (per 300mm wafer) is used to form plasma in the process gas. This etching can be performed with or without a substrate bias. For example, the substrate bias can be between 0-100Vb, such as between 10-100Vb. The process can be performed at temperatures below 100°C and pressures of 10-100 millitor.

[0079] Oxygen-based etching. In some embodiments, oxygen-based etching is used to selectively etch one or more materials selected from the group consisting of elemental carbon, carbon-containing compounds, polymers, and photoresists in the presence of tin oxide. Oxygen-based etching involves exposing the materials listed above to an oxygen-containing agent (e.g., O2, O3, SO2, or CO2), which in some embodiments is plasma-activated, and converting the material into a volatile product containing carbon-oxygen bonds (e.g., CO or CO2). In one implementation, oxygen-based etching involves forming a plasma in a process gas containing an oxygen-containing reactant (e.g., O2) and optionally an inert gas, and contacting the substrate with the formed plasma. In other embodiments, etching can be performed in the absence of plasma. Oxygen-based etching can selectively remove carbon (e.g., amorphous carbon or diamond-like carbon), carbon-containing compounds, and photoresists in the presence of tin oxide. In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate comprises an exposure layer of one or more materials (selected from the group consisting of carbon, carbon-containing compounds, and photoresists) and a tin oxide layer. Next, the substrate is brought into contact with an oxygen-containing reactant (optionally activated in plasma) to convert the carbonaceous material into volatile CO or CO2, thereby selectively etching them in the presence of tin oxide. The tin oxide may be exposed before this etching or may be exposed during the etching process.

[0080] Deposited materials. The materials mentioned herein can be deposited using various deposition methods, such as CVD (including PECVD), ALD (including PEALD), PVD (e.g., for depositing metals and metal oxides), and spin-coating methods (e.g., for depositing carbon and some dielectrics). When conformal deposition is required, the ALD method is generally preferred.

[0081] Various methods (e.g., CVD, PECVD, and ALD) can be used to deposit SiO2, SiC, SiN, SiOC, SiNO, SiCNO, and SiCN materials. Deposition may involve reactions between silicon-containing precursors and reactants (e.g., oxygen-containing, nitrogen-containing, or carbon-containing reactants). Various silicon-containing precursors can be used to deposit these materials, including silanes, tetraalkylsilanes, trialkylsilanes, tetraethyl orthosilicate (TEOS), etc. For example, TEOS or silanes can be used as silicon-containing precursors to deposit SiO2.

[0082] Carbon can be deposited via CVD or PECVD methods using, for example, hydrocarbon precursors (e.g., CH4). In other implementations, carbon can be deposited via spin coating or PVD. Photoresists and organic polymers can be deposited, for example, via spin coating.

[0083] Tin oxide layers are deposited by any suitable method, such as by CVD (including PECVD), ALD (including PEALD), sputtering, etc. In some embodiments, it is preferred to conformally deposit the SnO2 film such that it follows the surface of the substrate, including any protrusions and depressions on the substrate. One suitable deposition method for conformal SnO2 films is ALD. Thermal or plasma-enhanced ALD can be used. In a typical thermal ALD method, the substrate is provided to an ALD processing chamber and sequentially exposed to a tin-containing precursor and an oxygen-containing reactant, wherein the tin-containing precursor and the oxygen-containing reactant react on the substrate surface to form SnO2. After the substrate is exposed to the tin-containing precursor and before the oxygen-containing reactant is introduced into the processing chamber, the ALD processing chamber is typically purged with an inert gas to prevent reaction in the bulk of the processing chamber. Furthermore, after the substrate is treated with the oxygen-containing reactant, the ALD processing chamber is typically purged with an inert gas. Repeated exposure for several cycles, for example, between about 10 and 100 cycles, is performed until a tin oxide layer of the desired thickness is deposited. Examples of suitable tin-containing precursors include tin halide precursors (such as SnCl4 and SnBr4) and non-tin halide precursors, such as organotin compounds, including alkyl-substituted tin amides, etc. Specific examples of alkyl-substituted tin amides suitable for ALD are tetra(dimethylamino)tin, tetra(ethylmethylamino)tin, N... 2 N 3 -di-tert-butyl-butane-2,3-diamino-tin(II) and (1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazacyclobutane-2-ylidene.

[0084] Exemplary tin-containing precursors may be or may include organotin precursors, such as tetraethyltin (SnEt4), tetramethyltin (SnMe4), tetra(dimethylamino)tin (Sn(NMe2)4), tetra(diethylamino)tin (Sn(NEt2)4), tetra(ethylmethylamino)tin (Sn(NMeEt)4), (dimethylamino)trimethyltin (IV) (Me3Sn(NMe2)), dibutyltin diacetate (Bu2Sn(OAc)2), Sn(II) (1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannolidin-2-ylidene)), N 2 N 3-Di-tert-butyl-butane-2,3-diaminotin(II), etc. Other examples of organotin precursors include: bis[bis(trimethylsilyl)amino]tin(II)

[0085] TMS stands for trimethylsilyl ether.

[0086] Dibutyldiphenyltin

[0087]

[0088] Hexaphenylditin (IV)

[0089]

[0090] Tetraallyltin

[0091]

[0092] Tetravinyltin

[0093]

[0094] Tin acetylacetonate (II)

[0095]

[0096] Tricyclohexyltin hydride

[0097]

[0098] Trimethyl(phenylethynyl)tin

[0099] as well as

[0100] Trimethylphenyltin

[0101]

[0102] In another example, the tin-containing precursor can also be an inorganic tin precursor, such as tin halides (e.g., SnF2, SnCl4, SnBr4), tin hydrides (e.g., SnH4), etc. In some embodiments, organotin chloride precursors are used, such as trimethyltin chloride.

[0103]

[0104] Dimethyltin dichloride

[0105] as well as

[0106] Methyltin trichloride

[0107]

[0108] In some implementations, the tin-containing precursor is tetramethyltin, tetra(dimethylamino)tin, or (dimethylamino)trimethyltin (IV).

[0109] Oxygen-containing reactants include, but are not limited to, oxygen, ozone, water, hydroperoxide, and NO. Mixtures of oxygen-containing reactants may also be used. Deposition conditions will vary depending on the selection of ALD reactants, with more reactive precursors typically reacting at lower temperatures compared to less reactive precursors. The process will generally be carried out at temperatures between approximately 20 and 500°C and pressures below atmospheric pressure. The temperature and pressure are chosen to keep the reactants in a gaseous state within the processing chamber to avoid condensation. Each reactant is supplied to the processing chamber in gaseous form, either alone or mixed with a carrier gas (e.g., argon, helium, or nitrogen). The flow rates of these mixtures will depend on the size of the processing chamber and are in some embodiments between approximately 10 and 10,000 sccm.

[0110] In one example, the ALD process involves sequentially and alternately exposing a substrate in an ALD vacuum chamber to SnCl4 (a tin-containing precursor) and deionized water (an oxygen-containing reactant) at a temperature of 200–400°C. In a specific example of the ALD cycle, a mixture of SnCl4 vapor and N2 carrier gas is introduced into the ALD processing chamber for 0.5 seconds, followed by exposure to the substrate for 3 seconds. Next, the ALD processing chamber is purged with N2 for 10 seconds to remove SnCl4 from the bulk of the chamber, and a mixture of H2O vapor and N2 carrier gas is introduced into the chamber for 1 second and then exposed to the substrate for 3 seconds. The ALD processing chamber is then purged with N2, and the cycle is repeated. The ALD process is performed at sub-atmospheric pressure (e.g., 0.4 Torr) and at a temperature of 200–400°C.

[0111] While the use of tin halide precursors in ALD is suitable in many embodiments, in some embodiments, the use of non-halogenated organotin precursors is preferred to avoid corrosion problems that may occur when using halide precursors such as SnCl4. Examples of suitable non-halogenated organotin precursors include alkylaminotin (alkyltinamide) precursors, such as tetra(dimethylamino)tin. In one example of the ALD process, the substrate is sequentially exposed to tetra(dimethylamino)tin and H2O2 in an ALD chamber at a temperature between about 50-300°C. Advantageously, the use of this precursor allows for the deposition of SnO2 films at low temperatures of 100°C or lower. For example, SnO2 films can be deposited at 50°C without the use of plasma to increase the reaction rate.

[0112] In some implementations, a SnO2 film is deposited via PEALD. The same tin precursor and oxygen reactant types as those used in thermal ALD described above can be used. In PEALD, the ALD apparatus is equipped with a system for generating plasma in a processing chamber and for treating the substrate with plasma. In a typical PEALD process sequence, the substrate is fed into the PEALD processing chamber and exposed to tin precursors adsorbed on the substrate surface. The processing chamber is purged with an inert gas (e.g., argon or helium) to remove the precursors and expose the substrate to the oxygen reactants introduced into the processing chamber. Plasma is formed in the processing chamber simultaneously with or after the introduction of the oxygen reactants. The plasma promotes a reaction between the tin precursors and the oxygen reactants on the substrate surface, resulting in the formation of tin oxide. The processing chamber is then purged with an inert gas, and the cycle, including tin precursor feeding, purging, oxygen reactant feeding, plasma treatment, and a second purging, is repeated as many times as is required to form a tin oxide film of the desired thickness.

[0113] Tin oxide as a spacer

[0114] In some implementations, the tin oxide layer is used as a spacer. (Reference) Figure 1A-1F Explain the use of tin oxide spacers. Figure 1A-1F Schematic cross-sectional views of the semiconductor substrate at different stages of processing are provided. Figure 2 Process flow diagrams of implementation schemes for these methods are provided.

[0115] refer to Figure 2 The process begins in 201 by providing a substrate with several prominent features. Figure 1A The illustration shows an illustrative substrate illustrating two mandrels 101 residing on an etch stop layer (ESL) 103. In some embodiments, the distance d1 between adjacent mandrels is between about 10-100 nm. In some embodiments, a relatively larger distance of about 40-100 nm is used. In other applications, the distance between the closest mandrels is between about 10-30 nm. In some embodiments, the distance d2 (also referred to as pitch) between the centers of the closest mandrels is between about 30-130 nm. In some embodiments, the pitch is between about 80-130 nm. In other embodiments, the pitch is between about 30-40 nm. The height d3 of the mandrels is typically between about 20-200 nm, for example, between about 50-100 nm.

[0116] The materials for the mandrel and ESL are selected such that the mandrel material can be selectively etched subsequently in the presence of exposed tin oxide, and the ESL material can be selectively etched in the presence of exposed tin oxide. Therefore, for the first etching chemical, the ratio of the etching rate of the ESL material to the etching rate of the tin oxide is greater than 1, more preferably greater than about 1.5, for example greater than about 2. Similarly, for the second etching chemical, the ratio of the etching rate of the mandrel material to the etching rate of the tin oxide is greater than 1, more preferably greater than about 1.5, for example greater than about 2.

[0117] In some embodiments, the ESL material is a silicon-containing compound (e.g., SiO2) or a metal oxide (e.g., titanium oxide, zirconium oxide, tungsten oxide). The mandrel material may include silicon-containing compounds (e.g., SiO2, SiN, or SiC), carbon-containing compounds (e.g., amorphous carbon, diamond-like carbon, or photoresist), amorphous silicon (doped or undoped), and metal oxides (TaO, TiO, WO, ZrO, HfO). In some embodiments, the outer material of the mandrel may differ from the mandrel core. For example, in some embodiments, the mandrel is made of amorphous silicon covered with silicon oxide (e.g., having a spontaneously formed thermal oxide layer). The ESL layer and the mandrel can be formed by one or more of physical vapor deposition (PVD), chemical vapor deposition (CVD), ALD (plasma-free or by PEALD), or plasma-enhanced chemical vapor deposition (PECVD), and the pattern of the mandrel can be defined using photolithography techniques. Examples of suitable ESL / mandrel combinations include: (i) silicon oxide ESL and silicon oxide-coated silicon mandrel; (ii) silicon oxide ESL and carbon-containing mandrel; (iii) silicon oxide ESL and metal oxide mandrel; (iv) metal oxide ESL and silicon oxide-coated silicon mandrel; and (v) metal oxide ESL and carbon-containing mandrel.

[0118] Refer again Figure 1A The substrate shown has an ESL layer 103 situated on and in contact with the target layer 105. The target layer 105 is the layer that needs to be patterned. The target layer 105 can be a semiconductor layer, a dielectric layer, or other layer, and can be made of, for example, silicon (Si), silicon oxide (SiO2), silicon nitride (SiN), or titanium nitride (TiN). In some embodiments, the target layer refers to a hard mask layer and contains a metal nitride, such as titanium nitride. The target layer 105 can be deposited by ALD (plasma-free or PEALD), CVD, or other suitable deposition techniques.

[0119] The target layer 105 is located on and in contact with layer 107, which in some embodiments is a BEOL layer, comprising a plurality of metal lines embedded in a dielectric material layer.

[0120] Refer again Figure 2The process continues in step 203, where a tin oxide layer is deposited on the horizontal surface and sidewalls of the prominent feature. (See reference...) Figure 1B The structure shown has a tin oxide layer 109 deposited on the ESL 103 and on the mandrel 101, including on the sidewalls of the mandrel. The tin oxide layer is deposited by any suitable method, such as by CVD (including PECVD), ALD (including PEALD), sputtering, etc. In some embodiments, the tin oxide film is preferably deposited conformally, such that it mimics the surface layer 103 and the mandrel 101, as... Figure 1B As shown. In some embodiments, the tin oxide layer is conformally deposited to a thickness of about 5-30 nm, for example, about 10-20 nm. One suitable deposition method for conformal tin oxide films is ALD. Thermal ALD or plasma-enhanced ALD can be used.

[0121] refer to Figure 2 The process diagram shows that after depositing the tin oxide layer, the process continues in step 205, where either hydrogen-based or chlorine-based etching is used to completely remove the tin oxide from the horizontal surface, without completely removing the tin oxide layer from the sidewalls of the protruding features. If the mandrel has a silicon-containing compound or metal oxide as its outer layer, hydrogen-based etching can be used. If the outer layer of the mandrel is a carbon layer, chlorine-based etching can be used. The etching chemical used in this step should preferably be selective for both the ESL material and the outer layer material of the mandrel; that is, for this etching chemical, the etching rate of tin oxide should be greater than the etching rate of the outer mandrel material and greater than the etching rate of the ESL material. Figure 1C The removal of tin oxide from the horizontal surface is shown. The tin oxide layer 109 was etched away from the horizontal surface above ESL 103 and mandrel 101, but not completely etched away from the location where it adheres to the sidewalls of mandrel 101. This etching exposed layer 103 in all areas except near the sidewalls of mandrel 101. Furthermore, the etching exposed the top of the mandrel. The resulting structure is as follows... Figure 1CAs shown. Preferably, after this etching, at least 50% of the initial height of the tin oxide layer at the sidewalls is retained, for example, at least 80% or at least 90%. In one example, tin oxide is selectively etched from the silicon oxide-covered mandrel by hydrogen-based etching (e.g., H2 plasma etching), exposing the outer material (SiO2) of the mandrel. Hydrogen-based etching is selective for SiO2. In another example, tin oxide is selectively etched from a carbon-containing (e.g., carbon) mandrel by chlorine-based etching (e.g., BCl3 / Cl2 plasma etching), exposing the carbon-containing material of the mandrel. This etching is selective for carbon-containing materials. In another example, tin oxide is selectively etched from a metal oxide (e.g., titanium oxide) mandrel by hydrogen-based etching (e.g., H2 plasma etching), exposing the mandrel material (metal oxide). This etching is selective for metal oxides (e.g., titanium oxide) that do not form volatile hydrides.

[0122] In some embodiments, removing the tin oxide layer from the horizontal portion of the substrate involves two steps using two different chemicals. In the first step, known as the master etching, a large portion of the tin oxide layer is typically removed from the horizontal surface without fully exposing the underlying mandrel and ESL material layers. Therefore, in some embodiments, the etching chemicals for the master etching do not need to be selective. In some embodiments, the master etching is performed by treating the substrate with a chlorine-based chemical (e.g., BCl3 / Cl2 plasma etching). Shortly after or before the master etching penetrates the SnO film, the etching chemicals are converted to over-etching chemicals. The endpoint of the master etching can be detected using an optical probe that signals when the mandrel or ESL material is exposed. Selective over-etching chemicals are used to remove the remaining tin oxide film without substantially etching the mandrel and ESL material, as described above. For example, selective hydrogen-based etching or selective chlorine-based etching can be used.

[0123] Next, the mandrel 101 is removed from the substrate, leaving exposed tin oxide spacers 101 and exposed ESL 103, as shown. Figure 1DAs shown. The removal of the mandrel is performed by exposing the substrate to an etching chemical that selectively etches the mandrel material. Therefore, in this step, the ratio of the etching rate of the mandrel material to the etching rate of tin oxide is greater than 1, and more preferably greater than 1.5. Furthermore, in some embodiments, the etching chemical used in this step should selectively etch the mandrel material relative to the ESL material. Various etching methods can be used, and the specific choice of chemical depends on the material of the mandrel and the material of the ESL layer. When the mandrel is made of amorphous silicon covered with silicon oxide, a fluorine-based chemical (e.g., NF3) can be used to remove the silicon mandrel 101 along with the SiO2 layer covering it. This chemical is selective for tin oxide.

[0124] Another option for removing the silicon mandrel is to use plasma formed in a mixture of HBr and O2. In some embodiments, a thin protective silicon oxide layer is removed from the surface of the silicon mandrel before etching begins. This can be accomplished by briefly exposing the substrate to plasma formed in a process gas containing fluorocarbons. After removing the protective silicon oxide layer from the mandrel, the silicon is selectively etched. In some embodiments, a relatively small RF bias is preferably used on the substrate in this step, or no external bias is used at all. If no external bias is used, the self-bias of the substrate (10-20V) is sufficient. Under no-bias or low-bias conditions, the HBr / O2 plasma will selectively etch the silicon in the presence of tin oxide and silicon oxide. This etching can be performed in the presence of ESL containing silicon-containing compounds.

[0125] When the mandrel is made of a carbon-containing material (e.g., carbon or photoresist), oxygen-based etching can be used to selectively remove the mandrel. This chemical is selective for tin oxide and can be used in the presence of ESLs composed of silicon compounds and metal oxide ESLs.

[0126] When the mandrel is a metal oxide (e.g., titanium oxide, tungsten oxide, zirconium oxide, hafnium oxide, tantalum oxide), the substrate can be treated with a chlorine-based etching chemical (e.g., BCl3 / Cl2 in plasma) to selectively remove the mandrel relative to tin oxide. This chemical can be used in the presence of an ESL containing silicon-containing compounds (e.g., SiO2, SiN, SiC).

[0127] Next, the exposed ESL film 103 is etched to expose the underlying target layer 105 in all locations not protected by the tin oxide spacer 109. The resulting structure is as follows. Figure 1EAs shown. The etching chemicals used in this step selectively etch the ESL material in the presence of tin oxide. In other words, the ratio of the etching rate of the ESL material to the etching rate of tin oxide is greater than 1, and more preferably greater than 1.5. The specific type of chemical used in this step will depend on the type of ESL material. When using silicon-containing compounds (e.g., silicon oxide and silicon oxide-based materials), selective etching can be achieved by exposing the substrate to a plasma formed in a process gas containing fluorocarbons. For example, the ESL film can be etched by a plasma formed in a process gas containing one or more of CF4, C2F6, and C3F8. When the ESL is a metal oxide layer (e.g., titanium oxide, tungsten oxide, or zirconium oxide), it can be selectively etched in the presence of tin oxide using chlorine-based etching chemicals (e.g., BCl3 / Cl2 in plasma).

[0128] In the next step, the target layer 105 is etched in all areas not protected by the ESL film 103 to expose the underlying layer 107. The tin oxide spacers 109 are also removed in this etching step, thereby providing… Figure 1F The patterned structure is shown. In some embodiments, the etching chemicals used in this step are selected to remove the target material and the tin oxide spacer material. In other embodiments, two different etching steps with different chemicals can be used to pattern the target layer 105 and remove the tin oxide spacer 109 accordingly. Depending on the chemical of the target layer, many etching chemicals can be used. In one embodiment, the target layer 105 is a metal nitride layer (e.g., TiN) layer. In this embodiment, the metal nitride layer can be etched, and the tin oxide spacer can be removed using a single etching chemical by exposing the substrate to a plasma formed in a process gas containing Cl2 and hydrocarbons (e.g., CH4). Generally, any of the tin oxide etching methods described above can be used to remove the tin oxide spacer.

[0129] One of the problems encountered during spacer formation is the spacer footing, which is the difference between the width of the bottom and the width of the top of the spacer. Ideally, the spacer should be straight with substantially the same width at both the top and bottom. Tin oxide spacers and titanium oxide spacers have been experimentally compared. The results show that the footing can be significantly reduced to less than 1 nm by using H2 plasma etching on tin oxide spacers. However, titanium oxide cannot be etched by H2 plasma at all. When titanium oxide spacers are etched with HBr / N2 / argon plasma, the footing is reduced to only 2.4 nm, at the cost of a larger spacer height and CD loss.

[0130] Furthermore, for HBr / N2 / argon plasma etching, it was demonstrated that the etch selectivity of ALD-deposited titanium dioxide compared to thermally heated silicon oxide (TOX) was lower than that of ALD-deposited tin oxide compared to TOX. Specifically, using this chemical, titanium dioxide was etched with a selectivity of approximately 10:1 in the presence of TOX, while tin oxide was etched with a selectivity greater than 100:1. For H2 plasma, titanium dioxide was not etched at all, while tin oxide was etched with a selectivity greater than 100:1 in the presence of TOX. In the case of BCl3 / Cl2 / He plasma, titanium dioxide was etched with a selectivity of approximately 5:1 (titanium dioxide to TOX), while tin oxide was etched with a selectivity of approximately 4:1 (tin oxide to TOX). Hydrogen-based etching chemicals (both H2-based and HBr-based) provide very high etch selectivity for silicon oxide, greater than 50:1 and greater than 80:1, which is not achievable for titanium dioxide.

[0131] In some implementation schemes, references are made herein. Figure 1A-1F The method described in section 2 is modified and includes the use of a passivation layer on the tin oxide layer at the sidewalls of the mandrel. The purpose of the passivation layer is to minimize the etching of the tin oxide at the sidewalls during the step of removing the tin oxide from the horizontal surface. Without the passivation layer, the tin oxide at the sidewalls may be etched inconsistently in the lateral direction, which can lead to variations in the spacer critical dimension (CD). The use of the passivation layer can prevent or minimize this lateral etching and result in a more consistent distance between the spacers. Additionally, the use of the passivation layer can prevent corrosion at the apex of the spacers, resulting in spacers with a more rectangular shape. Furthermore, the use of the passivation layer at the sidewalls makes it easier to etch the bottom bevel or the base of the tin oxide layer because there will be more available etch material (e.g., ions in the plasma) driven down by the substrate bias. The passivation layer can eventually be partially or completely consumed in subsequent etching steps, thereby preserving the spacer CD.

[0132] The material chosen for the passivation layer is made more resistant to the specific etching chemicals used to remove tin oxide from a horizontal surface. In some embodiments, the passivation material is a silicon-containing compound such as SiO2, SiN, or SiC, which can be deposited, for example, by PECVD. In other embodiments, the passivation material is carbon (e.g., deposited using a hydrocarbon precursor), as described herein. In other embodiments, the passivation material is a tin-containing compound, such as tin nitride (SnN), tin bromide (SnBr), or tin fluoride (SnF). In some embodiments, these compounds are formed by converting the outer portion of the tin oxide into a tin-containing passivation material. For example, tin oxide can be converted into tin nitride by exposing the substrate to a nitrogen-containing compound in a plasma (e.g., N2 plasma). Tin bromide can be formed by exposing the substrate to a bromine-containing compound (e.g., HBr). Tin fluoride can be formed by exposing the substrate to a fluorine-containing compound in a plasma (e.g., NF3 plasma or fluorocarbon plasma). Conditions during SnBr and SnF deposition are modulated to minimize etching. For example, the reaction can be carried out under unbiased or low-biased conditions to minimize the removal of SnBr and SnF. The passivation layer is typically formed to a thickness of about 1-5 nm.

[0133] Figures 3A-3E A schematic cross-sectional view of a portion of the substrate is provided during the processing using the passivation layer. Figure 4 A process flow diagram for this technology is provided. (Refer to...) Figure 4 The process begins at 4401, where a substrate with multiple protruding features is provided, and continues at 4403, where tin oxide is deposited on the sidewalls and horizontal surfaces of the protruding features in a manner similar to the reference. Figure 1A and 1B The descriptions are in the same way. Figure 3A It also shows Figure 1B The substrate shown has a target layer of 301, an ESL of 303, a mandrel of 305, and a tin oxide layer of 307. The materials of these layers can typically be the same as those in the reference... Figure 1A-1F The layers in the described implementation scheme are made of the same material. Figure 3A In the illustrated embodiment, mandrel 305 is a silicon (Si) mandrel with an external silicon oxide (SiO2) 302 layer; however, it should be understood that the described process sequence can be used for various mandrel materials, including carbon-containing mandrels and metal oxide mandrels. Reference Figure 4 After depositing the tin oxide layer, the process continues in step 4405, where a passivation layer is formed over the tin oxide layer at the sidewalls of the protruding features. The resulting structure is as follows. Figure 3B As shown, a passivation layer 309 is depicted on the sidewall of the prominent feature. In the depicted embodiment, the passivation layer is not present on the horizontal surface.

[0134] In some implementations, such a passivation layer can be formed by first (a) conformally depositing a passivation material (e.g., silicon oxide, silicon nitride, silicon carbide, or carbon) on the sidewalls and horizontal surface of the mandrel, and then (b) completely removing the passivation layer from the horizontal surface without completely removing it from the sidewalls (e.g., such that at least 50% or at least 80% of the passivation layer material remains on the sidewalls after etching).

[0135] When the passivation material is a silicon-containing compound, it can be etched away from the horizontal surface using a fluorocarbon-based etching process selective for tin oxide. When the passivation material is a carbon-containing material, it can be removed from the horizontal surface using an oxygen-based etching process selective for tin oxide or by short-term exposure to plasma formed in a hydrogen-containing gas (e.g., H2). In some embodiments, the tin-containing passivation material is removed from the horizontal surface using the same chemicals used for tin oxide etching, wherein a sufficient bias voltage is used at the substrate to facilitate material removal from the horizontal surface. For example, the process can begin with plasma etching using a first bias voltage to remove the tin-containing passivation material from the horizontal surface, and then the bias voltage can be reduced or turned off as the process transitions to primary tin oxide etching. In some embodiments, chlorine-based chemicals (e.g., BCl3 / Cl2 plasma) are used during the etching of the passivation material and tin oxide from the horizontal surface.

[0136] Next, referring to operation 4407, the process then completely removes the tin oxide from the horizontal surface of the mandrel without completely removing the tin oxide at the mandrel sidewalls. This etching can be performed using any suitable tin oxide etching chemical described herein, such as hydrogen-based etching (e.g., H2 plasma), chlorine-based etching (e.g., Cl2 and / or BCl3 in plasma), HBr plasma etching, or any combination of these etching methods. Figure 3C and 3D In the illustrated embodiment, the etching is performed in two steps. In the first step, a chlorine-based etching process (e.g., BCl3 and Cl2 in plasma) is used to etch most of the tin oxide from the horizontal surface to provide... Figure 3C The structure shown has an exposed silicon oxide outer mandrel material at the top of the mandrel and excess tin oxide at the bottom corners of the mandrel. Next, the excess tin oxide is etched with a hydrogen-based over-etching chemical (e.g., H2 in plasma), thereby providing... Figure 3D The structure is shown in the figure. Next, the mandrel material is selectively etched and removed, as previously referenced. Figure 1A-1F As described, spacers 307 are left. In the depicted embodiment, the mandrel etch chemicals also remove the passivation layer 309, resulting in... Figure 3E The structure is shown below. Subsequent processing of ESL can be performed as previously referenced. Figure 1D-1F Proceed as described.

[0137] In a more specific example, layer 301 is TiN, ESL 303 is a silicon oxide layer; mandrel 305 is silicon (Si) covered by a silicon oxide outer layer 302, and layer 307 is tin oxide. Referring to this example, the process includes: providing a substrate having a silicon oxide layer and a plurality of silicon protrusions, wherein the silicon protrusions are covered with native silicon oxide, and then conformally depositing a tin oxide layer on the substrate (e.g., by ALD) and forming a silicon oxide passivation layer (e.g., 1-2 nm thick) only on the tin oxide on the sidewalls of the protrusions. After forming the passivation layer, the process continues by etching away the tin oxide from the horizontal surface without completely removing the tin oxide residing on the sidewalls of the protrusions. In this example, the etching uses a primary (body) etching (e.g., Cl2 / BCl3 plasma etching) followed by over-etching, wherein the over-etching can be, for example, hydrogen plasma etching for reducing the size of the foot. After etching, the process continues by removing the silicon mandrel without removing the tin oxide spacers. It should be noted that the silicon oxide passivation layer on the sidewalls can be formed by first conformally depositing silicon oxide on tin oxide (e.g., via PECVD or ALD), and then selectively etching the silicon oxide from the horizontal surface (e.g., via fluorocarbon plasma). This sequence of removing tin oxide from the horizontal surface was experimentally tested using BCl3 / Cl2 plasma primary etching followed by H2 plasma over-etching. In this experimentally tested example, after primary etching, the critical size loss was 0 nm; the footprint was approximately 6 nm, and the amount etched into the silicon oxide ESL was 0 nm. After over-etching, the critical size loss, footprint, and amount etched into the silicon oxide ESL were all 0 nm.

[0138] In another specific example, tin nitride formed on the exterior of tin oxide is used as a passivation material. In some embodiments, it is preferable to use a tin nitride passivation layer to passivate the sidewalls of tin oxide during the formation of tin oxide spacers, thereby reducing spacer variations. In some embodiments, the method includes: (a) providing a substrate having a silicon oxide layer and a plurality of silicon protrusions, wherein the silicon protrusions are covered by native silicon oxide; (b) conformally depositing a tin oxide layer on the substrate (e.g., by ALD); (c) forming a thin tin nitride passivation layer only on the tin oxide on the sidewalls of the protruding features; (d) etching the tin oxide from the horizontal surface without completely removing the tin oxide residing at the sidewalls of the protruding features (e.g., using a combination of primary (body) etching (e.g., Cl2 / BCl3 etching) and over-etching, wherein over-etching may, for example, be used to reduce hydrogen plasma etching of the foot); and (d) removing the silicon mandrel without removing the tin oxide spacers. The tin nitride passivation layer on the sidewalls can be formed by first conformally forming a passivation layer over the entire tin oxide layer and then selectively removing the tin nitride from the horizontal surface. In some embodiments, a tin nitride layer is formed by treating an exposed tin oxide layer with a nitrogen-containing plasma. For example, the plasma can be formed in a nitrogen-containing gas (e.g., N2 or NH3). The plasma can be direct (formed in the same chamber containing the substrate) or remote (formed in a different chamber or compartment and supplied to the compartment containing the substrate). In some embodiments, the nitriding treatment is performed in the same processing chamber used for tin oxide layer deposition. In other embodiments, the nitriding is performed in a different chamber. In some embodiments, the nitriding plasma treatment lasts for less than about 5 seconds. Another method for forming a conformal tin nitride layer is to deposit tin nitride on a conformal tin oxide layer. For example, tin nitride can be deposited by ALD or CVD. In some embodiments, ALD deposition involves contacting the substrate with a tin-containing precursor and forming a tin-containing layer on the substrate surface, followed by treatment with a nitrogen-containing plasma, wherein this process is repeated multiple times as needed to build a passivation layer of the desired thickness. After the conformal tin nitride layer is formed, the tin nitride is etched from the horizontal surface, leaving tin nitride only on the sidewalls. In some implementations, the etch chemicals are the same as those used in the primary etch, but are performed using a substrate bias, making it more vertically anisotropic than the primary etch. For example, tin nitride can be removed from a horizontal surface using Cl2 / BCl3 plasma etching under a substrate bias. Next, a Cl2 / BCl3 primary etch is performed (e.g., without a substrate bias or with a lower bias than that used during the removal of tin nitride from the horizontal surface), followed by H2 over-etching. During the primary etch process, the tin nitride provides excellent protection for the tin oxide at the sidewalls. The use of tin nitride as a passivation layer has been experimentally tested, and it has been confirmed that the thickness of the tin oxide on the mandrel sidewalls is greater when using a tin nitride passivation layer compared to the same structure treated without tin oxide nitriding.

[0139] Hard mask application

[0140] In some embodiments, a tin oxide film is used as a hard mask. The tin oxide hard mask can be patterned to form a substrate with recessed features, wherein exposed material is present at the bottom of the recessed features. The substrate can then be processed in the presence of the tin oxide hard mask. In some embodiments, the process includes etching the material exposed at the bottom of the recessed features. In other embodiments, the process may include depositing material into the recessed features. In other embodiments, the process may include chemically altering the material exposed at the bottom of the recessed features.

[0141] A variety of methods can be used to form patterned tin oxide layers. In one embodiment, a patterned tin oxide film is formed using photolithography. In one embodiment, the method includes providing a substrate, forming a covering tin oxide layer on the substrate, and forming a patterned photoresist layer on the covering tin oxide layer. In some embodiments, a patterned photoresist layer is formed directly on top of and in contact with the tin oxide layer. In other embodiments, one or more intermediate hard mask layers may be present between the tin oxide layer and the photoresist layer. After depositing and patterning the photoresist layer using standard photolithography techniques, the pattern from the photoresist is transferred onto the tin oxide layer, i.e., the exposed tin oxide layer is etched. In some embodiments, the tin oxide layer is etched in the presence of the exposed photoresist using selective etching (e.g., hydrogen-based etching, such as H2 in plasma). When an intermediate hard mask exists between a tin oxide layer and a photoresist layer, the pattern from the photoresist is first transferred to these intermediate hard masks (e.g., masks containing silicon compounds, such as spin-coated glass or carbon masks), and then to the tin oxide layer. In some embodiments, the tin oxide layer is etched in the presence of another intermediate hard mask material (e.g., a silicon compound or carbon) using suitable selective chemicals (e.g., hydrogen-based etching and / or chlorine-based etching).

[0142] Figures 5A-5C A schematic cross-sectional view of a substrate that has undergone treatment with a tin oxide mask is shown. Figure 6 A process flow diagram for processing a substrate using a tin oxide hard mask is provided. In operation 601, a substrate with a patterned tin oxide layer is provided. The tin oxide layer can be patterned using the photolithography technique described above or using a process sequence for forming tin oxide spacers, as referenced below. Figure 1A-1D It has been described. Figure 5AAn example of such a substrate is shown, wherein the substrate includes a sublayer 51 and a layer 53, with layer 53 situated between sublayer 51 and a patterned tin oxide layer 55. The exposed portion of the substrate includes a recessed feature formed in the silicon oxide layer 55. The material of layer 53 is exposed at the bottom of the recessed feature. While in the depicted embodiment there is no additional material on top of the patterned tin oxide layer 55, in other embodiments, a photoresist or material with an intermediate hard mask present on top of the tin oxide layer 55 may be present.

[0143] Next, in operation 603, the substrate is processed in the presence of the tin oxide layer 55. The processing may include, for example, etching the exposed material 53, depositing material into the recessed features, or chemically modifying the exposed material 53. Etching of the material 53 is performed in... Figure 5B As shown, recessed features defined by the pattern of tin oxide layer 55 are formed in layer 53. Various selective etching chemicals can be used to etch the material of layer 53 in the presence of tin oxide 55. For example, when layer 53 is a silicon-containing material, it can be selectively etched in the presence of tin oxide using fluorine-based chemicals. For example, silicon-containing compounds, such as silicon oxide, silicon nitride, and silicon carbide, can be selectively etched using fluorocarbon plasma chemical etching. When layer 53 is a carbon-containing layer (e.g., amorphous carbon), it can be selectively etched using oxygen-based chemicals, as described herein. When layer 53 is a metal oxide layer (e.g., titanium oxide, zirconium oxide, tantalum oxide, hafnium oxide), it can be selectively etched in the presence of tin oxide using chlorine-based chemicals, as described herein (e.g., BCl3 / Cl2 in plasma). The material of sublayer 51 is different from the material of layer 53, and layer 51 is substantially not etched during the etching of layer 53. Figure 5B The resulting structure shown has recessed features formed in layers 55 and 53 and exposed material in sublayer 51 at the bottom of the recessed features.

[0144] Next, in operation 603, the tin oxide material 55 is removed, providing... Figure 5C The structure shown depicts a patterned layer 53 situated on a sublayer 51. In some embodiments, this sequence is further used to pattern the sublayer 51, which in some embodiments is a SiN layer, a metal nitride (e.g., TiN or TaN), or a metal layer. Tin oxide removal is preferably performed using chemicals that are selective to the materials of both layers 53 and 51. For example, when these materials are silicon-containing, carbon-containing, metal oxides, metal nitrides, or metals, selective hydrogen-based etching (e.g., H2 plasma etching) can be used. Furthermore, in some embodiments, when the materials of layers 53 and 51 are silicon-containing or carbon-containing, chlorine-based etching (e.g., BCl3 / Cl2 in plasma) can be used.

[0145] In a specific example of a process flow using a tin oxide hard mask, sublayer 51 is a SiN layer or a metal layer, and layer 53 is silicon oxide. The process begins by providing a planar substrate with an exposed silicon oxide layer on the SiN or metal layer 51. Next, a tin oxide overlay layer is deposited on the silicon oxide, and then (e.g., using photolithography patterning) the tin oxide is patterned, resulting in… Figure 5A The structure shown is then obtained. Next, for example, by selectively etching the exposed silicon oxide relative to tin oxide using a fluorocarbon plasma, the resulting structure is... Figure 5B The structure shown. Next, for example, tin oxide is removed by hydrogen plasma etching to obtain... Figure 5C The structure shown.

[0146] Tin oxide intermediate layer. In another hard mask embodiment, tin oxide is used as an intermediate hard mask (intermediate layer) for patterning a carbon layer or another material. In one embodiment, a substrate is provided, wherein the substrate includes a patterned tin oxide layer formed on a carbon-containing layer (e.g., on an amorphous carbon layer), wherein the substrate includes a plurality of recessed features having exposed carbon-containing material at the bottom of the recessed features. The exposed carbon-containing material is then selectively etched in the presence of tin oxide to form recessed features in the carbon-containing layer. Suitable selective etching chemicals include hydrogen-based etching chemicals (e.g., H2 and HBr in plasma) and chlorine-based etching chemicals (e.g., BCl3 and / or Cl2 in plasma). Figure 5D-5G The cross-sectional substrate view shown illustrates a suitable process sequence. Figure 5D The substrate shown includes a sublayer 51 (e.g., amorphous silicon or any target layer described herein), a carbon-containing material (e.g., amorphous carbon) capping layer 53 on the sublayer 51, and a capping tin oxide layer 55 on the carbon-containing layer 53. The substrate also includes a patterned photoresist layer 57 above the tin oxide layer 55, and a bottom layer 56 between the photoresist layer 57 and the tin oxide layer 55, wherein the bottom layer may be, for example, spin-coated glass. The bottom layer 56 exposes the bottom of a recessed feature formed in the patterned photoresist layer 57 on the substrate surface. The pattern of the photoresist is transferred to the bottom layer 56 by selectively etching the bottom layer in the presence of the photoresist, for example by plasma etching based on fluorocarbons. The etching exposes the tin oxide layer 55 at the bottom of the recessed feature, as... Figure 5E As shown. Next, tin oxide is patterned using an etching method that is preferably selective to the underlying material. For example, hydrogen-based etching or chlorine-based etching can be used to etch the tin oxide. Figure 5FIn the resulting structure, the pattern has been transferred from the photoresist to the tin oxide layer, and the carbon-containing layer 53 is exposed at the bottom of the recessed feature. The process is then continued by etching the exposed carbon-containing layer 53. Preferably, a chemical substance selective for tin oxide is used. For example, the exposed carbon-containing layer 53 can be etched by oxygen-based etching (e.g., by etching carbon using plasma formed in oxygen-containing gas). Residual photoresist and the underlying layer 56 can also be removed in this step. The structure obtained after this etching is as follows: Figure 5G As shown. The process can continue further, removing tin oxide 55 and subsequently treating the exposed sublayer 51.

[0147] Another implementation scheme for the intermediate layer is in Figure 5H-5K As shown in the image. This sequence is similar to the reference. Figure 5D-5G The sequence is described, but performed without the underlying layer 56. In this sequence, patterned photoresist 57 is formed directly on the tin oxide layer 55, followed by tin oxide etching in the presence of the photoresist (e.g., using hydrogen-based etching (H2 or HBr)) or chlorine-based etching. The process then continues to transfer the pattern from the tin oxide intermediate layer 55 to a carbon-containing layer 53, where layer 53 itself can be used as a hard mask for patterning the underlying layer 51. Next, the tin oxide 55 is selectively etched and removed in the presence of the carbon-containing layer 53, for example, using hydrogen-based etching chemicals (e.g., H2 in plasma). These intermediate layer sequences are suitable for EUV hard mask processing applications.

[0148] In another embodiment, a highly selective etching process is used to transfer the photoresist pattern to the tin oxide layer. For example, hydrogen-based etching chemicals can be used, along with the addition of a carbon-containing reactant, to selectively etch the tin oxide in the presence of an overlying photoresist and an underlying material, wherein the carbon-containing reactant serves to form a carbon-containing polymer on the substrate surface and increases etching selectivity. For example, as described herein, a plasma can be formed in a mixture of H2, hydrocarbons (e.g., CH4), and optionally an inert gas. This will be referenced... Figure 5H-5K To illustrate. In this example, as... Figure 5H As shown, a patterned photoresist layer 57 (e.g., 9-12 nm thick) is formed on the tin oxide layer 55. In this illustration, the material layer directly beneath the tin oxide layer is a tungsten carbide layer 53 (35-55 nm thick). Layer 51 in this illustration is silicon oxide (e.g., a TEOS cap), which can be located on an extremely low-k dielectric layer used in the BEOL process sequence. First, the tin oxide is selectively etched in the presence of photoresist and tungsten carbide using highly selective H2 / CH4 plasma etching. This forms recessed features and exposes the tungsten carbide layer, as shown. Figure 5IAs shown. Next, tungsten carbide is selectively etched in the presence of tin oxide to expose the underlying TEOS layer. For example, tungsten carbide can be selectively etched relative to tin oxide using NF3 / Cl2 plasma etching as described herein. The photoresist can also be substantially removed in this step. The resulting structure is shown. Figure 5J As shown. Next, tin oxide is removed from the substrate using selective etching of tungsten carbide. In some embodiments, H2 plasma is preferably used to remove the tin oxide. In some embodiments, no hydrocarbon additives are used in this step. For example, tin oxide can be removed after etching the underlying layer using H2 etching under the following process conditions. In this example, the etching involves flowing H2 at a flow rate of 100-500 sccm and forming a plasma in the process gas using an RF power of 100-500 W (per 300 mm wafer). This etching can be performed with or without a substrate bias. For example, the substrate bias can be between 0-100 Vb, such as between 10-100 Vb. The process can be performed at temperatures below 100°C and pressures between 5-50 mTorr.

[0149] Another process flow with a tin oxide intermediate layer hard mask is... Figure 5L-5O The cross-sectional view is shown in the figure. In this example, as... Figure 5L As shown, a patterned photoresist layer 57 (e.g., 9-12 nm thick) is formed on a tin oxide layer 55. In this illustration, the material layer directly beneath the tin oxide layer is an amorphous silicon (Si) layer 53 (35-55 nm thick). Layer 51 in this illustration is a silicon oxide etch stop layer. In this illustration, the photoresist is deposited such that it is wider at the bottom than at the top. Results show that by using H2 / hydrocarbon plasma etching, the difference in photoresist width can be reduced, and its cross-section can be made substantially rectangular. First, tin oxide is selectively etched in the presence of photoresist and amorphous silicon using highly selective H2 / CH4 plasma etching. This forms recessed features and exposes the amorphous silicon layer, while simultaneously improving the geometry of the photoresist, such as… Figure 5M As shown. Next, silicon is selectively etched in the presence of tin oxide to expose the underlying etch stop layer. For example, silicon can be selectively etched relative to tin oxide using NF3 / Cl2 plasma etching as described herein. Using this etching method, an etch selectivity greater than 40 (silicon to tin oxide) can be achieved. The photoresist can also be partially removed in this step. The resulting structure is shown. Figure 5N As shown. Next, tin oxide is removed from the substrate using silicon-selective etching. In some embodiments, H2 plasma is preferably used to remove the tin oxide. Residual photoresist 57 can be removed during H2 plasma treatment. The resulting structure is as shown. Figure 5O As shown.

[0150] Using tin oxide as a hard mask is highly advantageous because it can be etched with very high selectivity relative to silicon oxide, a common layer to be patterned. It can also be selectively etched relative to a wide variety of other materials, including carbon, photoresists, metals, metal nitrides, and metal oxides, using dry plasma etching chemicals (e.g., hydrogen-based or chlorine-based chemicals). Tin oxide hard masks are also advantageous compared to titanium nitride hard masks because tin oxide does not require wet etching and can be etched with hydrogen plasma, while titanium nitride is typically removed by wet etching methods.

[0151] Inverse tone hard mask. In some implementations, tin oxide is used in various inverse tone hard mask applications. An exemplary process flow is... Figure 8 As shown in the figure, and through Figures 7A-7C A schematic cross-sectional view of the substrate is shown. The process begins at 801, where a substrate with an exposed patterned ashingable layer and multiple recessed features is provided. Examples of ashingable materials include carbon-containing materials, such as amorphous carbon, diamond-like carbon, photoresists, and organic polymers, wherein the polymer may be undoped or doped with metals or metal oxides. The patterned ashingable material layer can be formed, for example, by depositing an ashingable material capping layer (e.g., via PECVD or spin coating) followed by photolithographic patterning. Figure 7A A substrate with a patterned ashingable material layer 703 is shown, situated on a sublayer 701 (e.g., Si, SiN, metal nitride, or any target or sublayer material as described herein). Multiple recessed features are present on the substrate, and layer 701 is exposed at the bottom of the recessed features. Next, in operation 803, the recessed features on the substrate are filled with tin oxide (e.g., using CVD). In this step, a capping layer is also typically formed on the ashingable material layer 703. The resulting structure is as follows. Figure 7B As shown, deposited tin oxide 705 fills the gaps between the ashingable material 703 and forms a capping layer. The capping layer can then be removed, for example, by a chemical mechanical polishing (CMP) operation or a bulk plasma etching (e.g., using hydrogen-based and / or chlorine-based plasma etching) to expose the ashingable material 703. After planarization, in operation 805, the ashingable material is removed while the tin oxide material is substantially not removed (e.g., at least 90% of the tin oxide is retained), thereby forming a complementary pattern of tin oxide 705, as shown. Figure 7C As shown.

[0152] In one specific example, a substrate containing a patterned carbon layer residing on a target layer (e.g., silicon oxide, silicon nitride, or metal) is provided. The patterned carbon layer has multiple grooves (e.g., widths between approximately 5-50 nm). Next, the grooves are filled with tin oxide to form a tin oxide capping layer (e.g., CVD). Next, the tin oxide capping layer is removed (e.g., by selective CMP or dry plasma etching to carbon) to expose the carbon, and then the carbon is removed (stripped off), for example, using O2 plasma, without completely removing the tin oxide.

[0153] exist Figure 10 The process flow diagram illustrates another implementation scheme for the inverse tone mask, and through... Figures 9A-9C A schematic cross-sectional view of the processed substrate illustrates this embodiment. The process begins at step 1001, where a substrate with a patterned tin oxide layer and multiple recessed features is provided. This... Figure 9A As shown, a patterned tin oxide layer 903 is located on a sublayer 901 (e.g., a metal nitride or metal layer). Sublayer 901 exposes the bottom of a recessed feature formed in the tin oxide layer 903. Next, in operation 1003, the recessed feature is filled, for example by CVD, via a silicon-containing material. Examples of suitable silicon-containing materials include silicon (e.g., amorphous or polycrystalline silicon) and silicon-containing compounds such as silicon oxide, silicon nitride, and silicon carbide. A capping layer can be formed on the tin oxide layer during this deposition. The resulting structure is as follows... Figure 9B As shown, silicon-containing material 905 fills the gaps in a patterned tin oxide layer and forms a capping layer. Next, the capping layer is removed by CMP or by plasma etching (e.g., fluorine-based etching, such as fluorocarbon plasma etching), exposing the tin oxide 903. In the next operation 1005, the tin oxide is removed without removing the silicon-containing material, thereby forming a patterned silicon-containing material layer (a hue or complementary pattern to the tin oxide pattern). The tin oxide is selectively etched relative to the silicon-containing material, for example, using hydrogen-based etching (e.g., H2 plasma etching, or HBr plasma etching) or chlorine-based etching (e.g., BCl3 / Cl2 etching). The resulting structure after etching is as follows... Figure 9C As shown, a patterned silicon-containing layer 905 is illustrated. Sublayer 901 is exposed at the bottom of a recessed feature formed in the silicon-containing material 905.

[0154] In one implementation, a substrate with a target layer is provided, on which a patterned tin oxide layer is provided. Next, recessed features in the patterned tin oxide are filled with silicon oxide, and a silicon oxide capping layer is formed (e.g., by PECVD). Next, the silicon oxide capping layer is etched (recessed etching) to expose the tin oxide, and then the tin oxide is removed (stripped off), for example using hydrogen plasma, leaving patterned silicon oxide with a pattern complementary to the initial tin oxide pattern.

[0155] Device

[0156] The etching method described herein can be performed in a variety of apparatuses. Suitable apparatuses include: an etching chamber; a substrate holder in the etching chamber configured to hold the substrate in place during etching; and a plasma generation mechanism configured to generate plasma in a process gas.

[0157] Examples of suitable apparatus include inductively coupled plasma (ICP) reactors, which in some embodiments are also suitable for cyclic deposition and activation processes, including atomic layer etching (ALE) and atomic layer deposition (ALD) operations. Although ICP reactors have been described in detail herein, it should be understood that capacitively coupled plasma reactors may also be used in some embodiments.

[0158] Figure 11 A schematic cross-sectional view of an inductively coupled plasma integrated etching and deposition apparatus 400 suitable for carrying out the plasma etching described herein is shown, an example of which is... The reactor is manufactured by Lam Research Corp. in Fremont, California. The inductively coupled plasma device 400 includes a main processing chamber 424 structurally defined by chamber walls 401 and windows 411. Chamber walls 401 may be made of stainless steel or aluminum. Windows 411 may be made of quartz or other dielectric materials. An optional internal plasma grid 450 divides the main processing chamber into an upper sub-chamber 402 and a lower sub-chamber 403. In most embodiments, the plasma grid 450 can be removed, thereby utilizing the chamber space formed by sub-chambers 402 and 403. A chuck 417 is positioned in the lower sub-chamber 403 near its bottom inner surface. The chuck 417 is configured to receive and hold a semiconductor wafer 419 on which etching and deposition processes are performed. The chuck 417 may be an electrostatic chuck used to support the wafer 419 when it is present. In some embodiments, an edge ring (not shown) surrounds the chuck 417 and has an upper surface that is substantially coplanar with the top surface of the wafer 419 (when the wafer is present above the chuck 417). The chuck 417 also includes electrostatic electrodes for clamping and releasing the wafer 419. Filters and DC clamping power sources (not shown) may be provided for this purpose. Other control systems may also be provided for lifting the wafer 419 away from the chuck 417. The chuck 417 can be charged with an RF power source 423. The RF power source 423 is connected to a matching circuit 421 via a connector 427. The matching circuit 421 is connected to the chuck 417 via a connector 425. In this way, the RF power source 423 is connected to the chuck 417. In various embodiments, the bias power of the electrostatic chuck may be set to approximately 50 Vb, or it may be set to a different bias voltage depending on the process performed according to the disclosed embodiments. For example, the bias voltage may be between about 20Vb and about 100Vb, or between about 30Vb and about 150Vb.

[0159] The element used for plasma generation includes a coil 433 located above window 411. In some embodiments, the disclosed embodiments do not use a coil. The coil 433 is made of a conductive material and includes at least one full turn. Figure 4The example of coil 433 shown includes three turns. The cross-section of coil 433 is shown with symbols, and coil 433 with the symbol "X" indicates that coil 433 extends rotatably into the page, while coil 433 with the symbol "·" indicates that it extends rotatably out of the page. The elements for plasma generation also include an RF power source 441 configured to provide RF power to coil 433. Generally, RF power source 441 is connected to matching circuit 439 via connector 445. Matching circuit 439 is connected to coil 433 via connector 443. In this way, RF power source 441 is connected to coil 433. An optional Faraday shield 449a is positioned between coil 433 and window 411. Faraday shield 449a can be held in a spaced-apart relationship relative to coil 433. In some embodiments, Faraday shield 449a is positioned directly above window 411. In some embodiments, Faraday shield 449b is positioned between window 411 and chuck 417. In some embodiments, the Faraday shield 449b is not held in a spaced-out relationship relative to the coil 433. For example, the Faraday shield 449b may be located directly below the window 411 without gaps. The coil 433, the Faraday shield 449a, and the window 411 are each configured to be substantially parallel to each other. The Faraday shield 449a can prevent the deposition of metal or other substances on the window 411 of the processing chamber 424.

[0160] Processing gases (e.g., H2 and He) can flow into the processing chamber through one or more main gas inlets 460 located in the upper sub-chamber 402 and / or through one or more side gas inlets 470. Similarly, although not explicitly shown, similar gas inlets can be used to supply processing gases to the capacitively coupled plasma processing chamber. A vacuum pump, such as a single-stage or two-stage dry mechanical pump and / or turbomolecular pump 440, can be used to evacuate the processing gases from the processing chamber 424 and maintain the pressure within the processing chamber 424. For example, the vacuum pump can be used to evacuate the lower sub-chamber 403 during purging operations. Valve-controlled conduits can be used to fluidly connect the vacuum pump to the processing chamber 424 to selectively control the application of the vacuum environment provided by the vacuum pump. This can be done using closed-loop controlled flow limiting devices such as throttle valves (not shown) or pendulum valves (not shown) during plasma processing. Similarly, a vacuum pump and valves that are controlled and fluidly connected to the capacitively coupled plasma processing chamber can also be used.

[0161] During operation of the apparatus 400, one or more processing gases (such as H2-containing gases) may be supplied through gas inlets 460 and / or 470. In some embodiments, the processing gas may be supplied only through the main gas inlet 460, or only through the side gas inlet 470. In some cases, the gas inlets shown in the figure may be replaced by more complex gas inlets, for example, by one or more nozzles. The Faraday shield 449a and / or optional grid 450 may include internal channels and orifices that allow the processing gas to be delivered to the processing chamber 424. One or both of the Faraday shield 449a and optional grid 450 may serve as nozzles for delivering the processing gas. In some embodiments, a liquid evaporation and delivery system may be located upstream of the processing chamber 424, such that once the liquid reactant or precursor is evaporated, the evaporated reactant or precursor is introduced into the processing chamber 424 through gas inlets 460 and / or 470.

[0162] Radio frequency (RF) power is supplied from RF power source 441 to coil 433 to cause RF current to flow through coil 433. The RF current flowing through coil 433 generates an electromagnetic field around coil 433. The electromagnetic field generates an induced current in upper sub-chamber 402. The generated ions and free radicals interact physically and chemically with wafer 419 to etch features on wafer 419 and selectively deposit layers on wafer 419.

[0163] If a plasma grid 450 is used such that both an upper sub-chamber 402 and a lower sub-chamber 403 are present, an induced current acts on the gas present in the upper sub-chamber 402 to generate an electron-ion plasma in the upper sub-chamber 402. An optional internal plasma grid 450 limits the amount of hot electrons in the lower sub-chamber 403. In some embodiments, the device 400 is designed and operated such that the plasma present in the lower sub-chamber 403 is an ion-ion plasma.

[0164] Both the upper electron-ion plasma and the lower ion-ion plasma can contain both cations and anions, although the ion-ion plasma will have a greater anion-to-cation ratio. Volatile etching and / or deposition byproducts can be removed from the lower sub-chamber 403 via port 422. For example, tin hydride generated during etching tin oxide using H2 plasma can be removed via port 422 during sweeping and / or pumping. The chuck 417 disclosed herein can operate in a temperature range ranging from about 10°C to about 250°C. This temperature will depend on the process operation and specific formulation. In some embodiments, the apparatus is controlled to perform etching at temperatures below about 100°C.

[0165] When installed in a clean room or manufacturing plant, device 400 can be coupled to facilities (not shown). Facilities include piping that provides process gases, vacuum, temperature control, and environmental particulate control. These facilities are coupled to device 400 when installed in the target manufacturing plant. Additionally, device 400 can be coupled to a transfer chamber that allows for the use of typical automation, such as robotic arms, to transfer semiconductor wafers in and out of device 400.

[0166] In some embodiments, system controller 430 (which may include one or more physical or logic controllers) controls some or all of the operations of processing chamber 424. System controller 430 may include one or more memory devices and one or more processors. In some embodiments, apparatus 400 includes a switching system for controlling the flow rate of the processed gas. In some embodiments, the controller includes program instructions for inducing steps of any of the methods provided herein.

[0167] In some implementations, system controller 430 is part of a system, which may be part of the examples described above. Such a system may include semiconductor processing equipment comprising one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer pedestals, airflow systems, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing semiconductor wafers or substrates. The electronics may be integrated into system controller 430, which can control various elements or sub-components of one or more systems. Depending on the processing parameters and / or the type of system, the system controller may be programmed to control any process disclosed herein, including controlling process gas delivery, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer tools and other transport tools, and / or loading locks connected to or interfaced with a specific system.

[0168] Broadly speaking, system controller 430 can be defined as an electronic device with various integrated circuits, logic, memory, and / or software that receives instructions, issues instructions, controls operations, enables cleaning operations, enables endpoint measurements, etc. Integrated circuits can include chips in the form of firmware storing program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions can be instructions that communicate to the controller in the form of various individual settings (or program files) that define operating parameters for performing specific processes on or for a semiconductor wafer or system. In some embodiments, operating parameters can be part of a recipe defined by a process engineer for completing one or more processing steps during the fabrication or removal of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0169] In some implementations, the system controller 430 may be part of or coupled to a computer integrated with, coupled to, or networked with the system or a combination thereof. For example, the controller may be in the “cloud” or be all or part of a fab host system that allows remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of manufacturing operations, examine the history of past manufacturing operations, examine trends or performance criteria of multiple manufacturing operations, change parameters of the current process, set processing steps to follow the current process, or start a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system via a network, which may include a local network or the Internet. The remote computer may include a user interface capable of inputting or programming parameters and / or settings that are then communicated from the remote computer to the system. In some examples, the system controller 430 receives instructions in the form of data specifying parameters for each processing step to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool, to which the controller is configured to connect to or control. Therefore, as described above, the system controller 430 can be distributed, for example, by including one or more discrete controllers connected together via a network and operating toward a common goal (e.g., the process and control described herein). An example of a distributed controller for these purposes could be one or more integrated circuits on a room that communicate with one or more remote integrated circuits (e.g., at the platform level or as part of a remote computer) integrated to control the process on the room.

[0170] Examples of systems may include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, spin cleaning chambers or modules, metal plating chambers or modules, cleaning chambers or modules, chamfering edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, ALD chambers or modules, ALE chambers or modules, ion implantation chambers or modules, orbital chambers or modules, and any other semiconductor processing systems that may be associated with or used in the fabrication and / or manufacturing of semiconductor wafers.

[0171] As described above, depending on one or more process steps the tool is to perform, the controller may communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout the plant, a host, another controller, or tools used in material handling for moving wafer containers to and from tool locations and / or loading ports within the semiconductor manufacturing plant.

[0172] Figure 12 A semiconductor process cluster architecture is described, in which each module interfaces with a vacuum transfer module 538 (VTM). The configuration of various modules that "transfer" wafers between multiple memory devices and processing modules can be referred to as a "cluster tooling architecture" system. An airtight chamber 530 (also referred to as a load lock or transfer module) is connected to the VTM 538, which in turn is connected to four processing modules 520a-520d, which can be individually optimized to perform various manufacturing processes. For example, processing modules 520a-520d can be implemented to perform substrate etching, deposition, ion implantation, wafer cleaning, sputtering, and / or other semiconductor processes. In some embodiments, tin oxide deposition and tin oxide etching are performed in the same module. In some embodiments, tin oxide deposition and tin oxide etching are performed in different modules within the same tooling. One or more of the substrate etching processing modules (any one of 520a-520d) can be implemented as disclosed herein, for example, for depositing conformal films, selectively etching tin oxide, forming air gaps, and other suitable functions according to the disclosed embodiments. The airtight chamber 530 and processing modules 520a-520d can be referred to as "stations". Each station has a facet 536 that connects the station to the VTM 538. Inside each facet, sensors 1-18 are used to detect the passage of the wafer 526 as it moves between the stations.

[0173] Robotic arm 522 transfers wafer 526 between stations. In one embodiment, robotic arm 522 has one arm, while in another embodiment, robotic arm 522 has two arms, each with an end effector 524 to pick up wafers (e.g., wafer 526) for transport. In atmospheric transfer module (ATM) 540, front-end robotic arm 532 is used to transfer wafer 526 from a wafer cassette or front-opening wafer cassette (FOUP) 534 in load port module (LPM) 542 to airtight chamber 530. Module center 528 within processing modules 520a-520d is a location for placing wafer 526. Aligner 544 in ATM 540 is used to align the wafer.

[0174] In one exemplary processing method, a wafer is placed in one of a plurality of FOUPs 534 within an LPM 542. A front-end robot 532 transfers the wafer from the FOUP 534 to an alignment unit 544, which allows the wafer 526 to be properly centered before etching or processing. After alignment, the wafer 526 is moved by the front-end robot 532 into an airtight chamber 530. Because the airtight chamber 530 has the ability to match the environments between the ATM 540 and VTM 538, the wafer 526 can move between the two pressure environments without damage. The wafer is moved from the airtight chamber 530 through the VTM 538 and into one of the processing modules 520a-520d by the robot 522. To achieve this wafer movement, the robot 522 uses end effectors 524 on each of its arms. Once the wafer 526 has been processed, it is moved from the processing modules 520a-520d into the airtight chamber 530 by the robot 522. The chip 526 can be moved from here to one of the multiple FOUPs 534 or to the alignment device 544 via the front-end robotic arm 532.

[0175] It should be noted that the computer controlling the movement of the chip can be local to the cluster architecture, or it can be located outside the cluster architecture in the manufacturing plant, or at a remote location connected to the cluster architecture via a network. (See above for reference.) Figure 11 The controller can be used Figure 12 The tools implemented in the document. A machine-readable medium containing instructions for controlling the process operations according to the invention can be coupled to a system controller.

[0176] In some embodiments, an apparatus is provided, comprising: a processing chamber having a substrate holder configured to hold a semiconductor substrate during etching; a plasma generator configured to generate plasma in a process gas; and a controller. The controller includes program instructions for implementing any of the methods described herein.

[0177] On the other hand, a non-transitory computer machine-readable medium is provided, wherein it includes code for enabling the execution of any of the methods described herein.

[0178] In another aspect, a system for forming spacers or hard masks on a semiconductor substrate is provided. The system includes one or more deposition chambers; one or more etching chambers; and a controller. The controller includes program instructions for implementing any of the methods described herein. In another aspect, the system includes any of the devices and systems described herein, as well as a stepper. In another aspect, a system for processing a semiconductor substrate is provided. In one embodiment, the system includes: one or more deposition chambers; one or more etching chambers; and a system controller including program instructions for: (i) depositing a tin oxide layer on a horizontal surface and sidewalls of a plurality of protruding features on the semiconductor substrate; (ii) forming a passivation layer on the tin oxide layer at the sidewalls of the protruding features; and (iii) removing the tin oxide layer from the horizontal surface of the protruding features without causing removal of the tin oxide layer above the sidewalls of the protruding features.

[0179] Alternating etching and passivation processes

[0180] In some embodiments, tin oxide is etched in the presence of an exposed silicon-containing layer (e.g., amorphous silicon, SiOC, SiON, SiONC, SiN, SiC, and SiO2) in the various semiconductor processing methods described herein. In some embodiments, the silicon-containing layer is also protected from undesirable etching that may occur during tin oxide etching.

[0181] Figure 13 An example of a process flow diagram using this type of protection is shown. The process begins at 1301, where a substrate with a silicon-containing layer is provided, wherein the substrate also includes an exposed tin oxide layer (such as tin oxide feet on the silicon oxide layer). An example of such a substrate is shown in [image / description]. Figure 14A In, it and Figure 3C Same. Figure 14A In this embodiment, the substrate includes a protruding feature 305 disposed on an etch stop layer 303. In the illustrated embodiment, the etch stop layer is a silicon-containing layer, such as amorphous silicon, SiOC, SiON, SiONC, SiN, SiC, or SiO2. A tin oxide layer 307 is located at the sidewall of the protruding feature 305 and forms a foot (a lateral expansion at the bottom of the protruding feature), the foot must be reduced to form tin oxide spacer walls with a consistent spacing. Although some embodiments may refer to... Figure 3DThe method described effectively removes the base plate, but in some cases etching the base plate may lead to undesirable etching of the etch stop layer 303. In one example, this undesirable etching may occur if a chlorine-based etching chemical (such as Cl2 / BCl3 etching) is used during tin oxide etching and the silicon-containing layer is SiOC.

[0182] refer to Figure 13 In operation 1303, the silicon-containing layer is passivated. Passivation is a process that makes the silicon-containing layer more resistant to tin oxide etch chemicals. In one example, passivation is performed by treating the substrate with an oxygen-containing reactant (e.g., by treating the substrate with an oxygen-containing reactant in a plasma). For example, a plasma can be formed in a process gas containing O2, O3, SO2, CO2, or any combination of these oxygen-containing reactants. In some embodiments, the process results in the formation of silicon-oxygen bonds on the exposed exterior of the silicon-containing layer. For example, after passivation, the SiOC layer may be composed of a more oxygen-rich material. In another example, a silicon oxide etch-stop layer deposited by CVD contains residual carbon and hydrogen; passivation using an oxygen-containing reactant reduces the carbon and hydrogen content in this layer, making it more resistant to tin oxide etch chemicals. Figure 14B The image shows a substrate with a passivated etch stop layer 304. In another embodiment, passivation is performed by treating the substrate with a nitrogen-containing reactant, such as a nitrogen-containing reactant (e.g., N2) in plasma. The purpose of passivation is to make silicon-containing materials (such as etch stop layer materials) more resistant to tin oxide chemicals used for tin oxide etching, such as chlorine-based etching chemicals or hydrogen-based etching chemicals.

[0183] In operation 1305, tin oxide is etched. The tin oxide can be etched using methods described herein, such as by exposing the substrate to chlorine-based chemicals (e.g., Cl2 and / or BCl3 in plasma) and / or hydrogen-based chemicals (e.g., H2, HBr, hydrocarbons, or combinations thereof, as described herein). The reactant gas (e.g., Cl2 and / or BCl3) can be provided along with an inert diluent gas such as helium, argon, neon, or xenon. In operation 1307, passivation step 1303 and etching step 1305 are repeated alternately. It should be noted that the first passivation step can be performed before or after the first etching step. For example, the method can have an etch / passivation / etch / passivation procedure, or a passivation / etch / passivation / etch procedure. In some embodiments, the method involves performing etch and passivation steps a number of times between 2 and 50, such as a number of times between 5 and 20 (i.e., each of the etch and passivation steps is performed a number of times between 2 and 50, such as a number of times between 5 and 20). The structure obtained after the required number of etching and passivation cycles is shown in Figure 14CIn a particular example, each etching step is performed for approximately 10 seconds and each passivation step is performed for 5 seconds, wherein the method involves performing each step alternately between 8 and 20 times.

[0184] The alternating etching and passivation process described herein offers several advantages. First, it minimizes unwanted etching of the silicon-containing etch stop layer while maintaining sidewall thickness. Furthermore, it allows for efficient removal of the substrate. It should be noted that the methods described herein can be used to protect any silicon-containing layer during the etching of exposed tin oxide, but as referenced... Figures 14A-14C The methods described herein are particularly effective for removing tin oxide substrates. It should be noted that silicon oxide is generally more resistant to etching than other silicon-containing materials, and the methods provided are particularly effective for protecting such materials, such as SiOC, amorphous silicon, SiOCN, and SiC; however, these methods can also be used to passivate silicon oxide. In a particular embodiment, a substrate containing such materials is passivated using oxygen-containing reactants (such as O2, O3, SO2, or CO2 in plasma). Passivation makes the silicon-containing material more resistant to chlorine-based tin oxide etching chemicals (such as Cl2 / BCl3 chemicals) and hydrogen-based tin oxide etching chemicals (such as H2, HBr, hydrocarbon etching). Therefore, in some embodiments, the process involves alternating passivation using oxygen-containing reactants with tin oxide etching using chlorine-based chemicals and / or hydrogen-based chemicals described herein.

[0185] In one example, when implementing the provided methods, the loss of the tin oxide sidewalls can be reduced from 5 nm to less than 1 nm, and the loss of the bottom SiOC layer can be reduced from 5 nm to 1 nm. Implementing these methods can reduce the tin oxide base from 6 nm to 1 nm. It should be noted that the provided methods can be implemented with or without the tin oxide passivation layer 309.

[0186] In one example, passivation involves exposing the substrate to an exposed amorphous silicon etch stop layer and an exposed tin oxide layer (during the formation of the tin oxide spacers) to make the amorphous silicon etch stop layer more resistant to tin oxide etch chemicals. Passivation is performed by exposing the substrate to a plasma formed in a process gas consisting of O2 (provided at 200 sccm) at 40°C and 5 mTorr. The plasma is formed using a 13.56 MHz RF frequency and 400 W of power per 300 mm substrate. Following passivation, the process chamber is purged with argon, and the substrate is etched to tin oxide at 40°C and 10 mTorr by exposing it to a plasma formed in a process gas consisting of BCl3 (provided at 10 sccm), Cl2 (provided at 190 sccm), and helium (provided at 200 sccm). The plasma is formed using a 13.56 MHz RF frequency and 400 W of power per 300 mm substrate. Next, the processing chamber is cleaned, and the passivation and etching steps are repeated alternately (cleaning is performed after each step) until the tin oxide spacer base is removed.

[0187] In another aspect, an apparatus (as described herein with any etching tool) is provided, wherein the apparatus comprises: (a) a processing chamber having a support for a semiconductor substrate and an inlet for introducing one or more reactants into the processing chamber; and (c) a controller comprising instructions for: (i) passivating a silicon-containing layer on the semiconductor substrate relative to a tin oxide etch chemical; (ii) etching tin oxide on the semiconductor substrate; and (iii) repeating (i) and (ii) alternately. The controller may be further programmed to perform any of the methods described herein.

[0188] Other implementation schemes

[0189] The apparatus and processes described herein can be used in conjunction with photolithography patterning tools or processes, for example, for the manufacture or fabrication of semiconductor devices, displays, LEDs, photovoltaic panels, etc. Typically, but not necessarily, such apparatus and processes will be used in a common manufacturing facility or performed together in a common manufacturing facility. Photolithography patterning typically includes some or all of the following steps, each of which can be performed with a number of possible tools: (1) applying a photoresist to a workpiece (i.e., a substrate) using a spin coater or spray coater; (2) curing the photoresist using a hot plate or oven or UV curing tool; (3) exposing the photoresist to visible or UV or X-ray light using a tool such as a wafer stepper; (4) developing the photoresist to selectively remove the photoresist, thereby patterning it using a tool such as a wet stage; (5) transferring the photoresist pattern to an underlying film or workpiece using a dry or plasma-assisted etching tool; and (6) removing the photoresist using a tool such as an RF or microwave plasma resist stripper.

Claims

1. A method for processing a semiconductor substrate, the method comprising: (a) Providing a semiconductor substrate having exposed silicon-containing material and exposed tin oxide; (b) Passivate the exposed silicon-containing material relative to tin oxide etch chemicals; (c) Etching the exposed tin oxide using the tin oxide etching chemical; as well as (d) Repeat operations (b) and (c) in order to perform operations (b) and (c) in an alternating manner.

2. The method according to claim 1, wherein the exposed silicon-containing material is selected from the group consisting of amorphous silicon, silicon oxide, SiON, SiOC, SiONC, SiC, and SiN.

3. The method of claim 1, wherein (c) comprises etching the tin oxide using a chlorine-based etching chemical substance comprising exposing the semiconductor substrate to a plasma-activated chlorine-containing reactant selected from the group consisting of Cl2, BCl3, and combinations thereof.

4. The method of claim 1, wherein (c) comprises etching the tin oxide using a hydrogen-based etching chemical to result in the formation of tin hydride.

5. The method of claim 1, wherein (c) comprises etching the tin oxide using a hydrogen-based etching chemical by contacting the semiconductor substrate with a plasma-activated hydrogen-containing reactant selected from the group consisting of H2, HBr, NH3, H2O, hydrocarbons and combinations thereof.

6. The method of claim 1, wherein (c) comprises etching the tin oxide using a chlorine-based etching chemical, comprising exposing the semiconductor substrate to a plasma-activated process gas comprising a chlorine-containing reactant and a diluent gas, the chlorine-containing reactant being selected from the group consisting of Cl2, BCl3 and combinations thereof, and the diluent gas being selected from the group consisting of helium, neon, argon, xenon and combinations thereof.

7. The method of claim 1, wherein (b) comprises treating the substrate with an oxygen-containing reactant.

8. The method of claim 1, wherein (b) comprises treating the substrate with a plasma-activated oxygen-containing reactant.

9. The method of claim 1, wherein (b) comprises treating the substrate with plasma formed in a processing gas, the processing gas comprising a gas selected from the group consisting of O2, O3, SO2 and CO2.

10. The method of claim 1, wherein (b) is performed before (c).

11. The method of claim 1, wherein (c) is performed before (b).

12. The method of claim 1, wherein operations (b) and (c) are performed a number of times between 2 and 50.

13. The method of claim 1, wherein the silicon-containing material is selected from the group consisting of amorphous silicon, silicon oxide, SiON, SiOC, SiONC, SiC, and SiN, wherein the passivation in (b) comprises treating the substrate with a plasma-activated oxygen-containing reactant, and wherein (c) comprises etching the tin oxide with a chlorine-based etching chemical substance, which comprises exposing the semiconductor substrate to a plasma-activated chlorine-containing reactant selected from the group consisting of Cl2, BCl3, and combinations thereof.

14. The method of claim 1, wherein (b) comprises treating the semiconductor substrate with a nitrogen-containing reactant.

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