A multi-clock source timing method, device, equipment and medium

By filtering the alternative clock source in the bell source, the most suitable clock source to determine the most suitable clock source according to the time -lapse and synchronization errors, solve the problem of accuracy dynamic changes and frequent clock source switching in the existing technology, and achieve higher levels of clock source switching. Time accuracy and stability.

CN115567141BActive Publication Date: 2025-01-28GUANGDONG POWER GRID CO LTD +1
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Patent Information

Application Number
CN202211195440.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-28
Publication Date
2025-01-28
Estimated Expiration
2042-09-28

AI Technical Summary

Technical Problem

The existing multi-clock source timing method results in a decrease in the stability of the timing signal when the timing accuracy changes dynamically and the clock source is frequently switched.

Method used

By obtaining the alternative clock source of the equipment at the time of the device, the most suitable clock source is performed according to the time extension and synchronization error of the election clock.

Benefits of technology

It improves the accuracy of the clock source, enhances the accuracy and real -time nature of time, reduces the frequency of clock source switching, thereby providing a more stable clock source.

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Abstract

The present invention discloses a multi-clock source timing method, device, equipment and medium. The method comprises: obtaining at least one candidate clock source corresponding to the device to be timed; screening each candidate clock source according to the timing delay of each candidate clock source and the synchronization error of each candidate clock source to determine the clock source corresponding to the device to be timed; and timing the device to be timed according to the clock source corresponding to the device to be timed to achieve time synchronization. The embodiment of the present invention can reduce the clock source switching frequency of multi-clock source timing and improve the accuracy and real-time performance of timing.
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Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a multi-clock source timing method, device, equipment and medium. Background Art

[0002] The time synchronization method of the power system is mainly based on space-based time synchronization, supplemented by ground-based time synchronization, and gradually forms a time synchronization system with multiple clock sources with mutual backup between the sky and the earth.

[0003] The multi-clock source timing method mainly adopts the multi-source timing technology based on preset priority and the multi-source timing technology based on dynamic priority.

[0004] However, due to the dynamic change of timing accuracy during the application of the multi-source timing technology based on preset priority, the timing accuracy of the current clock source may be the worst or the worst among all valid external clock sources. The multi-source timing technology based on dynamic position reduces the stability of the timing signal due to the frequent switching of clock sources. Summary of the invention

[0005] The present invention provides a multi-clock source timing method, device, equipment and medium to reduce the clock source switching frequency of multi-clock source timing and improve the accuracy and real-time performance of timing.

[0006] According to one aspect of the present invention, a multi-clock source timing method is provided, the method comprising:

[0007] Obtain at least one candidate clock source corresponding to the device to be timed;

[0008] Screening the candidate clock sources according to the timing delay of each candidate clock source and the synchronization error of each candidate clock source to determine the clock source corresponding to the device to be timed;

[0009] According to the clock source corresponding to the device to be timed, the device to be timed is timed to achieve time synchronization.

[0010] According to another aspect of the present invention, a multi-clock source timing device is provided, the device comprising:

[0011] The candidate clock source acquisition module is used to acquire at least one candidate clock source corresponding to the device to be timed;

[0012] A screening module, used to screen each of the candidate clock sources according to the timing delay of each of the candidate clock sources and the synchronization error of each of the candidate clock sources, and determine the clock source corresponding to the device to be timed;

[0013] The timing module is used to perform timing on the device to be timed according to a clock source corresponding to the device to be timed, so as to achieve time synchronization.

[0014] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0015] at least one processor; and

[0016] a memory communicatively connected to the at least one processor; wherein,

[0017] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the multi-clock source timing method described in any embodiment of the present invention.

[0018] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the multi-clock source timing method described in any embodiment of the present invention when executed.

[0019] According to another aspect of the present invention, a computer product is provided. The computer program product includes a computer program. When the computer program is executed by a processor, the multi-clock source timing method described in any embodiment of the present invention is implemented.

[0020] The technical solution of the embodiment of the present invention can improve the accuracy of determining the clock source corresponding to the device to be timed by obtaining at least one alternative clock source corresponding to the device to be timed, and when screening each alternative clock source, consider the timing delay of each alternative clock source and the synchronization error of each alternative clock source, so as to improve the accuracy and real-time performance of the timing when using the clock source corresponding to the device to be timed for timing. Compared with the prior art of determining the clock source corresponding to the device to be timed according to the distance between the clock source and the device to be timed, the frequency of clock source switching can be reduced, thereby providing a relatively stable clock source for the device to be timed and improving the accuracy of timing.

[0021] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0023] Figure 1is a flowchart of a multi-clock source timing method provided according to Embodiment 1 of the present invention;

[0024] Figure 2 is a flowchart of a multi-clock source timing method provided according to Embodiment 2 of the present invention;

[0025] Figure 3 is a flowchart of a multi-clock source timing method provided according to Embodiment 3 of the present invention;

[0026] Figure 4 2 is a schematic diagram of the structure of a multi-clock source timing device provided according to Embodiment 4 of the present invention;

[0027] Figure 5 The invention is a schematic diagram of the structure of an electronic device for implementing the multi-clock source timing method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0029] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices. In the technical solution of the present disclosure, the collection, storage, use, processing, transmission, provision and disclosure of the data involved are all in compliance with the provisions of relevant laws and regulations, and do not violate public order and good morals.

[0030] Embodiment 1

[0031] Figure 1A flowchart of a multi-clock source timing method is provided for the first embodiment of the present invention. This embodiment is applicable to the case of time synchronization of power system. The method can be executed by a multi-clock source timing device. The multi-clock source timing device can be implemented in the form of hardware and / or software. The multi-clock source timing device can be configured in an electronic device. Figure 1 As shown, the method includes:

[0032] S110: Acquire at least one candidate clock source corresponding to the device to be timed.

[0033] The device to be timed refers to a device that needs to be timed. Timing refers to sending a high-precision time signal to the device to be timed so that the time signal of the device to be timed is synchronized with the high-precision time signal. Exemplarily, the device to be timed may be a device in an electric power system. A clock source refers to a device that can provide a high-precision time signal. An alternative clock source refers to a device that can provide a high-precision time signal to the device to be timed. The alternative clock source can be used to perform time synchronization on the device to be timed, thereby achieving time synchronization of the device to be timed. The number of alternative clock sources is at least one. The alternative clock sources corresponding to different devices to be timed may be the same, partially the same, or completely different. Exemplarily, in an electric power system, the corresponding alternative clock source may be obtained from a dispatching center, and the dispatching center is used to obtain the alternative clock source so that the alternative clock source can perform time synchronization on the device to be timed.

[0034] Specifically, the dispatching center may obtain at least one candidate clock source corresponding to the device to be timed according to the location of the device to be timed.

[0035] Optionally, the alternative clock sources include at least one of the following: a satellite clock source, a ground base station clock source, and a local clock source.

[0036] Among them, the satellite clock source refers to using the satellite as a clock source to provide high-precision time signals through the satellite. The ground base station clock source refers to using the ground base station in the power system as a clock source to provide high-precision time signals through the ground base station. The local clock source refers to using the device to be timed as a clock source to provide high-precision time signals through the device to be timed. The satellite clock source is always stationed in the air and can always be used as an alternative clock source for the device; the ground base station clock source must be within the communication range of the device to be timed to provide time for it; when both the satellite clock source and the ground base station clock source fail, the local clock source is used for timing.

[0037] Satellite clock sources, ground base station clock sources and local clock sources are used as alternative clock sources, which increases the flexibility of selecting alternative clock sources.

[0038] S120: Screen the candidate clock sources according to the timing delays of the candidate clock sources and the synchronization errors of the candidate clock sources, and determine the clock source corresponding to the device to be timed.

[0039] The timing delay refers to the time required for the clock source to transmit data to the device to be timed, and the transmitted data includes at least high-precision time signal data. The timing delay of the alternative clock source refers to the time required for the alternative clock source to transmit data to the device to be timed. The timing delay of the alternative clock source can be directly obtained from the alternative clock source, and can also be determined by the performance of the alternative clock source. Among them, the performance of the alternative clock source includes at least the data packet transmission rate. The data packet is used to characterize the data transmitted by the alternative clock source to the device to be timed, and the data packet includes at least the high-precision time signal transmitted by the alternative clock source to the device to be timed. In the present application, the timing delay can be determined based on the timing data packet size and the data packet transmission rate. Specifically, the timing delay can be determined in the following way: Among them, i is the number of timing times of the device to be timed. is the timing delay of the alternative clock source CS when the device to be timed SD performs the i-th timing; U(i) is the timing data packet size, that is, the size of the data packet sent by the alternative clock source CS to the device to be timed SD when the device to be timed SD performs the i-th timing; R Z (i) The data packet transmission rate when the device to be timed performs the i-th time synchronization. The data packet transmission efficiency can be determined according to the parameters of the device to be timed. Specifically, the data packet transmission rate can be determined in the following way: Among them, B Z (i) is the bandwidth occupied by data transmission when the device to be synchronized is synchronized for the i-th time; P Z (i) is the transmission power; h Z (i) is the channel gain; σ is Gaussian white noise.

[0040] The synchronization error refers to the error between the time signal of the device to be timed and the standard time signal after the device to be timed is timed. The synchronization error of the alternative clock source refers to the error between the time signal of the device to be timed and the standard time signal after the device to be timed is timed by the alternative clock source. The synchronization error of the alternative clock source can be determined according to the actual situation. For example, it can be determined according to the number of times the device to be timed performs time synchronization. In this application, the synchronization error follows the mean α and the variance β 2 The normal distribution of O SD (i)~N(α,β 2 ). Among them, O SD (i) represents the synchronization error of the time-to-be-synchronized device SD for the i-th synchronization; α and β 2It can be set according to the actual situation. The timing times of the device to be timed can be obtained through the dispatch center, the device to be timed or other methods. The clock source corresponding to the device to be timed refers to the clock source that is used to time the device to be timed.

[0041] Specifically, according to the timing delay of each candidate clock source and the synchronization error of each candidate clock source, a candidate clock source with a smaller timing delay and synchronization error can be screened out from each candidate clock source as the clock source corresponding to the device to be timed. Among them, the timing delay and synchronization error are smaller, which can be the sum of the timing delay and the synchronization error is smaller, or the result obtained after weighted summation of the timing delay and the synchronization error is smaller.

[0042] Exemplarily, a candidate clock source with the smallest timing delay and synchronization error may be selected from various candidate clock sources as the clock source corresponding to the device to be timed.

[0043] S130: Perform timing on the device to be timed according to a clock source corresponding to the device to be timed, so as to achieve time synchronization.

[0044] Specifically, the clock source corresponding to the device to be timed provides time to the device to be timed, that is, provides a high-precision time signal to the device to be timed. After receiving the high-precision time signal, the device to be timed adjusts the time signal of the device to be timed to achieve time synchronization.

[0045] The technical solution of the embodiment of the present invention can improve the accuracy of determining the clock source corresponding to the device to be timed by obtaining at least one alternative clock source corresponding to the device to be timed, and when screening each alternative clock source, consider the timing delay of each alternative clock source and the synchronization error of each alternative clock source, so as to improve the accuracy and real-time performance of the timing when using the clock source corresponding to the device to be timed for timing. Compared with the prior art of determining the clock source corresponding to the device to be timed according to the distance between the clock source and the device to be timed, the frequency of clock source switching can be reduced, thereby providing a relatively stable clock source for the device to be timed and improving the accuracy of timing.

[0046] Embodiment 2

[0047] Figure 2A flowchart of a multi-clock source timing method provided in the second embodiment of the present invention. Based on the above embodiments, this embodiment will screen each of the candidate clock sources according to the timing delay of each of the candidate clock sources and the synchronization error of each of the candidate clock sources to determine the clock source corresponding to the device to be timed. Specifically, the timing error of each of the candidate clock sources is determined according to the timing delay of each of the candidate clock sources and the synchronization error of each of the candidate clock sources; the maximum allowable error of the device to be timed is obtained; the timing error is screened according to the maximum allowable error to determine the screened timing error; and the clock source corresponding to the device to be timed is selected from the candidate clock sources corresponding to the screened timing error. Figure 2 As shown, the method includes:

[0048] S210: Obtain at least one candidate clock source corresponding to the device to be timed.

[0049] S220: Determine the timing error of each candidate clock source according to the timing delay of each candidate clock source and the synchronization error of each candidate clock source.

[0050] The timing error is used to characterize the error between the time signal of the device to be timed and the time signal of the alternative clock source after the timing is received. The alternative clock source corresponds to the timing error, and the timing errors of the alternative clock sources can be the same or different.

[0051] Specifically, for each candidate clock source, a weighted sum is performed on the timing delay and the synchronization error, and the sum result is used as the timing error of each candidate clock source. The weights of the timing delay and the synchronization error can be determined according to the actual situation. Exemplarily, the timing error can be determined in the following manner: Where B is a set of candidate clock sources; x Z (i) Select a variable for the clock source, specifically, x Z (i) = 1, indicating that when the device to be synchronized performs the i-th synchronization, it selects the alternative clock source CS for synchronization, otherwise x Z (i) = 0; O SD (i) represents the synchronization error of the i-th timing of the timing device SD; The timing delay of the alternative clock source CS when the device to be timed SD performs the i-th timing.

[0052] S230: Obtain the maximum allowable error of the device to be timed.

[0053] The maximum allowable error is used to characterize the maximum timing error that the device to be timed can allow. It is understood that if the timing error is greater than or equal to the maximum allowable error, it will affect the normal operation of the device to be timed. The maximum allowable error corresponds to the device to be timed, and the maximum allowable errors of different devices to be timed can be the same or different. The maximum allowable error can be stored in the device to be timed or in the dispatch center.

[0054] Specifically, for the device to be timed, a maximum allowable error of the device to be timed is obtained.

[0055] S240: Screen the timing error according to the maximum allowable error to determine the screened timing error.

[0056] The screened timing error refers to the timing error retained after the timing errors are screened. Specifically, the timing error is screened by comparing the maximum allowable error with the timing error, eliminating the timing errors greater than or equal to the maximum allowable error, retaining the timing errors less than the maximum allowable error, and using the retained timing errors as the screened timing errors.

[0057] S250: Select a clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing errors.

[0058] Specifically, according to the timing errors of the candidate clock sources, the candidate clock source corresponding to the screened timing error is determined, and the candidate clock source with the smaller timing error can be selected from the candidate clock sources corresponding to the screened timing error as the clock source corresponding to the device to be timed. Exemplarily, the candidate clock source with the smallest timing error can be selected as the clock source corresponding to the device to be timed.

[0059] S260: Perform timing on the device to be timed according to a clock source corresponding to the device to be timed, so as to achieve time synchronization.

[0060] The technical solution of the embodiment of the present invention determines the timing error of each candidate clock source through the timing delay of each candidate clock source and the synchronization error of each candidate clock source, screens the timing error according to the maximum allowable error of the device to be timed, determines the screened timing error, selects the clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing error, and by screening the timing error, reduces the number of timing errors, narrows the range of candidate clock source selection, and can improve the accuracy of determining the clock source corresponding to the device to be timed.

[0061] Optionally, obtaining at least one candidate clock source corresponding to the device to be timed includes: obtaining a timing request of the device to be timed; and determining at least one candidate clock source corresponding to the device to be timed according to location information in the timing request.

[0062] A timing request is a request initiated by a device to be timed, which is used to instruct the device to be timed to perform timing. For example, a timing request can be a request initiated by the device to be timed to a dispatch center. Location information is used to represent the geographical location of the device to be timed. The timing request carries the location information of the device to be timed.

[0063] Specifically, when the device to be timed needs to be timed, it initiates a time request to the dispatch center. After receiving the time request, the dispatch center identifies the location information in the time request, and determines at least one alternative clock source corresponding to the device to be timed from the alternative clock sources based on the location information. Exemplarily, the dispatch center can select, based on the geographical location of each alternative clock source, an alternative clock source whose distance between the geographical location of the alternative clock source and the location information in the time request is within a distance threshold from each alternative clock source as the at least one alternative clock source corresponding to the device to be timed. The distance threshold can be set according to actual conditions.

[0064] By obtaining the timing request of the device to be timed and determining at least one alternative clock source corresponding to the device to be timed based on the location information in the timing request, normal communication between each alternative clock source and the device to be timed can be ensured, while reducing the time for data transmission between the alternative clock source and the device to be timed, providing a basis for reducing the timing error.

[0065] Optionally, selecting the clock source corresponding to the device to be timed from the alternative clock sources corresponding to the screened timing error includes: obtaining the number of received timing requests and the number of alternative clock sources; when the received number is less than or equal to the number of alternative clock sources, selecting the alternative clock source corresponding to the received number as the clock source corresponding to the device to be timed; when the received number is greater than the number of alternative clock sources, selecting the clock source corresponding to the device to be timed from the alternative clock sources corresponding to the screened timing error based on performance information of each of the alternative clock sources, the performance information including confidence level or working status.

[0066] The number of received timing requests is used to characterize the total number of received timing requests. The number of alternative clock sources refers to the number of alternative clock sources corresponding to the screened timing error. The alternative clock source corresponding to the received number refers to the alternative clock source arranged in a preset order, and the arrangement order is the same as the received number. Exemplarily, 8 alternative clock sources are sorted, and when the number of received requests is 5, the alternative clock source corresponding to the number of received requests is the alternative clock source with an arrangement order of 5. The performance information of the alternative clock source is used to characterize the working condition of the alternative clock source, including at least confidence and working status. Among them, the confidence is used to characterize the average selection weight of the device to be timed to select the alternative clock source for timing. The working status is used to characterize whether the device to be timed is working normally. The working status includes at least normal and abnormal. Normal means that the alternative clock source works normally and can provide time for the device to be timed. Abnormal means that the alternative clock source works abnormally and cannot provide time for the device to be timed.

[0067] Specifically, after receiving the timing request of the device to be timed, the dispatch center counts the number of timing requests received and the number of alternative clock sources corresponding to the device to be timed. The number of received requests is compared with the number of alternative clock sources. When the number of received requests is less than or equal to the number of alternative clock sources, the same number of alternative clock sources as the number of received requests are selected from the alternative clock sources according to the number of received requests. The selected alternative clock sources are arranged in the order preset by the grant, and the alternative clock sources corresponding to the number of received requests are used as the clock sources corresponding to the device to be timed. When the number of received requests is greater than the number of alternative clock sources, the alternative clock sources corresponding to the screened timing errors are screened again according to the performance information of each alternative clock source, and the alternative clock source with a normal working state and a high confidence level is selected as the clock source corresponding to the device to be timed. Exemplarily, the alternative clock source with a normal working state and the highest confidence level can be selected as the clock source corresponding to the device to be timed.

[0068] By comparing the number of received timing requests and the number of alternative clock sources, different methods are used to determine the clock source corresponding to the device to be timed according to the comparison results, thereby improving the accuracy of determining the clock source corresponding to the device to be timed, and increasing the applicability and flexibility of determining the clock source corresponding to the device to be timed.

[0069] Embodiment 3

[0070] Figure 3A flowchart of a multi-clock source timing method provided in the third embodiment of the present invention. Based on the above embodiments, this embodiment selects the clock source corresponding to the device to be timed from the candidate clock sources corresponding to the timing error after screening according to the performance information of each candidate clock source. Specifically, it is as follows: the confidence of the candidate clock source corresponding to the timing error after screening and the number of times each candidate clock source is selected are obtained to determine the clock source corresponding to the device to be timed; according to the timing error of each candidate clock source and the number of times each candidate clock source is selected, the new confidence of each candidate clock source is determined, and the confidence of each candidate clock source is updated. Figure 3 As shown, the method includes:

[0071] S310: Obtain a timing request from the device to be timed.

[0072] S320: Determine at least one candidate clock source corresponding to the device to be timed according to the location information in the timing request.

[0073] S330: Determine the timing error of each candidate clock source according to the timing delay of each candidate clock source and the synchronization error of each candidate clock source.

[0074] S340: Obtain the maximum allowable error of the device to be timed.

[0075] S350: Screen the timing error according to the maximum allowable error to determine the screened timing error.

[0076] S360: Obtain the number of received timing requests and the number of candidate clock sources.

[0077] S370: When the number of received clocks is less than or equal to the number of candidate clock sources, select the candidate clock source corresponding to the number of received clocks as the clock source corresponding to the device to be timed.

[0078] S380: When the number of received clocks is greater than the number of candidate clock sources, obtain the confidence of the candidate clock sources corresponding to the screened timing errors and the number of times each candidate clock source is selected, and determine the clock source corresponding to the device to be timed.

[0079] The number of times the alternative clock source is selected is used to characterize the number of times the alternative clock source is selected for timing before receiving the timing request of the device to be timed. Specifically, when the number of received clocks is greater than the number of alternative clock sources, for the alternative clock sources corresponding to the screened timing errors, the confidence of the alternative clock sources corresponding to the screened timing errors and the number of times the alternative clock sources are selected are obtained. Based on the confidence and the number of times the alternative clock sources are selected, the selection probability of the alternative clock sources corresponding to each screened timing error is determined. Specifically, the selection probability can be determined in the following way: Among them, i is the number of timing times of the device to be timed. is the selection probability, that is, the probability of selecting the alternative clock source when the timing device performs the i-th timing; The confidence of the candidate clock source when the device to be timed performs the i-th time synchronization; ω is the weight parameter; The number of times the candidate clock source is selected when performing the i-th timing for the device to be timed. The candidate clock source with a higher selection probability is determined as the clock source corresponding to the device to be timed. Exemplarily, the candidate clock source with the highest selection probability can be determined as the clock source corresponding to the device to be timed.

[0080] S390: Determine a new confidence level of each candidate clock source according to the timing error of each candidate clock source and the number of times each candidate clock source is selected, and update the confidence level of each candidate clock source.

[0081] For each candidate clock source, the selection weight of the candidate clock source is determined according to the timing error of the candidate clock source, that is, the inverse of the timing error. Specifically, the selection weight can be determined in the following way: Wherein, reward(i) is the selection weight of the candidate clock source when the device to be synchronized performs the i-th synchronization. The initial value of reward(i) can be set according to the actual situation. For example, the initial value can be set to 0. B is the set of candidate clock sources. x Z (i) Select a variable for the clock source; SD (i) represents the synchronization error of the i-th timing of the timing device SD; The timing delay of the alternative clock source CS when the device to be timed SD performs the i-th timing.

[0082] According to the selection weight of the candidate clock source and the number of times the candidate clock source is selected, the new confidence of the candidate clock source can be determined, which is used to characterize the average value of the selection weight of the candidate clock source until the timing request of the device to be timed is received. Specifically, the new confidence can be determined by: in, The new confidence level of the candidate clock source for the i-th timing of the device to be timed; The number of times the alternative clock source is selected when the device to be timed performs the i+1th time synchronization. Among them, x Z (i) Select a variable for the clock source and update the new confidence level to the confidence level of the candidate clock source.

[0083] The technical solution of the embodiment of the present invention increases the flexibility and accuracy of determining the clock source corresponding to the device to be timed by comparing the number of received timing requests and the number of alternative clock sources, and selecting different methods for determining the clock sources corresponding to the device to be timed according to the comparison results. At the same time, in the prior art, the geographical location of the alternative clock source is used to determine the clock source corresponding to the device to be timed. Since the position of the satellite clock source is constantly changing, when the satellite clock source is selected for timing, the switching frequency of the clock source is high, resulting in reduced stability of the timing. The present invention determines the clock source corresponding to the device to be timed according to the confidence of the alternative clock source, effectively reducing the switching frequency of the clock source and improving the stability of the timing.

[0084] In another embodiment, the selecting the clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing errors according to the performance information of each of the candidate clock sources includes: generating a random number corresponding to the device to be timed; when the random number is less than a threshold, determining any candidate clock source whose working state is an available state among the candidate clock sources corresponding to the screened timing errors as the clock source corresponding to the device to be timed; when the random number is greater than or equal to the threshold, obtaining the confidence of the candidate clock sources corresponding to the screened timing errors to determine the clock source corresponding to the device to be timed; determining a new confidence of each of the candidate clock sources according to the timing errors of each of the candidate clock sources and the number of times each of the candidate clock sources is selected, and updating the confidence of each of the candidate clock sources.

[0085] Specifically, the dispatch center generates a random number for the timing device. The value range of the random number can be determined according to actual conditions. For example, the value range of the random number can be 0 to 1.

[0086] The random number is compared with a threshold value, wherein the threshold value can be set according to actual conditions, and illustratively, the threshold value can be 0.05. According to the comparison result between the random number and the threshold value, when the random number is less than the threshold value, an alternative clock source whose working state is an available state is determined from the alternative clock sources corresponding to the screened timing error. From the alternative clock sources whose working state is an available state, one alternative clock source can be selected as the clock source corresponding to the device to be timed. Among them, the working state being an available state indicates that the alternative clock source can provide time for the device to be timed.

[0087] When the random number is greater than or equal to the threshold, for each candidate clock source, the selection weight of the candidate clock source is determined according to the timing error of the candidate clock source. The confidence of the candidate clock source is determined according to the selection weight of the candidate clock source and the number of times the candidate clock source is selected. The candidate clock source corresponding to the higher confidence is selected from each candidate clock source as the clock source corresponding to the device to be timed. Exemplarily, the candidate clock source corresponding to the highest confidence can be selected as the clock source corresponding to the device to be timed.

[0088] By generating a random number for the device to be timed and determining the clock source corresponding to the device to be timed according to the comparison result between the random number and the threshold, a new idea is provided for determining the clock source corresponding to the device to be timed, and the flexibility and application scope of determining the clock source corresponding to the device to be timed are increased.

[0089] Embodiment 4

[0090] Figure 4 This is a schematic diagram of the structure of a multi-clock source timing device provided by Embodiment 4 of the present invention. Figure 4 As shown, the device includes: an alternative clock source acquisition module 401, a screening module 402 and a timing module 403.

[0091] The candidate clock source acquisition module 401 is used to acquire at least one candidate clock source corresponding to the device to be timed;

[0092] A screening module 402 is used to screen each of the candidate clock sources according to the timing delay of each of the candidate clock sources and the synchronization error of each of the candidate clock sources, and determine the clock source corresponding to the device to be timed;

[0093] The timing module 403 is used to perform timing on the device to be timed according to a clock source corresponding to the device to be timed, so as to achieve time synchronization.

[0094] The technical solution of the embodiment of the present invention can improve the accuracy of determining the clock source corresponding to the device to be timed by obtaining at least one alternative clock source corresponding to the device to be timed, and when screening each alternative clock source, consider the timing delay of each alternative clock source and the synchronization error of each alternative clock source, so as to improve the accuracy and real-time performance of the timing when using the clock source corresponding to the device to be timed for timing. Compared with the prior art of determining the clock source corresponding to the device to be timed according to the distance between the clock source and the device to be timed, the frequency of clock source switching can be reduced, thereby providing a relatively stable clock source for the device to be timed and improving the accuracy of timing.

[0095] Optionally, the screening module 402 includes:

[0096] A timing error determining unit, configured to determine the timing error of each of the candidate clock sources according to the timing delay of each of the candidate clock sources and the synchronization error of each of the candidate clock sources;

[0097] A maximum allowable error determination unit, used to obtain the maximum allowable error of the device to be timed;

[0098] A timing error screening unit, used to screen the timing error according to the maximum allowable error, and determine the screened timing error;

[0099] The clock source determination unit is used to select the clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing errors.

[0100] Optionally, the alternative clock source acquisition module 401 includes:

[0101] A timing request acquisition unit, used to acquire a timing request from a device to be timed;

[0102] The candidate clock source acquisition unit is used to determine at least one candidate clock source corresponding to the device to be timed according to the location information in the timing request.

[0103] Optionally, the clock source determination unit includes:

[0104] A quantity acquisition subunit is used to obtain the number of received timing requests and the number of candidate clock sources;

[0105] A first clock source determination subunit is used to select the candidate clock source corresponding to the received number as the clock source corresponding to the device to be timed when the received number is less than or equal to the number of candidate clock sources;

[0106] The second clock source determination subunit is used to select the clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing error according to the performance information of each of the candidate clock sources when the received number is greater than the number of alternative clock sources, and the performance information includes confidence or working status.

[0107] Optionally, the second clock source determination subunit is specifically configured to:

[0108] Obtain the confidence of the candidate clock source corresponding to the screened timing error and the number of times each candidate clock source is selected, and determine the clock source corresponding to the device to be timed;

[0109] According to the timing error of each candidate clock source and the number of times each candidate clock source is selected, a new confidence level of each candidate clock source is determined, and the confidence level of each candidate clock source is updated.

[0110] Optionally, the second clock source determination subunit is specifically configured to:

[0111] Generate a random number corresponding to the device to be timed;

[0112] When the random number is less than the threshold, any candidate clock source whose working state is available among the candidate clock sources corresponding to the screened timing error is determined as the clock source corresponding to the device to be timed;

[0113] When the random number is greater than or equal to the threshold, the confidence of the candidate clock sources corresponding to the screened timing error is obtained, and the clock source corresponding to the device to be timed is determined;

[0114] According to the timing error of each candidate clock source and the number of times each candidate clock source is selected, a new confidence level of each candidate clock source is determined, and the confidence level of each candidate clock source is updated.

[0115] Optionally, the alternative clock source includes at least one of the following: a satellite clock source, a ground base station clock source and a local clock source.

[0116] The multi-clock source timing device provided in the embodiment of the present invention executes the multi-clock source timing method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0117] Embodiment 5

[0118] Figure 5 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0119] like Figure 5 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0120] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0121] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The processor 11 executes the various methods and processes described above, such as a multi-clock source timing method.

[0122] In some embodiments, the multi-clock source timing method can be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the multi-clock source timing method described above can be performed. Alternatively, in other embodiments, the processor 11 can be configured to perform the multi-clock source timing method in any other appropriate manner (for example, by means of firmware).

[0123] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0124] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0125] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0126] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0127] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0128] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0129] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0130] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A multi-clock source timing method, characterized in that: include: Obtain at least one candidate clock source corresponding to the device to be timed; According to the timing delay of each candidate clock source and the synchronization error of each candidate clock source, each candidate clock source is screened to determine the clock source corresponding to the device to be timed; wherein the timing delay refers to the time required for the clock source to transmit data to the device to be timed; the synchronization error refers to the error between the time signal of the device to be timed and the standard time signal after the device to be timed is timed; According to the clock source corresponding to the device to be timed, the device to be timed is timed to achieve time synchronization; The step of screening each of the candidate clock sources according to the timing delay of each of the candidate clock sources and the synchronization error of each of the candidate clock sources to determine the clock source corresponding to the device to be timed includes: Determine the timing error of each candidate clock source according to the timing delay of each candidate clock source and the synchronization error of each candidate clock source; wherein the timing error refers to the error between the time signal of the device to be timed and the time signal of the candidate clock source after the device to be timed is timed; Obtaining the maximum allowable error of the device to be timed; According to the maximum allowable error, the timing error is screened to determine the screened timing error; Selecting a clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing errors; The step of selecting the clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing errors comprises: Obtaining the number of received timing requests and the number of the candidate clock sources; When the received number is less than or equal to the number of the candidate clock sources, selecting the candidate clock source corresponding to the received number as the clock source corresponding to the device to be timed; When the number of received clocks is greater than the number of candidate clock sources, the clock source corresponding to the device to be timed is selected from the candidate clock sources corresponding to the screened timing error according to performance information of each of the candidate clock sources, wherein the performance information includes confidence or working status.

2. The method according to claim 1, characterized in that The step of obtaining at least one candidate clock source corresponding to the device to be timed comprises: Get the timing request of the device to be timed; At least one candidate clock source corresponding to the device to be timed is determined according to the location information in the timing request.

3. The method according to claim 1, characterized in that The step of selecting the clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing errors according to the performance information of each candidate clock source comprises: Obtain the confidence of the candidate clock source corresponding to the screened timing error and the number of times each candidate clock source is selected, and determine the clock source corresponding to the device to be timed; According to the timing error of each candidate clock source and the number of times each candidate clock source is selected, a new confidence level of each candidate clock source is determined, and the confidence level of each candidate clock source is updated.

4. The method according to claim 1, characterized in that: The step of selecting the clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing errors according to the performance information of each candidate clock source comprises: Generate a random number corresponding to the device to be timed; When the random number is less than the threshold, any candidate clock source whose working state is available among the candidate clock sources corresponding to the screened timing error is determined as the clock source corresponding to the device to be timed; When the random number is greater than or equal to the threshold, the confidence of the candidate clock sources corresponding to the screened timing error is obtained, and the clock source corresponding to the device to be timed is determined; According to the timing error of each candidate clock source and the number of times each candidate clock source is selected, a new confidence level of each candidate clock source is determined, and the confidence level of each candidate clock source is updated.

5. The method according to claim 1, characterized in that The candidate clock source includes at least one of the following: a satellite clock source, a ground base station clock source and a local clock source.

6. A multi-clock source timing device, characterized in that: include: The candidate clock source acquisition module is used to acquire at least one candidate clock source corresponding to the device to be timed; A screening module is used to screen each of the candidate clock sources according to the timing delay of each of the candidate clock sources and the synchronization error of each of the candidate clock sources, and determine the clock source corresponding to the device to be timed; wherein the timing delay refers to the time required for the clock source to transmit data to the device to be timed; the synchronization error refers to the error between the time signal of the device to be timed and the standard time signal after the device to be timed is timed; A timing module, used to perform timing on the device to be timed according to a clock source corresponding to the device to be timed, so as to achieve time synchronization; Wherein, the screening module includes: A timing error determination unit, configured to determine the timing error of each of the candidate clock sources according to the timing delay of each of the candidate clock sources and the synchronization error of each of the candidate clock sources; wherein the timing error refers to the error between the time signal of the device to be timed and the time signal of the candidate clock source after the device to be timed is timed; A maximum allowable error determination unit, used to obtain the maximum allowable error of the device to be timed; A timing error screening unit, used to screen the timing error according to the maximum allowable error, and determine the screened timing error; A clock source determination unit, configured to select a clock source corresponding to the device to be timed from the candidate clock sources corresponding to the screened timing errors; Wherein, the clock source determination unit includes: A quantity acquisition subunit, used to acquire the number of received timing requests and the number of the candidate clock sources; A first clock source determination subunit, configured to select the candidate clock source corresponding to the received number as the clock source corresponding to the device to be timed when the received number is less than or equal to the number of the candidate clock sources; The second clock source determination subunit is used to select the clock source corresponding to the device to be timed from the alternative clock sources corresponding to the screened timing error according to performance information of each of the alternative clock sources when the received number is greater than the number of alternative clock sources, and the performance information includes confidence or working status.

7. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the multi-clock source timing method according to any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the multi-clock source timing method according to any one of claims 1 to 5 when executed.

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