Operational amplifier circuit and electronic device

Abstract

The application discloses an operational amplifier circuit and an electronic device. The operational amplifier circuit comprises a first-stage amplification circuit, a second-stage amplification circuit, a compensation capacitor and a pre-charge module. The input end of the second-stage amplification circuit is electrically connected with the output end of the first-stage amplification circuit. The compensation capacitor is arranged between the input end and the output end of the second-stage amplification circuit. The pre-charge module is used for performing a pre-charge operation on the compensation capacitor when the first-stage amplification circuit is in a non-enabled state, so as to clamp the voltage of the output end of the first-stage amplification circuit to a target voltage. The target voltage is the turn-on voltage of the input transistor of the second-stage amplification circuit. The pre-charge clamping circuit is designed, so that the voltage of the compensation capacitor is pre-charged to the turn-on voltage of the input transistor of the second-stage amplification circuit before the operational amplifier is enabled. Therefore, the setting time of the operational amplifier is shortened, and the overshoot of the output voltage is avoided.

Description

Technical Field

[0001] This application relates to the field of memory technology, specifically to an operational amplifier circuit and electronic device. Background Technology

[0002] Operational amplifier (op-amp) circuits are widely used in analog circuit modules within Flash memory, primarily to generate the analog voltages required for applications such as memory arrays and sensitive amplifiers, offering varying performance characteristics depending on the application requirements. For applications with large partial load variations and high op-amp accuracy requirements, compensation capacitors are needed within the op-amp circuit, serving as dominant poles.

[0003] like Figure 1 The operational amplifier circuit 100 shown includes a two-stage amplification structure (i.e., a first-stage amplifier 110 and a second-stage amplifier 120). When the output load 130 (e.g., load current, load capacitance) varies over a large range, a compensation capacitor C1 is usually placed inside the operational amplifier circuit as a dominant pole, and the output pole B becomes a secondary dominant pole, thereby reducing the impact of changes in the output load on the stability of the operational amplifier circuit.

[0004] However, due to the large capacitance of the compensation capacitor, when the op-amp circuit is enabled, its internal nodes start from 0V. If the dominant pole (such as...) Figure 1 When node A is charged from 0V to the stable operating point, it takes time dt = cdu / i. This will cause the op-amp circuit to lack adjustment capability during this period, which may affect the settling speed due to overshoot of the op-amp circuit's output voltage. Summary of the Invention

[0005] This application provides an operational amplifier circuit and electronic device that, by designing a pre-charge clamping circuit, pre-charges the voltage of the compensation capacitor to the turn-on voltage of the input transistor of the second-stage amplifier circuit before the operational amplifier is enabled, thereby reducing the setup time of the operational amplifier and avoiding overshoot of the output voltage.

[0006] According to one aspect of this application, an operational amplifier circuit is provided, comprising: a first-stage amplifier circuit; a second-stage amplifier circuit, wherein the input terminal of the second-stage amplifier circuit is electrically connected to the output terminal of the first-stage amplifier circuit; a compensation capacitor disposed between the input terminal and the output terminal of the second-stage amplifier circuit; and a pre-charge module, wherein the pre-charge module is used to perform a pre-charge operation on the compensation capacitor when the first-stage amplifier circuit is in a disabled state, so as to clamp the voltage at the output terminal of the first-stage amplifier circuit to a target voltage.

[0007] Optionally, the first-stage amplifier circuit is a differential amplifier.

[0008] Optionally, the target voltage is the turn-on voltage of the input transistor of the second-stage amplifier circuit.

[0009] Optionally, the pre-charge module includes: a first transistor and a current source connected in series, wherein the first transistor is configured as a diode connection, and the current source is used to provide current for the pre-charge operation of the compensation capacitor.

[0010] Optionally, the precharge module further includes a second transistor disposed between the first transistor and the current source and a third transistor disposed between the first transistor and ground, wherein the control electrode of the second transistor receives a charging reverse enable signal and the control electrode of the third transistor receives a charging enable signal.

[0011] Optionally, the threshold voltages of the first transistor and the input transistor of the second stage amplifier circuit are the same.

[0012] Optionally, when the first stage amplifier circuit is in a disabled state, the reverse charging enable signal turns on the second transistor and the reverse charging enable signal turns on the third transistor; when the first stage amplifier circuit is in an enabled state, the reverse charging enable signal turns off the second transistor and the reverse charging enable signal turns off the third transistor.

[0013] Optionally, the pre-charge module includes: a fourth transistor, a fifth transistor, a resistor, and a sixth transistor; the first terminal of the fourth transistor is electrically connected to a power supply terminal, the control terminal of the fourth transistor is electrically connected to the first terminal of the fourth transistor, and the second terminal of the fourth transistor is electrically connected to the first terminal of the fifth transistor; the control terminal of the fifth transistor is electrically connected to the second terminal of the fifth transistor and the first terminal of the resistor, respectively, and the second terminal of the fifth transistor is electrically connected to the first terminal of the resistor; the second terminal of the resistor is electrically connected to the first terminal of the sixth transistor, the control terminal of the sixth transistor receives a charging enable signal, and the second terminal of the sixth transistor is grounded; the common connection point of the second terminal of the fifth transistor and the first terminal of the resistor is electrically connected to the output terminal of the pre-charge module.

[0014] Optionally, the second-stage amplifier circuit is one of a common-source cascode amplifier, a source-follower amplifier, or a common-source amplifier.

[0015] According to another aspect of this application, an embodiment of this application provides an electronic device, the electronic device including the operational amplifier circuit described in the embodiment of this application.

[0016] Optionally, the electronic device is a non-volatile memory.

[0017] The operational amplifier circuit and electronic device provided in this application embodiment, by adding a pre-charge clamping circuit, allow the voltage of the compensation capacitor to be pre-charged to the turn-on voltage of the input transistor of the second-stage amplifier circuit before the operational amplifier is enabled, thereby accelerating the setup speed of the operational amplifier so that the output voltage of the operational amplifier circuit reaches the target value, and also avoiding overshoot of the output voltage. Attached Figure Description

[0018] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0019] Figure 1 This is a schematic diagram of the connection of an existing operational amplifier circuit.

[0020] Figure 2 for Figure 1 The diagram shows an operational amplifier circuit where the output voltage exhibits overshoot.

[0021] Figure 3 This is a schematic diagram of an operational amplifier circuit provided in an embodiment of this application.

[0022] Figure 4 This is a schematic diagram of an embodiment of the precharge module of the operational amplifier circuit described in this application.

[0023] Figure 5 This is a schematic diagram of another embodiment of the precharge module of the operational amplifier circuit described in this application.

[0024] Figure 6 This is a schematic diagram of yet another embodiment of the precharge module of the operational amplifier circuit described in this application.

[0025] Figure 7 This is a schematic diagram of an embodiment of the second-stage amplifier circuit of the operational amplifier circuit described in this application.

[0026] Figure 8 This is a schematic diagram of another embodiment of the second-stage amplifier circuit of the operational amplifier circuit described in this application.

[0027] Figure 9 A schematic diagram of an electronic device provided in an embodiment of this application. Detailed Implementation

[0028] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0029] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0030] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0031] The following disclosure provides many different implementations or examples for carrying out different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or reference letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various implementations and / or arrangements discussed.

[0032] Figure 3 This is a schematic diagram of an operational amplifier circuit provided in an embodiment of this application. Figure 4 This is a schematic diagram of an embodiment of the precharge module of the operational amplifier circuit described in this application. Figure 5 This is a schematic diagram of another embodiment of the precharge module of the operational amplifier circuit described in this application. Figure 6 This is a schematic diagram of yet another embodiment of the precharge module of the operational amplifier circuit described in this application. Figure 7 This is a schematic diagram of an embodiment of the second-stage amplifier circuit of the operational amplifier circuit described in this application. Figure 8 This is a schematic diagram of another embodiment of the second-stage amplifier circuit of the operational amplifier circuit described in this application.

[0033] See Figures 3 to 8This application provides an operational amplifier circuit 300, comprising: a first-stage amplifier circuit 310; a second-stage amplifier circuit 320, the input terminal of the second-stage amplifier circuit 320 being electrically connected to the output terminal of the first-stage amplifier circuit 310; a compensation capacitor C1 disposed between the input terminal and the output terminal of the second-stage amplifier circuit 320; and a pre-charge module 340, the pre-charge module 340 being used to perform a pre-charge operation on the compensation capacitor C1 when the first-stage amplifier circuit 310 is in a disabled state, so as to clamp the voltage at the output terminal of the first-stage amplifier circuit 310 to a target voltage.

[0034] Specifically, the first-stage amplifier circuit 310 can be a differential amplifier. The first-stage amplifier circuit 310 has a first input terminal, a second input terminal, and an output terminal. The first input terminal is a positive input terminal, and the second input terminal is a negative input terminal. One of the first input terminal and the second output terminal receives the input signal Vin, and the other receives the reference voltage Vref. Typically, the operational amplifier circuit 300 also includes a feedback path disposed between the output terminal and the input terminal. Due to the circuit symmetry characteristic of differential amplifiers, the first-stage amplifier circuit 310 can stabilize the operating point. Furthermore, differential amplifiers can also be used to amplify differential-mode signals and suppress common-mode signals.

[0035] The second-stage amplifier circuit 320 includes: an input terminal A, an output terminal B, a PMOS transistor 321, and an NMOS transistor 322. The gate of the PMOS transistor 321 is connected to the input terminal A, and the source of the PMOS transistor 321 is connected to the power supply voltage. The PMOS transistor 321 is the input transistor and is used as a single-transistor amplifier. The drains of both the PMOS transistor 321 and the NMOS transistor 322 are connected to the output terminal B. The source of the NMOS transistor 322 is grounded, and the gate of the NMOS transistor 322 receives the bias voltage Vbias. The output terminal B of the second-stage amplifier circuit 320 also serves as the output terminal of the operational amplifier circuit 300. Figure 3 In the illustrated embodiment, a compensation capacitor C1 is provided between the input and output terminals of the second-stage amplifier circuit 320. This compensation capacitor C1 can serve as the dominant pole inside the operational amplifier circuit 300 to reduce the impact of load changes on the stability of the operational amplifier circuit.

[0036] Because the compensation capacitor has a large capacitance value, it takes a long time for the main pole of the op-amp circuit to charge from 0V to the stable operating point when the op-amp circuit is enabled. During this time, the op-amp circuit lacks adjustment capability, which may lead to overshoot in the output voltage and affect the settling speed. Therefore, this application adds a pre-charge module 340 to the original op-amp circuit to reduce the settling time and prevent output voltage overshoot.

[0037] The pre-charge module 340 is used to pre-charge the compensation capacitor C1 when the first-stage amplifier circuit 310 is in a disabled state, thereby clamping the voltage at the output terminal of the first-stage amplifier circuit 310 to the target voltage. The disabled state of the first-stage amplifier circuit 310 means there is no input signal Vin, and the operational amplifier circuit 300 does not amplify the signal. When the first-stage amplifier circuit 310 is disabled, the operational amplifier circuit 300 does not amplify the signal, and its output terminal can be considered equivalent to ground; therefore, one end of the compensation capacitor C1 is also equivalent to ground. Before the operational amplifier circuit 300 receives the input signal Vin, the pre-charge module 340 charges the compensation capacitor C1, causing the voltage at the input terminal A of the second-stage amplifier circuit 320 to rise to the target voltage, thereby improving the setup speed of the operational amplifier circuit 300.

[0038] In addition, the precharge time Tpre and precharge current Ipre of the precharge module 340 can be flexibly adjusted according to the voltage of the compensation capacitor C1 required for different secondary amplification structures.

[0039] See Figure 4 As shown, the pre-charge module 340 includes a first transistor P1 connected in series and a current source Is. The first transistor P1 is configured as a diode connection, and the current source Is is used to provide current for the pre-charge operation of the compensation capacitor C1.

[0040] Optionally, the pre-charge module 340 further includes a second transistor P2 disposed between the first transistor P1 and the current source Is, and a third transistor N3 disposed between the first transistor P1 and ground. The control electrode of the second transistor P2 receives a charging enable signal Clamp_enb, and the control electrode of the third transistor N3 receives a charging enable signal Clamp_en. In this embodiment, the first transistor P1 and the second transistor P2 are PMOS transistors, and the third transistor N3 is an NMOS transistor. The charging enable signals Clamp_enb and Clamp_en are out of phase, allowing the second transistor P2 and the third transistor N3 to be simultaneously turned off or simultaneously turned on.

[0041] When the first stage amplifier circuit 310 is in an disabled state, the second transistor P2 and the third transistor N3 are turned on; when the first stage amplifier circuit 310 is in an enabled state, the second transistor P2 and the third transistor N3 are turned off.

[0042] The current source Is of the pre-charge module 340 is used to provide current to charge the compensation capacitor C1. During the charging process, such as Figure 3 The potential of node A shown gradually increases. Since the first transistor P1 is configured as a diode, the voltage across the compensation capacitor C1 (i.e., as shown)... Figure 3The potential of node A shown rises to (VDD-Vt) and then stops rising, where Vt is the threshold voltage of PMOS transistor P1. In other words, the voltage clamp at the output of the first-stage amplifier circuit 310 is located at the voltage difference between the power supply voltage and the threshold voltage of the first transistor P1. It should be noted that in this embodiment, the threshold voltages of the first transistor P1 and the input transistor (PMOS transistor 321) of the second-stage amplifier circuit 320 are the same, so when the operational amplifier circuit 300 receives the input signal Vin, the PMOS transistor 321 is already in the conducting state.

[0043] The precharge module 340 ensures that the voltage of the compensation capacitor C1 reaches the target voltage, i.e. the turn-on voltage of the input transistor of the second-stage amplifier circuit 320, before the first-stage amplifier circuit is enabled, by controlling the precharge time and precharge current.

[0044] When the first-stage amplifier circuit is enabled, the second transistor P2 and the third transistor N3 can be turned off by the charging enable signal Clamp_enb and the charging enable signal Clamp_en, thus avoiding the introduction of low-impedance nodes.

[0045] Figure 5 Another implementation of the precharge module 340 is shown. In this embodiment, the precharge module 340 includes a fourteenth transistor P14, a current source Is, a resistor R2, and a first switch S1. The fourteenth transistor P14 is configured as a diode. The first terminal of the fourteenth transistor P14 is electrically connected to one end of the current source Is, and the second terminal of the fourteenth transistor P14 is electrically connected to one end of the first switch S1. The resistor R2 is disposed between the second terminal of the fourteenth transistor P14 and ground. The other end of the current source Is is connected to the power supply terminal VDD. The other end of the first switch S1 is connected to the input terminal A of the second-stage amplifier circuit 320. The first switch S1 is turned on when a charging enable signal is received, so that the current source Is charges the compensation capacitor C1.

[0046] The precharge module 340 can also be designed as follows: Figure 6 As shown. The pre-charge module 340 includes: a fourth transistor P4, a fifth transistor P5, a resistor R1, and a sixth transistor N6. The fourth transistor P4, the fifth transistor P5, the resistor R1, and the sixth transistor N6 are connected in series between the power supply terminal VDD and ground. The fourth transistor P4 and the fifth transistor P5 are, for example, PMOS transistors, with the fourth transistor P4 configured as a reverse diode connection and the fifth transistor P5 configured as a forward diode connection. The control electrode of the sixth transistor N6 receives a charging enable signal. The intermediate node of the fifth transistor P5 and the resistor R1 is electrically connected to node A.

[0047] exist Figure 6In the pre-charge module 340 shown, the leakage current of the reverse PN junction formed by the fifth transistor P5 is used to charge the compensation capacitor C1 and clamp the voltage of node A. Furthermore, since the current source Is is not used in this embodiment, the power consumption of the current source (DC) can be reduced.

[0048] Continue reading Figure 3 The second-stage amplifier circuit 320 can be one of the following: a common-source cascode amplifier, a source follower amplifier, or a common-source amplifier.

[0049] like Figure 7 The second-stage amplifier circuit 320 shown is a common-source, common-gate amplifier. Specifically, the common-source, common-gate amplifier may include: a seventh transistor P7, an eighth transistor P8, a ninth transistor N9, and a tenth transistor N10; wherein the first terminal of the seventh transistor P7 is connected to the power supply terminal VDD, the control terminal of the seventh transistor P7 receives a bias voltage Vbias, and the second terminal of the seventh transistor P7 is electrically connected to the first terminal of the eighth transistor P8; the control terminal of the eighth transistor P8 is connected to the input terminal of the second-stage amplifier circuit 320, and the second terminal of the eighth transistor P8 is connected to the first terminal of the ninth transistor N9; the control terminal of the ninth transistor N9 receives a first bias voltage VBN1, and the second terminal of the ninth transistor N9 is electrically connected to the first terminal of the tenth transistor N10; the control terminal of the tenth transistor N10 receives a second bias voltage VBN2, and the second terminal of the tenth transistor N10 is grounded. In this embodiment, the seventh transistor P7 and the eighth transistor P8 are PMOS transistors, and the ninth transistor N9 and the tenth transistor N10 are NMOS transistors. By using a common-source, common-gate amplifier, the operational amplifier gain can be increased.

[0050] In addition, the second-stage amplifier circuit 320 can also be as follows: Figure 8 The source follower amplifier is shown. When the second-stage amplifier circuit 320 uses, as shown... Figure 8In the source follower amplifier shown, the negative input terminal receives the input signal Vin, and the positive input terminal receives the reference voltage Vref. Specifically, the source follower amplifier may include: an eleventh transistor P11, a twelfth transistor N12, and a thirteenth transistor N13; wherein the first terminal of the eleventh transistor P11 is connected to the power supply terminal VDD, the control terminal of the eleventh transistor P11 receives the reference voltage Vbias, and the second terminal of the eleventh transistor P11 is electrically connected to the first terminal of the twelfth transistor N12; the control terminal of the twelfth transistor N12 serves as the input terminal of the second-stage amplifier circuit 320, and the second terminal of the twelfth transistor N12 is electrically connected to the first terminal of the thirteenth transistor N13; the control terminal of the thirteenth transistor N13 receives a third bias voltage VBN3, and the second terminal of the thirteenth transistor N13 is grounded. In this embodiment, the eleventh transistor P11 is a PMOS transistor, and the twelfth and thirteenth transistors N12 and N13 are NMOS transistors. By using a source follower amplifier, the output impedance can be reduced.

[0051] Therefore, a high gain and a large output signal range can be achieved through a two-stage amplification structure (first-stage amplifier circuit 310 and second-stage amplifier circuit 320).

[0052] Furthermore, it should be noted that the target voltage mentioned above is the turn-on voltage of the input transistor (not shown in the figure) of the second-stage amplifier circuit 320. In such cases... Figure 7 In the embodiment shown, the input transistor is the eighth transistor P8. In such... Figure 8 In the embodiment shown, the input transistor is the twelfth transistor N12.

[0053] See Figure 9 , Figure 9 This is a schematic diagram of the architecture of an electronic device according to an embodiment of this application. The electronic device 800 may include an operational amplifier circuit 300, the specific design of which is as described above and will not be repeated here. The output voltage of the operational amplifier circuit 300 in this electronic device can smoothly reach the target value without overshoot. Furthermore, the operational amplifier circuit 300 has the characteristic of fast setup speed.

[0054] In some embodiments, the electronic device 800 includes a memory. Specifically, the memory may be dynamic random access memory or non-volatile memory. Non-volatile memory refers to a type of memory that retains data even after power is turned off, meaning that the stored data will not be lost after power is turned off. Examples include flash memory, phase-change random access memory (PRAM) chips, magnetic random access memory (MRAM) chips, or resistive random access memory (RRAM).

[0055] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0056] The operational amplifier circuit and electronic device provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. An operational amplifier circuit, characterized in that, include: First-stage amplifier circuit; The second-stage amplifier circuit has its input terminal electrically connected to the output terminal of the first-stage amplifier circuit. A compensation capacitor is disposed between the input and output terminals of the second-stage amplifier circuit. as well as A pre-charge module is used to perform a pre-charge operation on the compensation capacitor when the first-stage amplifier circuit is in an disabled state, so as to clamp the voltage at the output terminal of the first-stage amplifier circuit to a target voltage, wherein the target voltage is the turn-on voltage of the input transistor of the second-stage amplifier circuit.

2. The operational amplifier circuit according to claim 1, characterized in that, The first stage amplifier circuit is a differential amplifier.

3. The operational amplifier circuit according to claim 1, characterized in that, The pre-charge module includes a first transistor and a current source connected in series. The first transistor is configured as a diode connection, and the current source is used to provide current for the pre-charge operation of the compensation capacitor.

4. The operational amplifier circuit according to claim 3, characterized in that, The precharge module further includes a second transistor disposed between the first transistor and the current source and a third transistor disposed between the first transistor and ground. The control electrode of the second transistor receives a charging reverse enable signal, and the control electrode of the third transistor receives a charging enable signal.

5. The operational amplifier circuit according to claim 3, characterized in that, The threshold voltages of the first transistor and the input transistor of the second stage amplifier circuit are the same.

6. The operational amplifier circuit according to claim 4, characterized in that, When the first-stage amplifier circuit is in an enabled state, the reverse charging enable signal turns on the second transistor and the reverse charging enable signal turns on the third transistor. When the first-stage amplifier circuit is in an enabled state, the reverse charging enable signal turns off the second transistor and the reverse charging enable signal turns off the third transistor.

7. The operational amplifier circuit according to claim 1, characterized in that, The pre-charge module includes: a fourth transistor, a fifth transistor, a resistor, and a sixth transistor; the first terminal of the fourth transistor is electrically connected to a power supply terminal, the control terminal of the fourth transistor is electrically connected to the first terminal of the fourth transistor, and the second terminal of the fourth transistor is electrically connected to the first terminal of the fifth transistor; the control terminal of the fifth transistor is electrically connected to the second terminal of the fifth transistor and the first terminal of the resistor, respectively, and the second terminal of the fifth transistor is electrically connected to the first terminal of the resistor; the second terminal of the resistor is electrically connected to the first terminal of the sixth transistor, the control terminal of the sixth transistor receives a charging enable signal, and the second terminal of the sixth transistor is grounded; the common connection point of the second terminal of the fifth transistor and the first terminal of the resistor is electrically connected to the output terminal of the pre-charge module.

8. The operational amplifier circuit according to claim 1, characterized in that, The second-stage amplifier circuit is one of the following: a common-source cascode amplifier, a source follower amplifier, or a common-source amplifier.

9. An electronic device, characterized in that, The electronic device includes the operational amplifier circuit according to any one of claims 1 to 8.

10. The electronic device according to claim 9, characterized in that, The electronic device is a memory.

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