A method and device for automatically generating parameters in RAID verification and a storage medium

Abstract

This invention provides a method, apparatus, and storage medium for automatically generating parameters during RAID verification. The method includes: starting by inputting configuration information; determining if the operating mode is input; if not, input failure and re-inputting configuration information; if so, performing full striping or read-modify-write operations for RAID 6 / TP. In full striping mode, if it is RAID 6, XOR / multiplication / division calculations are performed on the RAID 6 Galois domain to obtain the construction parameter array in full striping mode; if it is RAID TP, XOR / multiplication / division calculations are performed on the RAID TP Galois domain to obtain the construction parameter array in full striping mode. In read-modify-write mode, if it is RAID 6, XOR / multiplication / division calculations are performed on the RAID 6 Galois domain to obtain the construction parameter array in read-modify-write mode; if it is RAID TP, XOR / multiplication / division calculations are performed on the RAID TP Galois domain to obtain the construction parameter array in read-modify-write mode. This can accelerate the verification process of RAID algorithm modules.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and specifically to a method, apparatus, and storage medium for automatically generating parameters in RAID verification. Background Technology

[0002] RAID (Redundant Array of Independent Disks) is widely used in industry due to its superior data protection and higher throughput. However, the complexity and variability of RAID algorithms increase the difficulty of designing and implementing them, leading to increasingly complex verification of RAID algorithm chips. Verifying RAID algorithm chips typically requires comprehensive consideration of the RAID level, different arrangements of data and parity disks within the same level, and encoding / decoding scenarios. The sub-scenarios to be verified often involve millions of disks, and the algorithm parameters involved in the verification process have various possibilities depending on the specific scenario, making the calculation of these parameters complex. Currently, the processing of algorithm parameters during the verification of RAID algorithm chips typically employs the following methods:

[0003] 1. The algorithm model is implemented using the advanced matrix / array language Matlab. Different arrangements and combinations of data disks and parity disks within the same RAID level, along with parameters used in specific encoding / decoding scenarios, are centrally generated, saved, and output in data file format. During the verification process, the parameters involved in the target scenario are retrieved by loading the data file and looking up a table.

[0004] 2. Considering the numerous verification sub-scenarios arising from different RAID levels, varying arrangements of data and parity disks within the same RAID level, and encoding / decoding scenarios, verifying each sub-scenarios individually would be extremely labor-intensive. To simplify the verification process and improve its effectiveness, higher-priority sub-scenarios and boundary scenarios are typically selected for verification in situations where chip design and verification complexity requirements are low and risks are controllable.

[0005] 3. Implement the algorithm model using the verification language System Verilog, and integrate the algorithm model into the verification environment. During the verification process, the target algorithm parameters required for the verification sub-scenarios can be generated in real time by taking the RAID-related configuration information as input to the algorithm model, based on different RAID levels, different arrangements of data disks and parity disks in the same RAID level, and the verification sub-scenarios composed of encoding / decoding scenarios.

[0006] Method 1 described above is relatively easy to develop using Matlab to implement the algorithm model. However, the data exchange between the algorithm module and the verification environment is via data files. If there are many sub-scenarios to be verified, the generated data files will be very large, resulting in a significant overhead on memory resources. In addition, the time required to access the data files and retrieve valid information during the verification process is long, leading to poor real-time performance.

[0007] Method 2 described above is a workaround for verification. It can be appropriately used when chip design and verification complexity requirements are low and risks are controllable, helping to save R&D costs. However, it is not recommended when chip design and verification complexity requirements are high. Using Method 2 for specific scenarios to be verified makes it difficult to achieve full coverage of the scenarios, which may lead to the leakage of design bugs to some extent. Furthermore, the completeness of module verification is difficult to guarantee.

[0008] The use of the verification language System Verilog in Method 3 integrates the operation of the algorithm model into the verification environment, which can be controlled by the verification test cases. However, the implementation of the algorithm module itself in System Verilog is difficult, and it is extremely inconvenient to carry out secondary development or maintenance in the later stages. It also has poor portability and flexibility. Summary of the Invention

[0009] In view of this, the purpose of this invention is to propose a method, apparatus and storage medium for automatic parameter generation in RAID verification. This method can automatically generate algorithm parameters in the RAID verification process without providing the source code of the RAID algorithm model implemented in C language, thereby accelerating the verification progress of the RAID algorithm module and solving the technical problems in the background art.

[0010] To achieve the above objectives, this invention provides a method for automatically generating parameters during RAID verification, the method comprising the following steps:

[0011] Start by entering configuration information. Determine if the working mode is input. If not, the input failed, and you need to re-enter the configuration information. If it is, then perform full striping or read / modify / write operations for RAID6 / TP.

[0012] In full-strip mode, if it is RAID6, XOR / multiplication / division calculations are performed on the RAID6 Galois domain to obtain the construction parameter array in RAID6 full-strip mode; if it is RAIDTP, XOR / multiplication / division calculations are performed on the RAIDTP Galois domain to obtain the construction parameter array in RAIDTP full-strip mode.

[0013] In read-modify-write mode, if it is RAID6, XOR / multiplication / division calculations are performed on the RAID6 Galois domain to obtain the construction parameter array in RAID6 read-modify-write mode; if it is RAIDTP, XOR / multiplication / division calculations are performed on the RAIDTP Galois domain to obtain the construction parameter array in RAIDTP read-modify-write mode.

[0014] As a further aspect of the present invention, the automatic parameter generation method in RAID verification is implemented using C language to implement the RAID algorithm, including an algorithm parameter generation module. The algorithm parameter generation module is used to solve the algorithm parameters under different combinations and arrangements of data disks and parity disks in RAID6 and RAIDTP levels.

[0015] As a further aspect of the present invention, the automatic parameter generation method in RAID verification further includes DPI-C interface function sending configuration information, wherein the DPI-C interface function sending configuration information includes: RAID level, number of data disks, number of parity disks, location of failed disk, and working mode as input.

[0016] As a further aspect of the present invention, the DPI-C interface function is also used to issue an identifier for checking whether it is enabled. If the identifier is 1, the RAID check is enabled, and the algorithm parameter generation module checks the generated parameter information internally; if the identifier is 0, the RAID check is disabled.

[0017] As a further aspect of the present invention, the custom DPI-C interface function is: DpicIntf_RaidParam_Gen(); used to transfer the relevant configuration information in the RAID group from the UVM verification environment to the algorithm parameter generation module, and to return the target parameter information obtained after the algorithm parameter generation module has performed calculations to the UVM verification environment.

[0018] As a further aspect of the present invention, the automatic parameter generation method in RAID verification further includes:

[0019] In the verification environment, the configuration information required for the RAID algorithm is generated through reasonable constraints, including: RAID level, number of data disks, number of parity disks, working mode, location of failed disks in decoding scenarios, and check flag information;

[0020] The packaged configuration information is transmitted to the algorithm parameter generation module via DPI-C. The algorithm parameter generation module performs internal calculations to generate target parameter information, which is then transmitted back to the UVM verification environment via DPI-C.

[0021] In the UVM verification environment, the target parameter information is transmitted to the DUT and the reference model, and both participate in the encoding and decoding operations in specific scenarios.

[0022] As a further aspect of the present invention, the automatic parameter generation method in RAID verification further includes:

[0023] The stimulus is generated and injected into the design under test (DUT) and the reference model, driving the verification platform to start working normally.

[0024] The checker will capture and cache information from the DUT output port and the reference model output port in real time. It will then compare the cached data one by one according to the data slice format. If the comparison results are inconsistent, the verification test case will fail; if the comparison results are consistent, the verification test case will succeed.

[0025] The coverage collector dynamically collects coverage information during the verification process.

[0026] As a further aspect of the present invention: the coverage collector dynamically collects coverage information during the verification process. If the verification test case simulation passes, the coverage information is recorded and statistically analyzed.

[0027] In another aspect, the present invention provides an apparatus for automatically generating parameters in RAID verification, comprising a memory and a processor, wherein the memory stores a computer program, which, when executed by the processor, performs any of the above-described methods for automatically generating parameters in RAID verification according to the present invention.

[0028] In another aspect, the present invention provides a computer-readable storage medium storing computer program instructions that, when executed, implement the parameter automatic generation method for RAID verification according to any of the above-described methods.

[0029] Compared to traditional implementations, the main advantages of this invention are:

[0030] 1. This invention discloses a method, apparatus, and storage medium for automatically generating parameters during RAID verification. It proposes a method for automatically generating algorithm parameters during RAID verification, applicable to different RAID levels and encoding / decoding scenarios with different combinations of data and parity disks. This contrasts with traditional RAID verification strategies that only consider certain typical scenarios under a specified RAID level. The scope of application of the automatic parameter generation method described in this invention includes, but is not limited to, RAID function verification based on the RS algorithm extension. All hardware verification and testing processes based on FEC encoding / decoding functions can be extended or expanded to use this method.

[0031] 2. The algorithm generation module implemented in C language, compared with the traditional method of generating algorithm parameter files through Matlab in RAID verification, the method described in this patent organically integrates the algorithm generation module with the UVM verification environment through the DPI-C interface. During the verification process, the required target parameter information can be generated in real time, while saving the access time and memory resource overhead of generating / reading data files.

[0032] 3. The RAID calculation and checking function in the algorithm parameter generation module verifies the accuracy of the generated target parameters, thereby ensuring that the parameters output from the algorithm parameter generation module and input to the excitation module in the UVM verification environment via DPI-C are valid parameter information. This method improves the fault tolerance of the method described in this patent during the generation of the required target algorithm parameters in the RAID verification process to a certain extent.

[0033] 4. The verification environment built on UVM can cover 99.9% of the encoding / decoding scenarios involved in RAID verification with random + targeted excitation. The inspector component can realize the automatic comparison of results during RAID verification. The coverage collector can collect key information during RAID verification. By analyzing the coverage results, the uncovered situations can be discovered in a timely manner. Verifiers can modify constraints or add verification cases for the uncovered parts, and ensure the completeness of verification through continuous iterative regression.

[0034] These or other aspects of this application will become more apparent from the following description of embodiments. It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the application. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.

[0036] In the diagram:

[0037] Figure 1 This is a flowchart of the algorithm parameter solving process in the automatic parameter generation method for RAID verification of the present invention;

[0038] Figure 2 This is a flowchart illustrating the algorithm parameter checking process in the automatic parameter generation method for RAID verification of the present invention.

[0039] Figure 3 This is a diagram of the verification environment structure in the automatic parameter generation method for RAID verification of the present invention;

[0040] Figure 4 This is a schematic diagram of an embodiment of a computer-readable storage medium for implementing the automatic parameter generation method in RAID verification according to the present invention;

[0041] Figure 5 This is a schematic diagram of the hardware structure of an embodiment of the RAID verification parameter automatic generation device for implementing the RAID verification parameter automatic generation method of the present invention. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings.

[0043] It should be noted that all uses of "first" and "second" in the embodiments of the present invention are for the purpose of distinguishing two different entities or different parameters with the same name. Therefore, "first" and "second" are merely for convenience of expression and should not be construed as limiting the embodiments of the present invention. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, such as other steps or units inherent in a process, method, system, product, or device that includes a series of steps or units.

[0044] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0045] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0046] The flowchart shown in the attached diagram is for illustrative purposes only and does not necessarily include all content and operations / steps, nor does it require execution in the described order. For example, some operations / steps can be broken down, combined, or partially merged, so the actual execution order may change depending on the actual situation.

[0047] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0048] This invention proposes an automated method for generating algorithm parameters during RAID verification. This method can quickly generate algorithm parameters during RAID verification without providing the source code of the RAID algorithm model implemented in C language, thereby accelerating the verification progress of the RAID algorithm module.

[0049] To clarify, this application primarily uses RAID6 and RAIDTP, based on RS algorithm extensions, as examples to introduce methods for automatically generating algorithm parameters used in verification processes for different encoding / decoding scenarios. The application scope of the automatic parameter generation method described in this invention patent is not limited to RAID function verification based on RS algorithm extensions; all hardware verification and testing processes based on FEC encoding / decoding functions can be extended or expanded to use this method.

[0050] This invention provides a method, apparatus, and storage medium for automatically generating parameters in RAID verification, comprising the following:

[0051] 1. For different RAID levels, it supports any combination of data disk (m) and parity disk (n) of the same RAID level (i.e., m+n), and can generate algorithm parameters for the encoding scenario respectively.

[0052] 2. For different RAID levels, it supports random location of failed disks and random number of failed disks within the same RAID level (e.g., RAID6 supports 1 or 2 failed disks, RAIDTP supports 1, 2 or 3 failed disks), and can generate algorithm parameters for decoding scenarios respectively.

[0053] 3. The core components of the RAID algorithm are implemented in C language, and related peripheral components are developed to ensure that the algorithm components are compatible with the hardware. Through the DPI-C interface functions (API functions for the core components of the RAID algorithm implemented in C language) developed by the verification personnel, the algorithm generation module and the verification environment can be organically combined.

[0054] With the advent of the information age, higher demands have been placed on information storage. The emergence of disk array technology has effectively solved the problem of large-scale data storage, but this has also led to increased complexity in the encoding / decoding computation process due to continuous disk expansion. Disk expansion increases the range of scenarios for constructing verification stimuli, and the increased algorithm complexity also increases the difficulty of constructing verification stimuli. Therefore, ensuring that the robustness of the algorithm is fully checked while simplifying the complexity of constructing algorithm stimuli during verification is of significant practical importance.

[0055] Considering the practical significance described above, this application implements a RAID algorithm component based on the C language. Through derivation and calculation, the algorithm component can automatically generate algorithm parameters for RAID6 and RAIDTP under encoding / decoding scenarios, with arbitrary combinations of data and parity disks. The algorithm component is connected to the UVM verification environment via a DPI-C interface, enabling rapid construction of stimuli during RAID group verification. The verification environment's checking module automatically compares the results, thus ensuring the completeness of RAID algorithm verification while achieving rapid verification. The implementation steps are as follows:

[0056] (1) Algorithm parameter generation component, which mainly generates the algorithm parameters involved in the encoding / decoding process of RS-based RAID6 and RAIDTP:

[0057] Encoding refers to the process of solving for the parity disk data given the data disk information in RAID; decoding refers to the process of recovering a failed disk by using redundant disks for fault tolerance in RAID.

[0058] Taking the calculation of parameters for the full stripe write encoding process of RAIDTP(4+3) as an example, D0, D1, D2, and D3 are data disks, and all data disks (i.e., D′0, D′1, D′2, and D′3) need to be updated at the same time. D4, D5, and D6 are parity disks (which correspond to P disk, Q disk, and R disk respectively). Solve for the new parity disk data D′4(P′), D′5(Q′), and D′6(R′).

[0059] The disks in the RAID group are distributed as follows: D0, D1, D2, D3, D4, D5, D6

[0060] Assuming the parameters for all disks are A0, A1, A2, A3, A4, A5, and A6, respectively, they satisfy the following formula for RAIDTP(4+3):

[0061]

[0062] For the above formula, through derivation (derivation process omitted), we can obtain D′4(P′), D′5(Q′), and D′6(R′) as follows:

[0063]

[0064]

[0065]

[0066] The above derivation process uses a RAIDTP configuration with 4 data disks and 3 parity disks as an example. Let's take the first equation as an example: In the equation... These are all target algorithm parameters that need to be solved during the encoding process. The numerical range of natural number operations is uncontrollable, and hardware implementation is complex; therefore, a Galois field is introduced, i.e., operations are performed within a finite field. The algorithm parameter calculation described in this application is based on a Galois field with a 0x11D structure. This Galois field structure satisfies the hardware implementation relationship that 8 bits equal 1 byte, which can reduce the computational complexity during implementation. In practical applications, other combinations of data disks and parity disks may appear; through generalization, the following can be obtained:

[0067]

[0068]

[0069]

[0070] In the above three formulas, D x This represents any data disk. Similarly, for RAID6, by generalization, we can obtain:

[0071]

[0072]

[0073] In the two formulas above, D x This refers to any data disk. Special note: The encoding / decoding algorithms used in RAID6 and RAIDTP described in this application are consistent. The algorithm parameters in the decoding process can be obtained by referring to the derivation of the encoding process. Taking RAID6 as an example, if D... i D j If the hard drive fails, the following will occur:

[0074]

[0075]

[0076] Where D k This represents any hard drive. As can be deduced above, for any two drives that fail during RAID6 decoding, the data information of the failed drives can be recovered from the other hard drives.

[0077] In summary, algorithm parameters are indispensable and important factors in RAID encoding / decoding scenarios, whether for solving arbitrary parity disk data during the encoding process or for solving arbitrary data disk data during the decoding process.

[0078] In an embodiment of the present invention, the process of implementing the RAID algorithm using C language is described as follows:

[0079] The algorithm parameter generation module is mainly used to solve algorithm parameters under different combinations and arrangements of data disks and parity disks in RAID6 and RAIDTP levels. The process is as follows: Figure 1 and Figure 2 As shown:

[0080] Start by entering configuration information. Determine if the working mode is input. If not, the input failed, and you need to re-enter the configuration information. If it is, then perform full striping or read / modify / write operations for RAID6 / TP.

[0081] In full-strip mode, if it is RAID6, XOR / multiplication / division calculations are performed on the RAID6 Galois domain to obtain the construction parameter array in RAID6 full-strip mode; if it is RAIDTP, XOR / multiplication / division calculations are performed on the RAIDTP Galois domain to obtain the construction parameter array in RAIDTP full-strip mode.

[0082] In read-modify-write mode, if it is RAID6, XOR / multiplication / division calculations are performed on the RAID6 Galois domain to obtain the construction parameter array in RAID6 read-modify-write mode; if it is RAIDTP, XOR / multiplication / division calculations are performed on the RAIDTP Galois domain to obtain the construction parameter array in RAIDTP read-modify-write mode.

[0083] The automatic parameter generation method in RAID verification is implemented using C language to implement the RAID algorithm, including an algorithm parameter generation module. The algorithm parameter generation module is used to solve the algorithm parameters under different combinations and arrangements of data disks and parity disks in RAID6 and RAIDTP levels.

[0084] The automatic parameter generation method in the RAID verification also includes DPI-C interface function to send configuration information, which includes: RAID level, number of data disks, number of parity disks, location of failed disks, and working mode as input.

[0085] The DPI-C interface function is also used to send an identifier to check whether the RAID check is enabled. If the identifier is 1, the RAID check is enabled, and the algorithm parameter generation module checks the generated parameter information. If the identifier is 0, the RAID check is disabled.

[0086] The custom DPI-C interface function is: DpicIntf_RaidParam_Gen(); used to pass the relevant configuration information of the RAID group from the UVM verification environment to the algorithm parameter generation module, and to return the target parameter information obtained after the algorithm parameter generation module has performed the calculation to the UVM verification environment.

[0087] The DPI-C interface function sends configuration information, including: RAID level, number of data disks (m), number of parity disks (n), location of the failed disk (in decoding scenarios), and operating mode as input. To facilitate algorithm implementation, a Galois field is introduced during the calculation of RAID6 and RAIDTP algorithm parameters. After Galois field calculations, the generated parameters need to be rearranged to form an n*m dimensional parameter array related to the number of data and parity disks configured for this operation.

[0088] The checking sub-module in the algorithm parameter module is mainly used to check the algorithm parameters calculated in the target scenarios of RAID6 and RAIDTP respectively.

[0089] The DPI-C interface function sends an identifier to check whether RAID is enabled. If the identifier is 1, RAID checking is enabled, and the algorithm parameter generation module checks the generated parameter information. If the identifier is 0, RAID checking is disabled.

[0090] In the embodiments of the present invention, the custom DPI-C interface function is specifically described as follows:

[0091] The custom DPI-C interface function, DpicIntf_RaidParam_Gen(), is mainly used to pass the relevant configuration information of the RAID group from the UVM verification environment to the algorithm parameter generation module, and to return the target parameter information obtained after calculation by the algorithm parameter generation module to the UVM verification environment. An example is shown below:

[0092] Void Dpiclntf_RaidRaram_Gen(const rAlgo_Cfg_Info_t*Cfg_Info, svOpenArrayHandle dParam, int CheckFlag);

[0093] Cfg_Info is a pointer to a configuration information structure of type rAlgo_Cfg_Info_t, which contains configuration information related to the RAID group (including: RAID level, number of data disks, number of parity disks, working mode, location of failed disks in decoding scenarios, and check flags). This parameter is passed to the algorithm parameter generation module through System Verilog. dParam is a variable of type svOpenArrayHandle, which is filled with target parameter information by the algorithm parameter generation module through internal calculations and then sent back to the UVM verification environment.

[0094] In the embodiments of the present invention, for the joint compilation and simulation of the environment, before compiling the System Verilog file that references C functions, we need to compile the C code into a dynamic link library, as shown in the following example:

[0095] gcc$(CFLAGS)-fP / Cc dPIC_cDemo_Intf.c

[0096] gcc-fPIC-shared-Bsymbolic-o dcdemo_lib.so dPIC_cDemo_Intf.c

[0097] The file dPIC_cDemo_Intf.c contains the DPI-C interface source code, and the file dPIC_cdemo_lib.so is the dynamically linked library file generated from the compiled object C code. The command `-shared` indicates that a shareable object file should be generated; `-fPIC` indicates that position-independent code should be generated, eliminating the need for data object relocation during linking; and `-Bsymbolic` prevents symbol preemption during linking, ensuring that the dynamic library always uses locally defined variables for references to global variables. After compilation, the `sv_lib` parameter can be used to specify which library the C functions reside in, as shown in the following example:

[0098] vlog test.sv&&vsim-sv_lib clib_name test

[0099] During runtime, you can link the aforementioned library file dPIC_cdemo_lib.so, and you can also add the following parameters to the command-line arguments, as shown in the example below:

[0100] -sv_lib dPIC_cdemo_lib.so

[0101] In an embodiment of the present invention, the automatic parameter generation method for RAID verification further includes:

[0102] In the verification environment, the configuration information required by the RAID algorithm is generated through reasonable constraints, including: RAID level, number of data disks, number of parity disks, working mode, location of failed disks in decoding scenarios, and check flag information;

[0103] The packaged configuration information is transmitted to the algorithm parameter generation module via DPI-C. The algorithm parameter generation module performs internal calculations to generate target parameter information, which is then transmitted back to the UVM verification environment via DPI-C.

[0104] In the UVM verification environment, the target parameter information is transmitted to the DUT and the reference model, and both participate in the encoding and decoding operations in specific scenarios.

[0105] The stimulus is generated and injected into the design under test (DUT) and the reference model, driving the verification platform to start working normally.

[0106] The checker will capture and cache information from the DUT output port and the reference model output port in real time. It will then compare the cached data one by one according to the data slice format. If the comparison results are inconsistent, the verification test case will fail; if the comparison results are consistent, the verification test case will succeed.

[0107] The coverage collector dynamically collects coverage information during the verification process.

[0108] The verification workflow is as follows. The DPI-C module integrates the algorithm parameter generation module with the UVM verification environment, and its structure diagram is shown below. Figure 3 As shown:

[0109] ① In the verification environment, generate the configuration information required by the RAID algorithm through reasonable constraints, including: RAID level, number of data disks, number of parity disks, working mode, location of failed disks in decoding scenarios, check flags, etc.

[0110] ② The packaged configuration information is transmitted to the algorithm parameter generation module via DPI-C. The algorithm parameter generation module performs internal calculations to generate target parameter information, which is then transmitted back to the UVM verification environment via DPI-C. In the UVM verification environment, the target parameter information is transmitted to the DUT and the reference model, both participating in encoding and decoding operations in specific scenarios.

[0111] ③ Generate stimuli and inject them into the design under test (DUT) and reference model, driving the verification platform to start working normally.

[0112] ④ The checker will capture and cache information from the DUT output port and the reference model output port in real time. Simultaneously, it will compare the cached data one by one according to the data slice format. If the comparison results are inconsistent, the verification test case will fail; if the comparison results are consistent, the verification test case will succeed.

[0113] ⑤ The coverage collector dynamically collects coverage information during the verification process. If the verification test case simulation passes, the coverage information is recorded and statistically analyzed. Verification personnel iterate through regression tests multiple times, analyze the collected coverage, eliminate coverage points that do not require attention, modify existing test case constraints or create targeted verification test cases for uncovered verification points, and continuously improve coverage through iterative regression testing until all functional scenarios and Corner scenarios of concern to the verification personnel are covered.

[0114] This invention provides a method for automatically generating algorithm parameters during RAID verification, which has the following advantages compared to existing solutions:

[0115] 1. This invention discloses a method, apparatus, and storage medium for automatically generating parameters during RAID verification. It proposes a method for automatically generating algorithm parameters during RAID verification, applicable to different RAID levels and encoding / decoding scenarios with different combinations of data and parity disks. This contrasts with traditional RAID verification strategies that only consider certain typical scenarios under a specified RAID level. The scope of application of the automatic parameter generation method described in this invention includes, but is not limited to, RAID function verification based on the RS algorithm extension. All hardware verification and testing processes based on FEC encoding / decoding functions can be extended or expanded to use this method.

[0116] 2. The algorithm generation module implemented in C language, compared with the traditional method of generating algorithm parameter files through Matlab in RAID verification, the method described in this patent organically integrates the algorithm generation module with the UVM verification environment through the DPI-C interface. During the verification process, the required target parameter information can be generated in real time, while saving the access time and memory resource overhead of generating / reading data files.

[0117] 3. The RAID calculation and checking function in the algorithm parameter generation module verifies the accuracy of the generated target parameters, thereby ensuring that the parameters output from the algorithm parameter generation module and input to the excitation module in the UVM verification environment via DPI-C are valid parameter information. This method improves the fault tolerance of the method described in this patent during the generation of the required target algorithm parameters in the RAID verification process to a certain extent.

[0118] 4. The verification environment built on UVM can cover 99.9% of the encoding / decoding scenarios involved in RAID verification with random + targeted excitation. The inspector component can realize the automatic comparison of results during RAID verification. The coverage collector can collect key information during RAID verification. By analyzing the coverage results, the uncovered situations can be discovered in a timely manner. Verifiers can modify constraints or add verification cases for the uncovered parts, and ensure the completeness of verification through continuous iterative regression.

[0119] This invention, based on the C language, automates the generation of target algorithm parameters required for encoding / decoding scenarios during RAID verification, and organically integrates it with the UVM verification environment via the DPI-C interface. The algorithm parameter module implemented in C is easy to maintain, computationally efficient, and ensures real-time generation of the required target algorithm parameters during verification. The DPI-C interface facilitates the transmission of RAID configuration information and target algorithm parameter information between the algorithm generation module and the UVM verification environment. A coverage collector collects and analyzes key information during the verification process of the design under test, improving the completeness of the verification.

[0120] In this embodiment, a method for automatically generating algorithm parameters in the encoding / decoding scenario during RAID verification, implemented using C language, simplifies the problem of difficulty in obtaining algorithm parameters during RAID verification. Furthermore, this method can be extended to verify RAID functionality based on the RS algorithm extension and hardware verification processes based on FEC encoding / decoding functionality.

[0121] A method for integrating the algorithm parameter generation module with the UVM verification environment via DPI-C. A GUI-based visual interface was designed and developed, integrating and displaying various RAID configuration information and generated target parameter information. This interface is deeply adapted to the scheme designed in this application, facilitating operation and use by engineering designers, and also accelerating the RAID verification process.

[0122] It should be noted that while the method provided by this invention can achieve rapid and automated verification of RAID groups, RAID verification involves many types of configurable parameters and various combinations of data and parity disks supported by different RAID levels. Parameter mismatches frequently occur, directly leading to abnormal verification results and making the troubleshooting process complex. The subsequent plan for this invention is to develop a GUI component using C++ to generate a visual parameter configuration interface. Commonly used parameters will be integrated into the GUI interface, and parameters will be written into the algorithm parameter generation module through a custom interface to generate the desired target parameter information. The benefits of implementing this solution are that the required configuration parameters are clearly visible, easy to maintain and manage, and convenient to use.

[0123] It should be understood that although the above description follows a certain order, these steps are not necessarily executed in that order. Unless otherwise expressly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, some steps in this embodiment may include multiple steps or multiple stages, which are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be performed alternately or in turn with other steps or at least a portion of the steps or stages in other steps.

[0124] In some embodiments of the present invention, an automatic parameter generation device 400 for RAID verification is also provided, including a memory 420 and a processor 410. The memory stores a computer program, which, when executed by the processor, implements the method of any of the above embodiments.

[0125] like Figure 5 The diagram shown is a hardware structure schematic of an embodiment of the RAID verification parameter automatic generation device for executing the RAID verification parameter automatic generation method provided by the present invention. Figure 5 Taking the RAID verification parameter automatic generation device 400 as an example, this RAID verification parameter automatic generation device includes a processor 410 and a memory 420, and may also include an input device 430 and an output device 440. The processor 410, memory 420, input device 430, and output device 440 can be connected via a bus or other means. Figure 5 Taking a bus connection as an example, input device 430 can receive input digital or character information, and generate signal inputs related to the automatic generation of parameters in RAID verification. Output device 440 may include display devices such as a display screen.

[0126] Memory 420, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the automatic parameter generation method in RAID verification in this embodiment. Memory 420 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and application programs required for at least one function; the data storage area may store data created by using the automatic parameter generation method in RAID verification, etc. In addition, memory 420 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 420 may optionally include memory remotely located relative to processor 410, and these remote memories can be connected to the local module via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0127] The processor 410 executes various server functions and data processing by running non-volatile software programs, instructions, and modules stored in the memory 420, thereby implementing the automatic parameter generation method in the RAID verification of the above method embodiment.

[0128] A fourth aspect of the present invention also provides a computer-readable storage medium. Figure 4 This is a schematic diagram of a computer-readable storage medium used in the automatic parameter generation method for RAID verification provided in an embodiment of the present invention. Figure 4 As shown, the computer-readable storage medium 300 stores computer program instructions 310, which can be executed by a processor. When executed, the computer program instructions 310 implement the method of any of the above embodiments.

[0129] It should be understood that, where there is no conflict, all the embodiments, features and advantages described above for the automatic parameter generation method in RAID verification according to the present invention are equally applicable to the automatic parameter generation system and storage medium in RAID verification according to the present invention.

[0130] Finally, it should be noted that the computer-readable storage medium (e.g., memory) described herein can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. By way of example, and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM), which can act as external cache memory. By way of example, and not limitation, RAM can be obtained in various forms, such as synchronous RAM (DRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct Rambus RAM (DRRAM). The storage devices disclosed herein are intended to include, but are not limited to, these and other suitable types of memory.

[0131] This invention discloses a method, apparatus, and storage medium for automatically generating parameters during RAID verification. 1. This invention proposes a method for automatically generating algorithm parameters during RAID verification. This method is applicable to different RAID levels and encoding / decoding scenarios with different combinations of data and parity disks, compared to traditional RAID verification strategies that only consider certain typical scenarios under a specified RAID level. The scope of application of the automatic parameter generation method described in this invention includes, but is not limited to, RAID function verification based on the RS algorithm extension. All hardware verification testing processes based on FEC encoding / decoding functions can be extended or expanded to use this method.

[0132] 2. The algorithm generation module implemented in C language, compared with the traditional method of generating algorithm parameter files through Matlab in RAID verification, the method described in this patent organically integrates the algorithm generation module with the UVM verification environment through the DPI-C interface. During the verification process, the required target parameter information can be generated in real time, while saving the access time and memory resource overhead of generating / reading data files.

[0133] 3. The RAID calculation and checking function in the algorithm parameter generation module verifies the accuracy of the generated target parameters, thereby ensuring that the parameters output from the algorithm parameter generation module and input to the excitation module in the UVM verification environment via DPI-C are valid parameter information. This method improves the fault tolerance of the method described in this patent during the generation of the required target algorithm parameters in the RAID verification process to a certain extent.

[0134] 4. The verification environment built on UVM, with its random + targeted stimulus structure, can cover 99.9% of the encoding / decoding scenarios involved in RAID verification. The inspector component enables automated comparison of results during RAID verification, and the coverage collector gathers key information during the verification process. By analyzing the coverage results, uncovered cases can be identified in a timely manner. Verifiers can address uncovered parts by modifying constraints or adding verification cases, and continuously iterate and regress to ensure the completeness of the verification.

[0135] The above are exemplary embodiments disclosed in this invention. However, it should be noted that various changes and modifications can be made without departing from the scope of the embodiments of this invention as defined by the claims. The functions, steps, and / or actions of the methods according to the disclosed embodiments described herein do not need to be performed in any particular order. Furthermore, although the elements disclosed in the embodiments of this invention may be described or claimed individually, they may be understood as multiple unless explicitly limited to a singular number.

[0136] It should be understood that, as used herein, the singular form "a" is intended to include the plural form as well, unless the context clearly supports an exception. It should also be understood that, as used herein, "and / or" refers to any and all possible combinations of one or more of the associatedly listed items. The embodiment numbers disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0137] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of the invention, technical features of the above embodiments or different embodiments can be combined, and many other variations of different aspects of the invention exist, which are not provided in the details for the sake of brevity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.

Claims

1. A method for automatically generating parameters in a RAID verification, characterized in that, The method realizes an algorithm parameter generation module by C language, the algorithm parameter generation module is used for automatically generating algorithm parameters of any combination permutation of data disks and check disks in RAID6 or RAIDTP level encoding or decoding scene, including; Start, input configuration information, judge whether the working mode is input, if not, input failure, re-input configuration information, if yes, full strip or read-modified-write of RAID6 / TP is carried out; In full strip mode, if it is RAID6, RAID6 Galois field is calculated by XOR / multiply / divide, and the construction parameter array under RAID6 full strip mode is obtained; If it is RAIDTP, RAIDTP Galois field is calculated by XOR / multiply / divide, and the construction parameter array under RAIDTP full strip mode is obtained; In read-modified-write mode, if it is RAID6, RAID6 Galois field is calculated by XOR / multiply / divide, and the construction parameter array under RAID6 read-modified-write mode is obtained; If it is RAIDTP, RAIDTP Galois field is calculated by XOR / multiply / divide, and the construction parameter array under RAIDTP read-modified-write mode is obtained.

2. The method of claim 1, wherein, The RAID verification parameter automatic generation method further includes that the configuration information is issued by a DPI-C interface function, and the configuration information issued by the DPI-C interface function includes: RAID level, data disk number, check disk number, failed disk position and working mode as input.

3. The method of claim 2, wherein the parameters are automatically generated by the RAID verification system. The DPI-C interface function is also used to issue an identifier for checking whether it is opened, if the identifier is 1, the RAID check is opened, and the generated parameter information is checked in the algorithm parameter generation module; if the identifier is 0, the RAID check is closed.

4. The method of claim 1, wherein the parameters are automatically generated in the RAID verification. Further including a self-defined DPI-C interface function, the self-defined DPI-C interface function is: DpicIntf_RaidParam_Gen(); used for transferring related configuration information in the RAID group from the UVM verification environment to the algorithm parameter generation module, and transferring the target parameter information obtained after the operation of the algorithm parameter generation module back to the UVM verification environment.

5. The method of claim 4, wherein, The RAID verification parameter automatic generation method further includes: The configuration information required by the RAID algorithm is generated by reasonable constraints in the verification environment, including: RAID level, data disk number, check disk number, working mode, failed disk position in decoding scene, and check flag information; The configuration information is packaged and transferred to the algorithm parameter generation module through DPI-C, the target parameter information is generated after the internal operation of the algorithm parameter generation module, and the target parameter information is transferred back to the UVM verification environment through DPI-C; Wherein, the target parameter information is transferred to the DUT and the reference model in the UVM verification environment, and both participate in the encoding and decoding operation in the specific scene.

6. The method of claim 5, wherein, The RAID verification parameter automatic generation method further includes: Generate excitation and inject into the DUT and the reference model of the design under test, drive the verification platform to start normal work; The checker will respectively capture information from the DUT output port and the output port of the reference model in real time and cache, compare the cached data according to the data slice format one by one, if the comparison result is inconsistent, the verification case run fails; if the comparison result is consistent, the verification case run succeeds; The coverage collector dynamically collects coverage information during the verification process.

7. The method of claim 6, wherein the parameters are automatically generated in the RAID verification. The coverage collector dynamically collects coverage information during the verification process, and if the verification case simulation passes, the coverage information is recorded and counted.

8. A device for automatically generating parameters in RAID verification, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, The computer program is executed by the processor to execute the parameter automatic generation method in the RAID verification of any one of claims 1-7.

9. A computer readable storage medium storing computer program instructions, wherein, The computer program instructions are executed to implement the parameter automatic generation method in the RAID verification of any one of claims 1-7.

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