A proportional directional valve control drive circuit
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BEIJING MECHANICAL EQUIP INST
- Filing Date
- 2021-06-28
- Publication Date
- 2026-06-23
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Figure CN115596728B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of proportional directional valve control drive circuit technology, and in particular to a proportional directional valve control drive circuit. Background Technology
[0002] With the continuous development of modern science and technology, hydraulic technology has gradually matured. In particular, electro-hydraulic control technology, which combines electronic and hydraulic technologies, has accelerated the development of hydraulic technology, enabling hydraulic control to move towards automation and becoming an indispensable and important technical means and link in modern control engineering. Electro-hydraulic proportional directional valves can not only achieve pressure-free, balanced directional switching, but also have the function of remote throttling and speed regulation, representing the development direction of hydraulic directional control. They are widely used in engineering machinery, machining industry, rubber and plastics machinery, metallurgical industry, and other fields.
[0003] Flow control of a proportional valve is achieved by adjusting the position of the core of the proportional directional valve (specifically, the proportional electromagnet within the proportional directional valve) by controlling the current. The proportional valve drive circuit amplifies and modulates the control signal to drive power semiconductor devices to control the current of the proportional directional valve. Currently, drive circuits are broadly classified into analog and digital types. Analog drive circuits use operational amplifiers, PWM generator modules, and current sampling modules to complete the drive circuit design, offering advantages over digital drive circuits such as lower cost, higher reliability, and stronger valve adaptability. However, most widely used analog drive circuits are unidirectional. Furthermore, if existing analog proportional valve control circuits use a current acquisition scheme with sampling resistors, when applied to the control of a three-wire proportional directional valve, since the two valve core electromagnets in a three-wire proportional directional valve share a common terminal O (i.e., terminals A, B, and O), when there is current in AO, the proportional directional valve is controlled to conduct in the forward direction, and when there is current in BO, it is controlled to conduct in the reverse direction. At this point, there will be coupling between the two sampling channels, causing the feedback of the two channels to interfere with each other. Therefore, due to the characteristics of its current sampling circuit, the existing current sampling circuit cannot be directly applied to the proportional commutator drive circuit. Summary of the Invention
[0004] Based on the above analysis, the present invention aims to provide a proportional directional valve control drive circuit to solve the problem that most existing proportional directional valve control drive circuits are unidirectional drives.
[0005] This invention provides a proportional directional valve control drive circuit, comprising:
[0006] The digital-to-analog converter circuit receives a digital given control signal and performs digital-to-analog conversion to obtain a corresponding analog given control signal; wherein, only one positive and one negative digital given control signal is output at a time, and the corresponding digital given control signal has the same positive and negative characteristics as the analog given control signal;
[0007] The positive analog feedback control circuit generates a positive deviation control signal based on the received positive analog given control signal and the positive current sampling signal obtained from the positive terminal of the proportional directional valve. It then performs pulse width modulation and amplification on the positive deviation control signal to generate a positive valve drive signal for controlling the positive terminal of the proportional directional valve.
[0008] The reverse analog feedback control circuit generates a reverse deviation control signal based on the received reverse analog given control signal and the reverse current sampling signal obtained from the negative terminal of the proportional directional valve. It then performs pulse width modulation and amplification on the reverse deviation control signal to generate a reverse valve drive signal for controlling the negative terminal of the proportional directional valve.
[0009] Based on the above solution, the present invention also makes the following improvements:
[0010] Furthermore, the positive analog feedback control circuit comprises a positive analog control circuit, a positive pulse modulation circuit, an amplification and driving circuit, and a positive current sampling circuit based on a Hall sensor; wherein,
[0011] The forward analog control circuit has a control input terminal connected to the forward analog given control signal output terminal of the digital-to-analog converter circuit to receive the forward analog given control signal; a feedback terminal connected to the feedback output terminal of the forward current sampling circuit to receive the forward current sampling signal; and an output terminal connected to the modulation input terminal of the forward pulse modulation circuit to output the forward deviation control signal.
[0012] The positive pulse modulation circuit has its output terminal connected to the positive input terminal of the amplification drive circuit.
[0013] The amplification drive circuit has its positive output terminal connected to the drive input terminal of the positive current sampling circuit;
[0014] The positive current sampling circuit drives the output terminal to be connected to the positive terminal of the proportional directional valve, and the common terminal of the proportional directional valve is grounded.
[0015] Furthermore, the forward analog control circuit includes operational amplifiers N1A and N1B, resistors R3, R5, R6, R10, R11, R15, R16, and R17, capacitors C3 and C4, and potentiometers RP1 and RP2; wherein,
[0016] One end of resistor R16 is connected to QGND via capacitor C4; the other end of resistor R16 is connected to one end of resistor R15; the other end of resistor R15 is connected to one end of resistor R11 and one fixed end of potentiometer RP2; the other end of resistor R11 is connected to the sliding end of potentiometer RP2 and one end of resistor R17.
[0017] For operational amplifier N1A:
[0018] The inverting input is connected to one end of resistor R15, the non-inverting input is connected to QGND, and the output is connected to one end of resistor R17.
[0019] For operational amplifier N1B:
[0020] The inverting input is connected to the other end of resistor R17, one end of resistor R10 and one end of capacitor C3. The other end of capacitor C3 is connected to the output of operational amplifier N1B. The non-inverting input is connected to QGND via resistor R3.
[0021] The other end of resistor R10 is connected to one end of resistor R6 and the sliding end of potentiometer RP1. The other end of resistor R6 and one fixed end of potentiometer RP1 are both connected to -VEE. The other fixed end of potentiometer RP1 is connected to +VEE via resistor R5.
[0022] One end of the resistor R16 is the control input terminal of the positive analog control circuit, the inverting input terminal of the operational amplifier N1B is the feedback terminal of the positive analog control circuit, and the output terminal of the operational amplifier N1B is the output terminal of the positive analog control circuit.
[0023] Furthermore, the positive pulse modulation circuit includes a positive pulse width modulation circuit and a triangular wave generator; wherein,
[0024] The positive pulse width modulation circuit includes an operational amplifier N2B and resistors R7, R8, R12 and R14;
[0025] For operational amplifier N2B:
[0026] The non-inverting input is connected to one end of resistor R7, and the inverting input is connected to one end of resistor R14; the output is connected to +VEE via resistors R12 and R8 connected in series.
[0027] The other end of resistor R7 is the modulation input terminal of the positive pulse modulation circuit; the end of resistor R12 connected to resistor R8 is the drive output terminal of the positive pulse modulation circuit; the other end of resistor 14 is the modulation output terminal of the positive pulse width modulation circuit.
[0028] The triangular wave generator includes operational amplifiers N3A and N3B, and resistors R13, R18, R22 and R45;
[0029] For operational amplifier N3A:
[0030] The non-inverting input is connected to one end of resistor R13 and one end of resistor R45, the inverting input is connected to QGND, and the output is connected to the other end of resistor R13, one end of resistor R18, and one end of resistor R22.
[0031] For operational amplifier N3B:
[0032] The non-inverting input is connected to QGND, and the inverting input is connected to the other end of resistor R18, the other end of resistor R22, and one end of capacitor C6. The output of operational amplifier N3B is connected to the other end of capacitor C6 and the other end of R45.
[0033] The output terminal of the operational amplifier N3B is the output terminal of the triangular wave generator, which is connected to the modulation output terminal of the positive pulse width modulation circuit.
[0034] Furthermore, the forward sampling circuit includes an operational amplifier N2A, a Hall sensor D2, resistors R19, R20, R23, R24, and R25, and capacitors C7 and C8; wherein,
[0035] For operational amplifier N2A:
[0036] The inverting input is connected to one end of resistor R24, one end of resistor R19, and one end of resistor R20, and the other end of resistor R24 is connected to QGND; the non-inverting input is connected to one end of resistor R25, and the output is connected to one end of resistor R23, the other end of resistor R19, and the other end of resistor R20.
[0037] For Hall sensor D2:
[0038] The VIOUT terminal is connected to the other end of resistor R25 and one end of capacitor C8. The BW_SEL terminal, GND terminal, and the other end of capacitor C8 are all connected to QGND. The GND terminal is also connected to one end of capacitor C7. The other end of capacitor C7 and VCC terminal are both connected to the second DC power supply voltage.
[0039] The two IP+ terminals are connected together to form the drive input terminal of the forward current sampling circuit; the two IP- terminals are connected together to form the drive output terminal of the forward current sampling circuit; the other end of resistor R23 is the feedback output terminal of the forward current sampling circuit.
[0040] Furthermore, the reverse analog feedback control circuit comprises a reverse analog control circuit, a reverse pulse modulation circuit, the amplification drive circuit, and a reverse current sampling circuit based on a Hall sensor; wherein,
[0041] The reverse analog control circuit has its control input terminal connected to the reverse analog given control signal output terminal of the digital-to-analog converter circuit to receive the reverse analog given control signal; its feedback terminal connected to the feedback output terminal of the reverse current sampling circuit to receive the reverse current sampling signal; and its output terminal connected to the modulation input terminal of the reverse pulse modulation circuit to output the reverse deviation control signal.
[0042] The inverting pulse modulation circuit has its output terminal connected to the inverting input terminal of the amplification drive circuit.
[0043] The amplifier drive circuit has its inverted output terminal connected to the drive input terminal of the inverted current sampling circuit.
[0044] The reverse current sampling circuit drives the output terminal to be connected to the negative terminal of the proportional directional valve.
[0045] Furthermore, the inverted analog control circuit includes operational amplifiers N4A and N4B, resistors R27, R29, R30, R33, R34, R37, R38, and R39, capacitors C9 and C10, and potentiometers RP3 and RP4; wherein,
[0046] One end of resistor R38 is connected to QGND via capacitor C10; the other end of resistor R38 is connected to one end of resistor R37; the other end of resistor R37 is connected to one end of resistor R34 and one fixed end of potentiometer RP4; the other end of resistor R34 is connected to the sliding end of potentiometer RP4 and one end of resistor R39.
[0047] For operational amplifier N4A:
[0048] The inverting input is connected to one end of resistor R37, the non-inverting input is connected to QGND, and the output is connected to one end of resistor R39.
[0049] For operational amplifier N1B:
[0050] The inverting input is connected to the other end of resistor R39, one end of resistor R33 and one end of capacitor C9. The other end of capacitor C9 is connected to the output of operational amplifier N1B. The non-inverting input is connected to QGND via resistor R27.
[0051] The other end of resistor R33 is connected to one end of resistor R30 and the sliding end of potentiometer RP3. The other end of resistor R30 and one fixed end of potentiometer RP3 are both connected to -VEE. The other fixed end of potentiometer RP3 is connected to +VEE via resistor R29.
[0052] One end of the resistor R38 is the control input terminal of the inverting analog control circuit, the inverting input terminal of the operational amplifier N4B is the feedback terminal of the inverting analog control circuit, and the output terminal of the operational amplifier N4B is the output terminal of the inverting analog control circuit.
[0053] Furthermore, the reverse pulse modulation circuit includes a reverse pulse width modulation circuit and the triangular wave generator; wherein,
[0054] The inverted pulse width modulation circuit includes an operational amplifier N5B and resistors R31, R32, R35 and R36.
[0055] For operational amplifier N5B:
[0056] The non-inverting input is connected to one end of resistor R31, and the inverting input is connected to one end of resistor R36; the output is connected to +VEE via resistors R35 and R32 connected in series.
[0057] The other end of resistor R31 is the modulation input terminal of the inverse pulse modulation circuit; the end of resistor R35 connected to resistor R32 is the drive output terminal of the inverse pulse modulation circuit; the other end of resistor 36 is the modulation output terminal of the inverse pulse modulation circuit.
[0058] The modulation output terminal of the reverse pulse modulation circuit is connected to the output terminal of the triangular wave generator.
[0059] Furthermore, the reverse sampling circuit includes an operational amplifier N5A, a Hall sensor D3, resistors R40, R41, R42, R43, and R44, and capacitors C11 and C12; wherein,
[0060] For operational amplifier N5A:
[0061] The inverting input is connected to one end of resistor R43, one end of resistor R40, and one end of resistor R41, and the other end of resistor R43 is connected to QGND; the non-inverting input is connected to one end of resistor R44, and the output is connected to one end of resistor R42, the other end of resistor R40, and the other end of resistor R41.
[0062] For Hall sensor D3:
[0063] The VIOUT terminal is connected to the other end of resistor R44 and one end of capacitor C12. The BW_SEL terminal, GND terminal, and the other end of capacitor C12 are all connected to QGND. The GND terminal is also connected to one end of capacitor C11. The other end of capacitor C11 and VCC terminal are both connected to the second DC power supply voltage.
[0064] The two IP+ terminals are connected together as the drive input terminals of the reverse current sampling circuit; the two IP- terminals are connected together as the drive output terminals of the reverse current sampling circuit; the other end of resistor R42 is the feedback output terminal of the reverse current sampling circuit.
[0065] Furthermore, the amplification driving circuit includes an amplification driving chip V1, diodes V2 and V3, and resistors R26 and R28; wherein,
[0066] The positive input terminal of the amplifier driver chip V1 is connected to the modulation output terminal of the positive pulse modulation circuit, and the negative input terminal of the amplifier driver chip V1 is connected to the modulation output terminal of the negative pulse modulation circuit.
[0067] The positive output terminal of the amplifier driver chip V1 is connected to the drive input terminal of the positive current sampling circuit, and the negative output terminal of the amplifier driver chip V1 is connected to the drive input terminal of the negative current sampling circuit.
[0068] The positive output terminal of the amplifier driver chip V1 is also connected to the negative terminal of diode V2, and the negative output terminal of the amplifier driver chip V1 is also connected to the negative terminal of diode V3. The positive terminals of diodes V2 and V3 are both grounded.
[0069] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:
[0070] The proportional directional valve control drive circuit provided by this invention, by setting forward and reverse analog feedback control circuits respectively, can realize separate control of the forward and reverse rotation of the proportional directional valve control drive circuit, effectively solving the problem that existing proportional directional valve control drive circuits are mostly unidirectional drives and cannot realize bidirectional drives.
[0071] Meanwhile, this invention also provides hardware circuit structures for forward and reverse analog feedback control circuits, which do not require software cooperation, and the designed circuits have advantages such as high reliability, low cost, and easy maintenance.
[0072] Furthermore, the circuit designed in this invention is small in size and can realize up to 8-channel proportional directional valve control (or 16-channel proportional valve control) in a 3U standard industrial board, effectively improving system integration and control capabilities.
[0073] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from what is particularly pointed out in the description and drawings. Attached Figure Description
[0074] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.
[0075] Figure 1 This is a schematic diagram of the proportional directional valve control drive circuit structure provided in an embodiment of the present invention;
[0076] Figure 2 This invention provides a schematic diagram of another proportional directional valve control drive circuit structure for an embodiment of the invention. Detailed Implementation
[0077] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.
[0078] A specific embodiment of the present invention discloses a proportional directional valve control drive circuit, the structural schematic diagram of which is shown below. Figure 1 and Figure 2 As shown, it includes:
[0079] The digital-to-analog converter circuit receives a digital given control signal and performs digital-to-analog conversion to obtain a corresponding analog given control signal; wherein, only one positive and one negative digital given control signal is output at a time, and the corresponding digital given control signal has the same positive and negative characteristics as the analog given control signal;
[0080] The positive analog feedback control circuit generates a positive deviation control signal based on the received positive analog given control signal and the positive current sampling signal obtained from the positive terminal of the proportional directional valve. It then performs pulse width modulation and amplification on the positive deviation control signal to generate a positive valve drive signal for controlling the positive terminal of the proportional directional valve.
[0081] The reverse analog feedback control circuit generates a reverse deviation control signal based on the received reverse analog given control signal and the reverse current sampling signal obtained from the negative terminal of the proportional directional valve. It then performs pulse width modulation and amplification on the reverse deviation control signal to generate a reverse valve drive signal for controlling the negative terminal of the proportional directional valve.
[0082] In this embodiment, the upper-layer application controller outputs a digital given control signal through the IIC bus, and the digital-to-analog converter performs digital-to-analog conversion based on the digital given control signal, and outputs an analog control signal corresponding to the digital given control signal.
[0083] Preferably, the digital-to-analog conversion circuit includes a level conversion chip B1, a digital-to-analog chip D1, resistors R1, R2, R4, R21, and capacitors C1, C2, C5; wherein,
[0084] Level conversion chip B1 is used to convert the voltage adapted to the IIC bus into the voltage adapted to the digital-to-analog chip D1; specifically, for chip B1:
[0085] The VDD1 terminal is connected to the first power supply voltage via resistor R3, the GND1 terminal is connected to DGND, and the GND1 terminal is also connected to the first power supply voltage via capacitor C2; the SDA1 terminal is used to receive the positive digital input control signal, and the SCL1 terminal is used to receive the negative digital input control signal.
[0086] The VDD2 terminal is directly connected to the second DC power supply voltage. The SDA terminal is connected to the second DC power supply voltage via resistor R1. The SCL terminal is connected to the second DC power supply voltage via resistor R2. The GND2 terminal is connected to QGND. The GND2 terminal is also connected to the second DC power supply voltage via capacitor C2.
[0087] The SDA terminal of chip B1 is also connected to the SDA terminal of chip D1, and the SCL terminal of chip B1 is also connected to the SCL terminal of chip D1.
[0088] For chip D1:
[0089] The ADDR1, FOR, GND, and ADDR2 terminals are all connected to QGND; the VDD terminal is connected to the second DC power supply voltage, and the VDD terminal is also grounded through capacitor C5. The terminal is connected to the second DC power supply voltage via resistor R21;
[0090] One output terminal of the chip D1 (exemplarily, such as VoutB terminal) is a positive analog given control signal output terminal, and the other output terminal (exemplarily, such as VoutD terminal) is a negative analog given control signal output terminal.
[0091] After the upper-level application controller outputs a digital setpoint control signal via the IIC bus, the level conversion chip B1 converts the 3.3V level signal of the upper-level controller to a 5V level signal, thereby achieving level matching between the upper-level controller and the digital-to-analog converter chip D1. The IIC bus line between the level conversion chip B1 and the digital-to-analog converter chip D1 is pulled up to 5V through resistors R1 and R2, ensuring that the IIC bus is in an idle state by default. The digital-to-analog converter chip D1 receives the control command (i.e., the "digital setpoint control signal") from the upper-level controller and converts the digital control signal in the range of 0-4095 into an analog control signal of 0-5V. Chip D1 has four output channels. In this invention, two output channels (B and D) are used to implement the switching output of the proportional directional valve, where channel B is defined as the forward output and channel D is defined as the reverse output. A single chip D1 has the capability to control two proportional directional valves.
[0092] The positive analog feedback control circuit consists of a positive analog control circuit, a positive pulse modulation circuit, an amplification drive circuit, and a positive current sampling circuit based on a Hall sensor; wherein,
[0093] The forward analog control circuit has its control input terminal connected to the forward analog given control signal output terminal of the digital-to-analog converter circuit, and is used to receive the forward analog given control signal.
[0094] The feedback terminal is connected to the feedback output terminal of the forward current sampling circuit to receive the forward current sampling signal; the output terminal is connected to the modulation input terminal of the forward pulse modulation circuit to output the forward deviation control signal.
[0095] The positive pulse modulation circuit has its drive output terminal connected to the positive input terminal of the amplification drive circuit; the amplification drive circuit has its positive output terminal connected to the drive input terminal of the positive current sampling circuit.
[0096] The positive current sampling circuit drives the output terminal to be connected to the positive terminal of the proportional directional valve, and the common terminal of the proportional directional valve is grounded.
[0097] To facilitate better implementation of this solution by those skilled in the art, this embodiment also provides the specific structures of several circuits involved in the positive analog feedback control circuit. Specifically,
[0098] The forward analog control circuit includes operational amplifiers N1A and N1B, resistors R3, R5, R6, R10, R11, R15, R16, and R17, capacitors C3 and C4, and potentiometers RP1 and RP2. One end of resistor R16 is connected to QGND via capacitor C4; the other end of resistor R16 is connected to one end of resistor R15; the other end of resistor R15 is connected to one end of resistor R11 and one fixed end of potentiometer RP2; the other end of resistor R11 is connected to the sliding end of potentiometer RP2 and one end of resistor R17. For operational amplifier N1A: the inverting input is connected to one end of resistor R15, the non-inverting input is connected to QGND, and the output is connected to one end of resistor R17. For operational amplifier N1B: the inverting input is connected to one end of resistor R15, the non-inverting input is connected to QGND, and the output is connected to one end of resistor R17. The inverting input terminal is connected to the other end of resistor R17, one end of resistor R10, and one end of capacitor C3. The other end of capacitor C3 is connected to the output terminal of operational amplifier N1B. The non-inverting input terminal is connected to QGND via resistor R3. The other end of resistor R10 is connected to one end of resistor R6 and the sliding terminal of potentiometer RP1. The other end of resistor R6 and one fixed terminal of potentiometer RP1 are both connected to -VEE. The other fixed terminal of potentiometer RP1 is connected to +VEE via resistor R5. One end of resistor R16 is the control input terminal of the positive analog control circuit. The inverting input terminal of operational amplifier N1B is the feedback terminal of the positive analog control circuit. The output terminal of operational amplifier N1B is the output terminal of the positive analog control circuit.
[0099] The forward analog control circuit enables real-time PI control of the proportional solenoid valve control current. The forward analog given control signal is first connected to the inverting input (pin 2) of operational amplifier N1A via resistor R16 and output from the output (pin 1). Proportional calculation is achieved through parameter matching of resistors R15, R11, and RP2 with R16. The amplification ratio can be adjusted by potentiometer RP2. The proportionally calculated control signal is then input to the inverting input (pin 6) of operational amplifier N1B via resistor R17, and integral calculation is achieved through parameter matching of capacitor C3 and resistor R17. The zero-point adjustment of the PI calculation analog control signal can be achieved by coordinating the parameters of resistor R5, potentiometer RP1, and resistor R6.
[0100] The positive pulse modulation circuit includes a positive pulse width modulation circuit and a triangular wave generator; wherein, the positive pulse width modulation circuit includes an operational amplifier N2B, resistors R7, R8, R12, and R14; for operational amplifier N2B: the non-inverting input is connected to one end of resistor R7, and the inverting input is connected to one end of resistor R14; the output is connected to +VEE via resistors R12 and R8 connected in series; the other end of resistor R7 is the modulation input of the positive pulse modulation circuit, and the end of resistor R12 connected to resistor R8 is the drive output of the positive pulse modulation circuit; the other end of resistor R14 is the modulation output of the positive pulse width modulation circuit; the triangular wave generator includes an operational amplifier N2B. 3A, N3B, resistors R13, R18, R22, and R45; For operational amplifier N3A: the non-inverting input is connected to one end of resistor R13 and one end of resistor R45, the inverting input is connected to QGND, and the output is connected to the other end of resistor R13, one end of resistor R18, and one end of resistor R22; For operational amplifier N3B: the non-inverting input is connected to QGND, the inverting input is connected to the other end of resistor R18, the other end of resistor R22, and one end of capacitor C6, and the output of operational amplifier N3B is connected to the other end of capacitor C6 and the other end of R45; the output of operational amplifier N3B is the output of the triangular wave generator and is connected to the modulation output of the positive pulse width modulation circuit.
[0101] The forward analog control signal, after undergoing analog PI calculation in the analog control circuit, is output from the output terminal (pin 7) of operational amplifier N1B to the pulse width modulation circuit. N3A and N3B, along with resistors R13, R9, R18, R22, and resistor C6, function as a triangular wave generator. By determining the parameters of capacitor C6, a triangular wave modulated carrier with a frequency of 200Hz is generated. The analog control signal after PI calculation is input to the non-inverting input terminal (pin 5) of operational amplifier N2B through resistor R7. The triangular wave modulated carrier is input to the inverting input terminal (pin 6) of N2B through resistor R14. N2B performs pulse width modulation calculation to generate the PWM control signal. Matching the parameters of resistors R12 and R8 adjusts the amplitude level of the PWM control signal.
[0102] The amplification driving circuit includes an amplification driving chip V1, diodes V2 and V3, and resistors R26 and R28. The positive input terminal of the amplification driving chip V1 is connected to the modulation output terminal of the positive pulse modulation circuit, the positive output terminal of the amplification driving chip V1 is connected to the driving input terminal of the positive current sampling circuit, and the positive output terminal of the amplification driving chip V1 is also connected to the negative terminal of diode V2, while the positive terminal of diode V2 is grounded.
[0103] The PWM control signal is input to the amplification and drive circuit to control the on / off state of the power semiconductor, thereby controlling the current of the proportional commutator valve. The PWM control signal is also input to the IN pin of the integrated power MOSFET device V1 to control its corresponding channel's OUT output. The OUT output is connected to the positive terminal of the proportional commutator valve coil via a Hall current sensor, and the power supply ground PGND is connected to the common terminal of the proportional valve electromagnet coil. Diode V2 provides a freewheeling path for the inductive load.
[0104] The forward sampling circuit includes an operational amplifier N2A, a Hall sensor D2, resistors R19, R20, R23, R24, and R25, and capacitors C7 and C8. For the operational amplifier N2A: the inverting input is connected to one end of resistor R24, one end of resistor R19, and one end of resistor R20; the other end of resistor R24 is connected to QGND. The non-inverting input is connected to one end of resistor R25, and the output is connected to one end of resistor R23, the other end of resistor R19, and the other end of resistor R20. For the Hall sensor... D2: The VIOUT terminal is connected to the other end of resistor R25 and one end of capacitor C8. The BW_SEL terminal, GND terminal, and the other end of capacitor C8 are all connected to QGND. The GND terminal is also connected to one end of capacitor C7. The other end of capacitor C7 and VCC terminal are both connected to the second DC power supply voltage. The two IP+ terminals are connected together, which is the drive input terminal of the forward current sampling circuit. The two IP- terminals are connected together, which is the drive output terminal of the forward current sampling circuit. The other end of resistor R23 is the feedback output terminal of the forward current sampling circuit.
[0105] The current output from the amplification drive circuit to the proportional directional valve must flow through the Hall sensor D2 in the current sampling circuit. The Hall sensor D2 samples and converts the proportional directional valve current value into a voltage signal. This sampled voltage signal is input through resistor R25 to operational amplifier N2A. Proportional calculation is achieved through parameter matching of R19, R20, and R25, and the current value is fed back to the positive analog control circuit. In this embodiment, using a Hall sensor for proportional directional valve current sampling solves the problem that conventional analog proportional valve control drive circuits cannot be applied to proportional directional valves due to channel coupling interference.
[0106] The circuit structures of the forward analog feedback control circuit and the reverse analog feedback control circuit are basically the same, sharing the same amplifier drive circuit and triangular wave generator. Specific details are as follows:
[0107] The reverse analog feedback control circuit consists of a reverse analog control circuit, a reverse pulse modulation circuit, the amplification drive circuit, and a reverse current sampling circuit based on a Hall sensor; wherein,
[0108] The reverse analog control circuit has its control input terminal connected to the reverse analog given control signal output terminal of the digital-to-analog converter circuit to receive the reverse analog given control signal; its feedback terminal connected to the feedback output terminal of the reverse current sampling circuit to receive the reverse current sampling signal; and its output terminal connected to the modulation input terminal of the reverse pulse modulation circuit to output the reverse deviation control signal.
[0109] The inverting pulse modulation circuit has its output terminal connected to the inverting input terminal of the amplification drive circuit.
[0110] The amplifier drive circuit has its inverted output terminal connected to the drive input terminal of the inverted current sampling circuit.
[0111] The reverse current sampling circuit drives the output terminal to be connected to the negative terminal of the proportional directional valve.
[0112] The inverting analog control circuit includes operational amplifiers N4A and N4B, resistors R27, R29, R30, R33, R34, R37, R38, and R39, capacitors C9 and C10, and potentiometers RP3 and RP4. One end of resistor R38 is connected to QGND via capacitor C10; the other end of resistor R38 is connected to one end of resistor R37; the other end of resistor R37 is connected to one end of resistor R34 and one fixed end of potentiometer RP4; the other end of resistor R34 is connected to the sliding end of potentiometer RP4 and one end of resistor R39. For operational amplifier N4A: the inverting input is connected to one end of resistor R37, the non-inverting input is connected to QGND, and the output is connected to one end of resistor R39. For operational amplifier N4B: the inverting input is connected to one end of resistor R37, the non-inverting input is connected to QGND, and the output is connected to one end of resistor R39. The inverting input terminal is connected to the other end of resistor R39, one end of resistor R33, and one end of capacitor C9. The other end of capacitor C9 is connected to the output terminal of operational amplifier N1B. The non-inverting input terminal is connected to QGND via resistor R27. The other end of resistor R33 is connected to one end of resistor R30 and the sliding terminal of potentiometer RP3. The other end of resistor R30 and one fixed terminal of potentiometer RP3 are both connected to -VEE. The other fixed terminal of potentiometer RP3 is connected to +VEE via resistor R29. One end of resistor R38 is the control input terminal of the inverting analog control circuit. The inverting input terminal of operational amplifier N4B is the feedback terminal of the inverting analog control circuit. The output terminal of operational amplifier N4B is the output terminal of the inverting analog control circuit.
[0113] The inverting pulse modulation circuit includes an inverting pulse width modulation circuit and the triangular wave generator; wherein, the inverting pulse width modulation circuit includes an operational amplifier N5B, resistors R31, R32, R35, and R36; for operational amplifier N5B: the non-inverting input is connected to one end of resistor R31, and the inverting input is connected to one end of resistor R36; the output is connected to +VEE via resistors R35 and R32 connected in series; the other end of resistor R31 is the modulation input of the inverting pulse modulation circuit, and the end of resistors R35 and R32 connected is the drive output of the inverting pulse modulation circuit; the other end of resistor R36 is the modulation output of the inverting pulse modulation circuit; the modulation output of the inverting pulse modulation circuit is connected to the output of the triangular wave generator.
[0114] The reverse sampling circuit includes an operational amplifier N5A, a Hall sensor D3, resistors R40, R41, R42, R43, and R44, and capacitors C11 and C12. For the operational amplifier N5A: the inverting input is connected to one end of resistor R43, one end of resistor R40, and one end of resistor R41; the other end of resistor R43 is connected to QGND. The non-inverting input is connected to one end of resistor R44, and the output is connected to one end of resistor R42, the other end of resistor R40, and the other end of resistor R41. For the Hall sensor D3... 3: The VIOUT terminal is connected to the other end of resistor R44 and one end of capacitor C12. The BW_SEL terminal, GND terminal, and the other end of capacitor C12 are all connected to QGND. The GND terminal is also connected to one end of capacitor C11. The other end of capacitor C11 and VCC terminal are both connected to the second DC power supply voltage. The two IP+ terminals are connected together, which is the drive input terminal of the reverse current sampling circuit. The two IP- terminals are connected together, which is the drive output terminal of the reverse current sampling circuit. The other end of resistor R42 is the feedback output terminal of the reverse current sampling circuit.
[0115] Furthermore, in the amplification drive circuit, the inverting input terminal of the amplification drive chip V1 is connected to the modulation output terminal of the inverting pulse modulation circuit; the inverting output terminal of the amplification drive chip V1 is connected to the drive input terminal of the inverting current sampling circuit; the inverting output terminal of the amplification drive chip V1 is also connected to the negative terminal of the diode V3, and the positive terminal of the diode V3 is grounded.
[0116] The above describes the forward and reverse analog feedback control circuits for the proportional directional valve. During normal operation, whether it's forward or reverse proportional control of the proportional directional valve, control is simple, requiring only control commands sent from the upper-level application controller. Furthermore, since the forward and reverse channels share a common power supply ground and do not interfere with each other, the proportional directional valve control drive circuit can also be applied to control two independent proportional valves. Therefore, the circuit in this embodiment has digital bus control functionality and can act as an actuator receiving commands from the upper-level application controller, facilitating system networking. The technical solution features a small circuit size, enabling the control of up to 8 channels (or 16 channels) of proportional directional valves within a 3U standard industrial board, effectively improving system integration and control capabilities.
[0117] Those skilled in the art will understand that all or part of the processes of the methods described in the above embodiments can be implemented by a computer program instructing related hardware, and the program can be stored in a computer-readable storage medium. The computer-readable storage medium may be a disk, optical disk, read-only memory, or random access memory, etc.
[0118] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.
Claims
1. A proportional directional valve control drive circuit, characterized in that, include: The digital-to-analog converter circuit receives the digital control signal output by the upper-layer application controller through the IIC bus and performs digital-to-analog conversion to obtain the corresponding analog control signal; wherein, only one positive and one negative digital control signal is output at the same time, and the positive and negative aspects of the corresponding digital control signal are the same as those of the analog control signal; The positive analog feedback control circuit generates a positive deviation control signal based on the received positive analog given control signal and the positive current sampling signal obtained from the positive terminal of the proportional directional valve. It then performs pulse width modulation and amplification on the positive deviation control signal to generate a positive valve drive signal for controlling the positive terminal of the proportional directional valve. The reverse analog feedback control circuit generates a reverse deviation control signal based on the received reverse analog given control signal and the reverse current sampling signal obtained from the negative terminal of the proportional directional valve. It then performs pulse width modulation and amplification on the reverse deviation control signal to generate a reverse valve drive signal for controlling the negative terminal of the proportional directional valve. The positive analog feedback control circuit consists of a positive analog control circuit, a positive pulse modulation circuit, an amplification drive circuit, and a positive current sampling circuit based on a Hall sensor; wherein, The forward analog control circuit has a control input terminal connected to the forward analog given control signal output terminal of the digital-to-analog converter circuit to receive the forward analog given control signal; a feedback terminal connected to the feedback output terminal of the forward current sampling circuit to receive the forward current sampling signal; and an output terminal connected to the modulation input terminal of the forward pulse modulation circuit to output the forward deviation control signal. The positive pulse modulation circuit has its output terminal connected to the positive input terminal of the amplification drive circuit. The amplification drive circuit has its positive output terminal connected to the drive input terminal of the positive current sampling circuit; A positive current sampling circuit is used, with its drive output terminal connected to the positive terminal of the proportional directional valve, and the common terminal of the proportional directional valve is grounded. The forward analog control circuit includes operational amplifiers N1A and N1B, resistors R3, R5, R6, R10, R11, R15, R16, and R17, capacitors C3 and C4, and potentiometers RP1 and RP2; wherein, One end of resistor R16 is connected to QGND via capacitor C4; the other end of resistor R16 is connected to one end of resistor R15; the other end of resistor R15 is connected to one end of resistor R11 and one fixed end of potentiometer RP2; the other end of resistor R11 is connected to the sliding end of potentiometer RP2 and one end of resistor R17. For operational amplifier N1A: The inverting input is connected to one end of resistor R15, the non-inverting input is connected to QGND, and the output is connected to one end of resistor R17. For operational amplifier N1B: The inverting input is connected to the other end of resistor R17, one end of resistor R10 and one end of capacitor C3. The other end of capacitor C3 is connected to the output of operational amplifier N1B. The non-inverting input is connected to QGND via resistor R3. The other end of resistor R10 is connected to one end of resistor R6 and the sliding end of potentiometer RP1. The other end of resistor R6 and one fixed end of potentiometer RP1 are both connected to -VEE. The other fixed end of potentiometer RP1 is connected to +VEE via resistor R5. One end of the resistor R16 is the control input terminal of the positive analog control circuit, the inverting input terminal of the operational amplifier N1B is the feedback terminal of the positive analog control circuit, and the output terminal of the operational amplifier N1B is the output terminal of the positive analog control circuit.
2. The proportional directional valve control drive circuit according to claim 1, characterized in that, The positive pulse modulation circuit includes a positive pulse width modulation circuit and a triangular wave generator; wherein... The positive pulse width modulation circuit includes an operational amplifier N2B and resistors R7, R8, R12 and R14; For operational amplifier N2B: The non-inverting input is connected to one end of resistor R7, and the inverting input is connected to one end of resistor R14; the output is connected to +VEE via resistors R12 and R8 connected in series. The other end of resistor R7 is the modulation input terminal of the positive pulse modulation circuit; the end of resistor R12 connected to resistor R8 is the drive output terminal of the positive pulse modulation circuit; the other end of resistor R14 is the modulation output terminal of the positive pulse width modulation circuit. The triangular wave generator includes operational amplifiers N3A and N3B, and resistors R13, R18, R22 and R45; For operational amplifier N3A: The non-inverting input is connected to one end of resistor R13 and one end of resistor R45, the inverting input is connected to QGND, and the output is connected to the other end of resistor R13, one end of resistor R18, and one end of resistor R22. For operational amplifier N3B: The non-inverting input is connected to QGND, and the inverting input is connected to the other end of resistor R18, the other end of resistor R22, and one end of capacitor C6. The output of operational amplifier N3B is connected to the other end of capacitor C6 and the other end of R45. The output terminal of the operational amplifier N3B is the output terminal of the triangular wave generator, which is connected to the modulation output terminal of the positive pulse width modulation circuit.
3. The proportional directional valve control drive circuit according to claim 2, characterized in that, The forward current sampling circuit includes an operational amplifier N2A, a Hall sensor D2, resistors R19, R20, R23, R24, and R25, and capacitors C7 and C8; wherein, For operational amplifier N2A: The inverting input is connected to one end of resistor R24, one end of resistor R19, and one end of resistor R20, and the other end of resistor R24 is connected to QGND; the non-inverting input is connected to one end of resistor R25, and the output is connected to one end of resistor R23, the other end of resistor R19, and the other end of resistor R20. For Hall sensor D2: The VIOUT terminal is connected to the other end of resistor R25 and one end of capacitor C8. The BW_SEL terminal, GND terminal, and the other end of capacitor C8 are all connected to QGND. The GND terminal is also connected to one end of capacitor C7. The other end of capacitor C7 and VCC terminal are both connected to the second DC power supply voltage. The two IP+ terminals are connected together to form the drive input terminal of the forward current sampling circuit; the two IP- terminals are connected together to form the drive output terminal of the forward current sampling circuit; the other end of resistor R23 is the feedback output terminal of the forward current sampling circuit.
4. The proportional directional valve control drive circuit according to claim 3, characterized in that, The reverse analog feedback control circuit consists of a reverse analog control circuit, a reverse pulse modulation circuit, the amplification drive circuit, and a reverse current sampling circuit based on a Hall sensor; wherein, The reverse analog control circuit has its control input terminal connected to the reverse analog given control signal output terminal of the digital-to-analog converter circuit to receive the reverse analog given control signal; its feedback terminal connected to the feedback output terminal of the reverse current sampling circuit to receive the reverse current sampling signal; and its output terminal connected to the modulation input terminal of the reverse pulse modulation circuit to output the reverse deviation control signal. The inverting pulse modulation circuit has its output terminal connected to the inverting input terminal of the amplification drive circuit. The amplifier drive circuit has its inverted output terminal connected to the drive input terminal of the inverted current sampling circuit. The reverse current sampling circuit drives the output terminal to be connected to the negative terminal of the proportional directional valve.
5. The proportional directional valve control drive circuit according to claim 4, characterized in that, The inverted analog control circuit includes operational amplifiers N4A and N4B, resistors R27, R29, R30, R33, R34, R37, R38, and R39, capacitors C9 and C10, and potentiometers RP3 and RP4; wherein, One end of resistor R38 is connected to QGND via capacitor C10; the other end of resistor R38 is connected to one end of resistor R37; the other end of resistor R37 is connected to one end of resistor R34 and one fixed end of potentiometer RP4; the other end of resistor R34 is connected to the sliding end of potentiometer RP4 and one end of resistor R39. For operational amplifier N4A: The inverting input is connected to one end of resistor R37, the non-inverting input is connected to QGND, and the output is connected to one end of resistor R39. For operational amplifier N1B: The inverting input is connected to the other end of resistor R39, one end of resistor R33 and one end of capacitor C9. The other end of capacitor C9 is connected to the output of operational amplifier N1B. The non-inverting input is connected to QGND via resistor R27. The other end of resistor R33 is connected to one end of resistor R30 and the sliding end of potentiometer RP3. The other end of resistor R30 and one fixed end of potentiometer RP3 are both connected to -VEE. The other fixed end of potentiometer RP3 is connected to +VEE via resistor R29. One end of the resistor R38 is the control input terminal of the inverting analog control circuit, the inverting input terminal of the operational amplifier N4B is the feedback terminal of the inverting analog control circuit, and the output terminal of the operational amplifier N4B is the output terminal of the inverting analog control circuit.
6. The proportional directional valve control drive circuit according to claim 5, characterized in that, The reverse pulse modulation circuit includes a reverse pulse width modulation circuit and the triangular wave generator; wherein... The inverted pulse width modulation circuit includes an operational amplifier N5B and resistors R31, R32, R35 and R36. For operational amplifier N5B: The non-inverting input is connected to one end of resistor R31, and the inverting input is connected to one end of resistor R36; the output is connected to +VEE via resistors R35 and R32 connected in series. The other end of resistor R31 is the modulation input terminal of the inverse pulse modulation circuit; the end of resistor R35 connected to resistor R32 is the drive output terminal of the inverse pulse modulation circuit; the other end of resistor R36 is the modulation output terminal of the inverse pulse modulation circuit. The modulation output terminal of the reverse pulse modulation circuit is connected to the output terminal of the triangular wave generator.
7. The proportional directional valve control drive circuit according to claim 6, characterized in that, The reverse current sampling circuit includes an operational amplifier N5A, a Hall sensor D3, resistors R40, R41, R42, R43, and R44, and capacitors C11 and C12; wherein, For operational amplifier N5A: The inverting input is connected to one end of resistor R43, one end of resistor R40, and one end of resistor R41, and the other end of resistor R43 is connected to QGND; the non-inverting input is connected to one end of resistor R44, and the output is connected to one end of resistor R42, the other end of resistor R40, and the other end of resistor R41. For Hall sensor D3: The VIOUT terminal is connected to the other end of resistor R44 and one end of capacitor C12. The BW_SEL terminal, GND terminal, and the other end of capacitor C12 are all connected to QGND. The GND terminal is also connected to one end of capacitor C11. The other end of capacitor C11 and VCC terminal are both connected to the second DC power supply voltage. The two IP+ terminals are connected together as the drive input terminals of the reverse current sampling circuit; the two IP- terminals are connected together as the drive output terminals of the reverse current sampling circuit; the other end of resistor R42 is the feedback output terminal of the reverse current sampling circuit.
8. The proportional directional valve control drive circuit according to claim 7, characterized in that, The amplification drive circuit includes an amplification drive chip V1, diodes V2 and V3, and resistors R26 and R28; wherein, The positive input terminal of the amplifier driver chip V1 is connected to the modulation output terminal of the positive pulse modulation circuit, and the negative input terminal of the amplifier driver chip V1 is connected to the modulation output terminal of the negative pulse modulation circuit. The positive output terminal of the amplifier driver chip V1 is connected to the drive input terminal of the positive current sampling circuit, and the negative output terminal of the amplifier driver chip V1 is connected to the drive input terminal of the negative current sampling circuit. The positive output terminal of the amplifier driver chip V1 is also connected to the negative terminal of diode V2, and the negative output terminal of the amplifier driver chip V1 is also connected to the negative terminal of diode V3. The positive terminals of diodes V2 and V3 are both grounded.