A multi-channel signal processing system and method for ultrasonic steel plate flaw detection

Abstract

The present invention provides a multi-channel signal processing system for ultrasonic steel plate flaw detection, including FPGA, CANbus, bus controller, VAC, digital control filter, VAC, logarithmic chip; FPGA is connected with 16-channel high-voltage excitation output device, controller, dual-port memory, modbus, optical fiber interface, 16-channel receiver, first 8-bit A\D, second 8-bit A\D, third 8-bit A\D and 12-bit A / D; CANbus is connected with controller; bus controller is connected with controller, dual-port memory and modbus; VAC is connected with 16-channel receiver, first 8-bit A\D and digital control filter; digital control filter is connected with VAC, second 8-bit A\D and VAC; VAC is connected with third 8-bit A\D, digital control filter and logarithmic chip; logarithmic chip is connected with VAC and 12-bit A / D. The present invention adopts logarithmic scheme to convert the signal from linear relationship to logarithmic relationship; solves the problem that small signal cannot be detected when large sampling range is guaranteed; by adopting the structure of digital control filter, the filtering frequency band is adjustable.

Description

Technical Field

[0001] The present invention relates to the technical field of ultrasonic flaw detection, and in particular to a multi-channel signal processing method applied to ultrasonic steel plate flaw detection. Background Art

[0002] Ultrasonic flaw detection is a method of inspecting part defects by using the characteristic that ultrasound can penetrate deep into metal materials and reflect at the edge of the interface when entering from one section to another. When the ultrasonic beam passes from the surface of the part through the probe into the metal interior, reflected waves are generated when encountering defects and the bottom of the part, forming pulse waveforms on the fluorescent screen. The location and size of the defects are determined based on these pulse waveforms.

[0003] A novel digital ultrasonic flaw detection system and method is disclosed in a Chinese invention patent with publication number CN101839894A, which includes a probe device, an ultrasonic transmitting / receiving device and a preamplifier, a program-controlled amplifier, a filter, a detector and an A / D converter of a damage wave connected to the preamplifier in sequence, a program-controlled amplifier, a filter, a detector and an A / D converter of a bottom wave, a program-controlled amplifier, a filter, a detector and an A / D converter of an interface wave, and a digital signal processing device connected to the damage wave A / D converter, the bottom wave A / D converter and the interface wave A / D converter, the signal processing device is connected to a human-machine interface device, and a bottom wave correction method and an interface wave and bottom wave combined correction method adopted by the system.

[0004] Decomposing ultrasonic echo signals into interface waves, damage waves and bottom waves for processing greatly increases the amount of data, which will reduce the efficiency of the pipeline in practical applications. In actual situations, small damage waves and bottom waves are often very close and difficult to distinguish. Therefore, the scheme of processing different waves differently makes it difficult to distinguish the waveforms from the beginning. Therefore, a technical solution is needed to improve the above technical problems. Summary of the invention

[0005] In view of the defects in the prior art, the object of the present invention is to provide a multi-channel signal processing system and method for ultrasonic steel plate flaw detection.

[0006] A multi-channel signal processing system for ultrasonic steel plate flaw detection provided by the present invention includes FPGA, CANbus, bus controller, VAC, digital control filter, VAC, and logarithmic chip;

[0007] The FPGA is connected to a 16-channel high-voltage excitation output device, a controller, a dual-port memory, a modbus, an optical fiber interface, a 16-channel receiver, a first 8-bit A\D, a second 8-bit A\D, a third 8-bit A\D and a 12-bit A / D;

[0008] The CANbus is connected to the controller;

[0009] The bus controller is connected to the controller, the dual-port memory and the modbus respectively;

[0010] The VAC is connected to the 16-channel receiver, the first 8-bit A\D and the digital control filter respectively;

[0011] The digital control filter is connected to VAC, the second 8-bit A\D and VAC respectively;

[0012] The VAC is connected to the third 8-bit A\D, the digital control filter and the logarithmic chip respectively;

[0013] The logarithmic chip is connected to VAC and 12-bit A / D respectively.

[0014] Preferably, the FPGA is loaded with corresponding codes after power-on; the FPGA program is burned via CANbus for remote maintenance.

[0015] Preferably, the system includes the following modules: a dual crystal probe, a receiving channel, a linear main amplifier, a filter, an ADC, and a fiber optic interface;

[0016] The dual crystal probe has one transmitter and three receivers, so one set of transmitters corresponds to three sets of receivers;

[0017] The receiving channels are 16 low-noise, multiplexed receiving channels with three sets of adjustable gains;

[0018] The gain and DGS compensation of the linear main amplifier are given by FPGA;

[0019] The filter is a filter with independently adjustable upper and lower cut-off frequencies;

[0020] The ADC has a resolution of 120MSample / 12 bits.

[0021] The optical fiber interface is a plug-in optical fiber interface, which transmits the A-scan data to the PC via optical fiber to generate an A-scan image.

[0022] Preferably, the data is logarithmically transformed to detect small flaws while ensuring a large dynamic range.

[0023] Preferably, the high voltage trigger signal is generated inside the FPGA, and the trigger frequency and the number of cycles are modified by the PC; the PC data is sent to the FPGA via the CANbus, and then the FPGA generates a trigger pulse with the corresponding frequency and number of cycles.

[0024] Preferably, data compression and threshold judgment are performed on the A-scan data, and the processing of the digital signal is completely completed in the FPGA.

[0025] Preferably, the A scan data is compressed into a vector form, and then a threshold judgment is performed, and the judgment result is transmitted to the evaluation module through MODbus, and the evaluation module generates a C scan image.

[0026] Preferably, both the program burning and the control data transmission of the FPGA are completed via CANbus.

[0027] The present invention also provides a multi-channel signal processing method for ultrasonic steel plate flaw detection, comprising the following steps:

[0028] Step S1: Turn on the computer, and the PC writes the program to the FPGA through the CANbus; the FPGA generates a periodic high-voltage trigger signal to the transmitting module;

[0029] Step S2: The transmitting module generates a high-voltage signal of corresponding frequency and number of cycles, and distributes it to 16 probes in 16 ways; the probes adopt a one-transmit-three-receive structure, and the signal returned by the probes is received by the receiving part;

[0030] Step S3: Then it is sent to the first-level VGA module. Each receiving channel corresponds to a VGA, and the FPGA gives each VGA module a different gain; then it enters the filter part, and the filter adjusts different passband ranges according to different ultrasonic frequencies;

[0031] Step S4: The signal is DGS compensated and then logarithmically transformed;

[0032] Step S5: The logarithmic output is sampled by 12-bit AD and enters the FPGA. The converted digital signal is transmitted to the PC via optical fiber to generate an A-scan. On the other hand, data compression is performed to generate a corresponding vector. The vector is compared with the damage threshold. The comparison result is transmitted to the evaluation module via MODbus to generate a C-scan.

[0033] Step S6: During the operation of the FPGA, PC instructions can be sent via CANbus at any time to update the FPGA parameters.

[0034] The signal is preferably converted from a linear relationship to a logarithmic relationship.

[0035] Compared with the prior art, the present invention has the following beneficial effects:

[0036] 1. The present invention converts the signal from a linear relationship to a logarithmic relationship by adopting a logarithmic scheme, thereby solving the problem that a small signal cannot be detected while ensuring a large sampling range;

[0037] 2. The present invention adopts a digitally controlled filter structure to make the filtering frequency band adjustable. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0039] Figure 1 is an overall block diagram of the present invention;

[0040] Figure 2 is a flow chart of the present invention;

[0041] Figure 3 A digital signal sampling diagram of the present invention;

[0042] Figure 4 This is a logarithmic relationship sampling diagram of the digital signal of the present invention. DETAILED DESCRIPTION

[0043] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, several changes and improvements can also be made without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0044] The invention provides a multi-channel signal processing system for ultrasonic flaw detection of steel plates, which performs fast and high-precision nondestructive detection on steel plates in a multi-channel and digital control manner; the system comprises an FPGA17, wherein the FPGA17 is respectively connected to a 16-channel high-voltage excitation output device 1, a controller 3, a dual-port memory 5, a modbus6, an optical fiber interface 7, a 16-channel receiver 8, an 8-bit A\D, and a 12-bit A / D15; a CANbus2 is connected to the controller 3; a bus controller 4 is respectively connected to the controller 3, the dual-port memory 5, and the modbus6; a VAC10 is respectively connected to the 16-channel receiver 8, a first 8-bit A\D9, a second 8-bit A\D11, a third 8-bit A\D13, and a digital control filter 12; the digital control filter 12 is respectively connected to the VAC10, the second 8-bit A\D11, and VAC14; the VAC14 is respectively connected to the third 8-bit A\D13, the digital control filter 12, and a logarithmic chip 16; and the logarithmic chip 16 is respectively connected to the VAC14 and the 12-bit A / D15.

[0045] With FPGA as the core; the central functions of this module are executed by FPGA. It does not contain fixed, burned-in logic functions, but the corresponding code can be loaded after power-on. The FPGA program is burned through CANbus, which can be remotely maintained (updated, upgraded) at low cost.

[0046] The basic module includes: the dual crystal probe has one transmitter and three receivers, so one transmitter corresponds to three receivers; 16 low-noise, multiplexed receiving channels with three adjustable gains (through DAC and VCA); a linear main amplifier, in which the gain and DGS compensation (through DAC and VCA) can be given by the FPGA; filters with independently adjustable upper and lower cutoff frequencies; logarithmic transformation of data to detect small scratches while ensuring a large dynamic range; ADC with 120MSample / 12-bit resolution; high-voltage trigger signals generated by the FPGA, and the trigger frequency and number of cycles can be modified by the PC (PC data is sent to the FPGA via CANbus, and then the FPGA generates a trigger pulse corresponding to the frequency and number of cycles); whether it is data compression or threshold judgment of A-scan data, the processing of digital signals is completely completed in the FPGA; A-scan data is compressed into a vector form, and then a threshold judgment is performed, and the judgment result is transmitted to the evaluation module via MODbus, and the evaluation module generates a C-scan image. A plug-in optical fiber interface transmits the A-scan data to the PC via optical fiber to generate an A-scan image. Programming and data transmission of FPGA are completed through CANbus.

[0047] The present invention also provides a multi-channel signal processing method for ultrasonic steel plate flaw detection. After the machine is turned on, the PC burns the program to the FPGA through the CANbus. The FPGA generates a periodic high-voltage trigger signal to the transmitting module. The transmitting module generates a high-voltage signal of corresponding frequency and number of cycles, which is divided into 16 channels to 16 probes. The probe adopts a one-transmit and three-receive structure, and the signal returned by the probe is received by the receiving part. Then it is given to the first-level VGA module (each receiving channel corresponds to a VGA), and the FPGA gives each VGA module a different gain to adjust the consistency between boards. Then it enters the filter part, and the filter can adjust different passband ranges according to different ultrasonic frequencies, so that the filter part can always maintain an accurate narrowband passband and filter out noise as much as possible. Then the signal is compensated by DGS. Then logarithmic transformation is performed to ensure a large dynamic range while detecting tiny damage. The logarithmic output enters the FPGA through 12-bit AD sampling. The converted digital signal is transmitted to the PC through optical fiber to generate an A scan on the one hand, and data compression is performed on the other hand to generate a corresponding vector, compare the vector with the damage threshold, and transmit the comparison result to the evaluation module through MODbus to generate a C scan. During the operation of the FPGA, PC instructions can be sent via CANbus at any time to update the FPGA parameters.

[0048] In the echo signal of ultrasonic flaw detection, the amplitude of the echo of small flaws is often very different from that of the bottom surface echo. When using AD to convert analog signals into digital signals, a large sampling range is required, and sampling accuracy must be guaranteed. By adopting a logarithmic solution, the signal is converted from a linear relationship to a logarithmic relationship. This solves the problem of being unable to detect small signals while ensuring a large sampling range.

[0049] By adopting the structure of digital control filter, the filter frequency band is adjustable. This solves the problem that the ultrasonic frequency cannot be adjusted once the plate is formed. Different types of steel plates require different ultrasonic frequencies. The commonly used probe frequency for ordinary metal workpieces is 2.5MHz to 5MHz. For special workpieces such as castings with coarse grains, a slightly lower frequency such as 2MHz or lower is selected. Some workpieces with high sensitivity requirements can choose a frequency above 5MHz. If the passband range is increased, additional noise will be introduced, making the echo of small injuries submerged in the background noise and difficult to distinguish. The digital adjustable filter enables the machine to adapt to steel plates of various materials.

[0050] The present invention converts the signal from a linear relationship to a logarithmic relationship by adopting a logarithmic scheme, thereby solving the problem that a small signal cannot be detected while ensuring a large sampling range; and by adopting a digitally controlled filter structure, the filtering frequency band is adjustable.

[0051] Those skilled in the art know that, in addition to realizing the system and its various devices, modules, and units provided by the present invention in a purely computer-readable program code, it is entirely possible to realize the same functions in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, the system and its various devices, modules, and units provided by the present invention can be considered as a hardware component, and the devices, modules, and units included therein for realizing various functions can also be regarded as structures within the hardware component; the devices, modules, and units for realizing various functions can also be regarded as both software modules for realizing the method and structures within the hardware component.

[0052] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily.

Claims

1. A multi-channel signal processing system for ultrasonic steel plate flaw detection, characterized in that: It includes an FPGA (17), a CANbus (2), a bus controller (4), a first VCA (10), a digital control filter (12), a second VCA (14), and a logarithmic chip (16); The FPGA (17) is connected to a 16-channel high-voltage excitation output device (1), a controller (3), a dual-port memory (5), a modbus (6), an optical fiber interface (7), a 16-channel receiver (8), a first 8-bit A / D (9), a second 8-bit A / D (11), a third 8-bit A / D (13) and a 12-bit A / D (15); The CANbus (2) is connected to the controller (3); The bus controller (4) is connected to the controller (3), the dual-port memory (5) and the modbus (6) respectively; The first VCA (10) is connected to a 16-channel receiver (8), a first 8-bit A / D (9) and a digitally controlled filter (12) respectively; The digital control filter (12) is connected to the first VCA (10), the second 8-bit A / D (11) and the second VCA (14) respectively; The second VCA (14) is connected to the third 8-bit A / D (13), the digital control filter (12) and the logarithmic chip (16) respectively; The logarithmic chip (16) is connected to the second VCA (14) and the 12-bit A / D (15) respectively; The digital control filter (12) can adjust different passband ranges by different ultrasonic frequencies, so that the digital control filter (12) can always maintain a narrow passband and filter out noise; by adopting the structure of the digital control filter (12), the filter frequency band can be adjusted; The logarithmic chip (16) performs logarithmic transformation on the data, thereby ensuring a large dynamic range while being able to detect tiny scratches.

2. The multi-channel signal processing system for ultrasonic steel plate flaw detection according to claim 1 is characterized in that: The FPGA (17) is loaded with corresponding codes after being powered on; the FPGA (17) program is burned via the CANbus (2) for remote maintenance.

3. The multi-channel signal processing system for ultrasonic steel plate flaw detection according to claim 1 is characterized in that: The system includes the following modules: dual crystal probe, receiving channel, linear main amplifier, filter, ADC, and optical fiber interface; The dual crystal probe has one transmitter and three receivers, so one set of transmitters corresponds to three sets of receivers; The receiving channels are 16 low-noise, multiplexed receiving channels with three sets of adjustable gains; The gain and DGS compensation of the linear main amplifier are given by FPGA; The filter is a filter with independently adjustable upper and lower cut-off frequencies; The ADC has a resolution of 120MSample / 12 bits. The optical fiber interface is a plug-in optical fiber interface, which transmits the A-scan data to the PC via optical fiber to generate an A-scan image.

4. The multi-channel signal processing system for ultrasonic steel plate flaw detection according to claim 1 is characterized in that: Logarithmic transformation of the data allows detection of small flaws while maintaining a wide dynamic range.

5. The multi-channel signal processing system for ultrasonic steel plate flaw detection according to claim 1 is characterized in that: The high-voltage trigger signal is generated inside the FPGA, and the trigger frequency and number of cycles are modified by the PC; the PC data is sent to the FPGA via CANbus, and then the FPGA generates a trigger pulse with the corresponding frequency and number of cycles.

6. The multi-channel signal processing system for ultrasonic steel plate flaw detection according to claim 1 is characterized in that: The A-scan data is compressed and threshold judged, and the digital signal processing is completely completed in the FPGA.

7. The multi-channel signal processing system for ultrasonic steel plate flaw detection according to claim 6 is characterized in that: The A-scan data is compressed into a vector form, and then a threshold judgment is performed. The judgment result is transmitted to the evaluation module through MODbus, and the evaluation module generates a C-scan image.

8. The multi-channel signal processing system for ultrasonic steel plate flaw detection according to claim 1 is characterized in that: Programming and data transmission of FPGA are completed through CANbus.

9. A multi-channel signal processing method for ultrasonic steel plate flaw detection, characterized in that: The method uses the multi-channel signal processing system for ultrasonic steel plate flaw detection according to any one of claims 1 to 8, and the method comprises the following steps: Step S1: Turn on the computer, and the PC writes the program to the FPGA through the CANbus; the FPGA generates a periodic high-voltage trigger signal to the transmitting module; Step S2: The transmitting module generates a high voltage signal with a corresponding frequency and number of cycles, and distributes it to 16 probes in 16 ways; The probe adopts a one-transmit-three-receive structure, and the signal returned by the probe is received by the receiving part; Step S3: Then it is sent to the first-level VGA module. Each receiving channel corresponds to a VGA, and the FPGA gives each VGA module a different gain; then it enters the filter part, and the filter adjusts different passband ranges according to different ultrasonic frequencies; Step S4: The signal is DGS compensated and then logarithmically transformed; Step S5: The logarithmic output is sampled by 12-bit AD and enters the FPGA. The converted digital signal is transmitted to the PC via optical fiber to generate an A-scan. On the other hand, data compression is performed to generate a corresponding vector. The vector is compared with the damage threshold. The comparison result is transmitted to the evaluation module via MODbus to generate a C-scan. Step S6: During the operation of the FPGA, PC instructions can be sent via CANbus at any time to update the FPGA parameters.

10. The multi-channel signal processing method for ultrasonic steel plate flaw detection according to claim 9, characterized in that: Convert the signal from a linear relationship to a logarithmic relationship.

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