Semiconductor structure and method of forming the same

By setting buried metal lines and power rails in the substrate between the NMOS and PMOS device regions, the problems of insufficient integration and power supply capability of semiconductor devices are solved, achieving higher degree of freedom and integration in wiring, and improving the chip's processing speed and power supply efficiency.

CN115602631BActive Publication Date: 2026-06-19SEMICON MFG INT (SHANGHAI) CORP +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SEMICON MFG INT (SHANGHAI) CORP
Filing Date
2021-07-09
Publication Date
2026-06-19

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Abstract

A semiconductor structure and a method for forming the same are disclosed. The semiconductor structure includes: a substrate comprising a plurality of discrete device cell regions, each device cell region being used to form a standard cell, each device cell region including a first device region for forming an NMOS device and a second device region for forming a PMOS device, the first and second device regions being arranged along a first direction; and embedded metal lines located in the substrate between the first and second device regions, the embedded metal lines extending along a second direction perpendicular to the first direction. This invention improves the wiring freedom of the device, facilitates the release of winding space for subsequent metal interconnects, thereby reducing the height of the standard cell and improving the device integration density.
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