Heat dissipation structure, method of forming heat dissipation structure and semiconductor structure
By forming a heat dissipation ring structure around the through-silicon via (TSV), the heat dissipation difficulties and signal distortion problems of TSV are solved, thereby improving the reliability of the chip and reducing static power consumption.
Patent Information
- Application Number
- CN202110766667.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-07-07
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2041-07-07
AI Technical Summary
In existing technologies, the high thermal density and difficulty in heat dissipation of through-silicon vias lead to an increase in chip operating temperature, affecting reliability and stability. At the same time, metal-oxide-semiconductor capacitors cause signal distortion and leakage current, increasing static power consumption.
A first heat dissipation ring and a second heat dissipation ring are formed around the through silicon via. The first heat dissipation ring is in contact with the through silicon via, and the second heat dissipation ring is in contact with the first heat dissipation ring and has heat dissipation gaps. Heat is conducted through thermally conductive metal material, and the hollow structure is used to improve heat dissipation efficiency.
It effectively dissipates the heat generated by the through-silicon via (TSV), improves the reliability and stability of the TSV, reduces signal distortion and leakage current, and lowers the static power consumption of the chip.
Smart Images

Figure CN115602643B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and includes, but is not limited to, a heat dissipation structure, a method for forming a heat dissipation structure, and a semiconductor structure. Background Technology
[0002] As chip integration continues to increase, the number of device units on each chip is increasing dramatically, leading to a continuous increase in chip area. However, various electronic devices have higher requirements for chip area, size, power consumption, cost, and performance. Therefore, three-dimensional integrated through silicon via (TSV) vertical interconnect technology has emerged.
[0003] In related technologies, on the one hand, because through-silicon vias stack multiple layers of chips together, the power consumption density increases sharply. The high heat generation and poor heat dissipation cause the chip's operating temperature to rise. However, only the first layer of chip is adjacent to the heat sink, making heat dissipation very difficult. This results in excessively high internal heat density of the chip, which seriously affects the reliability and stability of the through-silicon vias. On the other hand, the metal material in the through-silicon vias will expand and contract due to thermal stress, which can easily cause stress deformation of the silicon substrate and dielectric layer, thereby affecting the device characteristics of the active area (AA).
[0004] In addition, in related technologies, a layer of insulating dielectric (e.g., SiO2) is typically used around the through-silicon via (TSV) to achieve electrical isolation from the silicon substrate. However, this creates a metal-oxide-semiconductor (MOS) capacitor. The MOS capacitor causes the signal on the TSV to couple to the silicon substrate or surrounding devices and the TSV, resulting in signal distortion and leakage current, increasing the chip's static power consumption. Summary of the Invention
[0005] In view of this, embodiments of this application provide a heat dissipation structure, a method for forming the heat dissipation structure, and a semiconductor structure.
[0006] In a first aspect, embodiments of this application provide a heat dissipation structure, including:
[0007] The first heat dissipation ring is formed in the dielectric layer surrounding the through-silicon via (TSV), and the first heat dissipation ring is in contact with the TSV; wherein the TSV penetrates the silicon substrate of the chip and the dielectric layer located on the surface of the silicon substrate;
[0008] The second heat dissipation ring is formed around the first heat dissipation ring and is in contact with the first heat dissipation ring; the interior of the second heat dissipation ring has a heat dissipation gap; the dimension of the second heat dissipation ring in a first direction is smaller than the dimension of the first heat dissipation ring in the first direction; the first direction is the thickness direction of the silicon substrate.
[0009] In some embodiments, the heat dissipation structure includes at least two second heat dissipation rings, and any two adjacent second heat dissipation rings are in contact with each other;
[0010] Extending outward from the center of the through-silicon via, the dimensions of the at least two second heat dissipation rings decrease sequentially in the first direction.
[0011] In some embodiments, the first heat dissipation ring is filled with a first thermally conductive metal material; the second heat dissipation ring is filled with a second thermally conductive metal material of a predetermined volume.
[0012] The first thermally conductive metal material may be the same as or different from the second thermally conductive metal material.
[0013] In some embodiments, the second thermally conductive metal material is deposited on the bottom and sidewalls of the second heat dissipation ring;
[0014] The preset volume is greater than or equal to 10% of the total volume of the second heat dissipation ring, and the preset volume is less than or equal to 70% of the total volume of the second heat dissipation ring.
[0015] In some embodiments, the second heat dissipation ring has a dimension of 0.1 micrometer to 1 micrometer in the second direction;
[0016] Any two second heat dissipation rings may have the same or different dimensions in the second direction; wherein the second direction is perpendicular to the first direction.
[0017] In some embodiments, the first size difference between the first heat dissipation ring and the adjacent second heat dissipation ring in the first direction is the same as or different from the second size difference between any two adjacent second heat dissipation rings in the first direction;
[0018] The dimensional difference between any two adjacent second heat dissipation rings in the first direction may be the same or different.
[0019] Secondly, embodiments of this application provide a method for forming a heat dissipation structure, including:
[0020] A chip is provided, the chip comprising at least a through-silicon via penetrating a silicon substrate and a dielectric layer;
[0021] A first heat dissipation ring of the heat dissipation structure is formed around the through-silicon via in the dielectric layer; wherein the first heat dissipation ring is in contact with the through-silicon via;
[0022] A second heat dissipation ring of the heat dissipation structure is formed around the first heat dissipation ring; wherein the second heat dissipation ring is in contact with the first heat dissipation ring, and the interior of the second heat dissipation ring has a heat dissipation gap; the dimension of the second heat dissipation ring in a first direction is smaller than the dimension of the first heat dissipation ring in the first direction; the first direction is the thickness direction of the silicon substrate.
[0023] In some embodiments, the heat dissipation structure includes at least two second heat dissipation rings, and any two adjacent second heat dissipation rings are in contact with each other;
[0024] Extending outward from the center of the through-silicon via, the dimensions of the at least two second heat dissipation rings decrease sequentially in the first direction.
[0025] In some embodiments, the first heat dissipation ring forming the heat dissipation structure around the through-silicon via in the dielectric layer includes:
[0026] The dielectric layer surrounding the through-silicon via (TSV) is etched to form a first etch ring; wherein the first etch ring is in contact with the TSV.
[0027] The first heat dissipation ring of the heat dissipation structure is formed by filling the first thermally conductive metal material into the first etched ring.
[0028] In some embodiments, the second heat dissipation ring forming the heat dissipation structure around the first heat dissipation ring includes:
[0029] The dielectric layer surrounding the first heat dissipation ring is etched to form a second etched ring; wherein the second etched ring is in contact with the first heat dissipation ring;
[0030] A second thermally conductive metal material with a predetermined volume is deposited on the sidewall and bottom of the second etched ring using a preset deposition process.
[0031] A seal is formed on the top of the second etched ring on which the second thermally conductive metal material is deposited, to form the second heat dissipation ring of the heat dissipation structure.
[0032] In some embodiments, the preset volume is greater than or equal to 10% of the total volume of the second etching ring, and the preset volume is less than or equal to 70% of the total volume of the second etching ring.
[0033] The preset deposition process includes chemical vapor deposition or physical vapor deposition.
[0034] In some embodiments, forming a seal on the top of the second etched ring to which the second thermally conductive metal material is deposited includes:
[0035] A sealing material is deposited on top of the second etched ring, on which the second thermally conductive metal material is deposited, using a chemical vapor deposition process to form the seal;
[0036] The sealing material includes any kind of insulating material.
[0037] In some embodiments, the first thermally conductive metal material may be the same as or different from the second thermally conductive metal material;
[0038] The first thermally conductive metal material and the second thermally conductive metal material include at least one of the following: tungsten, cobalt, copper, aluminum, gold, or tantalum.
[0039] In some embodiments, at least a buffer layer, a barrier layer, and a conductive pillar are sequentially formed within the through-silicon via;
[0040] The etching of the dielectric layer surrounding the through-silicon via to form a first etching ring includes:
[0041] The dielectric layer surrounding the through-silicon via (TSV) is etched using either a dry etching process or a wet etching process, while retaining the buffer layer, the barrier layer, and the conductive pillar located within the TSV, to form the first etching ring.
[0042] Thirdly, embodiments of this application provide a semiconductor structure, including: through-silicon vias and a heat dissipation structure;
[0043] The through-silicon via penetrates the silicon substrate and the dielectric layer located on the surface of the silicon substrate;
[0044] The heat dissipation structure is formed in the dielectric layer surrounding the through-silicon via, and the heat dissipation structure is in contact with the through-silicon via.
[0045] The heat dissipation structure, the method for forming the heat dissipation structure, and the semiconductor structure provided in this application embodiment include: a first heat dissipation ring and a second heat dissipation ring; the first heat dissipation ring is formed in the dielectric layer surrounding the through-silicon via (TSV) and is in contact with the TSV; the second heat dissipation ring is formed around the first heat dissipation ring and is in contact with the first heat dissipation ring, and the interior of the second heat dissipation ring has a heat dissipation gap; since the periphery of the TSV has a heat dissipation structure including the first heat dissipation ring and the second heat dissipation ring, the heat generated by the TSV can be dissipated to the outside of the chip, thereby improving the reliability and stability of the TSV. Attached Figure Description
[0046] In the accompanying drawings (which are not necessarily drawn to scale), similar reference numerals may describe similar parts in different views. Similar reference numerals with different letter suffixes may indicate different examples of similar parts. The drawings illustrate, by way of example and not limitation, the various embodiments discussed herein.
[0047] Figure 1 A schematic flowchart of an optional method for forming a heat dissipation structure provided in an embodiment of this application;
[0048] Figures 2a-2l A flowchart illustrating the formation of a heat dissipation structure is provided for an embodiment of this application;
[0049] Figure 3 This is a schematic diagram of an optional heat dissipation structure provided in an embodiment of this application;
[0050] Figure 4 This is a schematic diagram of an optional semiconductor structure provided in an embodiment of this application;
[0051] The annotations in the attached figures are explained as follows:
[0052] 301 / 405 / 603—Silicon substrate; 302 / 404 / 604—Dielectric layer; 303 / 403 / 601—Through silicon via; 3011—Shallow trench isolation; 3012—Active region; 304—First etch ring; 341 / 401 / 6021—First heat dissipation ring; 305 / 306 / 307—Second etch ring; 351 / 361 / 371—Sealing; 352 / 362 / 372 / 402 / 6022—Second heat dissipation ring; 4021—Heat dissipation gap; 60—Semiconductor structure; 602—Heat dissipation structure; M—Second thermally conductive metal material. Detailed Implementation
[0053] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the specific technical solutions of the invention will be further described in detail below with reference to the accompanying drawings of the embodiments of this application. The following embodiments are used to illustrate this application, but are not intended to limit the scope of this application.
[0054] Based on the problems existing in related technologies, this application provides a method for forming a heat dissipation structure. Thermally conductive metal particles are deposited around a through-silicon via (TSV), and then multiple depositions of thermally conductive metal are made to form interconnected hollow metal rings. Utilizing the high thermal conductivity of the metal, the heat generated by the TSV can be dissipated, effectively solving the heat dissipation difficulty problem of TSVs. In this application embodiment, the heat generated by the TSV is conducted through the metal. The hollow structure formed between the metals has a large specific surface area, which is beneficial for heat dissipation. Furthermore, the hollow metals are filled with air, which has an extremely low dielectric constant, which can improve signal distortion and leakage current caused by the MOS capacitance of the TSV, reducing the static power consumption of the chip. In addition, since the heat dissipation structure formed in this application embodiment is a ladder-shaped heat dissipation ring, it not only facilitates upward heat dissipation but also effectively reduces the area occupied by the active region, avoiding stress and temperature effects on devices around the TSV, effectively improving heat dissipation efficiency.
[0055] Figure 1 This is a schematic diagram of an optional process for forming a heat dissipation structure provided in an embodiment of this application, such as... Figure 1 As shown, the method includes the following steps:
[0056] Step S101: Provide a chip, the chip including at least a through-silicon via penetrating a silicon substrate and a dielectric layer.
[0057] The chip contains various active devices and circuits to perform a wide range of functions. In the embodiments of this application, the chip includes at least a silicon substrate.
[0058] Through-silicon vias (TSVs) are through-holes formed inside a chip that penetrate the chip's silicon substrate. The TSVs are filled with conductive material and are used to transmit signals from the front of the chip to the back.
[0059] The silicon substrate may include a top surface on the front side and a bottom surface on the back side opposite to the front side. Ignoring the flatness of the top and bottom surfaces of the silicon substrate, a direction perpendicular to the top and bottom surfaces, i.e., the thickness direction of the silicon substrate, is defined as a first direction. Within the top and bottom surfaces of the silicon substrate (i.e., the plane containing the silicon substrate), any one direction is defined as a second direction. Here, the first direction is perpendicular to the second direction. In this embodiment, the first direction is defined as the X-axis direction, and the second direction is defined as the Y-axis direction.
[0060] The dielectric layer is formed on the surface of the silicon substrate and serves to protect the silicon substrate. In this embodiment, the dielectric layer may be a SiO2 layer or other insulating material layer.
[0061] Step S102: A first heat dissipation ring of the heat dissipation structure is formed around the through-silicon via in the dielectric layer.
[0062] The first heat dissipation ring is in contact with the through-silicon via.
[0063] In this embodiment, the first heat dissipation ring may or may not penetrate the dielectric layer; that is, the dimension of the first heat dissipation ring in the first direction is less than or equal to the dimension of the dielectric layer in the first direction. The first heat dissipation ring is filled with a thermally conductive metal material, utilizing the high thermal conductivity of the metal material to dissipate the heat generated by the through-silicon vias.
[0064] Step S103: A second heat dissipation ring of the heat dissipation structure is formed around the first heat dissipation ring.
[0065] The second heat dissipation ring is in contact with the first heat dissipation ring, and the interior of the second heat dissipation ring has a heat dissipation gap; the dimension of the second heat dissipation ring in the first direction is smaller than the dimension of the first heat dissipation ring in the first direction; the first direction is the thickness direction of the silicon substrate.
[0066] In this embodiment of the application, since the size of the second heat dissipation ring in the first direction is smaller than the size of the first heat dissipation ring in the first direction, the first heat dissipation ring and the second heat dissipation ring constitute a stepped heat dissipation structure.
[0067] It should be noted that, in this embodiment, the number of second heat dissipation rings can be one or at least two. When the heat dissipation structure includes at least two heat dissipation rings, any two adjacent second heat dissipation rings are in contact with each other. Extending outwards from the center of the through-silicon via, the dimensions of the at least two second heat dissipation rings decrease sequentially in the first direction.
[0068] In this embodiment, since the through-silicon via is formed in the keep-out zone (KOZ) of the silicon substrate, the heat dissipation structure is also formed in the keep-out zone of the silicon substrate.
[0069] The heat dissipation structure formation method provided in this application embodiment, since a heat dissipation structure including a first heat dissipation ring and a second heat dissipation ring is formed around the silicon via, can dissipate the heat generated by the silicon via to the outside of the chip, thereby improving the reliability and stability of the silicon via.
[0070] Figures 2a-2l This is a schematic diagram of the process for forming a heat dissipation structure provided in an embodiment of this application. Please refer to the following: Figures 2a-2l The method for forming the heat dissipation structure provided in the embodiments of this application will be further described in detail.
[0071] First, you can refer to Figure 2a Step S101 is executed: a chip is provided, the chip including at least a through-silicon via penetrating the silicon substrate and the dielectric layer.
[0072] like Figure 2a As shown, the chip includes at least a silicon via 303 penetrating a silicon substrate 301 and a dielectric layer 302, wherein the dielectric layer 302 is located on the surface of the silicon substrate 301, and the silicon substrate 301 includes a plurality of active regions 3012 isolated by shallow trench isolation (STI) 3011.
[0073] In some embodiments, the through-silicon via 303 can be formed by the following steps:
[0074] Provides a silicon substrate and a dielectric layer located on the upper surface of the substrate;
[0075] The dielectric layer and the silicon substrate are etched to form a blind via structure in the silicon substrate, and a buffer layer, a barrier layer, and a conductive pillar are sequentially formed in the blind via structure.
[0076] Thinning the bottom of the silicon substrate allows the blind via structure to penetrate the substrate, forming the through-silicon via, wherein a top metal contact layer is formed at the top of the conductive pillar and a bottom metal contact layer is formed at the bottom.
[0077] In some embodiments, the buffer layer may be, for example, SiO2, which is used to protect the silicon substrate from damage; the barrier layer may be made of tantalum, tantalum nitride, or titanium nitride, etc., and the barrier layer is used to prevent the diffusion of the metal material of the conductive pillars subsequently filled in the through-silicon vias; the metal material of the conductive pillars may be any conductive metal, such as tungsten (W), cobalt (Co), copper (Cu), aluminum (Al), etc., for example, copper metal. Specifically, the copper conductive pillars may be formed, for example, by first depositing a copper seed layer by physical vapor deposition (PVD) and then electroplating copper. The through-silicon vias provide conductivity through the top metal contact layer and the bottom metal contact layer in the conductive pillars.
[0078] Next, you can refer to Figure 2b and 2c In step S102, a first heat dissipation ring of the heat dissipation structure is formed around the through-silicon via in the dielectric layer.
[0079] In some embodiments, step S102 can be implemented by the following steps:
[0080] The dielectric layer surrounding the through-silicon via is etched to form a first etch ring.
[0081] like Figure 2b As shown, a first etch ring 304 is formed around the through-silicon via 303. The first etch ring 304 is in contact with the through-silicon via 303. In this embodiment, the first etch ring 304 penetrates the dielectric layer 302 and is located on the surface of the active region 3012 in the silicon substrate 301.
[0082] In this embodiment, the dielectric layer 302 surrounding the through-silicon via 303 can be etched using either a dry etching process or a wet etching process to form a first etching ring 304. The dry etching process can be a plasma etching process, a reactive ion etching process, or an ion milling process.
[0083] In this embodiment of the application, when etching the dielectric layer around the through-silicon via to form the first etching ring, the buffer layer, the barrier layer, and the conductive pillar located in the through-silicon via are retained.
[0084] In other embodiments, when etching the dielectric layer around the through-silicon via to form the first etching ring, the buffer layer in the through-silicon via in the dielectric layer may be removed, while the barrier layer and conductive pillar in the through-silicon via in the dielectric layer are retained, and the buffer layer, barrier layer and conductive pillar in the through-silicon via in the silicon substrate are also retained.
[0085] In this embodiment of the application, the first heat dissipation ring of the heat dissipation structure is formed by spin-coating and filling the first thermally conductive metal material into the first etched ring.
[0086] In other embodiments, the first thermally conductive metal material may be filled using chemical vapor deposition (CVD), PVD, atomic layer deposition (ALD), or any suitable deposition process. The first thermally conductive metal material may be W, Co, Cu, Al, gold (Au), or tantalum (Ta).
[0087] like Figure 2c As shown, the first etched ring 304 is filled with, for example, a first thermally conductive metal material can be spin-coated to form the first heat dissipation ring 341. The dimension h2 of the first heat dissipation ring 341 in the X-axis direction is equal to the dimension h1 of the dielectric layer in the X-axis direction. In this case, the first heat dissipation ring 341 surrounds the through-silicon via 303 located on the dielectric layer 302, thereby maximizing heat dissipation performance and achieving good heat dissipation uniformity through the spin-coated thermally conductive metal with good density and uniformity. Furthermore, based on the viewpoint of ensuring heat dissipation performance, the dimension of the first heat dissipation ring 341 in the Y-axis direction can be from 0.1 micrometers to 2 micrometers, for example, 1.5 micrometers.
[0088] Next, you can refer to Figures 2d to 2l Then, in step S103, a second heat dissipation ring of the heat dissipation structure is formed around the first heat dissipation ring.
[0089] In some embodiments, step S103 can be implemented by the following steps:
[0090] The dielectric layer surrounding the first heat dissipation ring is etched to form a second etched ring.
[0091] like Figure 2dAs shown, a second etched ring 305 is formed around the first heat dissipation ring 341, and the second etched ring 305 is in contact with the first heat dissipation ring 341. The dimension h3 of the second etched ring 305 in the X-axis direction is smaller than the dimension h2 of the first heat dissipation ring 341 in the X-axis direction, so that the subsequently formed second heat dissipation ring has a smaller dimension in the X-axis direction than the first heat dissipation ring 341. This ensures that the outermost heat dissipation ring has a small area while having a good heat dissipation effect. The first and second heat dissipation rings are stepped, which is conducive to the upward dissipation of heat and avoids affecting the bottom components around the through-silicon via. At the same time, it can also reduce the impact of stress.
[0092] In some embodiments, the size of the subsequently formed second heat dissipation ring in the X-axis direction is reduced by about 10%-20% compared to the size of the first heat dissipation ring, for example, by 18%.
[0093] A second thermally conductive metal material with a predetermined volume is deposited on the sidewall and bottom of the second etched ring using a preset deposition process.
[0094] In this embodiment, the preset deposition process can be CVD, PVD, ALD, or any suitable deposition process. The second thermally conductive metal material can be tungsten, cobalt, copper, aluminum, gold, or tantalum. The preset volume is less than the total volume of the second etching ring, the preset volume is greater than or equal to 10% of the total volume of the second etching ring, and the preset volume is less than or equal to 70% of the total volume of the second etching ring. In this embodiment, depositing a preset volume of thermally conductive metal material on the bottom and sidewalls of the second etching ring can form a hollow metal ring, which is beneficial for heat dissipation and also takes into account the manufacturing cost of the heat dissipation structure. Figure 2e As shown, a second thermally conductive metal material M, comprising 10%-70% of the total volume of the second etch ring, is deposited on the sidewalls and bottom of the second etch ring 305.
[0095] A seal is formed on the top of the second etched ring on which the second thermally conductive metal material is deposited, to form the second heat dissipation ring of the heat dissipation structure.
[0096] In some embodiments, forming a seal on the top of the second etched ring to which the second thermally conductive metal material is deposited may include the following steps:
[0097] A sealing material is deposited on top of the second etched ring, on which the second thermally conductive metal material is deposited, using a chemical vapor deposition process to form the seal.
[0098] In this embodiment of the application, the sealing is used to close the top of the second etched ring, and the sealing material includes any insulating material, such as SiO2.
[0099] like Figure 2f As shown, a sealing material is deposited on top of the second etched ring 305, on which the second thermally conductive metal material is deposited, to form a seal 351, thereby forming the second heat dissipation ring 352. The dimension h3 of the second heat dissipation ring 352 in the X-axis direction is smaller than the dimension h2 of the first heat dissipation ring 341 in the X-axis direction.
[0100] In this embodiment, since only a predetermined volume of the second thermally conductive metal material is deposited in the second etching ring, and the predetermined volume is smaller than the total volume of the second etching ring, a gap is formed inside the second etching ring, which is beneficial for heat dissipation. In addition, the gap contains a dielectric material with a low dielectric constant, which can improve the MOS capacitance problem caused by through-silicon vias. In some embodiments, the dielectric material can be air.
[0101] In this embodiment, since the first and second heat dissipation rings are filled with thermally conductive metal material, the heat generated by the through-silicon via (TSV) can be conducted through the thermally conductive metal material. Furthermore, the hollow structure formed between the thermally conductive metals has a large specific surface area, which is beneficial for heat dissipation. In addition, since the dimension of the second heat dissipation ring in the first direction is smaller than that of the first heat dissipation ring in the first direction, a ladder-shaped heat dissipation ring structure can be formed. This effectively reduces the area occupied by the via, reduces the stress and temperature impact on the devices surrounding the TSV, and improves heat dissipation efficiency.
[0102] In some embodiments, the first thermally conductive metal material in the first heat dissipation ring may be the same as or different from the second thermally conductive metal material in the second heat dissipation ring.
[0103] In some embodiments, the heat dissipation structure includes at least two second heat dissipation rings. In this embodiment, the heat dissipation structure includes three second heat dissipation rings as an example.
[0104] It is worth noting that the above Figures 2d to 2f The process of forming a second heat dissipation ring (i.e., the first second heat dissipation ring) is described. The second etched hole 305 is the first second etched hole in the embodiment of this application, and the second heat dissipation ring 352 is the first second heat dissipation ring in the embodiment of this application.
[0105] Next, you can refer to Figures 2g to 2i The formation process of the second heat dissipation ring in the embodiments of this application is described. The formation process of the second heat dissipation ring includes the following steps:
[0106] The dielectric layer surrounding the first second heat dissipation ring is etched to form a second second etched ring.
[0107] like Figure 2gAs shown, a second etched ring 306 is formed around the first second heat dissipation ring 352, and the second etched ring 306 is in contact with the first second heat dissipation ring 352. The dimension h4 of the formed second etched ring 306 in the X-axis direction is smaller than the dimension h3 of the first second heat dissipation ring 352 in the X-axis direction. In this embodiment, the second heat dissipation ring and the first second heat dissipation ring are stepped, which facilitates upward heat dissipation, avoids affecting the bottom components around the through-silicon via, and also reduces the impact of stress.
[0108] In some embodiments, the size of the subsequently formed second heat dissipation ring in the X-axis direction is reduced by about 10%-20% compared to the size of the first second heat dissipation ring, for example, by 11%.
[0109] A second thermally conductive metal material with a predetermined volume is deposited on the sidewall and bottom of the second second etching ring using a preset deposition process.
[0110] like Figure 2h As shown, 10%-70% of the total volume of the second etch ring 306 is deposited on the sidewalls and bottom of the second etch ring.
[0111] In this embodiment, since only a preset volume of the second thermally conductive metal material is deposited in the second second etching ring, and the preset volume is smaller than the total volume of the second etching ring, a gap is formed inside the second etching ring, which is beneficial for heat dissipation.
[0112] A seal is formed on the top of the second second etched ring on which the second thermally conductive metal material is deposited, to form the second second heat dissipation ring of the heat dissipation structure.
[0113] In this embodiment, the process of forming a seal on the top of the second second etching ring is the same as the process of forming a seal on the top of the first second etching ring in the above embodiment, and will not be repeated here.
[0114] like Figure 2i As shown, a sealing material is deposited on top of the second second etched ring 306, on which the second thermally conductive metal material M is deposited, to form a seal 361, thereby forming a second second heat dissipation ring 362. The dimension h4 of the second second heat dissipation ring 362 in the X-axis direction is smaller than the dimension h3 of the first second heat dissipation ring 352 in the X-axis direction. In this embodiment, the third second heat dissipation ring and the second second heat dissipation ring are stepped, which is beneficial for heat dissipation upwards, avoids affecting the bottom components around the through-silicon via, and can also reduce the impact of stress.
[0115] In some embodiments, the dimension of the subsequently formed third second heat dissipation ring in the X-axis direction is reduced by about 10%-20% compared to the dimension of the second second heat dissipation ring, for example, by 15%.
[0116] The following can be used as a reference. Figures 2j to 2l The formation process of the third second heat dissipation ring in the embodiments of this application is described. The formation process of the third second heat dissipation ring includes the following steps:
[0117] The dielectric layer surrounding the second heat dissipation ring is etched to form a third second etched ring.
[0118] In this embodiment, the process of forming the third second etching ring is the same as the process of forming the first second etching ring in the above embodiment, and will not be repeated here.
[0119] like Figure 2j As shown, a third second etched ring 307 is formed by etching around the second second heat dissipation ring 362, and the third second etched ring 307 is in contact with the second second heat dissipation ring 362. Furthermore, the dimension h5 of the formed third second etched ring 307 in the X-axis direction is smaller than the dimension h4 of the second second heat dissipation ring 362 in the X-axis direction.
[0120] Using a preset deposition process, a second thermally conductive metal material with a preset volume is deposited on the sidewall and bottom of the third second etching ring.
[0121] In this embodiment, the process of depositing the second thermally conductive metal material in the third second etching ring is the same as the process of depositing the second thermally conductive metal material in the first second etching ring in the above embodiment, and will not be repeated here.
[0122] like Figure 2k As shown, 10%-70% of the total volume of the second etched ring M is deposited on the sidewalls and bottom of the third second etched ring 307.
[0123] In this embodiment, since only a preset volume of the second thermally conductive metal material is deposited in the third second etching ring, and the preset volume is smaller than the total volume of the second etching ring, a gap is formed inside the second etching ring, which is beneficial for heat dissipation.
[0124] A seal is formed on the top of the third second etched ring on which the second thermally conductive metal material is deposited, to form the third second heat dissipation ring of the heat dissipation structure.
[0125] In this embodiment, the process of forming a seal on the top of the third second etching ring is the same as the process of forming a seal on the top of the first second etching ring in the above embodiment, and will not be repeated here.
[0126] like Figure 2l As shown, a sealing material is deposited on top of the third second etched ring 307, on which the second thermally conductive metal material M is deposited, to form a seal 371, thereby forming the third second heat dissipation ring 372. The dimension h5 of the third second heat dissipation ring 372 in the X-axis direction is smaller than the dimension h4 of the second second heat dissipation ring 362 in the X-axis direction.
[0127] In this embodiment, the second thermally conductive metal material can be tungsten, cobalt, copper, or aluminum. The second thermally conductive metal materials filled in the first second etching ring, the second second etching ring, and the third second etching ring can be the same or different.
[0128] It should be noted that the embodiments in this application only exemplify three second etching rings, and in actual processes, the number of second etching rings is not limited to this.
[0129] In this embodiment, since the size of the third second heat dissipation ring in the first direction is smaller than that of the second heat dissipation ring in the first direction, the size of the second second heat dissipation ring in the first direction is smaller than that of the first second heat dissipation ring in the first direction, and the size of the first second heat dissipation ring in the first direction is smaller than that of the first heat dissipation ring in the first direction, the heat dissipation structure formed in this embodiment is a stepped structure, which can effectively reduce the area occupied by the active region, reduce the stress and temperature effects on the devices around the through silicon via, and effectively improve the heat dissipation efficiency.
[0130] This application provides a hollowed-out through-silicon via (TSV) heat dissipation structure. Thermally conductive metal particles are deposited around the TSV, and then multiple depositions of thermally conductive metal form interconnected hollow metal rings. This effectively solves the heat dissipation problem of TSVs. The heat generated by the TSV is conducted through the metal, and the hollow structure formed between the metals has a large specific surface area, which is beneficial for heat dissipation. Furthermore, because the heat dissipation structure contains air gaps, and air has an extremely low dielectric constant, it can improve signal distortion and leakage current caused by the MOS capacitance of the TSV, reducing the static power consumption of the chip.
[0131] This application provides a heat dissipation structure that allows the heat generated by through-silicon vias to dissipate. Figure 3 This is a schematic diagram of an optional heat dissipation structure provided in an embodiment of this application, such as... Figure 3 As shown, the heat dissipation structure includes: a first heat dissipation ring 401 and a second heat dissipation ring 402.
[0132] The first heat dissipation ring 401 is formed in the dielectric layer 404 surrounding the through-silicon via 403, and the first heat dissipation ring 401 is in contact with the through-silicon via 403. The through-silicon via 403 penetrates the silicon substrate 405 of the chip and the dielectric layer 404 located on the surface of the silicon substrate.
[0133] The second heat dissipation ring 402 is formed around the first heat dissipation ring 401, and the second heat dissipation ring 402 is in contact with the first heat dissipation ring 401; the interior of the second heat dissipation ring 402 has a heat dissipation gap 4021; the size of the second heat dissipation ring in the first direction is smaller than the size of the first heat dissipation ring in the first direction; the first direction is the thickness direction of the silicon substrate.
[0134] In this embodiment of the application, the first direction is defined as the X-axis direction, and the second direction perpendicular to the first direction is defined as the Y-axis direction.
[0135] In this embodiment, the first heat dissipation ring is filled with a first thermally conductive metal material; the second heat dissipation ring is filled with a second thermally conductive metal material of a predetermined volume; the first thermally conductive metal material and the second thermally conductive metal material may be the same as or different from each other.
[0136] In this embodiment of the application, the second thermally conductive metal material is deposited on the bottom and sidewall of the second heat dissipation ring; the preset volume is less than the total volume of the second heat dissipation ring, the preset volume is greater than or equal to 10% of the total volume of the second heat dissipation ring, and the preset volume is less than or equal to 70% of the total volume of the second heat dissipation ring.
[0137] In some embodiments, the second heat dissipation ring has a dimension of 0.1 micrometers to 1 micrometer in the second direction. The second direction is perpendicular to the first direction.
[0138] In this embodiment, because the first and second heat dissipation rings are filled with thermally conductive metal material, the heat generated by the through-silicon via (TSV) is conducted through the thermally conductive metal. Furthermore, the hollow structure formed between the thermally conductive metals has a large specific surface area, which is beneficial for heat dissipation. Since the dimension of the second heat dissipation ring in the X-axis direction is smaller than that of the first heat dissipation ring in the X-axis direction, a trapezoidal heat dissipation ring structure can be formed, which can effectively reduce the area occupied by the via, reduce the stress and temperature impact on the devices surrounding the TSV, and improve heat dissipation efficiency.
[0139] In some embodiments, the heat dissipation structure includes at least two second heat dissipation rings, and any two adjacent second heat dissipation rings are in contact with each other; extending outward along the center of the through silicon via, the dimensions of the at least two second heat dissipation rings decrease sequentially along the X-axis.
[0140] In some embodiments, any two second heat dissipation rings may have the same or different dimensions in the second direction. For example, when the heat dissipation structure includes two second heat dissipation rings, the first second heat dissipation ring may have a dimension of 0.5 micrometers in the Y-axis direction, and the second second heat dissipation ring may have a dimension of 0.5 micrometers in the Y-axis direction, or the second second heat dissipation ring may have a dimension of 0.8 micrometers in the Y-axis direction.
[0141] In some embodiments, the first size difference between the first heat dissipation ring and the adjacent second heat dissipation ring in the first direction is the same as or different from the second size difference between any two adjacent second heat dissipation rings in the first direction; the size difference between any two adjacent second heat dissipation rings in the first direction is the same as or different.
[0142] The heat dissipation structure in this embodiment is similar to the heat dissipation structure in the above embodiments in terms of the method of forming it. For technical features not disclosed in detail in this embodiment, please refer to the above embodiments for understanding. Here, they will not be repeated.
[0143] The heat dissipation structure provided in this application embodiment effectively solves the heat dissipation problem of through-silicon vias (TSVs) due to the perforated metal rings. The heat generated by the TSVs is conducted through the thermally conductive metal, and the perforated structure formed between the thermally conductive metals has a large specific surface area, which is beneficial for heat dissipation. On the other hand, since the heat dissipation structure in this application embodiment has air gaps, and air has an extremely low dielectric constant, it can improve the signal distortion and leakage current caused by the MOS capacitance of the TSVs, thereby reducing the static power consumption of the chip.
[0144] In addition, embodiments of this application also provide a semiconductor structure. Figure 4 This is a schematic diagram of an optional semiconductor structure provided in an embodiment of this application, such as... Figure 4 As shown, the semiconductor structure 60 includes: a through-silicon via 601 and a heat dissipation structure 602.
[0145] The through-silicon via 601 penetrates the silicon substrate 603 and the dielectric layer 604 located on the surface of the silicon substrate.
[0146] The heat dissipation structure 602 is formed in the dielectric layer surrounding the through silicon via 601, and the heat dissipation structure 602 is in contact with the through silicon via 601.
[0147] In this embodiment of the application, the heat dissipation structure is used to dissipate the heat generated by the through silicon via.
[0148] In some embodiments, the heat dissipation structure includes a first heat dissipation ring 6021 and at least one second heat dissipation ring 6022. The first heat dissipation ring contacts the through-silicon via (TSV), the second heat dissipation ring contacts the first heat dissipation ring, and the interior of the second heat dissipation ring has a heat dissipation gap; the dimension of the second heat dissipation ring in a first direction is smaller than the dimension of the first heat dissipation ring in the first direction; the first direction is the thickness direction of the silicon substrate.
[0149] In some embodiments, any two adjacent second heat dissipation rings are in contact with each other; extending outward from the center of the through-silicon via, the dimensions of the at least two second heat dissipation rings decrease sequentially in the first direction.
[0150] The heat dissipation structure in the semiconductor structure provided in this application embodiment is similar to the heat dissipation structure or the method of forming the heat dissipation structure in the above embodiments. For technical features not disclosed in detail in this application embodiment, please refer to the above embodiments for understanding. Here, they will not be repeated.
[0151] The semiconductor structure provided in this application includes a heat dissipation structure located outside the through-silicon via (TSV). The heat dissipation structure can dissipate the heat generated by the TSV, thereby improving the reliability and stability of the TSV and enhancing the electrical performance of the semiconductor structure.
[0152] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in a non-target manner. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components may be combined, or integrated into another system, or some features may be ignored or not executed. In addition, the various components shown or discussed are coupled to each other or directly coupled.
[0153] The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method or device embodiments.
[0154] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A heat dissipation structure, characterized in that, include: First heat dissipation ring and second heat dissipation ring; The first heat dissipation ring is formed in the dielectric layer surrounding the through-silicon via (TSV), and the first heat dissipation ring is in contact with the TSV; wherein the TSV penetrates the silicon substrate of the chip and the dielectric layer located on the surface of the silicon substrate; The second heat dissipation ring is formed around the first heat dissipation ring and is in contact with the first heat dissipation ring; the interior of the second heat dissipation ring has a heat dissipation gap; the dimension of the second heat dissipation ring in a first direction is smaller than the dimension of the first heat dissipation ring in the first direction; the first direction is the thickness direction of the silicon substrate.
2. The heat dissipation structure according to claim 1, characterized in that, The heat dissipation structure includes at least two second heat dissipation rings, and any two adjacent second heat dissipation rings are in contact with each other; Extending outward from the center of the through-silicon via, the dimensions of the at least two second heat dissipation rings decrease sequentially in the first direction.
3. The heat dissipation structure according to claim 2, characterized in that, The first heat dissipation ring is filled with a first thermally conductive metal material; the second heat dissipation ring is filled with a second thermally conductive metal material of a predetermined volume. The first thermally conductive metal material may be the same as or different from the second thermally conductive metal material.
4. The heat dissipation structure according to claim 3, characterized in that, The second thermally conductive metal material is deposited on the bottom and sidewalls of the second heat dissipation ring; The preset volume is greater than or equal to 10% of the total volume of the second heat dissipation ring, and the preset volume is less than or equal to 70% of the total volume of the second heat dissipation ring.
5. The heat dissipation structure according to any one of claims 2 to 4, characterized in that, The second heat dissipation ring has a dimension of 0.1 micrometers to 1 micrometer in the second direction; Any two second heat dissipation rings may have the same or different dimensions in the second direction; wherein the second direction is perpendicular to the first direction.
6. The heat dissipation structure according to any one of claims 2 to 4, characterized in that, The first size difference between the first heat dissipation ring and the adjacent second heat dissipation ring in the first direction is the same as or different from the second size difference between any two adjacent second heat dissipation rings in the first direction; The dimensional difference between any two adjacent second heat dissipation rings in the first direction may be the same or different.
7. A method for forming a heat dissipation structure, characterized in that, The method includes: A chip is provided, the chip comprising at least a through-silicon via penetrating a silicon substrate and a dielectric layer; A first heat dissipation ring of the heat dissipation structure is formed around the through-silicon via in the dielectric layer; wherein the first heat dissipation ring is in contact with the through-silicon via; A second heat dissipation ring of the heat dissipation structure is formed around the first heat dissipation ring; wherein the second heat dissipation ring is in contact with the first heat dissipation ring, and the interior of the second heat dissipation ring has a heat dissipation gap; the dimension of the second heat dissipation ring in a first direction is smaller than the dimension of the first heat dissipation ring in the first direction; the first direction is the thickness direction of the silicon substrate.
8. The method for forming a heat dissipation structure according to claim 7, characterized in that, The heat dissipation structure includes at least two second heat dissipation rings, and any two adjacent second heat dissipation rings are in contact with each other; Extending outward from the center of the through-silicon via, the dimensions of the at least two second heat dissipation rings decrease sequentially in the first direction.
9. The method for forming a heat dissipation structure according to claim 7, characterized in that, The first heat dissipation ring forming the heat dissipation structure around the through-silicon via in the dielectric layer includes: The dielectric layer surrounding the through-silicon via (TSV) is etched to form a first etch ring; wherein the first etch ring is in contact with the TSV. The first heat dissipation ring of the heat dissipation structure is formed by filling the first thermally conductive metal material into the first etched ring.
10. The method for forming a heat dissipation structure according to claim 9, characterized in that, The second heat dissipation ring, which forms the heat dissipation structure around the first heat dissipation ring, includes: The dielectric layer surrounding the first heat dissipation ring is etched to form a second etched ring; wherein the second etched ring is in contact with the first heat dissipation ring; A second thermally conductive metal material with a predetermined volume is deposited on the sidewall and bottom of the second etched ring using a preset deposition process. A seal is formed on the top of the second etched ring on which the second thermally conductive metal material is deposited, to form the second heat dissipation ring of the heat dissipation structure.
11. The method for forming a heat dissipation structure according to claim 10, characterized in that, The preset volume is greater than or equal to 10% of the total volume of the second etching ring, and the preset volume is less than or equal to 70% of the total volume of the second etching ring; The preset deposition process includes chemical vapor deposition or physical vapor deposition.
12. The method for forming a heat dissipation structure according to claim 10, characterized in that, The process of forming a seal on the top of the second etched ring, on which the second thermally conductive metal material is deposited, includes: A sealing material is deposited on top of the second etched ring, on which the second thermally conductive metal material is deposited, using a chemical vapor deposition process to form the seal; The sealing material includes any kind of insulating material.
13. The method for forming a heat dissipation structure according to any one of claims 10 to 12, characterized in that, The first thermally conductive metal material may be the same as or different from the second thermally conductive metal material; The first thermally conductive metal material and the second thermally conductive metal material include at least one of the following: tungsten, cobalt, copper, aluminum, gold, or tantalum.
14. The method for forming a heat dissipation structure according to claim 9, characterized in that, The silicon via is formed in sequence with at least a buffer layer, a barrier layer, and a conductive pillar. The etching of the dielectric layer surrounding the through-silicon via to form a first etching ring includes: The dielectric layer surrounding the through-silicon via (TSV) is etched using either a dry etching process or a wet etching process, while retaining the buffer layer, the barrier layer, and the conductive pillar located within the TSV, to form the first etching ring.
15. A semiconductor structure, characterized in that, The semiconductor structure includes at least a through-silicon via and a heat dissipation structure as described in any one of claims 1 to 6; The through-silicon via penetrates the silicon substrate and the dielectric layer located on the surface of the silicon substrate; The heat dissipation structure is formed in the dielectric layer surrounding the through-silicon via, and the heat dissipation structure is in contact with the through-silicon via.
Citation Information
Patent Citations
Three-dimensional integrated capacitor with through silicon vias and manufacturing method of three-dimensional integrated capacitor
CN105206421A
High-power chip back heat dissipation method based on silicon through holes
CN111508913A