Pixel circuit, driving method thereof, and display device

Abstract

The present invention discloses a pixel circuit, a driving method thereof, and a display device. The pixel circuit includes a driving module, a first storage module, a data writing module, a first initialization module, and a light-emitting module. The driving module includes a dual-gate transistor, which includes a first gate and a second gate. The first gate and the second gate are respectively one of a top gate and the other of a bottom gate. The first gate is connected to the first electrode of the dual-gate transistor. The data writing module transmits a data voltage on a data line to the second gate. The first initialization module is used to transmit a first initialization voltage on a first initialization signal line to the first gate, and is also used to transmit a detection signal of a detected pixel circuit. Preset curves of the current value and the gate-source voltage difference of the first electrode corresponding to different threshold voltages of the dual-gate transistor are obtained in advance. The preset curve to which the dual-gate transistor belongs is determined based on the detected detection signal, and the data voltage is compensated to improve display uniformity.

Description

Technical Field

[0001] The embodiments of the present invention relate to display technology, and in particular to a pixel circuit, a driving method thereof, and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) has the advantages of high contrast, fast response speed and wide viewing angle, and is gradually replacing LCD to become the mainstream display technology.

[0003] OLEDs are current-driven devices, and their light emission is determined by the current generated by the driver transistor. This current is generated by the driver transistor based on the data voltage, driving the OLED's light. However, even with the same data voltage input, the driver transistors generate different currents, resulting in poor display uniformity. Summary of the Invention

[0004] The present invention provides a pixel circuit, a driving method thereof, and a display device to improve display uniformity.

[0005] In a first aspect, an embodiment of the present invention provides a pixel circuit, comprising: a driving module, a first storage module, a data writing module, a first initialization module, and a light emitting module;

[0006] The driving module includes a dual-gate transistor, the dual-gate transistor includes a first gate and a second gate, the first gate and the second gate are respectively one of a top gate and the other of a bottom gate;

[0007] The first initialization module is connected between the first initialization signal line and the first gate, and the first gate is connected to the first electrode of the double-gate transistor;

[0008] The data writing module is connected between the data line and the second gate, and is used to transmit the data voltage on the data line to the second gate;

[0009] The first storage module is connected between the second gate and the first electrode of the double-gate transistor;

[0010] The first initialization module is used to transmit a first initialization voltage to the first gate, and is also used to transmit a detection signal of the detected pixel circuit;

[0011] The dual-gate transistor is used to generate a driving current according to the voltage of its second gate to drive the light-emitting module to emit light.

[0012] Optionally, the data writing module is connected to the first scan line, and the first initialization module is connected to the first scan line;

[0013] The working process of the pixel circuit includes an initialization phase and a threshold voltage detection phase;

[0014] The data writing module is used to transmit the data voltage on the data line to the second gate in response to the scan signal on the first scan line during the initialization phase. The first initialization module is used to transmit the first initialization voltage to the first gate and the first electrode of the dual-gate transistor in response to the scan signal on the first scan line during the initialization phase.

[0015] The data writing module is further used to transmit the data voltage on the data line to the second gate in response to the scan signal on the first scan line during the threshold voltage detection phase. The first initialization module is further used to output the detected signal during the threshold voltage detection phase.

[0016] Optionally, the data writing module includes a second transistor, the first initialization module includes a third transistor, and the first storage module includes a first capacitor;

[0017] A first electrode of the second transistor is connected to the data line, a second electrode of the second transistor is connected to the second gate, and the gate of the second transistor is connected to the first scan line;

[0018] A first electrode of the third transistor is connected to the first initialization signal line, a second electrode of the third transistor is connected to the first gate and the first electrode of the double-gate transistor respectively, and a gate of the third transistor is connected to the first scan line;

[0019] The second electrode of the dual-gate transistor is connected to the first power supply, the first electrode of the dual-gate transistor is connected to the first end of the light-emitting module, and the second end of the light-emitting module is connected to the second power supply;

[0020] A first terminal of the first capacitor is connected to the second gate, and a second terminal of the first capacitor is connected to the first electrode of the dual-gate transistor.

[0021] Optionally, the pixel circuit further includes a compensation module connected between the first initialization module and the first electrode of the dual-gate transistor; wherein the operation process of the pixel circuit further includes a data voltage writing stage;

[0022] The compensation module is used to connect the first gate and the first electrode of the double-gate transistor during the initialization phase, the threshold voltage detection phase and the data voltage writing phase;

[0023] The data writing module is used for writing the compensated data voltage into the second gate of the dual-gate transistor in the data voltage writing phase.

[0024] Optionally, the compensation module includes a fourth transistor, a first electrode of the fourth transistor is connected to the first gate, a second electrode of the fourth transistor is connected to the first electrode of the dual-gate transistor, and a gate of the fourth transistor is connected to the second scan line.

[0025] Optionally, the pixel circuit further includes a compensation module and a second initialization module, the compensation module is connected between the first initialization module and the first electrode of the dual-gate transistor, and the second initialization module is connected between the second initialization signal line and the first electrode of the dual-gate transistor; wherein the operation process of the pixel circuit further includes a data voltage writing stage,

[0026] The compensation module is used to connect the first gate and the first electrode of the double-gate transistor during the initialization phase and the threshold voltage detection phase;

[0027] The data writing module is used for writing the compensated data voltage into the second gate of the dual-gate transistor during the data voltage writing phase;

[0028] The second initialization module is used to transmit the second initialization voltage on the second initialization signal line to the first electrode of the dual-gate transistor during the data voltage writing phase;

[0029] Optionally, the compensation module includes a fourth transistor, and the second initialization module includes a fifth transistor;

[0030] A first electrode of the fourth transistor is connected to the first gate, a second electrode of the fourth transistor is connected to the first electrode of the double-gate transistor, and a gate of the fourth transistor is connected to the second scan line;

[0031] A first electrode of the fifth transistor is connected to the second initialization signal line, a second electrode of the fifth transistor is connected to the first electrode of the double-gate transistor, and a gate of the fifth transistor is connected to the third scan line.

[0032] Optionally, the pixel circuit further includes a second storage module, the second storage module being connected between the first gate and the first electrode of the dual-gate transistor, and being configured to store a voltage between the first gate and the first electrode of the dual-gate transistor;

[0033] Optionally, the second storage module includes a second capacitor, a first end of the second capacitor is connected to the first gate, and a second end of the second capacitor is connected to the first electrode of the dual-gate transistor.

[0034] In a second aspect, an embodiment of the present invention further provides a method for driving a pixel circuit, the pixel circuit comprising a driving module, a first storage module, a data writing module, a first initialization module, and a light-emitting module; the driving module comprising a dual-gate transistor, the dual-gate transistor comprising a first gate and a second gate, the first gate and the second gate being one of a top gate and the other of a bottom gate, respectively; the first initialization module being connected between a first initialization signal line and a first gate of the dual-gate transistor, the first gate being connected to a first electrode of the dual-gate transistor, the data writing module being connected between a data line and the second gate, and the first storage module being connected between the second gate and the first electrode of the dual-gate transistor;

[0035] The driving method includes:

[0036] In the initialization phase, the first initialization module and the data writing module are controlled to be turned on, the first initialization module transmits a first initialization voltage on the first initialization signal line to the first gate, and the data writing module transmits a data voltage on the data line to the second gate;

[0037] In the threshold voltage detection phase, the first initialization module and the data writing module are controlled to be turned on, the data writing module transmits the data voltage on the data line to the second gate, and the first initialization module transmits the detection signal of the detected pixel circuit to the first initialization signal line;

[0038] During the data voltage writing phase, the first initialization module and the data writing module are controlled to be turned on, the first initialization module transmits a first initialization voltage on the first initialization signal line to the first gate, and the data writing module transmits a compensated data voltage on the data line to the second gate; wherein the data voltage on the data line is the same during the initialization phase and the threshold voltage detection phase, and is different during the data voltage writing phase and the initialization phase;

[0039] In the light emitting stage, the first initialization module and the data writing module are controlled to be turned off, and the dual-gate transistor drives the light emitting module to emit light according to the compensated data voltage written in the data voltage writing stage.

[0040] In a third aspect, an embodiment of the present invention further provides a display device, comprising a driver chip and the pixel circuit according to any one of the first aspects, wherein the driver chip is connected to the first initialization signal line and the data line;

[0041] The driving chip is used to provide a first initialization voltage and a data voltage to the pixel circuit;

[0042] The driver chip is used to determine a second preset curve of the current and gate-source voltage difference of the first electrode of the dual-gate transistor to which the driving module belongs based on the detected detection signal and a first preset curve of the current and gate-source voltage difference of the first electrode of a plurality of dual-gate transistors corresponding to different threshold voltages of the dual-gate transistors;

[0043] The magnitude of the data voltage at the current gray scale is determined according to the current value at the current gray scale and the second preset curve, wherein the gate-source voltage difference is the voltage difference between the second gate of the dual-gate transistor and the first electrode of the dual-gate transistor.

[0044] Optionally, the display grayscale includes at least a first gray stage and a second gray stage, and each first preset curve includes at least a first sub-curve and a second sub-curve, the first sub-curve being a curve showing the relationship between the current and the gate-source voltage difference of the first electrode of the dual-gate transistor corresponding to the first gray stage, and the second sub-curve being a curve showing the relationship between the current and the gate-source voltage difference of the first electrode of the dual-gate transistor corresponding to the second gray stage; wherein any grayscale value of the second gray stage is greater than or equal to the maximum grayscale value of the first gray stage; wherein the driver chip is configured to determine the second preset curve corresponding to the first gray stage based on the detected detection signal and the first sub-curve; and determine the second preset curve corresponding to the second gray stage based on the detected detection signal and the second sub-curve;

[0045] Optionally, the display grayscale also includes a third gray stage, and each first preset curve also includes a third sub-curve, the third sub-curve being a curve showing the relationship between the current of the first electrode of the dual-gate transistor and the gate-source voltage difference corresponding to the third gray stage; wherein any grayscale value of the third gray stage is greater than or equal to the maximum grayscale value of the second gray stage, and the driving chip is used to determine the second preset curve corresponding to the third gray stage based on the detected detection signal and the third sub-curve.

[0046] The pixel circuit provided by an embodiment of the present invention includes a driving module, a first storage module, a data writing module, a first initialization module and a light-emitting module. The driving module includes a dual-gate transistor, and the dual-gate transistor includes a first gate and a second gate. The first initialization module is connected between the first initialization signal line and the first gate, and the first gate is connected to the first electrode of the dual-gate transistor. The data writing module is connected between the data line and the second gate, and the data writing module is used to transmit the data voltage on the data line to the second gate. The first initialization module is used to transmit the first initialization voltage to the first gate, and is also used to transmit the detection signal of the detected pixel circuit. The first initialization signal line can transmit the detection signal of the detected pixel circuit, wherein the detection signal includes the voltage and current of the first electrode of the dual-gate transistor, the voltage of the second gate is the data voltage transmitted by the data line, and the current value of the first electrode of the dual-gate transistor has a one-to-one correspondence with the gate-source voltage difference (the voltage difference between the second gate and the first electrode). Preset curves of the corresponding first-pole current values and gate-source voltage differences of dual-gate transistors at different threshold voltages are obtained in advance. Based on the detected first-pole current values and corresponding gate-source voltage differences of multiple dual-gate transistors, the preset curve to which the dual-gate transistor belongs can be determined. Then, data voltage compensation is achieved based on the current value at the grayscale to be illuminated and the preset curve to which the dual-gate transistor currently belongs. During the stage of writing the compensated data voltage, the voltage of the first pole of the dual-gate transistor is fixed, while the voltage of the second gate is variable, so that the gate-source voltage difference can be controlled, thereby allowing the dual-gate transistor to output the desired current value, eliminating the effects of threshold voltage / critical voltage and SS (sub-threshold slope) fluctuations on current, and improving display uniformity. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0048] Figure 2 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0049] Figure 3 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0050] Figure 4 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0051] Figure 5 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0052] Figure 6 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0053] Figure 7 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0054] Figure 8 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0055] Figure 9 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0056] Figure 10 A flowchart of a driving method for a pixel circuit provided by an embodiment of the present invention;

[0057] Figure 11 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0058] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0059] As mentioned in the background technology, the pixel circuit display uniformity in the prior art is not high. The inventors have found that the reason for the above problem is that during the manufacturing process of the pixel circuit, process fluctuations will cause fluctuations in the physical parameters of the driving transistor. Therefore, under the condition of the same data voltage input, the driving current generated by the driving transistor is different, affecting the display effect of the screen. Conventional compensation technologies all compensate for the threshold voltage of the driving transistor, and the compensation mechanism is based on the current formula in the saturation region. (μ is the electron mobility of the driving transistor, Cox is the channel capacitance per unit area of the driving transistor, W / L is the width-to-length ratio of the driving transistor, Vth is the threshold voltage of the driving transistor, V GS Based on the gate-source voltage difference of the driver transistor, the threshold voltage is captured and fed back to the gate of the driver transistor, eliminating the threshold voltage from the current equation in the saturation region. However, the above compensation mechanism is based on the saturation region and does not apply to the current equation in the subthreshold region. As a result, there is an error in the threshold voltage compensation in the subthreshold region.

[0060] In view of the above problems, embodiments of the present invention provide a novel pixel circuit structure to improve display uniformity. Figure 1 A schematic diagram of a pixel circuit according to an embodiment of the present invention is provided. Figure 1 The pixel circuit includes a driving module 10 , a first storage module 11 , a data writing module 12 , a first initialization module 13 and a light emitting module 14 .

[0061] The driving module 10 includes a dual-gate transistor T1 . The dual-gate transistor T1 includes a first gate G and a second gate B. The first gate G and the second gate B are one of a top gate and the other of a bottom gate, respectively.

[0062] The first initialization module 13 is connected between the first initialization signal line Vref1 and the first gate G. The first gate G is connected to the first electrode S of the dual-gate transistor T1.

[0063] The data writing module 12 is connected between the data line Vdata and the second gate B. The data writing module 12 is used to transmit the data voltage on the data line Vdata to the second gate B.

[0064] The first storage module 11 is connected between the second gate B and the first electrode S.

[0065] The first initialization module 13 is used to transmit a first initialization voltage to the first gate G, and is also used to transmit a detection signal of the detected pixel circuit;

[0066] The dual-gate transistor T1 is used to generate a driving current according to the voltage of its second gate B, so as to drive the light-emitting module 14 to emit light.

[0067] Specifically, the dual-gate transistor T1 serves as the driving transistor of the pixel circuit, driving the light-emitting module 14 to emit light. The dual-gate transistor T1 is generally a vertical dual-gate transistor, the first gate G can be a top gate, the second gate B can be a bottom gate, or the first gate G can be a bottom gate, and the second gate B can be a top gate. In this embodiment, the first gate G is a top gate and the second gate B is a bottom gate. The threshold voltage compensation is completed by setting a first initialization signal line Vref1 to detect the detection signal of the first electrode S of the dual-gate transistor T1, wherein the detection signal may include the voltage and current of the first electrode S of the dual-gate transistor T1. Optionally, the second electrode D of the dual-gate transistor T1 is connected to the first power line Vdd, and the light-emitting module 14 is also connected to the second power line Vss. Exemplarily, the first electrode S of the dual-gate transistor T1 is the source, and the second electrode D is the drain.

[0068] The operation process of the pixel circuit provided by the embodiment of the present invention includes at least an initialization phase, a threshold voltage detection phase, and a data voltage writing phase. The first initialization module 13 and the data writing module 12 are both connected to the scan line and are used to turn on or off in response to the signal on the scan line. When the first initialization module 13 is turned on, it means connecting the first initialization signal line Vref1 to the first gate G. When the first initialization module 13 is turned off, it means disconnecting the first initialization signal line Vref1 from the first gate G. When the data writing module 12 is turned on, it means connecting the data line Vdata to the second gate B. When the data writing module 12 is turned off, it means disconnecting the data line Vdata from the second gate B.

[0069] During the initialization phase, the first initialization module 13 is controlled to be turned on, transmitting the first initialization voltage on the first initialization signal line Vref1 to the first gate G and the first electrode S of the dual-gate transistor T1, respectively, to initialize the potentials of the first gate G and the first electrode S of the dual-gate transistor T1. The voltage difference between the first initialization voltage and the second power supply voltage provided by the second power supply line Vss can be set to be less than the threshold voltage of the light-emitting module 14 to ensure that the light-emitting module 14 does not emit light during this phase. The data writing module 12 is controlled to be turned on, and the turned-on data writing module 12 transmits the data voltage on the data line Vdata during this phase to the second gate B. During this phase, by configuring the data voltage and the first initialization voltage, the threshold voltage of the dual-gate transistor T1 is less than 0V, the voltage difference between the first gate G and the first electrode S of the dual-gate transistor T1 is 0V, and the voltage difference between the first gate G and the first electrode S of the dual-gate transistor T1 is greater than the threshold voltage of the dual-gate transistor T1, turning on the dual-gate transistor T1.

[0070] During the threshold voltage detection phase, the first initialization module 13 and the data writing module 12 are controlled to be conductive. During this phase, the first initialization signal line Vref1 is no longer in a write signal state, but instead outputs a detected detection signal. The first initialization module 13 can be used to transmit the detection signal of the detected pixel circuit via the first initialization signal line Vref1. Because the dual-gate transistor T1 is already conductive during the initialization phase, the first power supply voltage charges the first electrode S of the dual-gate transistor T1 through the dual-gate transistor T1, increasing the potential of the first electrode S and the first gate G of the dual-gate transistor T1. The first initialization signal line Vref1 outputs the detected detection signal, i.e., outputs multiple sets of detection signals, each set of detection signals including the voltage value and current value of the first electrode S of the dual-gate transistor T1. The control circuit connected to the first initialization signal line Vref1 stores multiple preset curves of the current value of the first electrode of the dual-gate transistor T1 and the gate-source voltage difference (the voltage difference between the second gate B and the first electrode S), each of which corresponds to a threshold voltage. Based on the output voltage values and current values of the first electrodes S of the multiple groups of dual-gate transistors T1, a curve of the current value of the first electrode S of the dual-gate transistor T1 and the gate-source voltage difference is fitted. The curve that best fits the fitted curve among the preset curves stored in advance is the preset curve to which the dual-gate transistor T1 belongs.

[0071] During the data voltage writing phase, the data writing module 12 and the first initialization module 13 are controlled to be conductive. The conductive data writing module 12 writes the compensated data voltage transmitted on the data line Vdata into the second gate B of the dual-gate transistor T1. It is worth noting that the data voltage written during the data voltage writing phase is the compensated data voltage. Based on the target current value corresponding to the current grayscale and the preset curve for the dual-gate transistor determined during the threshold voltage detection phase, the voltage difference between the second gate B and the first electrode S of the dual-gate transistor T1 at the current grayscale is obtained. Because the first initialization signal line Vref1 is in a write signal state during the data voltage writing phase, the conductive first initialization module 13 writes the first initialization voltage of the first initialization signal line Vref1 into the first electrode S of the dual-gate transistor T1, causing the voltage of the first electrode S of the dual-gate transistor T1 to be the first initialization voltage. Based on the gate-source voltage difference of the preset curve to which the dual-gate transistor T1 currently belongs and the voltage value of the first electrode S of the dual-gate transistor T1, the magnitude of the voltage to be written to the second gate B (i.e., the magnitude of the compensated data voltage) can be determined. Therefore, the compensated data voltage is the sum of the first initialization voltage written during the data voltage writing phase and the gate-source voltage difference corresponding to the current grayscale. The light-emitting module 14 is a current-driven light-emitting diode, and its display brightness has a certain corresponding relationship with the driving current it receives. When the light-emitting module 14 is required to display a certain grayscale (brightness), the required target current value can be obtained based on this corresponding relationship. In other words, the pixel circuit needs to provide this target current value to the light-emitting device.

[0072] Compared to the prior art, which compensates for dual-gate transistors based on the saturation region and eliminates the threshold voltage from the current formula to perform threshold compensation, the prior art compensation mechanism has a large compensation error in the subthreshold region. This embodiment determines the preset curve to which the dual-gate transistor T1 belongs by detecting the current value and gate-source voltage difference data of multiple groups of the first electrode S of the dual-gate transistor T1, and directly performs compensation according to the preset curve. This fully considers the different relationships between the current value and gate-source voltage difference of the first electrode S of the dual-gate transistor T1 in different regions of the subthreshold region and the saturation region, resulting in a better compensation effect and improved display uniformity. The first initialization signal line can transmit a detection signal of the detected pixel circuit, wherein the detection signal includes the voltage and current of the first electrode S of the dual-gate transistor, the voltage of the second gate B is the data voltage transmitted by the data line, and the relationship between the current value of the first electrode of the dual-gate transistor T1 and the gate-source voltage difference (the voltage difference between the second gate and the first electrode) corresponds one-to-one. Preset curves of the current value and gate-source voltage difference of the first electrode S of the dual-gate transistor T1 corresponding to different threshold voltages of the dual-gate transistor T1 are obtained in advance. Based on the detected current values of the first electrode S of multiple dual-gate transistors T1 and the corresponding gate-source voltage differences, the preset curve to which the dual-gate transistor T1 belongs can be determined. Then, data voltage compensation is achieved based on the current value at the grayscale to be illuminated and the preset curve to which the dual-gate transistor T1 currently belongs. During the stage of writing the compensated data voltage, the voltage of the first electrode S of the dual-gate transistor T1 is fixed, while the voltage of the second gate B can be changed, so that the gate-source voltage difference can be controlled, thereby allowing the dual-gate transistor T1 to output the desired current value, eliminating the effects of threshold voltage / critical voltage and SS (sub-threshold slope) fluctuations on the current, and improving display uniformity.

[0073] Figure 2 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 1 and Figure 2 Optionally, based on the above technical solution, the data writing module 12 is connected to the first scanning line S1, and the first initialization module 13 is connected to the first scanning line S1.

[0074] The working process of the pixel circuit includes an initialization phase and a threshold voltage detection phase.

[0075] The data writing module 12 is used to transmit the data voltage on the data line Vdata to the second gate B in response to the scanning signal on the first scanning line S1 during the initialization stage. The first initialization module 13 is used to transmit the first initialization voltage to the first gate G and the first electrode S of the dual-gate transistor T1 in response to the scanning signal on the first scanning line S1 during the initialization stage.

[0076] The data writing module 12 is further used to transmit the data voltage on the data line Vdata to the second gate B in response to the scan signal on the first scan line S1 during the threshold voltage detection phase. The first initialization module 13 is further used to output the detected signal during the threshold voltage detection phase.

[0077] During the initialization phase, the first gate G and the first electrode S of the dual-gate transistor T1 are initialized using a first initialization voltage. During the threshold voltage detection phase, the dual-gate transistor T1 is turned on, and the first power supply voltage charges the first electrode S of the dual-gate transistor T1 through the dual-gate transistor T1. This increases the potential of the first electrode S and the first gate G of the dual-gate transistor T1, and the current values and voltage values of the first electrodes S of the multiple groups of dual-gate transistors T1 are output via the first initialization signal line Vref1. During the threshold voltage detection phase, the voltage of the second gate B serves as the data voltage. The gate-source voltage difference is calculated based on the voltage difference between the second gate B and the voltage of the first electrode S of the dual-gate transistor T1. This data is then obtained for the current values and corresponding gate-source voltage differences of the first electrodes of the multiple groups of dual-gate transistors T1, facilitating subsequent threshold compensation. The first initialization module 13 and the data writing module 12 are connected to the same scan line, which can save the number of scan lines, reduce the number of gate drive units, simplify the panel structure, and achieve high PPI and reduce costs.

[0078] Continue to refer Figure 1 and 2 Optionally, the data writing module 12 includes a second transistor T2. Optionally, the first initialization module 13 includes a third transistor T3. Optionally, the first storage module 11 includes a first capacitor C1.

[0079] A first electrode of the second transistor T2 is connected to the data line Vdata, a second electrode of the second transistor T2 is connected to the second gate B, and a gate of the second transistor T2 is connected to the first scan line S1.

[0080] A first electrode of the third transistor T3 is connected to the first initialization signal line Vref1 , a second electrode of the third transistor T3 is connected to the first gate G and the first electrode S of the double-gate transistor T1 , and a gate of the third transistor T3 is connected to the first scan line S1 .

[0081] The second electrode D of the dual-gate transistor T1 is connected to the first power supply Vdd, the first electrode S of the dual-gate transistor T1 is connected to the first end of the light-emitting module 14, and the second end of the light-emitting module 14 is connected to the second power supply Vss;

[0082] A first end of the first capacitor C1 is connected to the second gate B, and a second end of the first capacitor C1 is connected to the first electrode S of the dual-gate transistor T1.

[0083] The dual-gate transistor T1 can be an N-type transistor or a P-type transistor. The second transistor T2 can be an N-type transistor or a P-type transistor. The third transistor T3 can be an N-type transistor or a P-type transistor. In this embodiment, the dual-gate transistor T1, the second transistor T2, and the third transistor T3 are all N-type transistors. Figure 3 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention is applicable to Figure 2 The pixel circuit shown in FIG. Figure 2 and Figure 3 The working process of the pixel circuit provided by the embodiment of the present invention at least includes: an initialization phase t1, a threshold voltage detection phase t2, a data voltage writing phase t3 and a light emitting phase t4.

[0084] During initialization phase t1, both the second transistor T2 and the third transistor T3 are turned on in response to a high-level signal on the first scan line S1. The first initialization voltage on the first initialization signal line Vref1 is transmitted via the turned-on third transistor T3 to the first gate G and the first electrode S of the dual-gate transistor T1, initializing the potentials of the first gate G and the first electrode S of the dual-gate transistor T1. The data voltage on the data line Vdata is transmitted via the turned-on second transistor T2 to the second gate B. The first initialization voltage transmitted by the first initialization signal line Vref1 is configured so that the voltage difference between the first initialization voltage and the second power supply Vss is less than the threshold voltage (turn-on voltage) of the light-emitting module 14, ensuring that the light-emitting module 14 does not emit light during initialization phase t1. During this phase, the data voltage and the first initialization voltage are configured so that the threshold voltage of the dual-gate transistor T1 is less than 0V, thereby turning on the dual-gate transistor T1.

[0085] During the threshold voltage detection phase t2, both the second transistor T2 and the third transistor T3 are turned on in response to the high-level signal on the first scan line S1. The data voltage is transmitted to the second gate B via the turned-on second transistor T2, maintaining the voltage of the second gate B unchanged. During this phase, the first initialization signal line Vref1 no longer writes a voltage to the first gate G, but instead outputs a signal. The first power supply voltage charges the first electrode S of the dual-gate transistor T1 through the dual-gate transistor T1, causing the potentials of the first electrode S and the first gate G of the dual-gate transistor T1 to increase. As the potential of the first electrode S of the dual-gate transistor T1 increases, data on the current and voltage values of the first electrodes S of multiple sets of dual-gate transistors T1 can be obtained. The first initialization signal line Vref1 outputs the detected current and voltage values of the first electrodes S of the dual-gate transistors T1, and the voltage value of the second gate B is the data voltage, thereby obtaining the gate-source voltage difference. Furthermore, data on the current values and corresponding gate-source voltage differences of the first electrodes S of multiple sets of dual-gate transistors T1 can be obtained. A control circuit connected to the first initialization signal line Vref1 stores in advance a plurality of preset curves representing the current value and the gate-source voltage difference of the first electrode S of the dual-gate transistors T1. A curve representing the current value and the gate-source voltage difference of the first electrode S of the dual-gate transistors T1 is fitted based on the output voltage and current values of the plurality of sets of the first electrode S of the dual-gate transistors T1. The curve that best matches the fitted curve among the pre-stored preset curves is the preset curve for the dual-gate transistor T1.

[0086] During the data voltage writing phase t3, both the second transistor T2 and the third transistor T3 are turned on in response to a high-level signal on the first scan line S1. The turned-on third transistor T3 writes the first initialization voltage Vref1 into the first gate G and the first electrode S of the dual-gate transistor T1. The turned-on second transistor T2 writes the compensated data voltage on the data line Vdata during this phase into the second gate B. It is noteworthy that the data voltage written during the data voltage writing phase t3 is the compensated data voltage. Specifically, based on the current value corresponding to the current grayscale and the preset curve to which the dual-gate transistor T1 belongs, determined during the threshold voltage detection phase, the voltage difference between the second gate B and the first electrode S of the dual-gate transistor T1 at the current grayscale is obtained. Because the voltage at the first electrode S of the dual-gate transistor T1 during the data voltage writing phase is the first initialization voltage, the compensated data voltage is the sum of the first initialization voltage and the gate-source voltage difference corresponding to the current grayscale. Compared to the prior art, which compensates the dual-gate transistor T1 in the saturation region by eliminating the threshold voltage from the current equation to perform threshold compensation, the prior art compensation mechanism suffers from larger compensation errors in the subthreshold region. This embodiment determines the preset curve to which the dual-gate transistor T1 belongs by detecting the current values and gate-source voltage difference data of multiple groups of the first electrodes S of the dual-gate transistors T1. Compensation is performed directly according to the preset curve. This fully considers the different relationships between the current values and the gate-source voltage difference of the first electrodes S of the dual-gate transistor T1 in different regions of the subthreshold region and the saturation region. The compensation effect is good and display uniformity can be improved.

[0087] In the light-emitting stage t4, the scan signal on the first scan line S1 is low, and the second transistor T2 and the third transistor T3 are turned off in response to the low level. The dual-gate transistor T1 generates a driving current according to the compensated data voltage written into the second gate B, driving the light-emitting module 14 to emit light.

[0088] Furthermore, it is not necessary to perform threshold voltage detection in every frame. When the screen is just powered on, the pixel circuit can be initialized and threshold voltage detected once. When the pixel circuit is working subsequently, each frame includes a data voltage writing phase t3 and a light emitting phase t4.

[0089] Figure 4 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 4 Optionally, the pixel circuit further includes a compensation module 15, which is connected between the first initialization module 13 and the first electrode S of the dual-gate transistor T1; wherein the operation process of the pixel circuit further includes a data voltage writing stage;

[0090] The compensation module 15 is used to connect the first gate G and the first electrode S of the dual-gate transistor T1 during the initialization phase, the threshold voltage detection phase, and the data voltage writing phase;

[0091] The data writing module 12 is used to write the compensated data voltage into the second gate B of the dual-gate transistor T1 during the data voltage writing phase.

[0092] The compensation module 15 is also connected to the scan line and is turned on or off in response to the scan signal connected to the scan line. When the compensation module 15 is turned on, the first gate G is connected to the first electrode S of the dual-gate transistor T1. When the compensation module 15 is turned off, the connection between the first gate G and the first electrode S of the dual-gate transistor T1 is disconnected. The working process of each module except the compensation module 15 in this embodiment is the same as Figure 1 The operation process of the pixel circuit shown is not further described here. During the initialization phase, the compensation module 15 is controlled to be turned on, and the first initialization voltage is transmitted to the first gate G and the first electrode S of the dual-gate transistor T1 via the first initialization module 13 and the compensation module 15, completing the initialization of the first gate G and the first electrode S of the dual-gate transistor T1. During the threshold voltage detection phase, the compensation module 15 is controlled to be turned on, and the current value and voltage value of the first electrode S of the dual-gate transistor T1 are output via the compensation module 15 and the first initialization module 13. During the data voltage writing phase, the compensation module 15 is controlled to be turned on, and the first initialization voltage is transmitted to the first electrode S of the dual-gate transistor T1 via the compensation module 15 and the first initialization module 13. Because the compensated data voltage is equal to the sum of the voltage of the first electrode S of the dual-gate transistor T1 and the gate-source voltage difference corresponding to the target current of the current grayscale, the voltage of the first electrode S of the dual-gate transistor T1 is fixed to a fixed potential, facilitating the calculation of the compensated data voltage. Figure 4 The pixel circuit in the embodiment is suitable for the pixel circuit of 4T1C. After adding the compensation module 15, the pixel circuit corresponding to the 4T1C can still realize the compensation of the data voltage. Figure 2 The pixel circuit of 3T1C shown in Figure 4 The 4T1C pixel circuits in the system can realize data voltage compensation, thus improving the flexibility of pixel circuit design.

[0093] Figure 5 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 4 and Figure 5 Optionally, the compensation module 15 includes a fourth transistor T4, a first electrode of the fourth transistor T4 is connected to the first gate G, a second electrode of the fourth transistor T4 is connected to the first electrode S of the dual-gate transistor T1, and a gate of the fourth transistor T4 is connected to the second scan line S2.

[0094] The fourth transistor T4 can be an N-type transistor or a P-type transistor. Figure 4In this embodiment, the data writing module 12 includes a second transistor T2, the first initialization module 13 includes a third transistor T3, the first storage module 11 includes a first capacitor C1, and the connection relationship between the second transistor T2, the third transistor T3 and the first capacitor C1 is the same as Figure 2 same. Figure 6 Another driving timing diagram of a pixel circuit provided by an embodiment of the present invention is applicable to Figure 5 Pixel circuit shown. Optionally, the signals on the first scan line S1 and the second scan line S2 are the same. In this embodiment, the signals on the first scan line S1 and the second scan line S2 are the same and can be provided by the same signal, thereby simplifying the structure of the panel. Figure 5 and Figure 6 The operation process of the pixel circuit provided by the embodiment of the present invention at least includes: an initialization phase t1, a threshold voltage detection phase t2, a data voltage writing phase t3, and a light emitting phase t4. The fourth transistor T4 is turned on in response to the high potential on the second scan line S2 during the initialization phase t1, the threshold voltage detection phase t2, and the data voltage writing phase t3, so as to connect the first gate G with the first electrode S of the dual-gate transistor T1. The operation process after connection is the same as Figure 2 The pixel circuit shown in FIG. This embodiment will not be further described here. During light-emitting phase t4, the fourth transistor T4 is turned off in response to the high potential on the second scan line S2, disconnecting the first gate G from the first electrode S of the dual-gate transistor T1. The dual-gate transistor T1 then drives the light-emitting module 14 to emit light based on the compensated data voltage written to the second gate B. The pixel circuit provided in this embodiment of the present invention can also determine the preset curve to which the dual-gate transistor T1 belongs by detecting multiple sets of current values and gate-source voltage difference data of the first electrode S of the dual-gate transistor T1. Compensation is then performed directly based on the preset curve, fully accounting for the different relationships between the current value and gate-source voltage difference of the first electrode S of the dual-gate transistor T1 in different subthreshold and saturation regions. This provides a good compensation effect and improves display uniformity.

[0095] Figure 7 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 7 Optionally, the pixel circuit further includes a compensation module 15 and a second initialization module 16, the compensation module 15 is connected between the first initialization module 13 and the first electrode S of the dual-gate transistor T1, and the second initialization module 16 is connected between the second initialization signal line Vref2 and the first electrode S of the dual-gate transistor T1; wherein the operation process of the pixel circuit further includes a data voltage writing stage;

[0096] The compensation module 15 is used to connect the first gate G and the first electrode S of the dual-gate transistor T1 during the initialization phase and the threshold voltage detection phase.

[0097] The data writing module 12 is used to write the compensated data voltage into the second gate B of the dual-gate transistor T1 during the data voltage writing phase;

[0098] The second initialization module 16 is used to transmit the second initialization voltage on the second initialization signal line Vref2 to the first electrode S of the dual-gate transistor T1 during the data voltage writing phase.

[0099] The compensation module 15 and the second initialization module 16 are also connected to different scan lines respectively. The compensation module 15 and the second initialization module 16 are turned on or off in response to the scan signals on the scan lines to which they are connected.

[0100] The pixel circuit's operating process includes an initialization phase, a threshold voltage detection phase, a data voltage writing phase, and a light-emitting phase. During the initialization phase, the first initialization module 13, compensation module 15, and data writing module 12 are controlled to be turned on, while the second initialization module 16 is controlled to be turned off. A first initialization voltage is transmitted via the enabled first initialization module 13 and compensation module 15 to the first gate G and the first electrode S of the dual-gate transistor T1, thereby initializing the first gate G and the first electrode S of the dual-gate transistor T1. A data voltage is written to the second gate B via the enabled data writing module 12. By configuring the data voltage and the first initialization voltage, the threshold voltage of the dual-gate transistor T1 is reduced to less than 0V, thereby turning on the dual-gate transistor T1.

[0101] During the threshold voltage detection phase, the first initialization module 13, compensation module 15, and data writing module 12 are controlled to be turned on, while the second initialization module 16 is controlled to be turned off. During this phase, because the dual-gate transistor T1 is already turned on, the first power supply voltage charges the first electrode S of the dual-gate transistor T1 through the dual-gate transistor T1, causing the potential of the first electrode S and the first gate G of the dual-gate transistor T1 to increase. During the threshold voltage detection phase, the first initialization signal line Vref1 outputs a detected detection signal, namely, multiple sets of detection signals, each set of detection signals including the voltage and current values of the first electrode S of the dual-gate transistor T1. The control circuit connected to the first initialization signal line Vref1 stores multiple preset curves of the current value and gate-source voltage difference of the first electrode of the dual-gate transistor T1, each of which corresponds to a threshold voltage. According to the output voltage and current values of the first electrodes S of the plurality of groups of dual-gate transistors T1, a curve of the current value of the first electrode S and the gate-source voltage difference is fitted, and the curve that best fits the fitted curve among the preset curves stored in advance is the preset curve to which the dual-gate transistor T1 belongs.

[0102] During the data voltage writing phase, the first initialization module 13, the data writing module 12, and the second initialization module 16 are controlled to be turned on, and the compensation module 15 is controlled to be turned off. The first initialization module 13 that is turned on transmits the first initialization voltage to the first gate G, and the data writing module 12 that is turned on writes the compensated data voltage transmitted on the data line Vdata into the second gate B of the dual-gate transistor T1. It is worth noting that the data voltage written during the data voltage writing phase is the compensated data voltage. The compensated data voltage is the sum of the second initialization voltage and the gate-source voltage difference corresponding to the current grayscale. The calculation method of the compensated data voltage refers to the above embodiment and will not be repeated here. Because the compensation module 15 is disconnected during the data voltage writing phase, in order to stabilize the potential of the first electrode S of the dual-gate transistor T1 at a known fixed potential for subsequent calculation of the compensated data voltage, the second initialization voltage is written to the first electrode S of the dual-gate transistor T1 through the second initialization module 16 that is turned on, so that the potential of the first electrode S of the dual-gate transistor T1 is fixed to the second initialization voltage.

[0103] In the light emitting stage, the dual-gate transistor T1 generates a driving current according to the compensated data voltage written into the second gate B, driving the light emitting module 14 to emit light.

[0104] The compensation module 15 in this embodiment is Figure 4 The compensation module is turned off during the data voltage writing phase. In order to subsequently calculate the magnitude of the compensation voltage, the voltage of the first electrode S of the dual-gate transistor T1 needs to be fixed at a known value. Therefore, a second initialization module 16 is provided, and a second initialization voltage is written into the first electrode S of the dual-gate transistor T1 through the second initialization module 16 to fix the voltage value of the first electrode S. Figure 7 and Figure 4 The pixel circuits shown can both realize data voltage compensation, and the driving timings of the compensation modules 15 of the two are different, thereby improving the flexibility of the scanning signal for controlling the compensation module 15 to be turned on or off.

[0105] Continue to refer Figure 7 Optionally, the pixel circuit further includes a second storage module 17, which is connected between the first gate G and the first electrode S of the dual-gate transistor T1 and is used to store the voltage between the first gate G and the first electrode S of the dual-gate transistor T1.

[0106] The second storage module 17 is used to store the potential of the first gate G of the dual-gate transistor T1 and the first electrode S of the dual-gate transistor T1, so that the potential of the first gate G and the first electrode S of the dual-gate transistor T1 are stable and the potential difference between the two remains unchanged, thereby ensuring the stability of light emission during the light emission stage.

[0107] Figure 8A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 6 and Figure 7 Optionally, the compensation module 15 includes a fourth transistor T4. Optionally, the second initialization module 16 includes a fifth transistor T5.

[0108] Optionally, a first electrode of the fourth transistor T4 is connected to the first gate G, a second electrode of the fourth transistor T4 is connected to the first electrode S of the dual-gate transistor T1 , and a gate of the fourth transistor T4 is connected to the second scan line S2 .

[0109] Optionally, a first electrode of the fifth transistor T5 is connected to the second initialization signal line Vref2 , a second electrode of the fifth transistor T5 is connected to the first electrode S of the dual-gate transistor T1 , and a gate of the fifth transistor T5 is connected to the third scan line S3 .

[0110] Optionally, the second storage module 17 includes a second capacitor C2 , a first end of the second capacitor C2 is connected to the first gate G, and a second end of the second capacitor C2 is connected to the first electrode of the dual-gate transistor T1 .

[0111] For example, Figure 8 In the pixel circuit shown, the data writing module 12 includes a second transistor, the first initialization module 13 includes a third transistor T3, and the connection relationship between the second transistor T2 and the third transistor T3 is the same as Figure 2 The same, no longer repeated here.

[0112] The dual-gate transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 may be N-type transistors or P-type transistors. In this embodiment, the dual-gate transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are all N-type transistors. Figure 9 Another driving timing diagram of a pixel circuit provided by an embodiment of the present invention is applicable to Figure 8 The pixel circuit shown. Figure 8 and Figure 9 The working process of the pixel circuit provided by the embodiment of the present invention at least includes: an initialization phase t1, a threshold voltage detection phase t2, a data voltage writing phase t3 and a light emitting phase t4.

[0113] During initialization phase t1, the second and third transistors T2 and T3 are turned on in response to a high-level signal on the first scan line S1, the fourth transistor T4 is turned on in response to a high-level signal on the second scan line S2, and the fifth transistor T5 is turned off in response to a low-level signal on the third scan line S3. A first initialization voltage is transmitted via the turned-on third and fourth transistors T3 and T4 to the first gate G and the first electrode S of the dual-gate transistor T1, thereby initializing the first gate G and the first electrode S. A data voltage is written to the second gate B via the turned-on second transistor T2. By configuring the data voltage and the first initialization voltage, the threshold voltage of the dual-gate transistor T1 is less than 0V, the voltage difference between the first gate G and the first electrode S of the dual-gate transistor T1 is 0V, and the voltage difference between the first gate G and the first electrode S of the dual-gate transistor T1 is greater than the threshold voltage of the dual-gate transistor T1, turning on the dual-gate transistor T1.

[0114] During the threshold voltage detection phase t2, the second and third transistors T2 and T3 are turned on in response to a high-level signal on the first scan line S1, the fourth transistor T4 is turned on in response to a high-level signal on the second scan line S2, and the fifth transistor T5 is turned off in response to a low-level signal on the third scan line S3. During this phase, as the dual-gate transistor T1 is turned on, the first power supply voltage charges the first electrode S of the dual-gate transistor T1 through the dual-gate transistor T1, causing the potentials of the first electrode S and the first gate G to increase. During the threshold voltage detection phase, the first initialization signal line Vref1 outputs a detected detection signal, namely, multiple sets of detection signals, each set of detection signals including the voltage and current values of the first electrode S of the dual-gate transistor T1. The control circuit connected to the first initialization signal line Vref1 pre-stores multiple preset curves of the current value and gate-source voltage difference of the first electrode S of the dual-gate transistor T1. Each preset curve corresponds to a threshold voltage. Based on the output of the multiple sets of voltage and current values of the first electrode S of the dual-gate transistor T1 and the multiple preset curves, the preset curve to which the dual-gate transistor T1 belongs is determined.

[0115] In the data voltage writing phase t3, the second transistor T2 and the third transistor T3 are turned on in response to the high-level signal on the first scan line S1, the fourth transistor T4 is turned off in response to the low-level signal on the second scan line S2, and the fifth transistor T5 is turned on in response to the high-level signal on the third scan line S3. The turned-on third transistor T3 transmits the first initialization voltage to the first gate G, and the turned-on second transistor T2 writes the compensated data voltage transmitted on the data line Vdata into the second gate B of the dual-gate transistor T1. It is worth noting that the data voltage written in the data voltage writing phase t3 is the compensated data voltage. The calculation method of the compensated data voltage is as follows: Figure 2The calculation method for the pixel circuit shown will not be further described here. Because the fourth transistor T4 is disconnected during the data voltage writing phase, in order to stabilize the potential of the first electrode S of the dual-gate transistor T1 at a known fixed potential for subsequent calculation of the compensated data voltage, the second initialization voltage is written to the first electrode S of the dual-gate transistor T1 via the conductive fifth transistor T5, thereby fixing the potential of the first electrode S of the dual-gate transistor T1 to the second initialization voltage.

[0116] In the light emitting stage t4 , the dual-gate transistor T1 generates a driving current according to the compensated data voltage written into the second gate B, driving the light emitting module 14 to emit light.

[0117] Figure 8 and Figure 2 The pixel circuits shown can all achieve data voltage compensation, thereby improving the flexibility of pixel circuit design.

[0118] exist Figure 5 The pixel circuit shown in FIG. 1 may further include a second storage module 17, and the corresponding timing diagram may be the same as that shown in FIG. Figure 6 Same, works fine with Figure 5 The pixel circuit shown is the same or similar when the second storage module 17 is not provided, and will not be described again here.

[0119] The embodiment of the present invention further provides a driving method of a pixel circuit, referring to Figure 1 The pixel circuit includes a driving module 10, a first storage module 11, a data writing module 12, a first initialization module 13 and a light-emitting module 14; the driving module 10 includes a dual-gate transistor T1, the dual-gate transistor T1 includes a first gate G and a second gate B, the first gate G and the second gate B are one and the other of the top gate and the bottom gate respectively; the first initialization module 13 is connected between the first initialization signal line Vref1 and the first gate G of the dual-gate transistor T1, the first gate G is connected to the first electrode S of the dual-gate transistor T1, the data writing module 12 is connected between the data line Vdata and the second gate B, and the first storage module 11 is connected between the second gate B and the first electrode S of the dual-gate transistor T1. Figure 10 A flowchart of a driving method of a pixel circuit provided by an embodiment of the present invention is provided. Figure 1 and Figure 10 , the driving method includes:

[0120] S110 , in the initialization phase, controlling the first initialization module and the data writing module to be turned on, the first initialization module transmitting the first initialization voltage on the first initialization signal line to the first gate, and the data writing module transmitting the data voltage on the data line to the second gate.

[0121] The first initialization voltage is transmitted to the first gate G and the first electrode S via the first initialization module 13, thereby initializing the potentials of the first gate G and the first electrode S of the dual-gate transistor T1. The data writing module 12 is then turned on to transmit the data voltage on the data line Vdata to the second gate B.

[0122] S120. In the threshold voltage detection phase, the first initialization module and the data writing module are controlled to be turned on, the data writing module transmits the data voltage on the data line to the second gate, and the first initialization module transmits the detection signal of the detected pixel circuit to the first initialization signal line.

[0123] During the threshold voltage detection phase, the data voltage transmitted by the data writing module to the second gate electrode has certain requirements. During the threshold voltage detection phase, after the data voltage is written to the second gate electrode B of the dual-gate transistor T1, a voltage difference exists between the second gate electrode B and the first electrode S of the dual-gate transistor T1. This charges the first electrode S of the dual-gate transistor T1, and the voltage of the first electrode S of the dual-gate transistor T1 is raised until it reaches the difference between the written data voltage and the threshold voltage of the dual-gate transistor T1. In other words, at this point, the voltage at the first terminal of the light-emitting module 14 is the difference between the written data voltage and the threshold voltage of the dual-gate transistor T1. To ensure that the light-emitting module 14 does not emit light during the threshold voltage detection phase, the difference between the voltage at the first terminal and the voltage at the second terminal of the light-emitting module 14 must be less than the turn-on voltage of the light-emitting module 14. For example, if the second power supply voltage connected to the second terminal of the light-emitting module 14 is 0V and the turn-on voltage of the light-emitting module 14 is 2V, the voltage at the first terminal of the light-emitting module 14 must be less than 2V, meaning that the difference between the written data voltage and the threshold voltage of the dual-gate transistor T1 is less than 2V. Although the threshold voltage of the dual-gate transistor T1 cannot be accurately known at this time, it has a range. According to the range of the threshold voltage, the approximate range of the written data voltage can be determined to avoid the light emitting module 14 from emitting light incorrectly.

[0124] A voltage difference exists between the second gate B and the first electrode S of the dual-gate transistor T1, causing current to flow through the first electrode S of the dual-gate transistor T1. The first power supply voltage charges the first electrode S of the dual-gate transistor T1, increasing the potential of the first electrode S and the first gate G of the dual-gate transistor T1, causing the current in the first electrode S of the dual-gate transistor T1 to change accordingly. During the threshold voltage detection phase, the first initialization signal line Vref1 outputs a detected detection signal, namely, multiple sets of detection signals, each set of detection signals including the voltage and current values of the first electrode S of the dual-gate transistor T1. To fit a curve of the current value and the gate-source voltage difference of the first electrode S of the dual-gate transistor T1, several sets of current values corresponding to typical grayscale values can be selected. Since the light-emitting module 14 is generally a light-emitting diode, once the light-emitting diode is determined, the grayscale value and the current value have a fixed correspondence. Based on a fixed correspondence, the current values for typical grayscales can be determined, for example, 50 nA for grayscale 128, 20 nA for grayscale 64, and 10 nA for grayscale 32. Of the multiple sets of detection signals output by the first initialization signal line Vref1, only the three sets of data representing currents of 50 nA, 20 nA, and 10 nA are selected for fitting. An external control circuit connected to the first initialization signal line Vref1 stores multiple preset curves representing the current value and gate-source voltage difference of the first electrode of the dual-gate transistor T1. Each preset curve corresponds to a threshold voltage. Based on the multiple sets of output voltage and current values of the first electrode S of the dual-gate transistor T1, a curve representing the current value and gate-source voltage difference of the first electrode S of the dual-gate transistor T1 is fitted. The curve among the stored preset curves that best matches the fitted curve is the preset curve for the dual-gate transistor T1.

[0125] S130. In the data voltage writing stage, the first initialization module and the data writing module are controlled to be turned on, the first initialization module transmits the first initialization voltage on the first initialization signal line to the first gate, and the data writing module transmits the compensated data voltage on the data line to the second gate; wherein, the data voltage on the data line is the same in the initialization stage and the threshold voltage detection stage, and the data voltage on the data line is different in the data voltage writing stage and the initialization stage.

[0126] The turned-on data writing module 12 writes the data voltage transmitted on the data line Vdata into the second gate B of the dual-gate transistor T1. It is worth noting that the data voltage written during the data voltage writing phase is a compensated data voltage. The voltage difference between the second gate B and the first electrode S of the dual-gate transistor T1 at the current grayscale is obtained based on the current value corresponding to the current grayscale and the preset curve of the dual-gate transistor determined during the threshold voltage detection phase. Because the voltage of the first electrode S of the dual-gate transistor T1 during the data voltage writing phase is the first initialization voltage, the compensated data voltage is the sum of the first initialization voltage and the gate-source voltage difference corresponding to the current grayscale. Compared to the prior art, which compensates for dual-gate transistors based on the saturation region and eliminates the threshold voltage from the current formula to perform threshold compensation, the compensation mechanism of the prior art has a larger compensation error in the subthreshold region. This embodiment determines a preset curve to which the dual-gate transistor belongs by detecting the current values and gate-source voltage difference data of multiple groups of the first electrodes S of the dual-gate transistors T1. Compensation is performed directly according to the preset curve. This fully considers the different relationships between the current values and the gate-source voltage difference of the first electrodes S of the dual-gate transistors T1 in different regions of the subthreshold region and the saturation region. The compensation effect is good and display uniformity can be improved.

[0127] S140 , in the light emitting stage, controlling the first initialization module and the data writing module to be turned off, and the dual-gate transistor drives the light emitting module to emit light according to the compensated data voltage written in the data voltage writing stage.

[0128] The beneficial effects of the driving method of the pixel circuit provided by the embodiment of the present invention are the same as the beneficial effects of the pixel circuit, and are not described in detail here.

[0129] An embodiment of the present invention further provides a display device, Figure 11 A schematic diagram of a display device according to an embodiment of the present invention is provided. Figure 11 The display device 01 includes a driver chip 02 and any one of the above-mentioned pixel circuits 03 . The driver chip 02 is connected to a first initialization signal line Vref1 and a data line Vdata.

[0130] The driving chip 02 is used to provide a first initialization voltage and a data voltage to the pixel circuit.

[0131] The driver chip 02 is used to determine a second preset curve of the current and gate-source voltage difference of the first electrode of the dual-gate transistor T1 belonging to the driving module based on the detected detection signal and a first preset curve of the current and gate-source voltage difference of the first electrode of multiple dual-gate transistors T1 corresponding to different threshold voltages of the dual-gate transistors.

[0132] The data voltage at the current grayscale is determined according to the current value at the current grayscale and the second preset curve, wherein the gate-source voltage difference is the voltage difference between the second gate of the dual-gate transistor and the first electrode of the dual-gate transistor T1.

[0133] The beneficial effects of the display device are the same as those of the pixel circuit, and will not be described in detail in this embodiment.

[0134] Under different threshold voltages of the dual-gate transistor, the first preset curves for the current value and gate-source voltage difference of the first electrode of the dual-gate transistor are different. The first preset curve corresponding to each threshold voltage under multiple threshold voltages of the dual-gate transistor is obtained in advance, and the threshold voltages corresponding to different first preset curves are different. These curves are stored in the driver chip 02 so that a preset curve matching the current dual-gate transistor can be obtained from the multiple first preset curves. Based on the current value and voltage value of the first electrode of the dual-gate transistor transmitted by the initialization signal line, the driver chip 02 can determine multiple sets of current value and gate-source voltage difference data for the first electrode of the dual-gate transistor. Based on the current value and gate-source voltage difference data of the first electrode of the dual-gate transistor, the preset curve that best matches the current dual-gate transistor, namely the second preset curve, can be determined. When the light-emitting module is illuminated, the driver chip 02 obtains the gate-source voltage difference corresponding to the current grayscale based on the current value corresponding to the current grayscale and the second preset curve. The data voltage of the current grayscale is equal to the sum of the voltage of the first electrode of the dual-gate transistor and the gate-source voltage difference.

[0135] The second preset curve is one of the first preset curves, or the plurality of second preset curves are different parts of the plurality of first preset curves.

[0136] It is worth noting that the first preset curve can be a single curve including all grayscales, and correspondingly, the determined second preset curve is also a single one, i.e., the second preset curve is one of the first preset curves. The first preset curve can also be a plurality of sub-curves divided according to different grayscale intervals, and correspondingly, the determined second preset curves are also multiple, i.e., multiple second preset curves corresponding to multiple grayscale intervals are obtained by matching different parts (i.e., different sub-curves) of the multiple first preset curves.

[0137] In order to avoid the problem that the fitting curve is not accurate enough and the fitting curve may be relatively short due to the small amount of detection signal data in the threshold voltage detection stage, the present application can store multiple first preset curves in the driver chip in advance. The first preset curve is fitted based on more sets of data and has higher accuracy. Then, based on the detection signal in the threshold voltage detection stage, the curve that best fits it in the driver chip is selected as the basis for subsequent calculations.

[0138] Optionally, the display grayscale includes at least a first gray stage and a second gray stage, and each first preset curve includes at least a first sub-curve and a second sub-curve, the first sub-curve being a curve showing the relationship between the current of the first electrode of the dual-gate transistor and the gate-source voltage difference corresponding to the first gray stage, and the second sub-curve being a curve showing the relationship between the current of the first electrode of the dual-gate transistor and the gate-source voltage difference corresponding to the second gray stage; wherein any grayscale value of the second gray stage is greater than or equal to the maximum grayscale value of the first gray stage, and wherein the driver chip determines at least two second preset curves corresponding to the first gray stage and the second gray stage. The driver chip is configured to determine the second preset curve corresponding to the first gray stage based on the detected detection signal and the first sub-curve; and determine the second preset curve corresponding to the second gray stage based on the detected detection signal and the second sub-curve.

[0139] To improve the accuracy of determining the second preset curve based on multiple sets of data points, the first preset curve corresponding to each threshold voltage can be divided into multiple curve segments. For example, at a grayscale of 255, the first grayscale stage is grayscale 0-128, and the second grayscale stage is grayscale 128-255. The first sub-curve is a curve of current value and gate-source voltage difference at grayscale 0-128, and the second sub-curve is a curve of current value and gate-source voltage difference at grayscale 128-255. After dividing the first preset curve into multiple segments, for example, for grayscale 0-128, from the multiple sets of detected detection data, several sets of typical values between grayscale 0-128 are selected for curve fitting, such as the current value corresponding to grayscale 24, the current value corresponding to grayscale 48, the current value corresponding to grayscale 64, and the current value corresponding to grayscale 128. The current value and gate-source voltage difference curves are then fitted based on the selected sets of current values and their corresponding gate-source voltage difference values. After the curve fitting of the gray stage is completed, it is compared with each first sub-curve, and the first sub-curve that fits the best is the required target curve, that is, a second preset curve. The process of determining the second preset curve corresponding to the 128-255 gray stage is similar to the above process and will not be repeated here. Compared with directly selecting four sets of data to fit the 0-255 grayscale curve and comparing it with the stored 0-255 grayscale first preset curve, in this embodiment, the first preset curve is divided into multiple segments, and four sets of data are selected within the grayscale range of the segment to fit the curve within this segment. Compared with each sub-curve, the curve fitted by this embodiment is more accurate, which makes the accuracy of determining the corresponding second preset curve based on the current and gate-source voltage difference data of the first pole higher.

[0140] Furthermore, the display grayscale includes a first gray stage, a second gray stage, and a third gray stage, and each first preset curve includes a first sub-curve, a second sub-curve, and a third sub-curve. The first sub-curve is a curve showing the relationship between the current and the gate-source voltage difference of the first electrode of the dual-gate transistor corresponding to the first gray stage, the second sub-curve is a curve showing the relationship between the current and the gate-source voltage difference of the first electrode of the dual-gate transistor corresponding to the second gray stage, and the third sub-curve is a curve showing the relationship between the current and the gate-source voltage difference of the first electrode of the dual-gate transistor corresponding to the third gray stage. Any grayscale value of the third gray stage is greater than or equal to the maximum grayscale value of the second gray stage, and any grayscale value of the second gray stage is greater than or equal to the maximum grayscale value of the first gray stage. The driver chip determines three second preset curves corresponding to the first gray stage, the second gray stage, and the third gray stage, respectively. The driver chip is configured to determine a second preset curve corresponding to the first gray stage based on a detected detection signal and the first sub-curve; determine a second preset curve corresponding to the second gray stage based on the detected detection signal and the second sub-curve; and determine a second preset curve corresponding to the third gray stage based on the detected detection signal and the third sub-curve.

[0141] For example, at 255 grayscales, the first grayscale stage is 0-32 grayscales, the second grayscale stage is 32-128 grayscales, and the third grayscale stage is 128-255 grayscales. The first sub-curve is a curve of the current value and the gate-source voltage difference at 0-32 grayscales, the second sub-curve is a curve of the current value and the gate-source voltage difference at 32-128 grayscales, and the third sub-curve is a curve of the current value and the gate-source voltage difference at 128-256 grayscales. For different grayscales, the SS (subthreshold slope) of the dual-gate transistor is different. The first preset curve is divided into multiple sub-curves. That is, in the threshold voltage detection stage, the detected current is partitioned, and different curves are fitted for different regions. Then, for different grayscales, the SS of each grayscale can be compensated. Compared with directly corresponding the entire grayscale range to a first preset curve, the first preset curve may have an error with the curve during actual operation, resulting in a larger error in the compensation of SS. In this embodiment, the corresponding second preset curve is selected based on the fitted curve for each grayscale stage. This makes the second preset curve for each grayscale stage more closely match the operating characteristics of the transistor, thereby improving the compensation effect for SS in different grayscale stages. By partitioning, the location of the compensation center is increased, reducing the impact of SS changes on current.

[0142] In this embodiment, after each first preset curve is divided into three sub-curves, the accuracy of determining the second preset curve based on the current and gate-source voltage difference data of the first electrode can be further improved, thereby improving the compensation effect of the data voltage and further improving display uniformity.

[0143] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will appreciate that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions are possible for those skilled in the art without departing from the scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the scope of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A pixel circuit, characterized in that: include: A driving module, a first storage module, a data writing module, a first initialization module and a light emitting module; The driving module includes a dual-gate transistor, the dual-gate transistor includes a first gate and a second gate, the first gate and the second gate are respectively one of a top gate and the other of a bottom gate; The first initialization module is connected between the first initialization signal line and the first gate, and the first gate is connected to the first electrode of the dual-gate transistor; The data writing module is connected between the data line and the second gate, and is used to transmit the data voltage on the data line to the second gate; The first storage module is connected between the second gate and the first electrode of the dual-gate transistor; The first initialization module is used to transmit a first initialization voltage to the first gate, and is also used to transmit a detection signal of the pixel circuit; The dual-gate transistor is used to generate a driving current according to the voltage of its second gate to drive the light-emitting module to emit light; The data writing module is connected to the first scanning line, and the operation process of the pixel circuit includes a threshold voltage detection stage; The data writing module is also used to transmit the data voltage on the data line to the second gate in response to the scanning signal on the first scanning line during the threshold voltage detection stage, and the first initialization module is also used to output the detected detection signal during the threshold voltage detection stage.

2. The pixel circuit according to claim 1, wherein: The first initialization module is connected to the first scan line; The working process of the pixel circuit includes an initialization stage; The data writing module is used to transmit the data voltage on the data line to the second gate in response to the scanning signal on the first scanning line during the initialization phase. The first initialization module is used to transmit the first initialization voltage to the first gate and the first electrode of the dual-gate transistor in response to the scanning signal on the first scanning line during the initialization phase.

3. The pixel circuit according to claim 1, wherein: The data writing module includes a second transistor, the first initialization module includes a third transistor, and the first storage module includes a first capacitor; The first electrode of the second transistor is connected to the data line, the second electrode of the second transistor is connected to the second gate, and the gate of the second transistor is connected to the first scan line; A first electrode of the third transistor is connected to the first initialization signal line, a second electrode of the third transistor is connected to the first gate and the first electrode of the double-gate transistor respectively, and a gate of the third transistor is connected to the first scan line; The second electrode of the dual-gate transistor is connected to the first power supply, the first electrode of the dual-gate transistor is connected to the first end of the light-emitting module, and the second end of the light-emitting module is connected to the second power supply; A first terminal of the first capacitor is connected to the second gate, and a second terminal of the first capacitor is connected to the first electrode of the dual-gate transistor.

4. The pixel circuit according to claim 2, wherein: It also includes a compensation module, the compensation module is connected between the first initialization module and the first electrode of the dual-gate transistor; wherein the operation process of the pixel circuit also includes a data voltage writing stage; The compensation module is used to connect the first gate and the first electrode of the dual-gate transistor in the initialization phase, the threshold voltage detection phase and the data voltage writing phase; The data writing module is used to write the compensated data voltage into the second gate of the dual-gate transistor during the data voltage writing phase.

5. The pixel circuit according to claim 4, wherein: The compensation module includes a fourth transistor, a first electrode of the fourth transistor is connected to the first gate, a second electrode of the fourth transistor is connected to the first electrode of the dual-gate transistor, and a gate of the fourth transistor is connected to the second scan line.

6. The pixel circuit according to claim 2, wherein: The device further includes a compensation module and a second initialization module, wherein the compensation module is connected between the first initialization module and the first electrode of the dual-gate transistor, and the second initialization module is connected between the second initialization signal line and the first electrode of the dual-gate transistor; wherein the operation process of the pixel circuit further includes a data voltage writing stage, The compensation module is used to connect the first gate and the first electrode of the dual-gate transistor during the initialization phase and the threshold voltage detection phase; The data writing module is used to write the compensated data voltage into the second gate of the dual-gate transistor during the data voltage writing phase; The second initialization module is used to transmit the second initialization voltage on the second initialization signal line to the first electrode of the dual-gate transistor during the data voltage writing phase.

7. The pixel circuit according to claim 6, wherein: The compensation module includes a fourth transistor, and the second initialization module includes a fifth transistor; A first electrode of the fourth transistor is connected to the first gate, a second electrode of the fourth transistor is connected to the first electrode of the dual-gate transistor, and a gate of the fourth transistor is connected to the second scan line; A first electrode of the fifth transistor is connected to the second initialization signal line, a second electrode of the fifth transistor is connected to the first electrode of the dual-gate transistor, and a gate of the fifth transistor is connected to the third scan line.

8. The pixel circuit according to claim 4 or 6, characterized in that: The pixel circuit further includes a second storage module connected between the first gate and the first electrode of the dual-gate transistor, and configured to store a voltage between the first gate and the first electrode of the dual-gate transistor.

9. The pixel circuit according to claim 8, wherein: The second storage module includes a second capacitor, a first end of the second capacitor is connected to the first gate, and a second end of the second capacitor is connected to the first electrode of the dual-gate transistor.

10. A method for driving a pixel circuit, characterized in that: The pixel circuit includes a driving module, a first storage module, a data writing module, a first initialization module and a light-emitting module; the driving module includes a dual-gate transistor, the dual-gate transistor includes a first gate and a second gate, the first gate and the second gate being one of a top gate and the other of a bottom gate, respectively; the first initialization module is connected between a first initialization signal line and the first gate of the dual-gate transistor, the first gate is connected to a first electrode of the dual-gate transistor, the data writing module is connected between a data line and the second gate, and the first storage module is connected between the second gate and the first electrode of the dual-gate transistor; The driving method includes: In the initialization phase, the first initialization module and the data writing module are controlled to be turned on, the first initialization module transmits the first initialization voltage on the first initialization signal line to the first gate, and the data writing module transmits the data voltage on the data line to the second gate; In the threshold voltage detection phase, the first initialization module and the data writing module are controlled to be turned on, the data writing module transmits the data voltage on the data line to the second gate, and the first initialization module transmits the detected detection signal of the pixel circuit to the first initialization signal line; During a data voltage writing phase, the first initialization module and the data writing module are controlled to be turned on, the first initialization module transmits a first initialization voltage on the first initialization signal line to the first gate, and the data writing module transmits a compensated data voltage on the data line to the second gate; wherein the data voltage on the data line is the same during the initialization phase and the threshold voltage detection phase, and the data voltage on the data line is different during the data voltage writing phase and the initialization phase; In the light-emitting stage, the first initialization module and the data writing module are controlled to be turned off, and the dual-gate transistor drives the light-emitting module to emit light according to the compensated data voltage written in the data voltage writing stage.

11. A display device, characterized in that: comprising a driver chip and the pixel circuit according to any one of claims 1 to 9, wherein the driver chip is connected to the first initialization signal line and the data line; The driving chip is used to provide a first initialization voltage and a data voltage to the pixel circuit; The driver chip is used to determine a second preset curve of the current and gate-source voltage difference of the first electrode of the dual-gate transistor to which the driver module belongs based on the detected detection signal and a first preset curve of the current and gate-source voltage difference of the first electrode of a plurality of the dual-gate transistors corresponding to different threshold voltages of the dual-gate transistors; The magnitude of the data voltage at the current gray scale is determined according to the current value at the current gray scale and the second preset curve, wherein the gate-source voltage difference is the voltage difference between the second gate of the dual-gate transistor and the first electrode of the dual-gate transistor.

12. The display device according to claim 11, wherein The display grayscale includes at least a first gray stage and a second gray stage, and each of the first preset curves includes at least a first sub-curve and a second sub-curve, the first sub-curve is a relationship curve between the current of the first electrode of the dual-gate transistor and the gate-source voltage difference corresponding to the first gray stage, and the second sub-curve is a relationship curve between the current of the first electrode of the dual-gate transistor and the gate-source voltage difference corresponding to the second gray stage; wherein any grayscale value of the second gray stage is greater than or equal to the maximum grayscale value of the first gray stage; wherein the driving chip is used to determine the second preset curve corresponding to the first gray stage based on the detected detection signal and the first sub-curve; and determine the second preset curve corresponding to the second gray stage based on the detected detection signal and the second sub-curve.

13. The display device according to claim 12, wherein: The display grayscale also includes a third gray stage, and each of the first preset curves also includes a third sub-curve, wherein the third sub-curve is a curve showing the relationship between the current of the first electrode of the dual-gate transistor and the gate-source voltage difference corresponding to the third gray stage; wherein any grayscale value of the third gray stage is greater than or equal to the maximum grayscale value of the second gray stage, and the driving chip is used to determine the second preset curve corresponding to the third gray stage based on the detected detection signal and the third sub-curve.

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