Key Packing for Flash Key-Value Storage Operations

Abstract

The present disclosure provides a key-value (KV) store, a method thereof, and a storage system. The KV store may include a key logger; and a processor configured to receive a first command for storing a first KV in the KV store, write a first value of the first KV to a first NAND page, generate a range map for identifying a range of memory pages including the first value, write the range map to a second memory page, append an entry for storing the first KV to the key logger, and update a device hash map of the KV store to include a first key of the first KV when a threshold is reached within the key logger.

Description

Technical Field

[0001] The present disclosure generally relates to key value (KV) storage operations, and more particularly, to improving KV storage operations by storing multiple keys together in a single NAND page. Background Art

[0002] A KV store (which can be understood as a "KV storage device") or a KV database is a data storage paradigm designed to store, retrieve, and manage associative arrays, as well as a data structure commonly referred to as a hash table. The hash table contains a collection of objects or records, which in turn contain multiple different fields, each containing data. These records can be stored and retrieved using keys that uniquely identify the record and can be used to look up data in the database. KV stores generally use less memory than relational databases.

[0003] The above information is presented only as background information to assist in understanding the present disclosure. No determination has been made, and no assertion is made, as to whether any of the above can be applied as prior art to the present disclosure. Summary of the Invention

[0004] The present disclosure is to solve at least some of the above disadvantages and provide at least the following advantages.

[0005] One aspect of the present disclosure is to provide a system and method that allows packing multiple keys inserted without temporal locality such that they can be grouped into a bunch of memory pages (e.g., NAND pages) with spatial locality. Due to dense key packing, this provides a reduction in the number of NAND pages required to store all keys, as well as a reduction in the read amplification factor (RAF) / write amplification factor (WAF). Additionally, the NAND page can limit garbage collection (GC) to cases where all keys in the page are invalid.

[0006] Accordingly, the present disclosure can significantly reduce the GC overhead by a factor of packing density and reduce the length of the hash-map conflict chain, which improves the tail latency and reduces the number of NAND page reads, significantly reducing the lookup latency.

[0007] According to one embodiment, a KV store may be provided that includes a key logger; and a processor configured to receive a first command to store a first KV in the KV store, write a first value of the first KV to a first memory page, generate an extent map identifying the first memory page that includes the value, write the extent map to a second memory page, append an entry for storing the first KV to the key logger, and update a device hash map of the KV store to include a first key of the first KV when a threshold is reached within the key logger.

[0008] According to one embodiment, a method of operating a KV store may be provided. The method includes receiving a first command to store a first KV in the KV store; writing a first value of the first KV to a first memory page; generating an extent map identifying the first memory page that includes the value; writing the extent map to a second NAND page; appending an entry for storing the first KV to a key logger of the KV store; and updating a device hash map of the KV store to include a first key of the first KV when a threshold is reached within the key logger.

[0009] According to one embodiment, a storage system may be provided that includes a KV store; and a processor configured to receive a first command to store a first KV in the KV store, write a first value of the first KV to a first memory page, generate an extent map identifying the first memory page that includes the value, write the extent map to a second memory page, append an entry for storing the first KV to a key logger of the KV store, and update a device hash map of the KV store to include a first key of the first KV when a threshold is reached within the key logger. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other aspects, features, and advantages of specific embodiments of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0011] Figure 1 Shows a hash implementation in a KV solid state drive (SSD);

[0012] Figure 2 Shows a hash implementation in a KV SSD according to an embodiment;

[0013] Figure 3 Shows a KV store according to an embodiment;

[0014] Figure 4A and Figure 4B Shows a deferred key packing operation in a KV store according to an embodiment;

[0015] Figure 5is a flowchart showing the key packing operation of a KV store according to an embodiment;

[0016] Figure 6 is a flowchart showing the Put operation of a KV store according to an embodiment;

[0017] Figure 7 is a flowchart showing the Delete operation of a KV store according to an embodiment;

[0018] Figure 8 is a flowchart showing the Get operation of a KV store according to an embodiment;

[0019] Figure 9 shows a block diagram of an electronic device in a network environment according to an embodiment; and

[0020] Figure 10 shows a diagram of a storage system according to an embodiment. DETAILED DESCRIPTION

[0021] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. It should be noted that although the same elements are shown in different drawings, the same elements will be denoted by the same reference numerals. In the following description, specific details such as detailed configurations and components are only provided to assist in the overall understanding of the embodiments of the present disclosure. Therefore, it is clear to those skilled in the art that various changes and modifications can be made to the embodiments described herein without departing from the scope of the present disclosure. In addition, descriptions of well-known functions and structures are omitted for clarity and conciseness. The terms described below are terms defined in consideration of the functions in the present disclosure and may vary according to the user, the user's intention, or habit. Therefore, the definitions of the terms should be determined based on the content of the entire specification.

[0022] The present disclosure may have various modifications and various embodiments, and embodiments thereof will be described in detail below with reference to the accompanying drawings. However, it should be understood that the present disclosure is not limited to these embodiments, but includes all modifications, equivalents, and alternatives within the scope of the present disclosure.

[0023] Although terms including ordinal numbers (such as first, second, etc.) may be used to describe various elements, the structural elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present disclosure, the first structural element may be referred to as the second structural element. Similarly, the second structural element may also be referred to as the first structural element. As used herein, the term "and / or" includes any and all combinations of one or more associated items.

[0024] The terms used in this disclosure are for describing various embodiments of the disclosure only and are not intended to limit the disclosure. The singular forms are intended to include the plural forms unless the context clearly indicates otherwise. In this disclosure, it should be understood that the terms "comprising" or "having" indicate the presence of features, numbers, steps, operations, structural elements, components, or combinations thereof, and do not preclude the presence or addition of one or more other features, numbers, steps, operations, structural elements, components, or combinations thereof.

[0025] Unless otherwise defined, all terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Terms such as those defined in a general dictionary will be interpreted to have the same meaning as in the context of the relevant art, and will not be interpreted to have an ideal or overly formal meaning unless clearly defined in this disclosure.

[0026] An electronic device according to an embodiment may be one of various types of electronic devices. The electronic device may include, for example, a portable communication device (e.g., a smart phone), a computer, a portable multimedia device, a portable medical device, a camera, a wearable device, or a home appliance. According to an embodiment of the disclosure, the electronic device is not limited to those described above.

[0027] The terms used in this disclosure are not intended to limit the disclosure, but are intended to include various variations, equivalents, or substitutions of the corresponding embodiments. Regarding the description of the drawings, like reference numerals may be used to refer to like or related elements. The singular form of a noun corresponding to an item may include one or more things unless the relevant context clearly indicates otherwise. As used herein, each of the phrases such as "A or B", "at least one of A and B", "at least one of A or B", "at least one of A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" may include all possible combinations of the items listed together in the corresponding one of the phrases. As used herein, terms such as "first", "second", "the first", and "the second" may be used to distinguish the corresponding components from another component, but are not intended to limit the components in other respects (e.g., importance or order). It is intended that if an element (e.g., the first element) is referred to as "coupled", "coupled to", "connected", or "connected to" another element (e.g., the second element), whether or not there is the term "operably" or "communicatively", it indicates that the element can be coupled to the other element directly (e.g., wired), wirelessly, or via a third element.

[0028] As used herein, the term "module" may include units implemented in hardware, software, or firmware, and may be used interchangeably with other terms (e.g., "logic", "logic block", "portion", and "circuit"). A module may be a single integrated component suitable for performing one or more functions, or the smallest unit or portion thereof. For example, according to one embodiment, a module may be implemented in the form of an application specific integrated circuit (ASIC).

[0029] In this document, any component or any combination of components described (i.e., in the device diagram) may be used to perform one or more operations of the flowchart. The operations described in the flowchart are exemplary operations and may include various additional steps not explicitly provided in the flowchart. The order of operations described in the flowchart is exemplary and not exclusive, as the order may vary depending on the implementation.

[0030] The goal of a key-value (KV) store may be to complete operations (e.g., put / get / delete operations) in the fastest possible time, and in a typical KV store implementation, keys may be hashed and inserted into a hash map.

[0031] Reducing the tail latency of KV operations may be beneficial for various workloads such as artificial intelligence / machine learning (AI / ML), data science, etc. Additionally, it may be beneficial for KV technology to be applicable to denser media with shorter lifetimes.

[0032] A high performance computing (HPC) storage device may be designed to be compatible with media having 50 - 500 write cycles. Therefore, reducing the write amplification factor (WAF) caused by garbage collection (GC) induced by an application or device is also beneficial. For example, reducing the device WAF can also reduce the read amplification factor (RAF) in a KV store, thereby potentially improving overall storage performance.

[0033] A single NAND page may contain one key, which may result in a higher device WAF when processing delete operations and a higher RAF when processing put / get / exist operations.

[0034] Furthermore, the worst-case tail latency of a KV store may be proportional to the length of the longest collision chain in a bucket of the hash map. Increasing the number of buckets to reduce the collision chain results in the need for additional memory space to host the buckets.

[0035] Additionally, if the buckets themselves are stored in NAND, then when processing a KV put, the device WAF increases because for almost every KV insertion, the NAND page hosting the bucket may need to be replaced.

[0036] According to the present disclosure, systems and methods are provided that allow multiple keys to be packed together in a single NAND page, which can reduce the worst-case conflict length in the device hash map. Keys in the device hash map can be grouped together to have spatial locality, even if the keys themselves do not have temporal locality.

[0037] Figure 1 Illustrates a hash implementation in a KV SSD.

[0038] As Figure 1 shown, keys are hashed and inserted into the hash map. However, a single NAND page may contain only one key. For example, bucket 2f8 in the hash map includes a chain of Key1, Key34, and Key21. Each of Key1, Key34, and Key21 is stored on a separate NAND page. As described above, this can result in higher RAF during placement / fetch / existence, and higher device WAF during deletion. Additionally, the worst-case tail latency can be proportional to the length of the longest conflict chain in a bucket of the hash map (e.g., Figure 1 bucket 467 in

[0039] According to an embodiment of the present disclosure, multiple keys can be packed together in a single NAND page to reduce the worst-case conflict length in the hash map by a packing factor P (average number of packed keys per page).

[0040] Figure 2 Illustrates a hash implementation in a KV SSD according to an embodiment.

[0041] Referring Figure 2 , multiple keys can be packed together in a single NAND page, where each key contains an extent pointer.

[0042] A method according to an embodiment of the present disclosure includes aggregating related keys that do not have temporal locality and grouping them together to have spatial locality. That is, keys that are indexed within consecutive buckets of the hash map can be grouped into bucket groups.

[0043] Additionally, the format of the KV entry can be modified such that the value can be written to the NAND page and tracked by the extent map. If there is space available in the NAND page after writing the extent map, the extent map itself can be written to the NAND page, which can also contain a portion of the value. The key contains a range pointer to the NAND page that contains the actual extent map, which in turn locates the page that contains the value for that key.

[0044] When processing get / put / delete operations with factor P, the device WAF / RAF can be significantly reduced. For example, on average, if 4 keys can be packed into one page, the length of the conflict chain is reduced by 4 times, and at the same time, the corresponding device WAF / RAF is reduced by 4 times.

[0045] As described above, key packing can be achieved with minimal additional resources within the KV store.

[0046] Figure 3 A KV store according to an embodiment is shown.

[0047] Reference Figure 3 , the KV store 300 includes a key logger 301 (e.g., an Auto Operation Logger (AOL)) that can be used to assist with key packing, a Bloomfilter 303 that tracks the keys in the key logger 301, and a tail pointer table 305 that creates a reverse linked list of the keys in the key logger 301.

[0048] The key logger 301 can be device-wide and can only have additional operations to it. Therefore, it can be implemented internally, just like a partitioned namespace.

[0049] The Bloomfilter 303 tracks the keys in the key logger 301 and can thus be compact.

[0050] For example, if the key logger 301 contains 10K entries, the Bloomfilter 303 can include as few as 3 pages (each page corresponding to 4K RAM, 4K SRAM, and 4K DRAM).

[0051] Assuming that less than 0.01% of the keys are recorded in the key logger 301 compared to all the keys in the KV store, most get / put / delete operations will not include traversing the tail pointer table 305 of the entries in the key logger 301.

[0052] The tail pointer table 305 can be constructed such that if the Bloomfilter 303 indicates a hit, the number of entries that need to be traversed in the key logger 301 can be limited to only one or two entries. For example, if the key logger 301 has 10K entries, the tail pointer table 305 can have 5K entries (each pointer being only 16 bits).

[0053] Although Figure 3 the components of the KV store 300 are shown as separate elements, the present disclosure is not limited thereto. For example, at least two of these components can be combined into a single element, such as a processor, an integrated circuit (IC), a system on a chip (SoC), etc., which can perform the corresponding operations.

[0054] Figure 4A and Figure 4B illustrates a deferred key packaging operation in a KV store according to an embodiment. More specifically, Figure 4A illustrates an example before processing the deferred key packaging in the KV store, while Figure 4B illustrates an example after processing the deferred packaging of keys from a key logger. The deferred key packaging operation can be first written to the key logger based on Store (or placement) and delete operations on the KV. That is, instead of immediately performing the received Store and delete operations, entries can be written to the key logger until a specific threshold is reached and the operation can be performed. For example, the threshold can be a function of the percentage of entries in the key logger and / or the rate at which it fills the key logger.

[0055] Referring Figure 4A , the bucket group includes 8 buckets B1 to B8 and points to logical NAND pages 6878 and 6784, on which multiple keys are packaged together with extent pointers (ExtentP). In Figure 4A the example shown, each logical NAND page can include up to 6 keys and includes a pointer to the next page containing the keys of the bucket group.

[0056] On logical page 6878, Key1 contains an extent pointer pointing to an extent map stored on page 7. The extent map stored on page 7 identifies the page on which the value corresponding to Key1 is stored. Similarly, Key12 contains an extent pointer pointing to an extent map stored on page 480, Key2 contains an extent pointer pointing to an extent map stored on page 21, KeyA contains an extent pointer pointing to an extent map stored on page 78, and Key5 contains an extent pointer pointing to an extent map stored on page 790. Each of the extent maps identifies the page on which the value of the corresponding key is stored.

[0057] In addition, Figure 4A an example of a key logger with a chain of two entries is provided. Assuming a specific threshold is reached, the entries in the key logger can be processed, i.e., the deferred key packaging can be performed.

[0058] Referring Figure 4B , in the entries of the processed chain, there is a store entry and a delete entry for Key1 / ExtentP 240, which basically cancel each other out.

[0059] There is also a store entry for Key1 / ExtentP 250. Therefore, logical page 6878 receives a new entry for Key1 containing an extent pointer pointing to page 250 on which the extent map is stored, and the extent map identifies the page on which the value corresponding to Key1 is stored.

[0060] In addition, the old Key1 is removed from page 7 and logical page 6878 that include the extent map of the old Key1 (as Figure 4A shown), and the pages identified by the extent map of the old Key1 are queued for erasure.

[0061] Similarly, there is a storage entry for Key2 / ExtentP 310. Accordingly, logical page 6878 receives a new entry for Key2 that includes an extent pointer pointing to page 310 on which the extent map is stored, and the extent map identifies the page on which the value corresponding to Key2 is stored.

[0062] In addition, the old Key2 is removed from page 21 and logical page 6878 that include the extent map of the old Key2 (as Figure 4A shown), and the pages identified by the extent map of the old Key2 are queued for erasure.

[0063] There is also a storage entry for Key3 / ExtentP 560. Accordingly, logical page 6878 receives a new entry for Key3 that includes an extent pointer pointing to page 560 on which the extent map is stored, and the extent map identifies the page on which the value corresponding to Key3 is stored.

[0064] There is also a deletion entry for Key12 / ExtenP 480, which causes Key12 to be removed from page 480 that includes the extent map of Key12 and logical page 6878, and the pages identified by the extent map of Key12 are queued for erasure.

[0065] Similarly, there is a deletion entry for Key5 / ExtenP 480, which causes Key5 to be removed from page 790 that includes the extent map of Key5 and logical page 6878, and the pages identified by the extent map of Key5 are queued for erasure.

[0066] Since two keys (Key12 and Key5) are removed from logical page 6878 and a new key (Key3) is added to logical page 6878, there are only 5 keys left on logical page 6878. Accordingly, KeyX is moved from logical page 6784 (as Figure 4A shown) to logical page 6878 (as Figure 4B shown), such that logical page 6878 includes at most 6 keys.

[0067] Figure 5 is a flowchart showing the key packing operation of a KV store according to an embodiment.

[0068] Referring to Figure 5 , in step 501, a key recorder records key entries for storage and deletion operations.

[0069] In step 503, after a specific threshold is met in the key logger, for example, the key logger is filled beyond a set threshold, in step 505, key entries belonging to a group of adjacent buckets in the device hash map are collated.

[0070] In step 507, the existing keys in the device hash map are merged with the entries from the key logger to form new packed keys for each group of buckets.

[0071] In step 509, the packed keys are written to at least one NAND page, and the device hash map is updated to point to the page containing the packed keys.

[0072] In step 511, the key logger and its associated Bloom filter are cleared so that the key logger can record new key entries.

[0073] Grouping the keys corresponding to a group of buckets can be an operation with O(1) complexity.

[0074] In addition, when the adjacent buckets of a bucket group contain only one or two keys, they may eventually share the packed key NAND page.

[0075] For the continuity of put / delete / get operations when processing the key logger, a device according to an embodiment can implement two or more independent key loggers.

[0076] Figure 6 is a flowchart showing the put operation of a KV store according to an embodiment.

[0077] Refer to Figure 6 , in step 601, when a put command for storing a KV is received, the KV store writes only the value of the KV to the NAND page.

[0078] In step 603, the KV store creates a range map page that tracks the locations of the various NAND pages containing the value of the KV.

[0079] In step 605, the Bloom filter of the key logger is updated. For example, the Bloom filter can be updated so that a predetermined number of known hash functions can be used to set the bits in the Bloom filter bitmap.

[0080] In step 607, a slot is selected in the tail pointer table based on the hash of the key of the KV. For example, the tail pointer table can contain K / 2 entries, where K = the total number of entries in the key logger.

[0081] In step 609, the KV store marks (notes) the content of the selected slot of the tail pointer table (i.e., the tail entry), and writes the current offset in the key logger to the same slot of the tail pointer table. Basically, the tail pointer table can be a hash map of the entries present in the key logger, such that each bucket pointer of the hash map points to the latest entry mapped to the bucket. The tail pointer table can reduce the number of slots in the key logger that have to be traversed to find the slot for a particular key indicated by the associated Bloom filter as possibly present in the key logger.

[0082] In step 611, the KV store creates a four-way tuple of the key, the NAND page containing the range map, the opcode, and the tail entry pointer, and appends the tuple to the key logger. Although Figure 6 a four-way tuple of the key is utilized, the present disclosure is not limited thereto, and different sized tuples of the key can be used.

[0083] In step 613, after a sufficient number of keys have been recorded in the key logger, the KV store updates the hash map of the KV.

[0084] Figure 7 is a flowchart showing the deletion operation of a KV store according to an embodiment.

[0085] Refer to Figure 7 , in step 701, when receiving a delete command for deleting a KV from the KV store, the KV store checks for the presence of the key to be deleted in the Bloom filter that tracks the key entries in the key logger.

[0086] When in step 703 the Bloom filter of the key logger suggests a hit for the key, in step 705, the KV store traverses the hash map of the keys in the key logger to check for the presence of a matching keyname. For example, if the received delete command is for deleting the KV of Key33, the KV determines whether the key logger already includes an entry for Key33.

[0087] When in step 707 there is a matching keyname in the key logger, the operation proceeds to step 711.

[0088] However, when in step 703 the Bloom filter of the key logger does not suggest a hit for the key, or when in step 707 there is no matching keyname in the key logger, in step 709, the KV store determines whether the key exists in the device hash map.

[0089] When in step 709 the key does not exist in the device hash map, the operation ends as there is no key to be deleted.

[0090] However, when in step 709 the key exists in the device hash map, the operation proceeds to step 711.

[0091] In step 711, the KV store creates a delete key entry and appends it to the key logger. For example, the delete key entry tuple includes an indication of the key to be deleted, the address of the NAND page containing the range map of the key (e.g., read from the previous entry of the key in the key logger), the delete opcode, and the current entry in the tail pointer table.

[0092] In step 713, the KV store updates the address of the key entry in the tail pointer table to reflect the new delete key entry.

[0093] In step 715, the KV store defers the actual deletion of the key from the device hash map. That is, the KV store waits to perform the deletion operation until a specific threshold is reached within the key logger, as described above with reference to Figure 4A and Figure 4B described.

[0094] Figure 8 is a flowchart showing the fetch operation of a KV store according to an embodiment.

[0095] Referring to Figure 8 in step 801, when a fetch command for retrieving the stored KV is received, the KV store checks for the existence of the key to be retrieved in the Bloom filter that tracks the key entries in the key logger.

[0096] When the Bloom filter of the key logger suggests a hit for the key in step 803, in step 805, the KV store traverses the hash map of the keys in the key logger to check for the existence of a matching key name. For example, if the received fetch command is for retrieving the KV of Key77, the KV store determines whether the key logger already includes an entry for Key77.

[0097] When there is a matching key name in the key logger in step 807, in step 815, the KV store determines whether the matching key name in the key logger includes an opcode for deletion.

[0098] When the matching key name in the key logger includes an opcode for deletion in step 815, in step 817, the fetch operation fails. For example, if the fetch command is for retrieving the KV of Key88, but the key logger already includes a command entry for deleting the KV of Key88, the retrieval operation fails.

[0099] However, when the matching key name in the key logger does not include an opcode for deletion in step 815, for example, the matching key name includes an opcode for storage, the operation proceeds to step 811.

[0100] When the Bloom filter of the key logger does not suggest a hit for the key in step 803, or when there is no matching key name in the key logger in step 807, in step 809, the KV store determines whether the key exists in the device hash map.

[0101] When the key does not exist in the device hash map in step 809, in step 813, the get operation fails because there is no key available for retrieval.

[0102] However, when the key exists in the device hash map in step 809, the operation proceeds to step 811.

[0103] In step 811, the KV store reads the NAND pages of the range map containing the key, and then reads the value of the key from one or more NAND pages identified by the range map. As described above, since the device hash map store can store multiple keys and range pointers on a single NAND page, and these range pointers point to the NAND pages of the range map containing the key, the KV store can quickly identify the NAND pages of the range map containing the key, and then read the value of the key from one or more NAND pages identified by the range map.

[0104] Figure 9 A block diagram of an electronic device 901 in a network environment 900 according to an embodiment is shown.

[0105] Reference Figure 9 , the electronic device 901 in the network environment 900 can communicate with the electronic device 902 via a first network 998 (e.g., a short-range wireless communication network), or communicate with the electronic device 904 or the server 908 via a second network 999 (e.g., a long-range wireless communication network). The electronic device 901 can communicate with the electronic device 904 via the server 908. The electronic device 901 may include a processor 920, a memory 930, an input device 950, a sound output device 955, a display device 960, an audio module 970, a sensor module 976, an interface 977, a haptic module 979, a camera module 980, a power management module 988, a battery 989, a communication module 990, a subscriber identity module (SIM) 996, or an antenna module 997. In one embodiment, at least one component (e.g., the display device 960 or the camera module 980) may be omitted from the electronic device 901, or one or more other components may be added to the electronic device 901. In one embodiment, some of the components may be implemented as a single integrated circuit (IC). For example, the sensor module 976 (e.g., a fingerprint sensor, an iris sensor, or an illuminance sensor) may be embedded in the display device 960 (e.g., a display).

[0106] The processor 920 may execute, for example, software (e.g., program 940) to control at least one other component (e.g., a hardware or software component) of the electronic device 901 coupled to the processor 920, and may perform various data processing or computations. As at least part of the data processing or computation, the processor 920 may load commands or data received from another component (e.g., the sensor module 976 or the communication module 990) into the volatile memory 932, process the commands or data stored in the volatile memory 932, and store the resulting data in the non-volatile memory 934. The processor 920 may include a main processor 921 (e.g., a central processing unit (CPU) or an application processor (AP)) and an auxiliary processor 923 (e.g., a graphics processing unit (GPU), an image signal processor (ISP), a sensor hub processor, or a communication processor (CP)), and the auxiliary processor 923 may operate independently of or in combination with the main processor 921. Additionally or alternatively, the auxiliary processor 923 may be adapted to consume less power than the main processor 921 or perform a specific function. The auxiliary processor 923 may be implemented independently of the main processor 921 or as part of the main processor 921.

[0107] When the main processor 921 is in an inactive (e.g., sleep) state, the auxiliary processor 923 may control at least some functions or states related to at least one of the components of the electronic device 901 (e.g., the display device 960, the sensor module 976, or the communication module 990) instead of the main processor 921, or when the main processor 921 is in an active state (e.g., executing an application), the auxiliary processor 923 may control at least some functions or states related to at least one of the components of the electronic device 901 (e.g., the display device 960, the sensor module 976, or the communication module 990) together with the main processor 921. According to one embodiment, the auxiliary processor 923 (e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., the camera module 980 or the communication module 990) that is functionally related to the auxiliary processor 923.

[0108] The memory 930 may store various data used by at least one component of the electronic device 901 (e.g., the processor 920 or the sensor module 976). The various data may include, for example, input data or output data of software (e.g., program 940) and commands related thereto. The memory 930 may include a volatile memory 932 or a non-volatile memory 934.

[0109] The program 940 may be stored in the memory 930 as software, and may include, for example, an operating system (OS) 942, middleware 944, or an application 946.

[0110] The input device 950 may receive commands or data to be used by other components (e.g., the processor 920) of the electronic device 901 from outside the electronic device 901 (e.g., a user). The input device 950 may include, for example, a microphone, a mouse, or a keyboard.

[0111] The sound output device 955 may output a sound signal to the outside of the electronic device 901. The sound output device 955 may include, for example, a speaker or a receiver. The speaker may be used for general purposes such as playing multimedia or recording, while the receiver may be used for receiving incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part of the speaker.

[0112] The display device 960 may visually provide information to the outside of the electronic device 901 (e.g., a user). The display device 960 may include, for example, a display, a holographic device, or a projector, as well as a control circuit for controlling a corresponding one of the display, the holographic device, and the projector. According to one embodiment, the display device 960 may include a touch circuit adapted to detect a touch, or a sensor circuit (e.g., a pressure sensor) adapted to measure the intensity of a force caused by the touch.

[0113] The audio module 970 may convert sound into an electrical signal and vice versa. According to one embodiment, the audio module 970 may obtain sound via the input device 950, or output sound via the sound output device 955 or headphones of an external electronic device 902 directly (e.g., wired) or wirelessly coupled to the electronic device 901.

[0114] The sensor module 976 may detect an operating state of the electronic device 901 (e.g., power or temperature) or an environmental state outside the electronic device 901 (e.g., the state of a user), and then generate an electrical signal or a data value corresponding to the detected state. The sensor module 976 may include, for example, a gesture sensor, a gyro sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0115] The interface 977 may support one or more specified protocols for directly (e.g., wired) or wirelessly coupling the electronic device 901 to an external electronic device 902. According to one embodiment, the interface 977 may include, for example, a high-definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, or an audio interface.

[0116] The connection terminal 978 may include a connector through which the electronic device 901 may be physically connected to an external electronic device 902. According to one embodiment, the connection terminal 978 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0117] The haptic module 979 may convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that can be recognized by a user via touch or kinesthesia. According to one embodiment, the haptic module 979 may include, for example, a motor, a piezoelectric element, or an electrical stimulator.

[0118] The camera module 980 may capture a still image or a moving image. According to one embodiment, the camera module 980 may include one or more lenses, an image sensor, an image signal processor, or a flash.

[0119] The power management module 988 may manage the power supplied to the electronic device 901. The power management module 988 may be implemented as at least a part of, for example, a power management integrated circuit (PMIC).

[0120] The battery 989 may supply power to at least one component of the electronic device 901. According to one embodiment, the battery 989 may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0121] The communication module 990 may support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device 901 and an external electronic device (e.g., the electronic device 902, the electronic device 904, or the server 908), and perform communication via the established communication channel. The communication module 990 may include one or more communication processors, which may operate independently of the processor 920 (e.g., the AP) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module 990 may include a wireless communication module 992 (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 994 (e.g., a local area network (LAN) communication module or a power line communication (PLC) module). A corresponding one of these communication modules may be via a first network 998 (e.g., a short-range communication network, such as Bluetooth TM, communicate with an external electronic device using standards of Wi-Fi Direct or Infrared Data Association (IrDA), or a second network 999 (e.g., a telecommunications network such as a cellular network, the Internet, or a computer network (e.g., a LAN or a wide area network (WAN))). These different types of communication modules may be implemented as a single component (e.g., a single IC) or may be implemented as multiple components separated from each other (e.g., multiple ICs). The wireless communication module 992 may use subscriber information (e.g., an International Mobile Subscriber Identity (IMSI)) stored in the subscriber identity module 996 to identify and authenticate an electronic device 901 in a communication network such as the first network 998 or the second network 999.

[0122] The antenna module 997 may transmit signals or power to the outside of the electronic device 901 (e.g., an external electronic device), or receive signals or power from the outside of the electronic device 901 (e.g., an external electronic device). According to one embodiment, the antenna module 997 may include one or more antennas, and, for example, at least one antenna suitable for a communication scheme to be used in a communication network such as the first network 998 or the second network 999 may be selected therefrom by the communication module 990 (e.g., the wireless communication module 992). Then signals or power may be transmitted or received between the communication module 990 and the external electronic device via the selected at least one antenna.

[0123] At least some of the above components may be coupled to each other and transmit signals (e.g., commands or data) therebetween via an inter-peripheral communication scheme (e.g., a bus, General-Purpose Input and Output (GPIO), Serial Peripheral Interface (SPI), or Mobile Industry Processor Interface (MIPI)).

[0124] According to one embodiment, commands or data may be sent or received between the electronic device 901 and an external electronic device 904 via a server 908 coupled to a second network 999. Each of the electronic devices 902 and 904 may be a device of the same type or a different type from the electronic device 901. All or some of the operations to be performed at the electronic device 901 may be performed at one or more external electronic devices 902, 904, or 908. For example, if the electronic device 901 is to perform a function or service automatically or in response to a request from a user or another device, then instead of performing the function or service or in addition to performing the function or service, the electronic device 901 may request one or more external electronic devices to perform at least a part of the function or service. One or more of the external electronic devices that receive the request may perform at least a part of the requested function or service or additional functions or additional services related to the request and transmit the result of the performance to the electronic device 901. The electronic device 901 may provide the result, with or without further processing of the result, as at least a part of a reply to the request. For this purpose, for example, cloud computing, distributed computing, or client-server computing techniques may be used.

[0125] One embodiment may be implemented as software (e.g., program 940) that includes one or more instructions stored in a machine (e.g., electronic device 901) readable storage medium (e.g., internal memory 936 or external memory 938). For example, a processor of the electronic device 901 may call at least one of the one or more instructions stored in the storage medium under the control of the processor and execute at least one of the one or more instructions with or without using one or more other components. Thus, the machine may be operated to perform at least one function in accordance with the at least one instruction called. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine readable storage medium may be provided in the form of a non-transitory storage medium. The term "non-transitory" indicates that the storage medium is a tangible device and does not include signals (e.g., electromagnetic waves), but the term does not distinguish between cases where data is stored semi-permanently in the storage medium and cases where data is stored temporarily in the storage medium.

[0126] According to one embodiment, the methods of the present disclosure may be included and provided in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a machine readable storage medium (e.g., compact disc read only memory (CD-ROM)) or via an app store (e.g., PlayStore TM)Online distribution (e.g., downloading or uploading) or direct distribution between two user devices (e.g., smart phones). If online distribution, at least a part of the computer program product may be temporarily generated or at least temporarily stored in a machine-readable storage medium (such as the memory of a manufacturer's server, an application storage server, or a relay server).

[0127] According to one embodiment, each of the above components (e.g., a module or a program) may include a single entity or multiple entities. One or more of the above components may be omitted, or one or more other components may be added. Alternatively or additionally, multiple components (e.g., modules or programs) may be integrated into a single component. In this case, the integrated component may still perform one or more functions of each of the multiple components in the same or similar manner as performed by a corresponding one of the multiple components before integration. Operations performed by a module, a program, or another component may be performed sequentially, in parallel, repeatedly, or heuristically, or one or more operations may be performed in a different order or omitted, or one or more other operations may be added.

[0128] Figure 10 A diagram showing a storage system 1000 according to an embodiment.

[0129] The storage system 1000 includes a host 1002 and a storage device 1004. Although one host and one storage device are described, the storage system 1000 may include multiple hosts and / or multiple storage devices. The storage device 1004 may be an SSD, a Universal Flash Storage (UFS), etc. The storage device 1004 includes a controller 1006 and a storage medium 1008 connected to the controller 1006. The controller 1006 may be an SSD controller, a UFS controller, etc. The storage medium 1008 may include volatile memory, non-volatile memory, or both, and may include one or more flash memory chips (or other storage media). The controller 1006 may include one or more processors, one or more error correction circuits, one or more Field Programmable Gate Arrays (FPGAs), one or more host interfaces, one or more flash bus interfaces, etc., or a combination thereof. The controller 1006 may be configured to facilitate data / command transfer between the host 1002 and the storage medium 1008. The host 1002 sends data / commands to the storage device 1004 to be received by the controller 1006 and processed in conjunction with the storage medium 1008. As described herein, methods, procedures, and algorithms may be implemented on a storage device controller (such as the controller 1006). The sources and destinations described herein may correspond to elements of the host 1002 (i.e., a processor or an application) and the storage medium 1008.

[0130] According to the above embodiments, a system and method are provided that allow multiple keys to be packed together in a single NAND page to reduce the worst-case conflict length in the device hash map by a packing factor P (i.e., the average number of packed keys per page).

[0131] In addition, related keys that do not have temporal locality can be grouped together to have spatial locality. That is, keys that map to adjacent buckets in the device hash map can be grouped together even if the keys themselves do not have temporal locality.

[0132] Thus, due to the dense key packing, the number of NAND pages required to store all keys can be reduced, and the RAF / WAF can be reduced. In addition, the NAND pages can reduce GC when all keys in the page are invalid.

[0133] Therefore, the present disclosure can significantly reduce the GC overhead by a factor of the packing density and reduce the length of the hash map conflict chain, which improves the tail latency and reduces the number of NAND page reads, significantly reducing the lookup latency.

[0134] Although specific embodiments of the present disclosure have been described in the detailed description of the present disclosure, the present disclosure can be modified in various forms without departing from the scope of the present disclosure. Therefore, the scope of the present disclosure should not be determined based only on the described embodiments, but based on the appended claims and their equivalents.

Claims

1. A key-value (KV) storage device, comprising: A key recorder; And A processor configured to: Receive a first command for storing a first KV in the KV storage device, Write a first value of the first KV to a first memory page, Generate a range map for identifying a range of the first memory page including the first value, Write the range map to a second memory page, Append an entry for storing the first KV to the key recorder, and When a threshold is reached within the key recorder, update a device hash map of the KV storage device to include a first key of the first KV, Wherein the first key of the first KV is stored on a third memory page together with at least one other key and includes a range pointer pointing to the second memory page including the range map, and Wherein the processor is further configured to update the device hash map by: Collecting key entries belonging to a group of adjacent buckets in the device hash map; Merging existing keys in the device hash map with entries from the key recorder to form a packed key for the group of adjacent buckets; Writing the packed key to the third memory page; and Updating the device hash map to point to the third memory page including the packed key.

2. The KV storage device according to claim 1, wherein, The entry for storing the first KV includes at least one of the first key, an indication of the second memory page including the range map, an opcode of the first command, or a tail entry pointer.

3. The KV storage device according to claim 1, further comprising a Bloom filter, Among them, The processor is further configured to update the Bloom filter to indicate receipt of the first command for storing the first KV.

4. The KV storage device according to claim 1, further comprising a tail pointer table, Among them, The processor is further configured to: Select a slot in the tail pointer table based on a hash of a first key of the first KV, and Write a current offset in the key recorder to the selected slot.

5. The KV storage device according to claim 1, wherein The processor is further configured to clear the key recorder.

6. The KV storage device according to claim 1, wherein, The processor is further configured to: Receive a second command for deleting a second KV from the KV storage device, Determine whether the key recorder includes an entry for the second KV, or whether the second KV exists in the device hash map, and In response to determining that the key recorder includes the entry for the second KV or the second KV exists in the device hash map, append an entry for deleting the second KV to the key recorder, and when a threshold is reached within the key recorder, delete a second key of the second KV from the device hash map.

7. The KV storage device according to claim 6, further comprising a Bloom filter, Among them, The processor is further configured to check a previous entry of the second KV in the Bloom filter before determining whether the key recorder includes the entry for the second KV.

8. The KV storage device according to claim 1, wherein The processor is further configured to: Receive a third command for retrieving a second KV from the KV storage device, Identify the entry for the second KV in the key recorder, The operation code for identifying the entry for the second KV in the key logger is for a delete operation, and Based on the operation code for the entry for the second KV in the key logger being for the delete operation, it is recognized that the third command fails.

9. The KV storage device according to claim 8, further comprising a Bloom filter, Among them, The processor is further configured to check for a previous entry for the second KV in the Bloom filter before identifying that the key logger includes the entry for the second KV.

10. The KV storage device according to claim 1, wherein, The processor is further configured to: Receive a third command for retrieving a second KV from the KV storage device, and Identify the second KV in the device hash map.

11. The KV storage device according to claim 10, wherein, The processor is further configured to: Read a third memory page of a second range map including a second key for the second KV, and Based on the second range map, read a second value of the second KV from a fourth memory page.

12. A method of operating a key-value KV storage device, the method comprising: Receiving a first command for storing a first KV in the KV storage device; Writing a first value of the first KV to a first memory page; Generating a range map for identifying the first memory page including the first value; Writing the range map to a second memory page; Appending an entry for storing the first KV to a key logger of the KV storage device; And When a threshold is reached within the key logger, updating a device hash map of the KV storage device to include a first key of the first KV, Wherein the first key of the first KV is stored on a third memory page together with at least one other key and includes a range pointer pointing to the second memory page including the range map, and Wherein updating the device hash map includes: Collecting key entries belonging to a set of adjacent buckets in the device hash map; Merging existing keys in the device hash map with entries from the key logger to form a packed key for the set of adjacent buckets; Writing the packed key to the third memory page; and Updating the device hash map to point to the third memory page including the packed key.

13. The method according to claim 12, wherein, The entry for storing the first KV includes at least one of the first key, an indication of the second memory page including the range map, an operation code of the first command, or a tail entry pointer.

14. The method according to claim 12, further comprising updating a Bloom filter of the key logger to indicate receipt of the first command for storing the first KV.

15. The method according to claim 12, further comprising: Selecting a slot in a tail pointer table based on a hash of a first key of the first KV; And Writing a current offset in the key logger to the selected slot.

16. A storage system, comprising: A key-value KV storage device; And A processor, configured to: Receive a first command for storing a first KV in the KV storage device, Write a first value of the first KV to a first memory page, Generate a range map for identifying the first memory page including the first value, Write the range map to a second memory page, Append an entry for storing the first KV to the key logger of the KV storage device, and When a threshold is reached within the key logger, update the device hash map of the KV storage device to include the first key of the first KV, wherein the first key of the first KV is stored on a third memory page together with at least one other key and includes a range pointer to the second memory page including the range map, and wherein updating the device hash map includes: Collect key entries belonging to a set of adjacent buckets in the device hash map; Merge the existing keys in the device hash map with the entries from the key logger to form a packed key for the set of adjacent buckets; Write the packed key to the third memory page; and Update the device hash map to point to the third memory page including the packed key.

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