A low power RC-IGBT device with integrated auxiliary depletion gate

Abstract

The present invention relates to a low-power RC-IGBT device with integrated auxiliary depletion gate, and belongs to the field of semiconductor technology. The auxiliary depletion gate integrated in the device is composed of a gate oxide layer and a polysilicon gate, and is characterized in that the auxiliary depletion gate is short-circuited with the main gate, and applying voltage thereto can deplete the drift region P column to form an adaptive resistor. The outstanding advantages of the present invention are mainly two points. First, the forward conduction power consumption is 21% lower than that of traditional SJ-IGBT devices. Second, the turn-off loss is reduced by 53% compared with traditional RC-IGBT devices, which greatly improves the compromise relationship between the turn-off loss and the on-state voltage drop of the device.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductors and relates to a low-power RC-IGBT device with integrated auxiliary depletion gate. Background Art

[0002] IGBT (Lateral Insulated Gate Bipolar Transistor) is a bipolar semiconductor power device that combines MOSFET and BJT tubes. It has the advantages of high input impedance, low on-state voltage, simple driving circuit, low driving power consumption and high operating frequency. It is widely used in communication technology, new energy equipment and various consumer electronics fields, and is the core device of electronic power systems.

[0003] Since IGBT does not have the ability to conduct in the reverse direction, a reverse freewheeling diode is usually connected in parallel next to the IGBT for protection in actual use. In the early days, IGBTs and diodes were packaged separately and used independently, which resulted in mismatched performance between the two, and parasitic inductance was easily introduced during the welding process, which increased the application cost of IGBTs and reduced reliability. In order to solve this problem, people tried to package IGBTs and diodes together. Although the parasitic parameters were reduced, process integration was still not achieved. At the same time, in order to further improve the integration of devices and reduce manufacturing costs, people began to try to integrate the freewheeling diode that plays a protective role inside the IGBT, forming an RC-IGBT (Reverse-Conducting Insulated Gate Bipolar Transistor). The emergence of RC-IGBT significantly simplified the topological structure of electronic circuits, reduced parasitic parameters and reduced chip area, but there were also some disadvantages that could not be ignored.

[0004] Taking SA-IGBT as an example of traditional RC-IGBT, the anode N+ region and P+ region of SA-IGBT (Short-Anode-IGBT, anode short-circuited insulated gate bipolar transistor) are short-circuited together by the anode electrode, and a parasitic diode is introduced into the device body, which has the ability of reverse conduction. During the device shutdown process, the anode N+ region can directly extract electrons in the drift region, increase the switching speed of the device, and reduce the shutdown loss of the device. However, due to the introduction of the anode N+ region, the injection efficiency of holes in the on state is reduced, resulting in an increase in the on-state voltage drop, and more seriously, there is a snapback voltage foldback phenomenon. When the on-current is small, the electrons injected by NMOS flow directly out from the anode N+ region, the P+ / N-buffer junction is not turned on, the device is in unipolar mode, and the on-resistance is high; as the on-current gradually increases, the voltage drop caused by the electrons flowing through the N-buffer region below the P+ region gradually increases. When the voltage drop is greater than the built-in potential of the P+ / N-buffer junction, the P+ region begins to inject holes into the drift region to produce a conductivity modulation effect, and the device enters the bipolar mode, the resistance is greatly reduced, and the Snapback phenomenon occurs. This will introduce electromagnetic oscillations in the circuit system and affect the stability of the system. In short, how to effectively reduce the power consumption of IGBT without affecting other performance is an urgent problem to be solved. Summary of the invention

[0005] In view of this, the purpose of the present invention is to provide a low-power RC-IGBT device with integrated auxiliary depletion gate, which introduces P column, auxiliary depletion gate and anode oxidation isolation groove on the basis of traditional RC-IGBT device. The main gate provides a conductive channel for electrons, and the auxiliary depletion gate provides adaptive resistance. The P column and the anode N-collector form an anti-parallel diode to provide reverse conduction capability; the auxiliary depletion gate can reduce the on-state voltage drop when forward conducting and reduce the turn-off loss when turned off; the anode oxidation isolation groove eliminates the snapback phenomenon that occurs in traditional RC-IGBT.

[0006] In order to achieve the above object, the present invention provides the following technical solutions:

[0007] A low-power RC-IGBT device with integrated auxiliary depletion gate, comprising a cathode P+ region 1, a cathode N+ region 2, a cathode P-base region 3, a drift region 4, an anode N-buffer region 5, an anode P-collector region 6, a gate oxide layer 7, a polysilicon gate 8, a main gate 9, a field oxide layer 14, an emitter metal electrode 15, and a collector metal electrode 16, characterized in that the device also includes an auxiliary depletion gate 10, a P column 11, an anode dielectric isolation groove 12, and an anode N-collector 13;

[0008] The cathode P+ region 1 is adjacent to the cathode N+ region 2, and they are located above the cathode P-base region 3; the drift region 4 is located below the cathode P-base region 3; the gate oxide layer 7 is adjacent to the cathode P-base region 3, the drift region 4, and the P column 11; the polysilicon gate 8 is completely wrapped by the gate oxide layer 7, and they together form a main gate 9; the anode P-collector region 6 is located below the anode N-buffer region 5, and the drift region 4 is located above the anode N-buffer region 5;

[0009] The auxiliary depletion gate 10 is composed of a gate oxide layer 7 and a polysilicon gate 8; the auxiliary depletion gate 10 is opposite to the main gate 9, and a part of the P column 11 is located between the two;

[0010] The anode N-collector 13 is below the P column 11; the anode oxidation isolation tank 12 is located between the anode N-buffer area 13 and the anode P-collector area 6;

[0011] The emitter metal electrode 15 is in direct contact with the cathode P+ region 1, the cathode N+ region 2, and the P column 11, and is located above them; the field oxide layer 14 is on the right side of the emitter metal electrode 15; the collector metal electrode 16 is in direct contact with the anode P-collector region 6, the anode dielectric isolation groove 12, and the anode N-collector 13, and is located below them.

[0012] Optionally, the main gate 9 is connected to an auxiliary depletion gate 10 , wherein the main gate 9 provides a conductive channel for electrons and the auxiliary depletion gate 10 provides an adaptive resistor.

[0013] Optionally, the polysilicon gate 8 is doped with N-type impurities to assist in depleting the P column region.

[0014] Optionally, the auxiliary depletion gate 10 depletes the P column 11 to form an adaptive resistance to block holes when the device is turned on, and the auxiliary depletion gate 10 does not work when the device is turned off, and the adaptive resistance disappears, thereby assisting in extracting holes.

[0015] Optionally, the auxiliary depletion gate 10 enhances the conductivity modulation effect on the emitter side when the device is turned on, thereby reducing the on-state voltage drop, and reduces the turn-off loss when the device is turned off.

[0016] Optionally, the anode oxidation isolation groove 12 isolates the anode N-buffer area 5 from the anode P-collector area 6 and the anode N-collector 13 .

[0017] Optionally, the thickness of the gate oxide layer 7 can be adjusted as needed.

[0018] The beneficial effect of the present invention is that: on the basis of the traditional RC-IGBT device, a P column, an auxiliary depletion gate and an anodic oxidation isolation groove are introduced. The P column can not only increase the doping concentration of the drift region and reduce the conduction voltage drop of the device, but also introduce a lateral electric field peak value to improve the withstand voltage of the entire device. The P column also forms an anti-parallel diode with the anode N-collector to provide the device with reverse conduction capability. During forward conduction, as the gate voltage increases, the repulsive ability of the auxiliary depletion gate holes continues to increase, blocking the holes flowing through the auxiliary depletion gate along the P column, thereby increasing the concentration of holes on the gate side and reducing the conduction voltage drop. The P column and the anodic oxidation isolation groove completely wrap the N-collector, and most of the electrons are collected by the P-collector, so that the Snapback phenomenon does not occur. When shutting down, the gate voltage continues to decrease, and the repulsive effect of the auxiliary depletion gate on the holes continues to decrease to form a low-resistance region, which provides an additional channel for the extraction of holes in the drift region and reduces the turn-off loss of the device. During reverse conduction, the gate is in a closed state and the parasitic diode can be turned on.

[0019] Other advantages, objectives and features of the present invention will be described in the following description to some extent, and to some extent, will be obvious to those skilled in the art based on the following examination and study, or can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:

[0021] Figure 1 It is a structural schematic diagram of a new structure RC-IGBT device of the present invention;

[0022] Figure 2 for Figure 1 Equivalent circuit diagram of

[0023] Figure 3 (a) is a schematic diagram of the structure of a traditional RC-IGBT device; (b) is a schematic diagram of the structure of a SJ-IGBT device;

[0024] Figure 4 (a) is a comparison diagram of the blocking characteristics of the present invention, the conventional RC-IGBT device and the SJ-IGBT device when the drift region length LD is 115 μm; (b) is a diagram of their electric field intensity distribution in the avalanche breakdown state;

[0025] Figure 5 The forward conduction characteristics of the present invention, the conventional RC-IGBT device and the SJ-IGBT device;

[0026] Figure 6 The figure is a distribution diagram of hole concentration of the auxiliary depletion gate of the present invention at different gate voltages;

[0027] Figure 7 (a) is a diagram showing the hole current density distribution of the auxiliary depletion gate and the P-base under forward conduction of the present invention; (b) is a schematic diagram showing the total current density of the entire device under forward conduction of the present invention;

[0028] Figure 8 (a) is a schematic diagram of the conductivity modulation effect of the SJ-IGBT device during forward conduction; (b) is a schematic diagram of the conductivity modulation effect of the present invention during forward conduction; (c) is a hole concentration distribution diagram near the gate of the present invention and the SJ-IGBT device during forward conduction;

[0029] Fig. 9 It is a reverse conduction characteristic diagram of the present invention, the traditional RC-IGBT device and the PIN diode;

[0030] Fig.10 (a) is the reverse recovery test circuit of the present invention, the conventional RC-IGBT device and the PIN diode; (b) is their reverse recovery characteristic curves;

[0031] Fig.11 (a) is the inductive load test circuit of the inductive invention, the traditional RC-IGBT device and the SJ-IGBT device; (b) is the turn-off characteristic curve under the same on-state voltage drop;

[0032] Fig.12 A schematic diagram of the main process flow of the new structure RC-IGBT device provided by the present invention;

[0033] Figure numerals: cathode P+ region 1, cathode N+ region 2, cathode P-base region 3, drift region 4, anode N-buffer region 5, anode P-collector region 6, gate oxide layer 7, polysilicon gate 8, main gate 9, auxiliary depletion gate 10, P column 11, anode dielectric isolation groove 12, anode N-collector 13, field oxide layer 14, emitter metal electrode 15, collector metal electrode 16. DETAILED DESCRIPTION

[0034] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments only illustrate the basic concept of the present invention in a schematic manner, and the following embodiments and features in the embodiments can be combined with each other without conflict.

[0035] Among them, the drawings are only used for illustrative explanations, and they only represent schematic diagrams rather than actual pictures, and should not be understood as limitations on the present invention. In order to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of actual products. For those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted.

[0036] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if the terms "upper", "lower", "left", "right", "front", "rear", etc. indicate the orientation or position relationship, they are based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, the terms describing the position relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting the present invention. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0037] like Figure 3 As shown in (a), the traditional RC-IGBT device is mainly composed of a cathode P+ region 1, a cathode N+ region 2, a cathode P-base region 3, a drift region 4, an anode N-buffer region 5, an anode P-collector region 6, a gate oxide layer 7, a polysilicon gate 8, and an anode N-collector 13; the cathode P+ region 1 is adjacent to the cathode N+ region 2, and they are jointly located above the cathode P-base region 3; the drift region 4 is below the cathode P-base region 3; the gate oxide layer 7 is connected to the cathode P-base region 3 and the drift region 4; the polysilicon gate 8 is completely wrapped by the gate oxide layer 7; the anode P-collector region 6 is adjacent to the anode N-collector 13, and they are jointly located below the anode N-buffer region 5, and the drift region 4 is above the anode N-buffer region 5.

[0038] like Figure 3As shown in (b), the traditional SJ-IGBT device mainly consists of a cathode P+ region 1, a cathode N+ region 2, a cathode P-base region 3, a drift region 4, an anode N-buffer region 5, an anode P-collector region 6, a gate oxide layer 7, a polysilicon gate 8, and a P column 11; the cathode P+ region 1 is adjacent to the cathode N+ region 2, and they are located together above the cathode P-base region 3; the drift region 4 and the P column 11 are below the cathode P-base region 3; the gate oxide layer 7 is connected to the cathode P-base region 3 and the drift region 4; the polysilicon gate 8 is completely wrapped by the gate oxide layer 7; the anode P-collector region 6 is located below the anode N-buffer region 5, and the drift region 4 and the P column 11 are above the anode N-buffer region 5; the P column is adjacent to the cathode P-base region 3, the drift region 4, and the anode N-buffer region 5.

[0039] Example:

[0040] like Figure 1 As shown, an improvement is made on a traditional RC-IGBT device. This embodiment provides a low-power RC-IGBT device with an integrated auxiliary depletion gate, including a cathode P+ region 1, a cathode N+ region 2, a cathode P-base region 3, a drift region 4, an anode N-buffer region 5, an anode P-collector region 6, a gate oxide layer 7, a polysilicon gate 8, a main gate 9, a field oxide layer 14, an emitter metal electrode 15, and a collector metal electrode 16. It is characterized in that the device also includes an auxiliary depletion gate 10, a P column 11, an anode dielectric isolation groove 12, and an anode N-collector 13;

[0041] The common IGBT region is composed of a cathode P+ region 1, a cathode N+ region 2, a cathode P-base region 3, a drift region 4, an anode N-buffer region 5, an anode P-collector region 6, a main gate 9, a gate oxide layer 7, and a polysilicon gate 8; the cathode P+ region 1 is adjacent to the cathode N+ region 2, and they are located above the cathode P-base region 3; the drift region 4 is located below the cathode P-base region 3; the gate oxide layer 7 is adjacent to the cathode P-base region 3, the drift region 4, and the P column 11; the polysilicon gate 8 is completely wrapped by the gate oxide layer 7, and they together constitute the main gate 9; the anode P-collector region 6 is located below the anode N-buffer region 5, and the drift region 4 is located above the anode N-buffer region 5;

[0042] The auxiliary depletion gate 10 is composed of a gate oxide layer 7 and a polysilicon gate 8; the auxiliary depletion gate 10 is opposite to the main gate 9, and a part of the P column 11 is located between the two;

[0043] The diode region is composed of a P column 11, an anodic oxidation isolation groove 12, and an anode N-collector 13; the anode N-collector 13 is below the P column 11; the anodic oxidation isolation groove 12 is located between the anode N-buffer region 13 and the anode P-collector region 6;

[0044] The emitter metal electrode 15 is in direct contact with the cathode P+ region 1, the cathode N+ region 2, and the P column 11, and is located above them; the field oxide layer 14 is on the right side of the emitter metal electrode 15; the collector metal electrode 16 is in direct contact with the anode P-collector region 6, the anode dielectric isolation groove 12, and the anode N-collector 13, and is located below them;

[0045] The length (X-axis direction) of the N-type drift region 4 is 4 μm, the width (Y-axis direction) is 115 μm, and the doping concentration of this region is 1×10 15 cm -3 The length of cathode P+ region 1 is 2 μm, the width is 1 μm, and the doping concentration is 1×10 19 cm -3 The length of cathode N+ region 2 is 1 μm, the width is 1 μm, and the doping concentration is 1×10 19 cm -3 The length of cathode P-base region 3 is 3 μm, the width is 3 μm, and the doping concentration is 1×10 17 cm -3 The length of the anode P+ region 6 is 4 μm, the width is 1 μm, and the doping concentration is 1×10 18 cm -3 The length of the anode N-buffer region 5 is 4 μm, the width is 1 μm, and the doping concentration is 5×10 16 cm -3 The thickness of the gate oxide layer 7 is 0.1 μm. The length of the polysilicon gate 8 is 0.8 μm, the width is 3.8 μm, and the doping concentration is 1×10 19 cm -3 The length of the P column 11 is 3 μm, the width is 119 μm, and the doping concentration is 1.2×10 15 cm -3 The length of the anodized isolation groove 12 is 1 μm and the width is 2 μm. The length of the anode N-collector 13 is 2 μm and the width is 1 μm. The doping concentration is 1×10 18 cm -3 .

[0046] During forward conduction, as the gate voltage increases, the auxiliary depletion gate will deplete the P column opposite to the main gate more and more deeply, and most of the carriers in the region are repelled, forming a high resistance region similar to that of an intrinsic semiconductor. Most of the holes that want to flow through the auxiliary depletion gate along the P column are repelled to the gate side, thereby increasing the concentration of holes on the gate side and reducing the conduction voltage drop. The anode oxide isolation groove separates the anode N-collector area and the P column from the anode N-buffer area. Most of the electrons are blocked by the P column in the drift region and collected by the P-collector, thereby effectively suppressing the Snapback phenomenon. During shutdown, as the gate resistance decreases, the auxiliary depletion gate no longer repels and blocks the flow of holes, and the holes in the drift region can be quickly extracted through the low-resistance channel of the P column, greatly reducing the tail current and reducing the turn-off loss of the device. During reverse conduction, the auxiliary depletion gate does not work, the P column area is in a low-resistance state, and the parasitic diode can be easily turned on.

[0047] The IGBT device of the proposed embodiment is simulated by using SENTAURUS simulation software. Figure 1 , Figure 3 The structure shown is subjected to performance simulation analysis, its mechanism is analyzed, and electrical simulation is performed. During the simulation process, the various simulation parameters of the embodiment device and the traditional device are consistent, the carrier lifetime is 10μs, and the ambient temperature is 300K.

[0048] Figure 2 The equivalent circuit diagram of the RC-IGBT device of the embodiment is shown, wherein the IGBT is equivalent to a PNP transistor controlled by NMOS. The P column and the anode N-collector are equivalent to a parasitic PIN diode connected in series with the auxiliary depletion gate 14.

[0049] Figure 4 (a) is a comparison of the avalanche breakdown characteristic curves of the embodiment and the conventional RC-IGBT and SJ-IGBT when the drift region length (Y-axis direction) is 115 μm. 15 cm -3 The breakdown voltage of SJ-IGBT is 1683V; the concentration of SJ-IGBT in the drift region is 1×10 15 cm -3 The breakdown voltage is 1716V; the concentration of traditional RC-IGBT in the drift region is 1×10 14 cm -3 The breakdown voltage is 1049V; (b) is the electric field intensity distribution diagram of the drift region of the embodiment and the traditional RC-IGBT and SJ-IGBT.

[0050] Figure 5The drift region length (X-axis direction) of the embodiment and the conventional RC-IGBT and SJ-IGBT is 115 μm and the concentration is 1×10 15 cm -3 From the comparison diagram below, it can be seen that the conventional RC-IGBT has a Snapback phenomenon, and the on-state voltage drop of the embodiment is the smallest.

[0051] Figure 6 : is a hole concentration distribution diagram of the auxiliary depletion gate of the embodiment under different gate voltages. As the gate voltage increases, the hole concentration of the P column region opposite to the main gate decreases, and the adaptive resistance increases accordingly.

[0052] Figure 7 (a) is the hole current density distribution diagram of the emitter side in the forward conduction state of the embodiment, where the hole current density in the P-base region is 210 A / cm 2 The hole current density of the auxiliary depletion gate is 85A / cm 2 (b) is an example in which the forward conduction current density is 200A / cm 2 Schematic diagram of the total current density distribution in the device below. The total current density flowing through the P-base region is 191A / cm 2 , the total current density through the P column is 9A / cm 2 .

[0053] Figure 8 (a) is a schematic diagram of the carrier distribution in the SJ-IGBT device. On the emitter side, holes can flow directly into the emitter through the low-resistance channel of P-pillar-cathode P-base region-cathode P+ region, thereby reducing the holes near the gate and weakening the conductivity modulation effect; (b) is a schematic diagram of the carrier distribution in the embodiment. The holes that originally wanted to enter the emitter through the P-pillar are repelled to the vicinity of the gate, increasing the hole concentration near the gate and enhancing the conductivity modulation effect; (c) is a hole concentration distribution diagram of the embodiment and the SJ-IGBT device on the gate side (the tangent is 0.5um below the P-base, and the on-current is 200A / cm 2 ), it can be seen that the hole concentration of the embodiment is higher than that of the SJ-IGBT device.

[0054] Fig. 9 2 is a reverse conduction characteristic diagram of the embodiment, a traditional RC-IGBT device and a PIN diode. It can be seen that the reverse conduction performance of the embodiment is better than the traditional RC-IGBT, but lower than the PIN diode.

[0055] Fig.10(a) is the reverse recovery test circuit of the embodiment, the traditional RC-IGBT device and the PIN diode; (b) is their reverse recovery characteristic curve. The reverse recovery peak current of the embodiment is the lowest, and the softness factor is larger, with better EMI and soft shutdown performance.

[0056] Fig.11 (a) is the turn-off test circuit of the embodiment, the conventional RC-IGBT and the SJ-IGBT device under the inductive load; (b) is their respective turn-off characteristic curves. The embodiment has basically no tail current and the turn-off loss is the lowest.

[0057] The present invention proposes a low-power RC-IGBT device with integrated auxiliary depletion gate, as shown in FIG. Figure 1 For example, its main process flow is as follows Fig.12 The main processes include: ion implantation, diffusion, etching, oxidation, deposition, polycrystalline filling and annealing. Finally, metal electrodes are deposited to form anodes, gates and cathodes.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution, which should be included in the scope of the claims of the present invention.

Claims

1. A low-power RC-IGBT device with integrated auxiliary depletion gate, characterized in that: The device comprises a cathode P+ region (1), a cathode N+ region (2), a cathode P-base region (3), a drift region (4), an anode N-buffer region (5), an anode P-collector region (6), a gate oxide layer (7), a polysilicon gate (8), a main gate (9), a field oxide layer (14), an emitter metal electrode (15), and a collector metal electrode (16), and is characterized in that the device also comprises an auxiliary depletion gate (10), a P column (11), an anode dielectric isolation groove (12), and an anode N-collector (13); The cathode P+ region (1) is adjacent to the cathode N+ region (2), and they are located together above the cathode P-base region (3); below the cathode P-base region (3) is the drift region (4); the gate oxide layer (7) is adjacent to the cathode P-base region (3), the drift region (4), and the P column (11); the polysilicon gate (8) is completely wrapped by the gate oxide layer (7), and they together form a main gate (9); the anode P-collector region (6) is located below the anode N-buffer region (5), and above the anode N-buffer region (5) is the drift region (4); The auxiliary depletion gate (10) is composed of a gate oxide layer (7) and a polysilicon gate (8); the auxiliary depletion gate (10) is opposite to the main gate (9), and a part of the P column (11) is located between the two; The anode N-collector (13) is located below the P column (11); the anode oxidation isolation tank (12) is located between the anode N-collector area (13) and the anode P-collector area (6); The emitter metal electrode (15) is in direct contact with the cathode P+ region (1), the cathode N+ region (2), and the P column (11), and is located above them; the field oxide layer (14) is on the right side of the emitter metal electrode (15); the collector metal electrode (16) is in direct contact with the anode P-collector region (6), the anode dielectric isolation groove (12), and the anode N-collector (13), and is located below them.

2. A low-power RC-IGBT device with integrated auxiliary depletion gate according to claim 1, characterized in that: The main gate (9) is connected to an auxiliary depletion gate (10), wherein the main gate (9) provides an electron conduction channel and the auxiliary depletion gate (10) provides an adaptive resistor.

3. The low-power RC-IGBT device with integrated auxiliary depletion gate according to claim 1, characterized in that: The polysilicon gate (8) is doped with N-type impurities to assist in depleting the P column region.

4. The low-power RC-IGBT device with integrated auxiliary depletion gate according to claim 1, characterized in that: The auxiliary depletion gate (10) depletes the P column (11) to form an adaptive resistance when the device is turned on, thereby blocking holes. When the device is turned off, the auxiliary depletion gate (10) does not work, the adaptive resistance disappears, thereby assisting in extracting holes.

5. The low-power RC-IGBT device with integrated auxiliary depletion gate according to claim 3, characterized in that: The auxiliary depletion gate (10) enhances the conductivity modulation effect on the emitter side when the device is turned on, thereby reducing the on-state voltage drop, and reduces the turn-off loss when the device is turned off.

6. The low-power RC-IGBT device with integrated auxiliary depletion gate according to claim 1, characterized in that: The anode oxidation isolation groove (12) isolates the anode N-buffer area (5) and the anode P-collector area (6) from the anode N-collector (13).

7. The low-power RC-IGBT device with integrated auxiliary depletion gate according to claim 1, characterized in that: The thickness of the gate oxide layer (7) is adjusted as required.

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