Dispatching energy storage systems

Abstract

The dispatching energy storage system belongs to the technical field of power supply equipment, and in particular relates to a dispatching energy storage system. The present invention provides a dispatching energy storage system. The present invention includes an inverter part, a charging circuit, a whole machine power supply part, a core control part, a human-computer interaction part, and a lithium battery pack part. It is characterized in that the control signal input port of the charging circuit is connected to the control signal output port of the core control part, the power output port of the whole machine power supply part is respectively connected to the power port of the core control part and the power port of the human-computer interaction part, the signal transmission port of the human-computer interaction part is connected to the signal transmission port of the core control part, the detection signal output port of the charging circuit is connected to the detection signal input port of the core control part, and the lithium battery pack part is connected to the input end of the inverter part.

Description

Technical Field

[0001] The present invention belongs to the technical field of power supply equipment, and in particular relates to a scheduling energy storage system. Background Art

[0002] Electricity is an economical, practical, clean, and easily controllable and convertible form of energy. It is also a special product provided by power companies to users, with quality guaranteed by the three parties involved: generation, supply, and consumption. It is widely used in various fields and is a major driving force for scientific and technological development and economic growth. Electricity plays a vital role in our lives. How to utilize it rationally and reliably is a long-standing concern. Summary of the Invention

[0003] The present invention aims to solve the above-mentioned problems and provides a scheduling energy storage system.

[0004] To achieve the above-mentioned purpose, the present invention adopts the following technical solution, which includes an inverter part, a charging circuit, a whole-machine power supply part, a core control part, a human-computer interaction part and a lithium battery pack part. It is characterized in that the control signal input port of the charging circuit is connected to the control signal output port of the core control part, the power output port of the whole-machine power supply part is respectively connected to the power port of the core control part and the power port of the human-computer interaction part, the signal transmission port of the human-computer interaction part is connected to the signal transmission port of the core control part, the detection signal output port of the charging circuit is connected to the detection signal input port of the core control part, and the lithium battery pack part is connected to the input end of the inverter part.

[0005] As a preferred solution, the present invention further comprises an alarm circuit, and a control signal input port of the alarm circuit is connected to a control signal output port of the core control part.

[0006] As another preferred solution, the present invention further comprises an LED circuit, wherein a control signal input port of the LED circuit is connected to a control signal output port of the core control part.

[0007] As another preferred solution, the present invention further comprises a WIFI module, and a signal transmission port of the WIFI module is connected to a signal transmission port of the core control part.

[0008] As another preferred embodiment, the inverter part of the present invention includes a light-emitting diode E12, NPN transistors Q14 to Q17, and an NPN transistor Q28. The cathode of E12 is respectively connected to one end of the capacitor C23, the emitter of Q17, one end of R88, one end of R89, the source of IRF150 tube BG2, the source of IRF150 tube BG1, and GND. The anode of E12 is respectively connected to the other end of C23, one end of resistor R22, one end of resistor R41, one end of resistor R84, one end of resistor R85, one end of resistor R80, one end of resistor R81, and GND through resistor R83. 14 emitter is connected, the other end of R22 is connected to A, Q17 collector, and one end of resistor R87 respectively, the other end of R41 is connected to Q15 collector and one end of capacitor C52 respectively, the other end of R84 is connected to Q15 base and one end of capacitor C51 respectively, the other end of R85 is connected to the other end of C52 and Q16 base, the other end of R80 is connected to the other end of C51 and Q16 collector, the other end of R81 is connected to B, Q28 collector, and one end of resistor R86 respectively, the base of Q14 is connected to C, one end of resistor R82, and the cathode of Schottky diode Z5 respectively;

[0009] The base of Q17 is connected to the other end of R88 and the emitter of Q15 respectively. The emitter of Q16 is connected to the other end of R89 and the base of Q28 respectively. The anode of Z5 is connected to GND. The other end of R82 is connected to the collector of Q14 and one end of switch SW6 respectively. The other end of SW6 is connected to one end of fuse F3 and the center tap of the secondary side of transformer G2A respectively. One end of the secondary side of G2A is connected to the drain of BG1, the other end of the secondary side of G2A is connected to the drain of BG2, the gate of BG1 is connected to the other end of R86, the gate of BG2 is connected to the other end of R87, one end of the primary side of G2A is connected to L, and the other end of the primary side of G2A is connected to N through fuse F4.

[0010] As another preferred solution, the core control part of the present invention includes an STM32F103ZET6 chip U1, U1's 34 to 37 pins are connected to PA0 to PA3, U1's 40 to 43 pins are connected to PA4 to PA7, U1's 100 to 105 pins are connected to PA8 to PA12 and TMS, U1's 109 to 110 pins are connected to TCK and PA15, U1's 46 to 48 pins are connected to PB0, PB1 and BOOT1, U1's 133 to 140 ... Pins 1 to 140 of U1 are connected to PB3 to PB9 respectively, pins 69 to 70 of U1 are connected to PB10 to PB11 respectively, pins 73 to 76 of U1 are connected to PB12 to PB15 respectively, pins 26 to 29 of U1 are connected to PC0 to PC3 respectively, pins 44 to 45 of U1 are connected to PC4 to PC5 respectively, pins 96 to 99 of U1 are connected to PC6 to PC9 respectively, pins 111 to 113 of U1 are connected to PC10 to PC12 respectively, and pin 7 of U1 is connected to PC13;

[0011] Pin 8 of U1 is connected to pin 2 of Y1 and one end of capacitor C5 respectively. The other end of C5 is connected to GND and one end of capacitor C6 respectively. The other end of C6 is connected to pin 1 of Y1 and pin 9 of U1 respectively.

[0012] Pins 114 to 119 of U1 are connected to PD0 to PD5 respectively, pins 122 to 123 of U1 are connected to PD6 to PD7 respectively, pins 77 to 82 of U1 are connected to PD8 to PD13 respectively, pins 85 to 86 of U1 are connected to PD14 to PD15 respectively, pin 138 of U1 is connected to BOOT0, pins 16, 38, 51, 61, 71, 83, 94, 107, 120, 130, 143 of U1 are connected to GND, pins 17, 52, 39, 62 of U1 are connected to GND, , 72, 84, 95, 108, 121, 131, 144 pins are connected to +3.3V, U1's 30 pin is connected to GND and one end of capacitor C10 respectively, the other end of C10 is connected to +3.3V, U1's 33 and 32 pins respectively, U1's 31 pin is connected to GND, U1's 25 pin is connected to RESET, U1's 24 pin is connected to one end of capacitor C9 and pin 2 of crystal oscillator Y2 respectively, the other end of C9 is connected to GND and one end of capacitor C8 respectively, the other end of C8 is connected to pin 1 of Y2 and U1's 23 pin respectively;

[0013] U1's pin 6 is connected to VBAT;

[0014] Pin 132 of U1 is connected to PG15, pins 124 to 129 of U1 are connected to pins PG9 to PG14 respectively, pins 87 to 93 of U1 are connected to pins PG2 to PG8 respectively, pins 56 to 57 of U1 are connected to pins PG0 to PG1 respectively, pins 10 to 15, 18 to 22, 49 to 50, and 53 to 55 of U1 are connected to pins PF0 to PF15 respectively, and pins 141 to 142, 1 to 5, 58 to 60, and 63 to 68 of U1 are connected to pins PE0 to PE15 respectively.

[0015] As another preferred solution, the +3.3V described in the present invention is respectively connected to one end of C11 to C22, and the other ends of C11 to C22 are connected to GND; +3.3V is respectively connected to RESET, one end of switch SW1, and one end of capacitor C4 through resistor R6, and the other end of C4 is respectively connected to GND and the other end of SW1; pins 1 to 4 of connector P1 are respectively connected to +5V, PC10, PC11, and GND; +3.3V is connected to the anode of diode D22, the cathode of D22 is respectively connected to VBAT, the cathode of diode D24, and one end of capacitor C3, the other end of C3 is connected to GND, the anode of D24 is connected to the positive pole of battery BAT, and the negative pole of BAT is connected to GND.

[0016] As another preferred solution, the +3.3V described in the present invention is respectively connected to pin 2 of the REG1117-3.3 chip U2, one end of capacitor C29, and the positive electrode of capacitor C27. The other end of C29 is respectively connected to the negative electrode of C27, GND, pin 1 of U2, and the negative electrode of capacitor C30. The positive electrode of C30 is respectively connected to +5V and pin 3 of U2.

[0017] As another preferred embodiment, the charging circuit of the present invention includes a P521 chip U12 and a LY2N-JDC48V collector K1. Pin 1 of U12 is connected to PA5 through a resistor R2, pin 2 of U12 is connected to GND, and pin 3 of U12 is respectively connected to one end of resistor R5 and the base of NPN transistor Q2 through a resistor R3. The emitter of Q2 is respectively connected to the other end of R5 and GND2. The collector of Q2 is respectively connected to the anode of diode D1 and pin 2 of K1. Pin 1 of K1 is respectively connected to +48V, the cathode of D1, and pin 4 of U12.

[0018] Pin 7 of K1 is connected to one end of capacitor C1 and one end of the input of rectifier bridge D3 respectively. The other end of C1 is connected to pin 5 of K1 and +48V respectively through resistor R1. Pin 6 of K1 is connected to L, and pin 4 of K1 is connected to N. Pin 3 of K1 is connected to GND2 and one end of resistor R7 respectively. The other end of R7 is connected to pin 8 of K1 and the other end of D3 input respectively through capacitor C54. The positive pole of D3 output is connected to the positive pole of capacitor C53, pin 2 of IRF1405 tube Q1, and one end of inductor L1 respectively. The other end of L1 is connected to one end of capacitor C2, one end of capacitor C7, and VCC respectively. The negative pole of D3 output is connected to the negative pole of C53, pin 3 of Q1, one end of resistor R4, the other end of C2, the other end of C7, and GND respectively. The other end of R4 is connected to pin 1 of Q1.

[0019] VCC is connected to one end of resistor R11 and the emitter of PNP transistor Q4 respectively. The other end of R11 is connected to the collector of NPN transistor Q6 and the base of Q4 respectively. The base of Q6 is connected to one end of resistor R15 and one end of resistor R19 respectively. The other end of R15 is connected to PB14. The other end of R19 is connected to GND, the emitter of Q6, the anode of diode D6, the negative electrode of capacitor C56, one end of resistor R17, and the negative electrode of battery A respectively. The positive electrode of battery A is connected to one end of resistor R9, the positive electrode of capacitor C56, and one end of inductor L6 respectively. The other end of R9 is connected to PB1 and the other end of R17 respectively through resistor R12. The other end of L6 is connected to the collector of Q4 and the cathode of D6 respectively.

[0020] VCC is connected to one end of resistor R10 and the emitter of PNP transistor Q3 respectively. The other end of R10 is connected to the collector of NPN transistor Q5 and the base of Q3 respectively. The base of Q5 is connected to one end of resistor R14 and one end of resistor R18 respectively. The other end of R14 is connected to PB15. The other end of R18 is connected to GND, the emitter of Q5, the anode of diode D5, the negative electrode of capacitor C55, one end of resistor R16, and the negative electrode of battery B respectively. The positive electrode of battery B is connected to one end of resistor R8, the positive electrode of capacitor C55, and one end of inductor L5 respectively. The other end of R8 is connected to PC0 and the other end of R16 respectively through resistor R13. The other end of L5 is connected to the collector of Q3 and the cathode of D5 respectively.

[0021] As another preferred embodiment, the alarm circuit of the present invention includes a buzzer B1, the positive pole of B1 is connected to +5V, the negative pole of B1 is connected to the collector of NPN transistor Q13, the base of Q13 is respectively connected to one end of resistor R30 and one end of resistor R32, the other end of R30 is connected to PC2, and the other end of R32 is respectively connected to GND and the emitter of Q13.

[0022] As another preferred embodiment, the human-computer interaction part of the present invention includes a key circuit and a display circuit. The key circuit includes switches SW2 to SW5. One end of SW2 to SW5 is connected to PA4, PA6, PA7, and PA5 respectively. The other end of SW2 to SW5 is connected to one end of a resistor R27. The other end of R27 is connected to +3.3V.

[0023] The display circuit includes Header 8X2 interface P6, pin 1 of P6 is connected to GND, pin 3 of P6 is connected to one end of resistor R63 and one end of resistor R64 respectively, the other end of R63 is connected to +3.3V, and the other end of R64 is connected to GND, pins 5, 7, 9, 11, 13, and 15 of P6 are connected to PC8, PD8, PD10, PD12, PD14, and +3.3V respectively, pin 16 of P6 is connected to the collector of NPN transistor Q25, the base of Q25 is connected to one end of resistor R72 and one end of resistor R74 respectively, the other end of R72 is connected to PA11, the other end of R74 is connected to GND and the emitter of Q25 respectively, and +3.3V is connected to GND through capacitor C40.

[0024] As another preferred embodiment, the LED light-emitting diode circuit of the present invention includes light-emitting diodes E1 to E8, the cathodes of E1 to E8 are connected to GND, the anodes of E1 to E8 are respectively connected to one end of resistors R25, R26, R28, R29, R31, R34, R35, and R38, and the other ends of R25, R26, R28, R29, R31, R34, R35, and R38 are respectively connected to PD0, PD1, PD3 to PD7, and PG9.

[0025] As another preferred solution, the WIFI module of the present invention adopts the ESP12F chip U4, pin 1 of U4 is connected to +3.3V through resistor R42, pin 3 of U4 is connected to +3.3V through resistor R47, pins 5, 6, and 7 of U4 are respectively connected to CLK, MISO, and MOSI, and pin 8 of U4 is respectively connected to one end of capacitor C31, the positive electrode of capacitor C32, and +3.3V, and GND is respectively connected to the other end of C31 and the negative electrode of C32;

[0026] Pin 9 of U4 is connected to GND, pin 10 of U4 is connected to CS and one end of resistor R51 respectively, the other end of R51 is connected to GND, pin 15 of U4 is connected to PC12 and CPU_TX respectively through resistor R46, pin 16 of U4 is connected to PD2 and CPU_RX respectively through resistor R43, and pins 1, 2, and 3 of connector P4 are connected to PD2, PC12, and GND respectively.

[0027] As another preferred embodiment, the power supply part of the whole machine described in the present invention includes an LM2576-ADJ chip U5, an LM2576-5.0 chip U7 and an XRE10 / 24S12 chip U11, pin 1 of U5 is respectively connected to +12V, one end of capacitor C36, the positive electrode of capacitor C34, and one end of capacitor C35, pin 5 of U5 is connected to POWER, pin 3 of U5 is connected to GND, pin 2 of U5 is respectively connected to the cathode of diode D10 and one end of inductor L3, and the other end of L3 is respectively connected to the positive electrode of capacitor C39, one end of capacitor C37, and +4.2V, pin 4 of U5 is respectively connected to one end of resistor R56 and one end of resistor R53, and the other end of R53 is connected to +4.2V, and the other end of R56 is respectively connected to GND, the negative electrode of C37, the other end of C39, the anode of D10, the other end of C35, the negative electrode of C34, and the other end of C36;

[0028] Pin 1 of U7 is connected to +12V and the positive electrode of capacitor C41. The negative electrode of C41 is connected to GND, pin 5 of U7, pin 3 of U7, the anode of diode D11, the negative electrode of capacitor C43, and one end of capacitor C42. The cathode of D11 is connected to pin 2 of U7 and one end of inductor L4. The other end of L4 is connected to the positive electrode of C43, pin 4 of U7, the other end of capacitor C42, and +5V.

[0029] +12V is connected to the anode of light-emitting diode E10 through resistor R73, and the cathode of E10 is connected to GND;

[0030] Connect pins 1 and 2 of connector P13 to +24V and GND2 respectively;

[0031] Pin 1 of U11 is connected to GND2 and one end of capacitor C49 respectively. The other end of C49 is connected to +24V and pin 2 of U11 respectively. Pin 5 of U11 is connected to the positive electrode of capacitor C50, one end of capacitor C48 and +12V respectively. Pin 3 of U11 is connected to the negative electrode of capacitor C50 and the other end of capacitor C48 respectively.

[0032] +24V is connected to the anode of diode E11 through resistor R79, and the cathode of E11 is connected to GND2.

[0033] As another preferred embodiment, the present invention also includes an EEPROM part, and the signal transmission port of the EEPROM part is connected to the signal transmission port of the core control part. The EEPROM part adopts a 24C02 chip U6, and pins 1, 2, 3, and 4 of U6 are connected to GND. Pin 5 of U6 is respectively connected to PB0 and one end of resistor R60, and the other end of R60 is respectively connected to one end of resistor R59, +3.3V, one end of capacitor C33, and pin 8 of U6. The other end of C33 is respectively connected to pin 7 of U6 and GND, and the other end of R59 is respectively connected to pin 6 of U6 and PC4.

[0034] As another preferred solution, the present invention further includes an RS485 part, the signal transmission port of the RS485 part is connected to the signal transmission port of the core control part, the RS485 part includes an SP3485 chip U9, pins 9 to 5 of U9 are respectively connected to GND, PA9, PA12, PA10, and +3.3V, pins 3 and 4 of U9 are connected to B, and pins 1 and 2 of U9 are connected to A;

[0035] Pins 5 to 1 of connector P11 are connected to GND, PA9, PA12, PA10, and +3.3V respectively. Pins 1 to 4 of connector P12 are connected to +12V, A, B, and GND respectively. Pins 1 and 2 of connector P14 are connected to A and B respectively.

[0036] As another preferred embodiment, the present invention further includes a solid-state relay circuit, wherein a control signal input port of the solid-state relay circuit is connected to a signal output port of the core control part, and the solid-state relay circuit includes NPN transistors Q22, Q26, and Q27, wherein the collector of Q22 is connected to pin 1 of connector P5, pin 2 of P5 is connected to +12V, the base of Q22 is connected to PC5 via resistor R58, and the emitter of Q22 is connected to GND via resistor R62;

[0037] The collector of Q26 is connected to pin 1 of connector P9, pin 2 of P9 is connected to +12V, the base of Q26 is connected to PC6 through resistor R75, and the emitter of Q26 is connected to GND through resistor R77;

[0038] The collector of Q27 is connected to pin 1 of connector P10, pin 2 of P9 is connected to +12V, the base of Q27 is connected to PE9 through resistor R76, and the emitter of Q27 is connected to GND through resistor R78.

[0039] Secondly, the present invention also includes a gateway part, the signal transmission port of the gateway part is connected to the signal transmission port of the core control part, the gateway part includes a SIM800C chip U3, pins 1 and 2 of U3 are respectively connected to SIM800_TXD and SIM800_RXD, pin 6 of U3 is connected to PC1 through resistor R55, pin 8 of U3 is connected to GND, pins 13, 15 to 19, 21, 24 to 27 of U3 are respectively connected to GND, SIM_DATA, SIM_CLK, SIM_RST, SIM_VDD, GND, GND, USB_BUS, USB_DP, USB_DN, and GND, pin 28 of U3 is connected to GND through capacitor C38; pins 30, 31, and 33 of U3 are connected to GND, pin 32 of U3 is connected to pin 1 of SMA-KE chip J5, and pin 2 of J5 is connected to GND;

[0040] Pin 34 of U3 is connected to pin 35 of U3, one end of capacitor C28, one end of capacitor C26, the positive electrode of capacitor C25, the positive electrode of capacitor C24, the cathode of voltage regulator ZD1, and one end of inductor L2. The other end of L2 is connected to +4.2V.

[0041] Pin 37 of U3 is connected to pin 36 of U3, the other end of capacitor C28, the other end of capacitor C26, the negative electrode of capacitor C25, the negative electrode of capacitor C24, the anode of Zener diode ZD1, and GND respectively;

[0042] Pin 39 of U3 is connected to KEY and the collector of NPN transistor Q18 respectively. The base of Q18 is connected to one end of resistor R40 and one end of resistor R36 respectively. The other end of R36 is connected to PA1. The other end of R40 is connected to GND and the emitter of Q18 respectively. Pin 41 of U3 is connected to the anode of light-emitting diode E9 through resistor R48. The cathode of E9 is connected to GND. Pin 42 of U3 is connected to PA0 through resistor R52.

[0043] In addition, the gateway part of the present invention includes a connector P3, pin 1 of P3 is respectively connected to PA3 and one end of resistor R33, the other end of R33 is connected to SIM800_TXD, pin 2 of P3 is respectively connected to PA2 and one end of resistor R37, the other end of R37 is respectively connected to SIM800_RXD and one end of resistor R39, and the other end of R39 is respectively connected to GND and pin 3 of P3;

[0044] Connect pins 1 to 4 of connector P2 to GND, USB_DN, USB_DP, and USB_BUS respectively;

[0045] The emitter of PNP transistor Q19 is connected to PA2 and one end of resistor R44 respectively. The other end of R44 is connected to +3.3V. The emitter of Q19 is connected to GND. The base of Q19 is connected to SIM800_RXD through resistor R49.

[0046] The emitter of PNP transistor Q20 is connected to PA3 and one end of resistor R45 respectively. The other end of R45 is connected to +3.3V. The emitter of Q20 is connected to GND. The base of Q20 is connected to SIM800_TXD through resistor R50.

[0047] The collector of NPN transistor Q21 is connected to POWER and one end of resistor R54 respectively. The other end of R54 is connected to +5V. The base of Q21 is connected to one end of resistor R57 and one end of resistor R61 respectively. The other end of R61 is connected to GND and the emitter of Q21 respectively. The other end of R57 is connected to the cathode of diode D9. The anode of D9 is connected to PC3.

[0048] Pin 1 of the SIM card slot U8 is connected to GND, pin 2 of U8 is connected to SIM_VDD, one end of capacitor C47, and pin 1 of SMF05C chip U10 respectively, the other end of C47 is connected to GND and pin 2 of U10 respectively, pin 4 of U10 is connected to one end of resistor R67 and pin 4 of U8 respectively, the other end of R67 is connected to SIM_RST and one end of capacitor C44 respectively, the other end of C44 is connected to GND, one end of capacitor C45, and one end of capacitor C46 respectively, the other end of C45 is connected to one end of resistor R66 and SIM_DATA respectively, the other end of C46 is connected to one end of resistor R65 and SIM_CLK respectively, the other end of R66 is connected to pin 6 of U10 and pin 5 of U8 respectively, and the other end of R65 is connected to pin 6 of U8 and pin 5 of U10 respectively.

[0049] The present invention has beneficial effects.

[0050] The present invention can flexibly and accurately control charging and discharging through the mutual cooperation of the inverter part, charging circuit, whole machine power part, core control part, human-computer interaction part and lithium battery pack part, so as to facilitate the rational and reliable use of electric energy. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] The present invention is further described below with reference to the accompanying drawings and specific embodiments. The scope of protection of the present invention is not limited to the following description.

[0052] Figure 1 It is a circuit principle block diagram of the present invention.

[0053] Figure 2 This is the circuit principle diagram of the core control part of the present invention.

[0054] Figure 3 It is a circuit principle diagram of the charging circuit of the present invention.

[0055] Figure 4 This is the circuit principle diagram of the alarm and WiFi parts of the present invention.

[0056] Figure 5 This is a partial circuit schematic of the inverter of the present invention.

[0057] Figure 6 This is a schematic diagram of the power supply circuit of the entire machine of the present invention.

[0058] Figure 7 It is a partial circuit schematic diagram of the solid-state relay of the present invention.

[0059] Figure 8 This is a schematic diagram of the circuit principle of the gateway portion of the present invention.

[0060] Figure 9 It is a square wave waveform diagram of the present invention.

[0061] Figure 10 It is a schematic diagram of the angle adjustment method of the present invention.

[0062] Figure 11 The angle θ in the adjustment cycle under the angle adjustment method of the present invention is t A function curve that changes over time.

[0063] Figure 12 It is a schematic diagram of the rotation angle of the photovoltaic module in two consecutive adjustment cycles of the present invention. DETAILED DESCRIPTION

[0064] As shown in the figure, the present invention includes an inverter part, a charging circuit, a whole-machine power supply part, a core control part, a human-computer interaction part and a lithium battery pack part. The control signal input port of the charging circuit is connected to the control signal output port of the core control part, the power output port of the whole-machine power supply part is respectively connected to the power port of the core control part and the power port of the human-computer interaction part, the signal transmission port of the human-computer interaction part is connected to the signal transmission port of the core control part, the detection signal output port of the charging circuit is connected to the detection signal input port of the core control part, and the lithium battery pack part is connected to the input end of the inverter part.

[0065] The charging circuit uses two charging methods: one is charging the photovoltaic module, and the other is charging the mains, which are converted through relay K1. The power output of the photovoltaic module is connected to a solid-state relay, and the relay is adjusted to control whether the photovoltaic module charges the battery. The mains power output is connected to a solid-state relay to control whether the 220V mains is connected. The output of the inverter is connected to a solid-state relay. The solid-state relay protects the circuit board and can only be turned on or off when the microcontroller issues a command.

[0066] By adjusting the PWM pulse width, the on-off time of the charging circuit switch tube is determined, and the electric energy is controlled to charge the battery;

[0067] The core control part is set to control the mains power to charge the battery pack through the charging circuit during off-peak electricity prices. During peak electricity prices, the battery pack supplies household loads through the inverter part. The excess battery power is connected to the grid through the grid-connected inverter.

[0068] When the battery's stored energy is exhausted, the core control part switches to mains power, or when the electricity price reaches the off-peak period, it automatically switches to the mains direct power supply mode and charges and stores energy.

[0069] It also includes an alarm circuit, and a control signal input port of the alarm circuit is connected to a control signal output port of the core control part.

[0070] It also includes an LED light emitting diode circuit, and a control signal input port of the LED light emitting diode circuit is connected to a control signal output port of the core control part.

[0071] It also includes a WIFI module, and a signal transmission port of the WIFI module is connected to the signal transmission port of the core control part.

[0072] The inverter part includes a light-emitting diode E12 (for displaying operation), NPN transistors Q14 to Q17, and an NPN transistor Q28. The cathode of E12 is respectively connected to one end of capacitor C23, the emitter of Q17, one end of R88, one end of R89, the source of IRF150 tube BG2, the source of IRF150 tube BG1, and GND. The anode of E12 is respectively connected to the other end of C23, one end of resistor R22, one end of resistor R41, one end of resistor R84, one end of resistor R85, one end of resistor R80, one end of resistor R81, the emitter of Q14, and the GND through resistor R83. The emitter is connected to A, the other end of R22 is connected to the collector of Q17 and one end of resistor R87 respectively, the other end of R41 is connected to the collector of Q15 and one end of capacitor C52 respectively, the other end of R84 is connected to the base of Q15 and one end of capacitor C51 respectively, the other end of R85 is connected to the other end of C52 and the base of Q16 respectively, the other end of R80 is connected to the other end of C51 and the collector of Q16 respectively, the other end of R81 is connected to B, the collector of Q28 and one end of resistor R86 respectively, the base of Q14 is connected to C, one end of resistor R82 and the cathode of Schottky diode Z5 respectively;

[0073] The base of Q17 is connected to the other end of R88 and the emitter of Q15 respectively. The emitter of Q16 is connected to the other end of R89 and the base of Q28 respectively. The anode of Z5 is connected to GND. The other end of R82 is connected to the collector of Q14 and one end of switch SW6 respectively. The other end of SW6 is connected to one end of fuse F3 and the center tap of the secondary side of transformer G2A respectively. One end of the secondary side of G2A is connected to the drain of BG1, the other end of the secondary side of G2A is connected to the drain of BG2, the gate of BG1 is connected to the other end of R86, the gate of BG2 is connected to the other end of R87, one end of the primary side of G2A is connected to L, and the other end of the primary side of G2A is connected to N through fuse F4.

[0074] The specific circuit connection mode and parameter setting of the inverter part of the present invention result in low quiescent current.

[0075] like Figure 1 As shown in the figure, the lithium battery pack can increase the 48V voltage to 300V DC through DC / DC and input it to the grid-connected inverter.

[0076] The lithium battery supplies 220V AC power to the load through the inverter. Through the specific circuit connections and parameter settings of the inverter portion of the present invention, the inverter frequency is 300Hz, and the inverter transformer has a small size, weight, and square wave output waveform. It can be used for household lighting during power outages, fluorescent lamps with electronic ballasts, and household appliances with switching power supplies.

[0077] The core control part includes an STM32F103ZET6 chip U1, wherein pins 34 to 37 of U1 are connected to PA0 to PA3 respectively, pins 40 to 43 of U1 are connected to PA4 to PA7 respectively, pins 100 to 105 of U1 are connected to PA8 to PA12 and TMS respectively, pins 109 to 110 of U1 are connected to TCK and PA15 respectively, pins 46 to 48 of U1 are connected to PB0, PB1 and BOOT1 respectively, and pins 133 to 140 of U1 are connected to 12 pins and 136 pins. Pins 69 to 70 of U1 are connected to PB10 to PB11 respectively, pins 73 to 76 of U1 are connected to PB12 to PB15 respectively, pins 26 to 29 of U1 are connected to PC0 to PC3 respectively, pins 44 to 45 of U1 are connected to PC4 to PC5 respectively, pins 96 to 99 of U1 are connected to PC6 to PC9 respectively, pins 111 to 113 of U1 are connected to PC10 to PC12 respectively, and pin 7 of U1 is connected to PC13;

[0078] Pin 8 of U1 is connected to pin 2 of Y1 and one end of capacitor C5 respectively. The other end of C5 is connected to GND and one end of capacitor C6 respectively. The other end of C6 is connected to pin 1 of Y1 and pin 9 of U1 respectively.

[0079] Pins 114 to 119 of U1 are connected to PD0 to PD5 respectively, pins 122 to 123 of U1 are connected to PD6 to PD7 respectively, pins 77 to 82 of U1 are connected to PD8 to PD13 respectively, pins 85 to 86 of U1 are connected to PD14 to PD15 respectively, pin 138 of U1 is connected to BOOT0, pins 16, 38, 51, 61, 71, 83, 94, 107, 120, 130, 143 of U1 are connected to GND, pins 17, 52, 39, 62 of U1 are connected to GND, , 72, 84, 95, 108, 121, 131, 144 pins are connected to +3.3V, U1's 30 pin is connected to GND and one end of capacitor C10 respectively, the other end of C10 is connected to +3.3V, U1's 33 and 32 pins respectively, U1's 31 pin is connected to GND, U1's 25 pin is connected to RESET, U1's 24 pin is connected to one end of capacitor C9 and pin 2 of crystal oscillator Y2 respectively, the other end of C9 is connected to GND and one end of capacitor C8 respectively, the other end of C8 is connected to pin 1 of Y2 and U1's 23 pin respectively;

[0080] U1's pin 6 is connected to VBAT;

[0081] Pin 132 of U1 is connected to PG15, pins 124 to 129 of U1 are connected to pins PG9 to PG14 respectively, pins 87 to 93 of U1 are connected to pins PG2 to PG8 respectively, pins 56 to 57 of U1 are connected to pins PG0 to PG1 respectively, pins 10 to 15, 18 to 22, 49 to 50, and 53 to 55 of U1 are connected to pins PF0 to PF15 respectively, and pins 141 to 142, 1 to 5, 58 to 60, and 63 to 68 of U1 are connected to pins PE0 to PE15 respectively.

[0082] The +3.3V is connected to one end of C11~C22 respectively, and the other ends of C11~C22 are connected to GND; +3.3V is connected to RESET, one end of switch SW1, and one end of capacitor C4 respectively through resistor R6, and the other end of C4 is connected to GND and the other end of SW1 respectively; pins 1 to 4 of connector P1 are connected to +5V, PC10, PC11, and GND respectively; +3.3V is connected to the anode of diode D22, and the cathode of D22 is connected to VBAT, the cathode of diode D24, and one end of capacitor C3 respectively, and the other end of C3 is connected to GND. The anode of D24 is connected to the positive pole of battery BAT, and the negative pole of BAT is connected to GND.

[0083] The +3.3V is connected to pin 2 of REG1117-3.3 chip U2, one end of capacitor C29, and the positive electrode of capacitor C27 respectively. The other end of C29 is connected to the negative electrode of C27, GND, pin 1 of U2, and the negative electrode of capacitor C30 respectively. The positive electrode of C30 is connected to +5V and pin 3 of U2 respectively.

[0084] The charging circuit includes a P521 chip U12 and a LY2N-JDC48V collector K1. Pin 1 of U12 is connected to PA5 through a resistor R2, and pin 2 of U12 is connected to GND. Pin 3 of U12 is connected to one end of resistor R5 and the base of NPN transistor Q2 through a resistor R3. The emitter of Q2 is connected to the other end of R5 and GND2. The collector of Q2 is connected to the anode of diode D1 and pin 2 of K1. Pin 1 of K1 is connected to +48V, the cathode of D1, and pin 4 of U12.

[0085] Pin 7 of K1 is connected to one end of capacitor C1 and one end of the input of rectifier bridge D3 respectively. The other end of C1 is connected to pin 5 of K1 and +48V respectively through resistor R1. Pin 6 of K1 is connected to L, and pin 4 of K1 is connected to N. Pin 3 of K1 is connected to GND2 and one end of resistor R7 respectively. The other end of R7 is connected to pin 8 of K1 and the other end of D3 input respectively through capacitor C54. The positive pole of D3 output is connected to the positive pole of capacitor C53, pin 2 of IRF1405 tube Q1, and one end of inductor L1 respectively. The other end of L1 is connected to one end of capacitor C2, one end of capacitor C7, and VCC respectively. The negative pole of D3 output is connected to the negative pole of C53, pin 3 of Q1, one end of resistor R4, the other end of C2, the other end of C7, and GND respectively. The other end of R4 is connected to pin 1 of Q1.

[0086] VCC is connected to one end of resistor R11 and the emitter of PNP transistor Q4 respectively. The other end of R11 is connected to the collector of NPN transistor Q6 and the base of Q4 respectively. The base of Q6 is connected to one end of resistor R15 and one end of resistor R19 respectively. The other end of R15 is connected to PB14. The other end of R19 is connected to GND, the emitter of Q6, the anode of diode D6, the negative electrode of capacitor C56, one end of resistor R17, and the negative electrode of battery A respectively. The positive electrode of battery A is connected to one end of resistor R9, the positive electrode of capacitor C56, and one end of inductor L6 respectively. The other end of R9 is connected to PB1 and the other end of R17 respectively through resistor R12. The other end of L6 is connected to the collector of Q4 and the cathode of D6 respectively.

[0087] VCC is connected to one end of resistor R10 and the emitter of PNP transistor Q3 respectively. The other end of R10 is connected to the collector of NPN transistor Q5 and the base of Q3 respectively. The base of Q5 is connected to one end of resistor R14 and one end of resistor R18 respectively. The other end of R14 is connected to PB15. The other end of R18 is connected to GND, the emitter of Q5, the anode of diode D5, the negative electrode of capacitor C55, one end of resistor R16, and the negative electrode of battery B respectively. The positive electrode of battery B is connected to one end of resistor R8, the positive electrode of capacitor C55, and one end of inductor L5 respectively. The other end of R8 is connected to PC0 and the other end of R16 respectively through resistor R13. The other end of L5 is connected to the collector of Q3 and the cathode of D5 respectively.

[0088] PB1 and PC0 are used to detect the battery status.

[0089] The input end of the voltage stabilizer is connected to the power output end of the photovoltaic module, and the output end of the voltage stabilizer is connected to +48V.

[0090] The battery of this invention can be charged in two ways: by photovoltaic modules and by mains power. This is achieved through K1. The photovoltaic module power output is connected to a solid-state relay, which regulates whether the photovoltaic module charges the battery. The mains power output is also connected to a solid-state relay, which controls whether the 220V mains power is connected. The inverter output is also connected to a solid-state relay. The solid-state relay protects the circuit board, requiring the microcontroller to initiate a command to turn it on or off, thus preventing sudden current surges that could damage components.

[0091] PWM charging control is performed on the battery through PB14 and PB15. The two battery groups are charged complementary through PWM charging control.

[0092] The alarm circuit (the buzzer sounds once when the power is turned on, and then turns off after 0.5s. The buzzer sounds twice for 0.5s, stops for 0.5s, and then sounds for 0.5s when the photovoltaic module is charging. It sounds three times when the mains is charging, and twice when the charging is completed, each time for 1s, with an interval of 0.5s. If an error occurs: the control charge and discharge fails, and the buzzer sounds long) includes a buzzer B1, the positive pole of B1 is connected to +5V, the negative pole of B1 is connected to the collector of the NPN transistor Q13, the base of Q13 is respectively connected to one end of the resistor R30 and one end of the resistor R32, the other end of R30 is connected to PC2, and the other end of R32 is respectively connected to GND and the emitter of Q13.

[0093] The human-computer interaction part includes a key circuit and a display circuit. The key circuit includes switches SW2 to SW5. One end of SW2 to SW5 is connected to PA4, PA6, PA7, and PA5 respectively. The other end of SW2 to SW5 is connected to one end of resistor R27. The other end of R27 is connected to +3.3V.

[0094] The display circuit includes the Header 8X2 interface (external display screen) P6, pin 1 of P6 is connected to GND, pin 3 of P6 is connected to one end of resistor R63 and one end of resistor R64 respectively, the other end of R63 is connected to +3.3V, and the other end of R64 is connected to GND, pins 5, 7, 9, 11, 13, and 15 of P6 are connected to PC8, PD8, PD10, PD12, PD14, and +3.3V respectively, pin 16 of P6 is connected to the collector of NPN transistor Q25, the base of Q25 is connected to one end of resistor R72 and one end of resistor R74 respectively, the other end of R72 is connected to PA11, the other end of R74 is connected to GND and the emitter of Q25 respectively, and +3.3V is connected to GND through capacitor C40.

[0095] The LED light-emitting diode circuit includes light-emitting diodes E1 to E8 (E1 circuit board lights up when it is powered on and goes out when it is powered off. E2 indicates the working status, and the buzzer sounds long when an error occurs. E2 flashes with a flashing frequency of 30 Hz. E3 is long-lit when the mains power is charging the battery pack, E4 is long-lit when the component is charging the battery, E5 is long-lit when the battery supplies power to the load through the inverter circuit, E6 is long-lit when the battery pack has excess power connected to the grid, and E7 and E8 are used during testing). The cathodes of E1 to E8 are connected to GND, and the anodes of E1 to E8 are respectively connected to one end of resistors R25, R26, R28, R29, R31, R34, R35, and R38. The other ends of R25, R26, R28, R29, R31, R34, R35, and R38 are respectively connected to PD0, PD1, PD3 to PD7, and PG9.

[0096] The WIFI module uses the ESP12F chip U4. Pin 1 of U4 is connected to +3.3V through a resistor R42 (0R for circuit protection, acting as a low-cost fuse). Pin 3 of U4 is connected to +3.3V through a resistor R47. Pins 5, 6, and 7 of U4 are connected to CLK, MISO, and MOSI respectively. Pin 8 of U4 is connected to one end of capacitor C31, the positive electrode of capacitor C32, and +3.3V respectively. GND is connected to the other end of C31 and the negative electrode of capacitor C32 respectively.

[0097] Pin 9 of U4 is connected to GND, pin 10 of U4 is connected to CS and one end of resistor R51 respectively, the other end of R51 is connected to GND, pin 15 of U4 is connected to PC12 and CPU_TX respectively through resistor R46, pin 16 of U4 is connected to PD2 and CPU_RX respectively through resistor R43, and pins 1, 2, and 3 of connector P4 are connected to PD2, PC12, and GND respectively.

[0098] Setting up the WIFI module facilitates wireless control of the device by mobile phone or computer (controlling when to charge and when to discharge, charging mode, and checking battery power consumption), remote control and device status query.

[0099] The power supply of the whole machine includes an LM2576-ADJ chip U5, an LM2576-5.0 chip U7 and an XRE10 / 24S12 chip U11. Pin 1 of U5 is respectively connected to +12V, one end of capacitor C36, the positive electrode of capacitor C34, and one end of capacitor C35. Pin 5 of U5 is connected to POWER, and pin 3 of U5 is connected to GND. Pin 2 of U5 is respectively connected to the cathode of diode D10 and one end of inductor L3. The other end of L3 is respectively connected to the positive electrode of capacitor C39, one end of capacitor C37, and +4.2V. Pin 4 of U5 is respectively connected to one end of resistor R56 and one end of resistor R53. The other end of R53 is connected to +4.2V. The other end of R56 is respectively connected to GND, the negative electrode of C37, the other end of C39, the anode of D10, the other end of C35, the negative electrode of C34, and the other end of C36.

[0100] Pin 1 of U7 is connected to +12V and the positive electrode of capacitor C41. The negative electrode of C41 is connected to GND, pin 5 of U7, pin 3 of U7, the anode of diode D11, the negative electrode of capacitor C43, and one end of capacitor C42. The cathode of D11 is connected to pin 2 of U7 and one end of inductor L4. The other end of L4 is connected to the positive electrode of C43, pin 4 of U7, the other end of capacitor C42, and +5V.

[0101] +12V is connected to the anode of light-emitting diode E10 through resistor R73, and the cathode of E10 is connected to GND;

[0102] Connect pins 1 and 2 of connector P13 to +24V and GND2 respectively;

[0103] Pin 1 of U11 is connected to GND2 and one end of capacitor C49 respectively. The other end of C49 is connected to +24V and pin 2 of U11 respectively. Pin 5 of U11 is connected to the positive electrode of capacitor C50, one end of capacitor C48 and +12V respectively. Pin 3 of U11 is connected to the negative electrode of capacitor C50 and the other end of capacitor C48 respectively.

[0104] +24V is connected to the anode of diode E11 through resistor R79, and the cathode of E11 is connected to GND2.

[0105] It also includes an EEPROM part. The signal transmission port of the EEPROM part is connected to the signal transmission port of the core control part. The EEPROM part uses a 24C02 chip U6. Pins 1, 2, 3, and 4 of U6 are connected to GND. Pin 5 of U6 is respectively connected to PB0 and one end of resistor R60. The other end of R60 is respectively connected to one end of resistor R59, +3.3V, one end of capacitor C33, and pin 8 of U6. The other end of C33 is respectively connected to pin 7 of U6 and GND. The other end of R59 is respectively connected to pin 6 of U6 and PC4.

[0106] It also includes an RS485 part, the signal transmission port of the RS485 part is connected to the signal transmission port of the core control part, the RS485 part includes an SP3485 chip U9, pins 9 to 5 of U9 are respectively connected to GND, PA9, PA12, PA10, and +3.3V, pins 3 and 4 of U9 are connected to B, and pins 1 and 2 of U9 are connected to A;

[0107] Connector P11's pins 5 through 1 connect to GND, PA9, PA12, PA10, and +3.3V, respectively. Connector P12's pins 1 through 4 connect to +12V, A, B, and GND, respectively. Connector P14's pins 1 and 2 connect to A and B, respectively. A and B are debugging and maintenance interfaces, allowing you to query the microcontroller's status and send commands via 485 communication.

[0108] It also includes a solid-state relay circuit, wherein a control signal input port of the solid-state relay circuit is connected to a signal output port of the core control part, and the solid-state relay circuit includes NPN transistors Q22, Q26, and Q27, wherein the collector of Q22 is connected to pin 1 of connector P5, pin 2 of P5 is connected to +12V, the base of Q22 is connected to PC5 via resistor R58, and the emitter of Q22 is connected to GND via resistor R62;

[0109] The collector of Q26 is connected to pin 1 of connector P9, pin 2 of P9 is connected to +12V, the base of Q26 is connected to PC6 through resistor R75, and the emitter of Q26 is connected to GND through resistor R77;

[0110] The collector of Q27 is connected to pin 1 of connector P10, pin 2 of P9 is connected to +12V, the base of Q27 is connected to PE9 through resistor R76, and the emitter of Q27 is connected to GND through resistor R78.

[0111] It also includes a gateway part, the signal transmission port of the gateway part is connected to the signal transmission port of the core control part, the gateway part includes a SIM800C chip U3, U3's 1 and 2 pins are respectively connected to SIM800_TXD and SIM800_RXD, U3's 6 pin is connected to PC1 through a resistor R55, U3's 8 pin is connected to GND, U3's 13, 15 to 19, 21, 24 to 27 pins are respectively connected to GND, SIM_DATA, SIM_CLK, SIM_RST, SIM_VDD, GND, GND, USB_BUS, USB_DP, USB_DN, GND, U3's 28 pin is connected to GND through a capacitor C38; U3's 30, 31, and 33 pins are connected to GND, U3's 32 pin is connected to SMA-KE chip J5's 1 pin, and J5's 2 pin is connected to GND;

[0112] Pin 34 of U3 is connected to pin 35 of U3, one end of capacitor C28, one end of capacitor C26, the positive electrode of capacitor C25, the positive electrode of capacitor C24, the cathode of voltage regulator ZD1, and one end of inductor L2. The other end of L2 is connected to +4.2V.

[0113] Pin 37 of U3 is connected to pin 36 of U3, the other end of capacitor C28, the other end of capacitor C26, the negative electrode of capacitor C25, the negative electrode of capacitor C24, the anode of Zener diode ZD1, and GND respectively;

[0114] Pin 39 of U3 is connected to KEY and the collector of NPN transistor Q18 respectively. The base of Q18 is connected to one end of resistor R40 and one end of resistor R36 respectively. The other end of R36 is connected to PA1. The other end of R40 is connected to GND and the emitter of Q18 respectively. Pin 41 of U3 is connected to the anode of light-emitting diode E9 (indicator chip is working) through resistor R48. The cathode of E9 is connected to GND. Pin 42 of U3 is connected to PA0 through resistor R52.

[0115] The gateway part includes a connector P3, wherein pin 1 of P3 is connected to PA3 and one end of resistor R33 respectively, and the other end of R33 is connected to SIM800_TXD. Pin 2 of P3 is connected to PA2 and one end of resistor R37 respectively, and the other end of R37 is connected to SIM800_RXD and one end of resistor R39 respectively, and the other end of R39 is connected to GND and pin 3 of P3 respectively.

[0116] Pins 1 to 4 of connector P2 are connected to GND, USB_DN, USB_DP, and USB_BUS respectively; P2 is used for SIM card upgrade.

[0117] The emitter of PNP transistor Q19 is connected to PA2 and one end of resistor R44 respectively. The other end of R44 is connected to +3.3V. The emitter of Q19 is connected to GND. The base of Q19 is connected to SIM800_RXD through resistor R49.

[0118] The emitter of PNP transistor Q20 is connected to PA3 and one end of resistor R45 respectively. The other end of R45 is connected to +3.3V. The emitter of Q20 is connected to GND. The base of Q20 is connected to SIM800_TXD through resistor R50.

[0119] The collector of NPN transistor Q21 is connected to POWER and one end of resistor R54 respectively. The other end of R54 is connected to +5V. The base of Q21 is connected to one end of resistor R57 and one end of resistor R61 respectively. The other end of R61 is connected to GND and the emitter of Q21 respectively. The other end of R57 is connected to the cathode of diode D9. The anode of D9 is connected to PC3.

[0120] Pin 1 of the SIM card slot U8 is connected to GND, pin 2 of U8 is connected to SIM_VDD, one end of capacitor C47, and pin 1 of SMF05C chip U10 respectively, the other end of C47 is connected to GND and pin 2 of U10 respectively, pin 4 of U10 is connected to one end of resistor R67 and pin 4 of U8 respectively, the other end of R67 is connected to SIM_RST and one end of capacitor C44 respectively, the other end of C44 is connected to GND, one end of capacitor C45, and one end of capacitor C46 respectively, the other end of C45 is connected to one end of resistor R66 and SIM_DATA respectively, the other end of C46 is connected to one end of resistor R65 and SIM_CLK respectively, the other end of R66 is connected to pin 6 of U10 and pin 5 of U8 respectively, and the other end of R65 is connected to pin 6 of U8 and pin 5 of U10 respectively.

[0121] The working process of the present invention will be described below with reference to the accompanying drawings.

[0122] The input power supply (mains or photovoltaic panels) is selected through K1, and the on-off time of the switch tubes Q3~Q6 is determined by adjusting the PWM pulse width. The duty cycle is adjusted by the PWM pulse width output by the PB14 and PB15 pins, thereby controlling the on-off time of the switch tube and controlling the electric energy to charge the battery.

[0123] The charging frequency is controlled by PB14 and PB15 of the CPU. When controlling the on-off time, the MCU outputs PWM pulses in the form of complementary square waves. Figure 10 ( Figure 10 The A and B tubes in the circuit correspond to Q3 and Q4 in the circuit diagram respectively).

[0124] The energy storage battery capacity can be 48V 100Ah. In order to reduce electricity costs, the battery should be charged during off-peak electricity prices. Off-peak electricity prices only last for a few hours. If you want to fully charge the battery, you must use a high current to charge the battery. This has two disadvantages. First, the battery temperature will rise, which will affect the battery life over time. Second, if you keep charging with a high current, the battery will be in a virtual full state, which is virtual power. We use two 48V 50Ah batteries (such as Figure 3 As shown in the figure, the battery A and battery B are charged by PWM pulse charging. PWM is a digital circuit with high and low level control. The output is a rectangular wave (such as Figure 9(as shown). Conventional pulse charging requires a rest period for the batteries; they cannot be charged continuously. Alternating charging of the two batteries allows the batteries to rest. When charging Group A, PB14 is high, Group B is not charging, and PB15 is low. The same applies to charging Group B. This alternating charging method allows for high-current charging while also providing the batteries with a rest period. Experimental measurements have shown that this charging method can shorten charging time by 20% to 43%. This allows the batteries to be fully charged during off-peak electricity prices, maximizing profitability. Furthermore, charging is controlled by switching on and off, while discharging, both batteries simultaneously power the load, without disrupting normal user experience.

[0125] The battery pack voltage is 48V, and charging is performed using a constant-current-to-constant-voltage mode. The duty cycle is adjusted to 50%, and the pulse frequency is 1000Hz, resulting in a 1C charge rate for the lithium battery. This is constant-current charging mode. When the battery pack voltage reaches 40V, constant-voltage charging is immediately initiated. The controller output pin immediately reduces the duty cycle and pulse width to 25%, with a pulse frequency of 100kHz, entering trickle charging mode. This configuration reduces charging time and increases battery life.

[0126] The device reads the configuration information. If the user has a local WIFI router that can be connected to the external network, the device of the present invention connects to the external network according to the account and password of the user's device. If it is not set or the setting fails, the device of the present invention uses GPRS to connect to the external network through the gateway part and issues a prompt to allow the user to set up WIFI.

[0127] After establishing a connection with the server, first obtain the current Beijing time reference through the server to set the time for the local real-time clock, then obtain the local peak and valley time list through the server, save it in the local FLASH, and enter the function polling. The minute timing interrupt is generated by the internal precise RTC clock. Every time the interrupt comes, the time is judged to see if the peak and valley action time has been reached. If the time trigger threshold is reached, the corresponding peak and valley action is performed. The device of the present invention will shake hands with the server once every ten minutes to obtain new configuration information. If the server sends a new configuration, the original information will be overwritten, and the current running configuration information will be refreshed, the real-time clock will be calibrated, and the local status data will be uploaded, including the current peak and valley start-up deadline, the current remaining capacity of the lithium battery pack, the inverter output power, the current status of the device, and the mode temperature parameters. The core control part sends data through ESP12F (when there is a WiFi network), and relies on the SIM card if there is no WiFi.

[0128] It can be set to control the mains power to charge the battery pack through the charging circuit during valley electricity prices. During peak electricity prices, the battery pack partially supplies household loads through the inverter. The excess battery power can be connected to the grid through the DC / DC to bring the voltage within the MPPT (maximum power point tracking) voltage range of the grid-connected inverter.

[0129] When the stored electrical energy is exhausted (detected through voltage and current acquisition), the core control part switches to mains power (through solid-state relays), or when the valley electricity price period is reached, it automatically switches to the mains direct power supply mode and charges and stores energy.

[0130] In the initial use of the device of the present invention, the core control part can record the user's load characteristics (by collecting the voltage and current of the battery, calculating the status of the battery pack every day, whether there is a lot of remaining power or the battery power is insufficient and the load has to be supplied by the mains every day, and after calculating for a period of time, adjusting by increasing or reducing the battery capacity), and send the data to the cloud server via WIFI or GPRS data to analyze the load characteristics and calculate the optimal energy storage battery configuration (by collecting the voltage and current of the battery, calculating the status of the battery pack every day, whether there is a lot of remaining power or the battery power is insufficient and the load has to be supplied by the mains every day, and adjusting by increasing or reducing the battery capacity after a period of time). The staff will come to configure the battery (replace the battery pack) to meet the full-order peak and valley leveling (adjust the battery capacity and finally reach full charge at the valley electricity price, and rely on the battery to output the load at the peak electricity price), and ensure the medium and shallow discharge depth (the single-chip microcomputer can read the battery status, adjust the discharge depth, and increase the battery life. After discharging to 80% of the battery capacity, the solid-state relay will control and stop the battery discharge) to maintain the battery life.

[0131] Initial parameters can be set for the grid-connected inverter's output power threshold T1, battery internal resistance threshold T2, battery pack upper voltage limit T3, and battery pack lower voltage limit T4. The system then collects the AC voltage U output from the grid-connected inverter. If U > 265V, the system checks whether the internal resistance of each battery is greater than T2. If so, the LCD displays a message indicating that a battery has excessive internal resistance and needs replacement, along with the serial number of the battery to be replaced. The system then enters a test cycle and waits. If it is less than T2, the system checks whether the battery pack voltage is less than T3. If so, charging stops and the system enters a test cycle and waits. If it is greater than T3, charging begins. The system continues collecting the AC voltage U. If U > 250V, the system repeats the above steps. If U < 250V, charging stops and the system enters a test cycle and waits.

[0132] If U < 265V, determine whether U is less than 240V. If U > 240V, stop discharging the battery to the grid-connected inverter and enter a detection cycle waiting period. If U < 240V, collect the grid-connected inverter output power value. If the grid-connected inverter output power is greater than threshold T1, stop discharging the battery to the grid-connected inverter and enter a detection cycle waiting period. If the grid-connected inverter output power is less than threshold T1, determine whether the battery pack voltage is greater than T4. If it is not greater than T4, stop discharging the battery to the grid-connected inverter and enter a detection cycle waiting period. If it is greater than T4, control the battery pack to start discharging to the grid-connected inverter and repeat the above steps. After each detection cycle waiting period, repeat the above loop procedure to execute the steps for overvoltage regulation.

[0133] The automatic tracking photovoltaic power generation system of the photovoltaic module of the present invention can adopt the angle-advanced photovoltaic system adjustment method. The angle-advanced photovoltaic system adjustment method is as follows: Figure 10 As shown in the figure, the dotted line represents the normal direction of the photovoltaic module, and the arrows at a1, a2, b1, and b2 represent the direction of solar radiation (a1 and a2 represent the direction of solar radiation at the start of each adjustment cycle, and b1 and b2 represent the direction of solar radiation at the end of each adjustment cycle). At the start time, the normal direction 1 of the photovoltaic module leads the solar radiation direction a1, and the leading angle is θ s1 / 2. In the first adjustment cycle t s During this time, the direction of solar radiation gradually changes from direction a1 to direction b1, and the angle between the normal direction of the photovoltaic module and the direction of solar radiation changes from θ s1 / 2 gradually changes to 0, and then gradually changes to θ s1 / 2. In the first adjustment cycle t s At the end of the time, adjust the rotation angle of the photovoltaic module (θ s1 / 2+θ s2 / 2), so that the normal direction of the photovoltaic module is turned from position 1 to position 2. At this time, the normal direction 2 of the photovoltaic module is ahead of the solar radiation direction b1, and the leading angle is θ s2 / 2. Then it enters the next adjustment cycle. The solar radiation direction b1 at the end of the previous cycle is the solar radiation direction a2 at the start of the next cycle. In the second adjustment cycle t s During this time, the solar radiation direction gradually changes from direction a2 to direction b2. In the second adjustment cycle t s At the end of the time, adjust the rotation angle of the photovoltaic module (θ s2 / 2+θ s3 / 2), so that the normal direction of the photovoltaic module is turned from position 2 to position 3. At this time, the normal direction 3 of the photovoltaic module is ahead of the solar radiation direction b2, and the leading angle is θ s3 / 2. The PV panel angle adjustment process in each subsequent cycle is similar.

[0134] At the beginning of the regulation cycle, the normal direction of the photovoltaic module leads the solar radiation direction by an angle of θ sn / 2(θ sn is the angle adjustment step, n represents the angle adjustment step in the nth adjustment cycle), at the end of the adjustment cycle, the angle of the normal direction of the photovoltaic module lags behind the solar radiation direction by θ sn / 2. Adjust the angle θ within the cycle t The function curve that changes with time is as follows Figure 11 shown.

[0135] In the first half of the adjustment cycle 0~t s The angle θ between the solar radiation direction and the normal direction of the photovoltaic module within 2 hours t The functional relationship with time t is:

[0136]

[0137] In the second half of the regulation cycle t s / 2~t s The angle θ between the solar radiation direction and the normal direction of the photovoltaic module within a certain time period t The functional relationship with time t is:

[0138]

[0139] In the adjustment period t s The average angle between the normal direction of the photovoltaic module and the direction of solar radiation during the time period is:

[0140]

[0141] In the adjustment period t s The average angle between the normal direction of the photovoltaic module and the direction of solar radiation during the time is θ sn / 4.

[0142] Photovoltaic module power generation G = P × R × T

[0143] Where G is the power generation of the photovoltaic module (unit: kW·h), P is the peak power of the photovoltaic module (unit: kWp), and R is the solar radiation intensity received by the photovoltaic module (unit: kW / m 2 ), T is time (unit: h).

[0144] in:

[0145] R=R t ×COSθ t

[0146] Where θ t is the function of the angle between the solar radiation direction and the normal direction of the photovoltaic module over time (unit: °); Rt is the function of the change of irradiation intensity over time (unit: kW / m 2 ).

[0147] Adjustment period t s For 1 / 3 hour (20 minutes), the angle adjustment step θ s The total power P of the photovoltaic modules is 10kWp.

[0148] The power generation is calculated as follows.

[0149]

[0150] In the first half of the cycle (time t changes from 0 to 1 / 6 hour), the angle between the normal direction of the photovoltaic module and the solar radiation direction gradually decreases from 2.5 degrees to 0 degrees, θ t The functional relationship with time t is:

[0151]

[0152] In the second half of the cycle (time t changes from 1 / 6 hour to 1 / 3 hour), the angle between the normal direction of the photovoltaic module and the direction of solar radiation gradually increases from 0 degrees to 2.5 degrees. t The functional relationship with time t is:

[0153]

[0154] The changes of the radiation intensity function with time in the ultra-short term (which can be 15 minutes to 4 hours) include: 1. The radiation intensity remains unchanged; 2. The radiation intensity increases monotonically; 3. The radiation intensity decreases monotonically; 4. The radiation intensity decreases first and then increases; 5. The radiation intensity increases first and then decreases; 6. The radiation intensity increases first, then decreases, and then increases again; 7. The radiation intensity decreases first, then increases, and then decreases again.

[0155] The following uses seven irradiance intensity change functions to represent the seven changes mentioned above, and calculates the power generation of the photovoltaic modules using the photovoltaic system angle adjustment method of the present invention:

[0156] (1) The irradiation intensity remains unchanged

[0157] R t =r

[0158] Where r = 0.8kW / m 2 ;

[0159]

[0160] (2) Irradiation intensity increases monotonically

[0161] R t =r+kt

[0162] Where r = 0.8kW / m2 , k = 0.6;

[0163]

[0164] (3) Irradiation intensity decreases monotonically

[0165] R t =r-kt

[0166] Where r = 0.8kW / m 2 , k = 0.6;

[0167]

[0168] (4) Irradiation intensity first decreases and then increases

[0169] R t =r+mcos(nt)

[0170] Where r = 0.8kW / m 2 , m = 0.2, n = 6π;

[0171]

[0172] (5) Irradiation intensity increases first and then decreases

[0173] R t =r+mcos(nt+c)

[0174] Where r = 0.8kW / m 2 , m=0.2, n=6π, c=π;

[0175]

[0176] (6) The irradiation intensity first increases, then decreases, and then increases again R t =r+msin(nt)

[0177] Where r = 0.8kW / m 2 , m = 0.2, n = 6π;

[0178]

[0179] (7) Irradiation intensity first decreases, then increases, and then decreases again

[0180] R t =r+msin(nt+c)

[0181] Where r = 0.8kW / m 2 , m=0.2, n=6π, c=π;

[0182]

[0183] In the present invention, the average angle between the normal direction of the photovoltaic module and the solar radiation direction is small during the adjustment period, and the amount of power generated by the photovoltaic module is large.

[0184] The rotation angle of the photovoltaic module in each adjustment is (θ s1 / 2+θ s2 / 2)(e.g. Figure 10 As shown), the normal direction of the photovoltaic module is kept at a position corresponding to 1 / 2 of the angle adjustment step in the adjustment cycle.

[0185] The endpoint of each adjustment is not fixed at half the angle adjustment step. Each adjustment cycle is divided into two time zones: time zone a, when the PV module normal direction leads the solar radiation direction, and time zone b, when the PV module normal direction lags the solar radiation direction. The PV module power generation during these two time zones is collected, and the position of the PV module normal direction after the next angle adjustment is adjusted based on the ratio of the PV module power generation between the two time zones, so that the PV module normal direction after the next adjustment is offset toward the time zone with higher power generation.

[0186] like Figure 12 The figure shows the rotation angle of photovoltaic modules in two consecutive adjustment cycles. The adjustment cycle length t s The angle adjustment steps of the two adjustment cycles are θ s1 and θ s12 In the figure, numbers 1 and 2 represent the normal directions of the photovoltaic modules in the two adjustment cycles, a1 and a2 represent the solar radiation directions at the start of the two adjustment cycles, and b1 and b2 represent the solar radiation directions at the end of the two adjustment cycles. s1a and θ s2a are the angles at which the normal direction of the photovoltaic module leads the solar radiation direction at the beginning of the two adjustment cycles, θ s1b and θ s2b They are the angles at which the normal direction of the photovoltaic module lags behind the solar radiation direction at the end of the two adjustment cycles.

[0187] At the start time, the normal direction 1 of the photovoltaic module leads the solar radiation direction a1, and the leading angle is θ s1a In the first adjustment cycle t s During this time, the direction of solar radiation gradually changes from direction a1 to direction b1, and the angle between the normal direction of the photovoltaic module and the direction of solar radiation changes from the leading angle θ to s1a Gradually changes to 0, and then gradually changes to the hysteresis angle θ s1b In the first adjustment cycle t s At the end of the time, adjust the rotation angle of the photovoltaic module (θ s1b +θ s2a), the normal direction of the photovoltaic module is turned from position 1 to position 2. At this time, the normal direction 2 of the photovoltaic module is ahead of the solar radiation direction b1, and the leading angle is θ s2a Then it enters the next adjustment cycle. The solar radiation direction b1 at the end of the previous cycle is the solar radiation direction a2 at the start of the next cycle. In the second adjustment cycle t s During this time, the direction of solar radiation gradually changes from direction a2 to direction b2, and the angle between the normal direction of the photovoltaic module and the direction of solar radiation changes from the leading angle θ to s2a Gradually changes to 0, and then gradually changes to the hysteresis angle θ s2b .

[0188] G 1a G is the power generation of the photovoltaic module during the time when the normal direction of the photovoltaic module leads the direction of solar radiation in the first cycle, 1b K is the power generation of the photovoltaic module during the time when the normal direction of the photovoltaic module lags behind the solar radiation direction in the first cycle. 1ab For the first cycle G 1a With G 1b The ratio, K 1ba For the first cycle G 1b With G 1a The ratio of △G ab is the power generation adjustment value from the leading time zone to the lagging time zone in the first cycle, △G ba is the power generation adjustment value from the lag time zone to the advance time zone in the first cycle, △θ 1ab △θ is the angle adjustment value from the leading time zone to the lagging time zone in the first cycle, 1ba It is the angle adjustment value from the lag time zone to the advance time zone in the first cycle.

[0189] According to the first cycle G 1a With G 1bBased on the relative size and proportional relationship of the solar radiation, an angle calculation is performed for the first cycle. When the power generation in the lead and lag time zones is adjusted to be the same, an angle adjustment value is calculated (due to the randomness of solar radiation changes, the relationship between power generation and angle is simplified to a linear proportional relationship for calculation). Based on this angle adjustment value and the size of the angles in the lead and lag time zones of the first cycle, the angle by which the normal direction of the PV module leads the solar radiation direction in the second cycle is calculated, and the angle by which the PV module should be adjusted is determined. When the normal direction of the PV module is at 1 / 2 of the angle interval of the cycle, if the solar radiation in the lead and lag time zones is unequal, if the normal direction of the PV module is shifted toward the time interval with greater solar radiation, the PV module will generate more power within the same adjustment cycle. After adopting this preferred adjustment method, the normal direction of the photovoltaic module is not fixed at the position of 1 / 2 of the next cycle angle interval after each adjustment, but is dynamically adjusted according to the ratio of the photovoltaic module power generation in the leading time zone and the lagging time zone in the previous cycle (that is, the ratio of the solar radiation received by the photovoltaic module), so that the normal position of the photovoltaic module is offset to the time zone with higher photovoltaic module power generation. This adjustment can obtain more power generation.

[0190] (1) When the power generation in the leading time zone is greater than the power generation in the lagging time zone in the first cycle (G 1a >G 1b ),

[0191]

[0192] G 1a -ΔG ab =G 1b +ΔG ab

[0193]

[0194]

[0195] Calculate the angle that the photovoltaic module should be rotated to adjust:

[0196]

[0197]

[0198] By θ s2a +θ s2b =θ s2 have to so The rotation angle should be

[0199] (2) When the power generation in the leading time zone is less than the power generation in the lagging time zone in the first cycle (G 1a <G 1b ),

[0200]

[0201] G 1a +ΔG ba =G 1b -ΔG ba

[0202]

[0203]

[0204] Calculate the angle that the photovoltaic module should be rotated to adjust:

[0205]

[0206]

[0207] By θ s2a +θ s2b =θ s2 have to

[0208] so

[0209] The rotation angle should be

[0210] (3) When the power generation in the leading time zone is equal to the power generation in the lagging time zone in the first cycle (G 1a =G 1b ), calculate the angle that the photovoltaic module should be rotated to adjust:

[0211]

[0212] By θ s2a +θ s2b =θ s2 have to

[0213] so

[0214] The rotation angle should be

[0215] It can be understood that the above specific description of the present invention is only used to illustrate the present invention and is not limited to the technical solutions described in the embodiments of the present invention. Those skilled in the art should understand that the present invention can still be modified or replaced by equivalents to achieve the same technical effects; as long as the use requirements are met, they are within the scope of protection of the present invention.

Claims

1. The dispatching energy storage system includes an inverter part, a charging circuit, a whole machine power supply part, a core control part, a human-computer interaction part and a lithium battery pack part, which is characterized by The control signal input port of the charging circuit is connected to the control signal output port of the core control part, the power output port of the whole power supply part is connected to the power port of the core control part and the power port of the human-computer interaction part respectively, the signal transmission port of the human-computer interaction part is connected to the signal transmission port of the core control part, the detection signal output port of the charging circuit is connected to the detection signal input port of the core control part, and the lithium battery pack part is connected to the input end of the inverter part; The inverter part includes a light-emitting diode E12, NPN transistors Q14 to Q17, and an NPN transistor Q28. The cathode of E12 is respectively connected to one end of capacitor C23, the emitter of Q17, one end of R88, one end of R89, the source of IRF150 tube BG2, the source of IRF150 tube BG1, and GND. The anode of E12 is respectively connected to the other end of C23, one end of resistor R22, one end of resistor R41, one end of resistor R84, one end of resistor R85, one end of resistor R80, one end of resistor R81, and the emitter of Q14 through resistor R83. , the other end of R22 is respectively connected to A, the collector of Q17, and one end of resistor R87, the other end of R41 is respectively connected to the collector of Q15 and one end of capacitor C52, the other end of R84 is respectively connected to the base of Q15 and one end of capacitor C51, the other end of R85 is respectively connected to the other end of C52 and the base of Q16, the other end of R80 is respectively connected to the other end of C51 and the collector of Q16, the other end of R81 is respectively connected to B, the collector of Q28, and one end of resistor R86, the base of Q14 is respectively connected to C, one end of resistor R82, and the cathode of Schottky diode Z5; The base of Q17 is connected to the other end of R88 and the emitter of Q15 respectively. The emitter of Q16 is connected to the other end of R89 and the base of Q28 respectively. The anode of Z5 is connected to GND. The other end of R82 is connected to the collector of Q14 and one end of switch SW6 respectively. The other end of SW6 is connected to one end of fuse F3 and the center tap of the secondary side of transformer G2A respectively. One end of the secondary side of G2A is connected to the drain of BG1, and the other end of the secondary side of G2A is connected to the drain of BG2. The gate of BG1 is connected to the other end of R86, and the gate of BG2 is connected to the other end of R87. One end of the primary side of G2A is connected to L, and the other end of the primary side of G2A is connected to N through fuse F4. The charging circuit uses two charging methods: one is charging the photovoltaic module, and the other is charging the mains, which are converted through relay K1. The power output of the photovoltaic module is connected to a solid-state relay, and the relay is adjusted to control whether the photovoltaic module charges the battery. The mains power output is connected to a solid-state relay to control whether the 220V mains is connected. The output of the inverter is connected to a solid-state relay. The solid-state relay protects the circuit board and can only be turned on or off when the microcontroller issues a command. By adjusting the PWM pulse width, the on-off time of the charging circuit switch tube is determined, and the electric energy is controlled to charge the battery; The core control part is set to control the mains power to charge the battery pack through the charging circuit during off-peak electricity prices. During peak electricity prices, the battery pack supplies household loads through the inverter part. The excess battery power is connected to the grid through the grid-connected inverter. When the battery's stored energy is exhausted, the core control part switches to mains power, or when the electricity price reaches the off-peak period, it automatically switches to the mains direct power supply mode and charges and stores energy.

2. The dispatching energy storage system according to claim 1, characterized in that The core control part includes an STM32F103ZET6 chip U1, wherein pins 34 to 37 of U1 are connected to PA0 to PA3 respectively, pins 40 to 43 of U1 are connected to PA4 to PA7 respectively, pins 100 to 105 of U1 are connected to PA8 to PA12 and TMS respectively, pins 109 to 110 of U1 are connected to TCK and PA15 respectively, pins 46 to 48 of U1 are connected to PB0, PB1 and BOOT1 respectively, and pins 133 to 140 of U1 are connected to 12 pins and 136 pins. Pins 69 to 70 of U1 are connected to PB10 to PB11 respectively, pins 73 to 76 of U1 are connected to PB12 to PB15 respectively, pins 26 to 29 of U1 are connected to PC0 to PC3 respectively, pins 44 to 45 of U1 are connected to PC4 to PC5 respectively, pins 96 to 99 of U1 are connected to PC6 to PC9 respectively, pins 111 to 113 of U1 are connected to PC10 to PC12 respectively, and pin 7 of U1 is connected to PC13; Pin 8 of U1 is connected to pin 2 of Y1 and one end of capacitor C5 respectively. The other end of C5 is connected to GND and one end of capacitor C6 respectively. The other end of C6 is connected to pin 1 of Y1 and pin 9 of U1 respectively. Pins 114 to 119 of U1 are connected to PD0 to PD5 respectively, pins 122 to 123 of U1 are connected to PD6 to PD7 respectively, pins 77 to 82 of U1 are connected to PD8 to PD13 respectively, pins 85 to 86 of U1 are connected to PD14 to PD15 respectively, pin 138 of U1 is connected to BOOT0, pins 16, 38, 51, 61, 71, 83, 94, 107, 120, 130, 143 of U1 are connected to GND, pins 17, 52, 39, 62 of U1 are connected to GND, , 72, 84, 95, 108, 121, 131, 144 pins are connected to +3.3V, U1's 30 pin is connected to GND and one end of capacitor C10 respectively, the other end of C10 is connected to +3.3V, U1's 33 and 32 pins respectively, U1's 31 pin is connected to GND, U1's 25 pin is connected to RESET, U1's 24 pin is connected to one end of capacitor C9 and pin 2 of crystal oscillator Y2 respectively, the other end of C9 is connected to GND and one end of capacitor C8 respectively, the other end of C8 is connected to pin 1 of Y2 and U1's 23 pin respectively; U1's pin 6 is connected to VBAT; Pin 132 of U1 is connected to PG15, pins 124 to 129 of U1 are connected to pins PG9 to PG14 respectively, pins 87 to 93 of U1 are connected to pins PG2 to PG8 respectively, pins 56 to 57 of U1 are connected to pins PG0 to PG1 respectively, pins 10 to 15, 18 to 22, 49 to 50, and 53 to 55 of U1 are connected to pins PF0 to PF15 respectively, and pins 141 to 142, 1 to 5, 58 to 60, and 63 to 68 of U1 are connected to pins PE0 to PE15 respectively.

3. The dispatching energy storage system according to claim 2, characterized in that The +3.3V is connected to one end of C11~C22 respectively, and the other ends of C11~C22 are connected to GND; +3.3V is connected to RESET, one end of switch SW1, and one end of capacitor C4 respectively through resistor R6, and the other end of C4 is connected to GND and the other end of SW1 respectively; pins 1 to 4 of connector P1 are connected to +5V, PC10, PC11, and GND respectively; +3.3V is connected to the anode of diode D22, and the cathode of D22 is connected to VBAT, the cathode of diode D24, and one end of capacitor C3 respectively, and the other end of C3 is connected to GND. The anode of D24 is connected to the positive pole of battery BAT, and the negative pole of BAT is connected to GND.

4. The dispatching energy storage system according to claim 2, characterized in that The +3.3V is connected to pin 2 of REG1117-3.3 chip U2, one end of capacitor C29, and the positive electrode of capacitor C27 respectively. The other end of C29 is connected to the negative electrode of C27, GND, pin 1 of U2, and the negative electrode of capacitor C30 respectively. The positive electrode of C30 is connected to +5V and pin 3 of U2 respectively.

5. The dispatching energy storage system according to claim 1, characterized in that It also includes an alarm circuit, and a control signal input port of the alarm circuit is connected to a control signal output port of the core control part.

6. The dispatching energy storage system according to claim 5, characterized in that The alarm circuit includes a buzzer B1, the positive pole of B1 is connected to +5V, the negative pole of B1 is connected to the collector of NPN transistor Q13, the base of Q13 is connected to one end of resistor R30 and one end of resistor R32 respectively, the other end of R30 is connected to PC2, and the other end of R32 is connected to GND and the emitter of Q13 respectively.

7. The dispatching energy storage system according to claim 1, characterized in that The human-computer interaction part includes a key circuit and a display circuit. The key circuit includes switches SW2 to SW5. One end of SW2 to SW5 is connected to PA4, PA6, PA7, and PA5 respectively. The other end of SW2 to SW5 is connected to one end of resistor R27. The other end of R27 is connected to +3.3V. The display circuit includes Header 8X2 interface P6, pin 1 of P6 is connected to GND, pin 3 of P6 is connected to one end of resistor R63 and one end of resistor R64 respectively, the other end of R63 is connected to +3.3V, and the other end of R64 is connected to GND, pins 5, 7, 9, 11, 13, and 15 of P6 are connected to PC8, PD8, PD10, PD12, PD14, and +3.3V respectively, pin 16 of P6 is connected to the collector of NPN transistor Q25, the base of Q25 is connected to one end of resistor R72 and one end of resistor R74 respectively, the other end of R72 is connected to PA11, the other end of R74 is connected to GND and the emitter of Q25 respectively, and +3.3V is connected to GND through capacitor C40.

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