Semiconductor structure and manufacturing method thereof, and memory

CN115642129BActive Publication Date: 2025-09-19CHANGXIN MEMORY TECH INC
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Patent Information

Application Number
CN202210939226.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-08-05
Publication Date
2025-09-19
Estimated Expiration
2042-08-05

AI Technical Summary

Technical Problem

As the integration density of semiconductor devices increases, the distance between adjacent conductive structures decreases, leading to problems such as leakage, which affects the reliability and performance of memory.

Method used

By forming trenches and isolation structures of different depths in the substrate, bit line and word line structures are formed. The bit line is located above the second isolation structure with a smaller depth, and the word line covers the active column, thereby increasing the height difference between the bit line and the first isolation structure and reducing leakage.

Benefits of technology

The leakage between adjacent bit lines and between the bit lines and peripheral circuits is effectively reduced, thereby improving the reliability and electrical performance of the semiconductor structure.

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Abstract

An embodiment of the present disclosure provides a semiconductor structure, a manufacturing method thereof, and a memory, wherein the manufacturing method of the semiconductor structure includes: forming a plurality of parallel first trenches extending along a first direction and a first isolation structure filling the first trenches in a substrate; the first direction is parallel to the substrate surface; forming a plurality of parallel second trenches extending along a second direction in the substrate and the first isolation structure, the first trenches and the second trenches cutting the substrate into a plurality of active pillars; the second direction is perpendicular to the first direction; the depth of the second trenches is less than the depth of the first trenches; a second isolation structure is formed at the bottom of the second trench and is arranged alternately with the first isolation structure in the second direction; the top surface of the second isolation structure is lower than the bottom surface of the first isolation structure in the second trench; a plurality of parallel bit line structures are formed above the second isolation structure; the bit line structure passes through a plurality of active pillars in the first direction; and a plurality of parallel word line structures are formed above the bit line structure.
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Citation Information

Patent Citations

  • Manufacturing method of semiconductor structure and semiconductor structure

    CN114141713A

  • Manufacturing method of semiconductor structure and semiconductor structure

    CN114141715A