Zvs-based six-switch buck-boost converter

Abstract

The application provides a kind of six-switch buck-boost converter based on ZVS.The converter includes: six switch tubes Q1, Q2, Q3, Q4, Q5, Q6;Resonant inductance L;Flying capacitor C1 and filter capacitor C2.The control of the converter includes: load current PI control link (1), RMS calculation link (2) and PWM modulation link (3).The converter circuit of the application realizes zero voltage opening and closing, reduces switch tube loss, improves switching performance, improves power efficiency, reduces noise, and is suitable for high input voltage occasions.The control strategy of the application can perform output fine adjustment without the need for load current sampling, further reduce inductance conduction loss and improve efficiency.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion technology, and in particular to a six-switch buck-boost converter based on ZVS and its control strategy. Background Technology

[0002] Soft-switching buck-boost converters have always attracted attention due to their advantages such as low switching losses and variable output voltage. The circuit configuration and optimized control strategies have become current research hotspots. Among them, improving conversion efficiency and reducing the root mean square value of inductor current are key issues that need to be addressed.

[0003] Buck circuits can only step down, not step up, and Boost circuits can only step up, not step down. However, the buck-boost circuit, which combines Buck and Boost circuits, can achieve both step up and step down through a switching transistor.

[0004] In practical switching circuits, switching devices such as MOSFETs and IGBTs are not ideal; there is an intermediate transition state between their turn-on and turn-off states. In an ideal switching state, the terminal voltage of the switching device is zero or the current flowing through the switching transistor is zero. However, in the transition state, both voltage and current are not zero, resulting in overlap and thus switching losses. Furthermore, the rapid changes in voltage and current cause significant overcharging in the waveform, generating switching noise. Implementing soft switching in a Buck-boost circuit eliminates voltage and current overlap during the turn-on or turn-off process, significantly reducing switching losses and electromagnetic interference.

[0005] Existing four-switch converters are often unsuitable for applications with higher input voltages due to insufficient voltage withstand capability. Six-switch converters, on the other hand, can perform voltage division to make them suitable for applications with higher input voltages.

[0006] The control circuit of the four-switch buck-boost converter in the existing technology also has problems such as large inductor current fluctuation and low efficiency. Therefore, finding a control strategy to reduce inductor current fluctuation and improve efficiency is also a current research hotspot. Summary of the Invention

[0007] This invention provides a six-switch buck-boost converter based on ZVS, which can achieve zero-voltage turn-on and turn-off, reduce switching losses, improve switching performance, increase power efficiency, reduce noise, is suitable for applications with high input voltage, and can perform tight adjustment of the output without the need for load current sampling, thereby reducing inductor conduction losses.

[0008] The beneficial effects of this invention are: the six-switch buck-boost converter circuit achieves voltage boosting and reducing switching losses, improving switching performance, increasing power efficiency, and reducing noise, making it suitable for applications with high input voltages. This invention, through its proposed optimal current control scheme, senses the input and output voltages and controls the load current to reduce the root mean square value of the resonant inductor current, thereby further reducing the inductor's conduction loss compared to the traditional ZVS control scheme, and reducing the switching losses of the transistors; tight adjustment of the output can be achieved without load current sampling; and high-efficiency, high-power operation is achieved. Attached Figure Description

[0009] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings of the embodiments will be briefly described below.

[0010] Figure 1 The schematic diagram of a low-ripple four-switch buck-boost DC-DC converter circuit provided in an embodiment of the present invention.

[0011] Figure 2 The diagram shows the structure of the closed-loop control strategy of the constant frequency ZVS converter provided in an embodiment of the present invention. (1) is the load current PI control loop; (2) is the RMS calculation loop; and (3) is the PWM modulation loop.

[0012] Figure 3 This is a schematic diagram of switching transistor control provided in an embodiment of the present invention.

[0013] Figure 4 The operating condition table is provided for one embodiment of the present invention.

[0014] Figure 5 The following are waveforms of the voltage and current flowing through the terminal of the switching transistor Q1, provided as an embodiment of the present invention: (a) waveform of the voltage and current flowing through the terminal of the switching transistor Q1; (b) waveform of the voltage and current flowing through the terminal of the switching transistor Q2; (c) waveform of the voltage and current flowing through the terminal of the switching transistor Q3; (d) waveform of the voltage and current flowing through the terminal of the switching transistor Q4; (e) waveform of the voltage and current flowing through the terminal of the switching transistor Q5; and (f) waveform of the voltage and current flowing through the terminal of the switching transistor Q6.

[0015] Figure 6 An inductor current I provided in an embodiment of the present invention L Load current I out and the current I flowing through the switching transistor Q2 Q2 Waveform diagram. Detailed Implementation

[0016] like Figure 1As shown, a circuit of a six-switch buck-boost converter based on ZVS includes: six switching transistors Q1, Q2, Q3, Q4, Q5, and Q6; a resonant inductor L; a flying capacitor C1; and a filter capacitor C2.

[0017] The positive terminal of the DC voltage source is connected to the first terminal of the switching transistor Q1. The second terminal of the switching transistor Q1 is connected to the first terminal of the switching transistor Q3. The second terminal of the switching transistor Q3 is connected to the first terminal of the switching transistor Q6 through the inductor L. One end of the filter capacitor C2 is connected to the second terminal of the switching transistor Q6, and the other end of the filter capacitor C2 is connected to the negative terminal of the DC voltage source. One end of the load R is connected to the second terminal of the switching transistor Q6, and the other end of the load R is connected to the negative terminal of the DC voltage source. The first terminal of the switching transistor Q5 is connected to the first terminal of the switching transistor Q6, and the second terminal of the switching transistor Q5 is connected to the negative terminal of the DC voltage source. The first terminal of the switching transistor Q4 is connected to the second terminal of the switching transistor Q3, and the second terminal of the switching transistor Q4 is connected to the first terminal of the switching transistor Q2. The second terminal of the switching transistor Q2 is connected to the negative terminal of the DC voltage source. One end of the flying capacitor C1 is connected to the first terminal of the switching transistor Q3, and the other end of the flying capacitor C1 is connected to the first terminal of the switching transistor Q2. The third terminal of switching transistors Q1, Q2, Q3, Q4, Q5, and Q6 is connected to a closed-loop feedback control system. The drive pulses output by the closed-loop feedback control system control the switching on and off of switching transistors Q1, Q2, Q3, Q4, Q5, and Q6. Switching transistors Q1 and Q3 form a voltage divider, and switching transistors Q2 and Q4 form a voltage divider, to suit applications with higher input voltages.

[0018] The first terminal of the switching transistors Q1, Q2, Q3, Q4, Q5, and Q6 can be the drain of the N-type MOSFET, the second terminal of the switching transistors Q1, Q2, Q3, Q4, Q5, and Q6 can be the source of the N-type MOSFET, and the third terminal of the switching transistors Q1, Q2, Q3, Q4, Q5, and Q6 can be the gate of the N-type MOSFET.

[0019] By simultaneously sensing the input and output voltages and controlling the load current, the root mean square value of the resonant inductor current is reduced, thereby reducing the turn-on and turn-off losses of the switching transistor.

[0020] like Figure 2 As shown, the closed-loop control of the ZVS-based six-switch buck-boost converter includes: load current PI control (1), RMS calculation (2) and PWM modulation (3).

[0021] Load current PI control (1): for input and output voltage V in V out Sampling is performed to calculate the output voltage reference value V. ref With output voltage V out The difference ΔU is expressed as: ΔU = V ref -V outThe PI control output of ΔU replaces the load current I. out This forms a closed-loop feedback system. out Represented as: KP is the proportional control coefficient, and KI is the integral control coefficient.

[0022] RMS calculation (2): In one switching cycle T s The process is divided into four stages: T1, T2, T3, and T4. s =T1+T2+T3+T4, determined by the load current I out Input voltage V in Output voltage V out The RMS block calculates the optimal control time intervals T1 and T2:

[0023] T2 = 0.01I out T s

[0024]

[0025] Where T s Let L be the inductance of the resonant inductor, and let the inductor current I0 during the T4 interval satisfy the condition |I0|t. dead ≥2C oss max(V out，Vin In the case of ), minimize as much as possible, where t dead For dead time, C oss For the output capacitor of the switching transistor, max(V) out，vin ( ) is to obtain the input voltage V in Output voltage V out The maximum value in the middle.

[0026] PWM modulation (3): First, T3 is determined by detecting the current IQ2 of the switch Q2, and the ZVS period is ensured cycle by cycle. That is, the current IQ2 flowing through the switch Q2 is sensed, and the comparator compares IQ2 with IZVS (IZVS=(2C oss max{V out，Vin}) / t dead The comparison is performed, where Q6 turns off and T3 terminates once the absolute value of the inductor negative current is greater than IZVS. The inductor negative current I0 is naturally controlled and equal to -IZVS. Then, T1, T2, and the comparator comparison result are input to the PWM generator, and a dead time is set. The pulse width modulation (PWM) is automatically inserted into T4 to generate the drive signals V for driving the switches Q1, Q2, Q3, and Q4. gsQ1 V gsQ2 V gsQ3 V gsQ4T4 uses pulse width modulation (PWM) to automatically insert and maintain constant frequency operation.

[0027] like Figure 3 , Figure 4 As shown, in one switching cycle, during time T1, switches Q1, Q3, and Q5 are turned on, while switches Q2, Q4, and Q6 are turned off, and the inductor charges; during time T2, switches Q1, Q3, and Q6 are turned on, while switches Q2, Q4, and Q5 are turned off, entering resonant mode; during time T3, switches Q2, Q4, and Q6 are turned on, while switches Q1, Q3, and Q5 are turned off, and the inductor discharges; during time T4, switches Q2, Q4, and Q6 conduct, while switches Q1, Q3, and Q5 are turned off, and the inductor discharges; 55 When the circuit is on, switches Q1, Q3, and Q6 are off, and the inductor freewheels; that is, switches Q1 and Q4 conduct complementaryly, switches Q2 and Q3 conduct complementaryly, and switches Q5 and Q6 conduct complementaryly. Furthermore, switches Q1 and Q3 form a voltage divider, and switches Q2 and Q4 form a voltage divider.

[0028] By reducing the inductance to make the inductor current cross zero and adding a dead time, the voltage drops to zero before the switch is turned on. When the switch is turned off, the overlap between the current and the terminal voltage is reduced, and all six switches achieve zero-voltage turn-on, i.e., ZVS.

[0029] like Figure 5 As shown, before the switching transistors Q1, Q2, Q3, Q4, Q5, and Q6 are turned on, their voltages drop to zero, and all six switching transistors achieve zero-voltage turn-on, i.e., ZVS.

[0030] like Figure 6 As shown, when the reference voltage V ref When the voltage jumps from 100V to 150V in 0.02s, the inductor current I... L Load current I out and the current I flowing through the switching transistor Q2 Q2 Waveform changes enable tight tuning of the output.

[0031] This application presents a simple, load-current-agnostic closed-loop control method for a constant-frequency ZVS converter. Through the proposed current-optimal control scheme, the inductor conduction loss is further reduced compared to traditional ZVS control schemes; tight output regulation can be achieved without load current sampling; and high-efficiency, high-power operation is realized.

Claims

1. A six-switch buck-boost converter based on ZVS, characterized in that, include: Switches Q1, Q2, Q3, Q4, Q5, and Q6; resonant inductor L; flying capacitor C1; and filter capacitor C2. The first terminal of switch Q1 is connected to the positive terminal of the DC voltage source. The second terminal of switch Q1 is connected to the first terminal of switch Q3. The second terminal of switch Q3 is connected to the first terminal of switch Q6 via inductor L. One end of filter capacitor C2 is connected to the second terminal of switch Q6, and the other end of filter capacitor C2 is connected to the negative terminal of the DC voltage source. The second terminal of switch Q6 is connected to one end of the load R, and the other end of the load R is connected to the negative terminal of the DC voltage source. The first terminal of transistor Q5 is connected to the first terminal of transistor Q6. The second terminal of transistor Q5 is connected to the negative terminal of the DC voltage source. The first terminal of transistor Q4 is connected to the second terminal of transistor Q3. The second terminal of transistor Q4 is connected to the first terminal of transistor Q2. The second terminal of transistor Q2 is connected to the negative terminal of the DC voltage source. One end of flying capacitor C1 is connected to the first terminal of transistor Q3, and the other end of flying capacitor C1 is connected to the first terminal of transistor Q2. The third terminals of transistors Q1, Q2, Q3, Q4, Q5, and Q6 are connected to the drive pulse output terminal of the closed-loop feedback control system. Closed-loop feedback control systems include: PI control includes: controlling the input and output voltages V of the converter circuit. in V out Sampling is performed to calculate the output voltage reference value V. ref With output voltage V out The difference ΔU is used to perform PI control on ΔU to output the load current I. out ; RMS calculation includes: for a switching cycle T consisting of four stages T1, T2, T3, and T4. s The load current I is replaced by out Input and output voltages of the converter circuit V in V out The RMS block calculates the optimal control time intervals T1 and T2; PWM modulation includes: firstly, sensing the current IQ2 flowing through the switching transistor Q2, and then comparing IQ2 with IZVS using a comparator, where IZVS = (2C) / (2π) = 1 / 2π * ... oss max{V out,Vin }) / t dead Once the absolute value of the inductor's negative current exceeds IZVS, switch Q6 is turned off, and T3 terminates. Then, T1, T2, and the comparator comparison result are input to the PWM generator, and a dead time is set. Pulse width modulation is automatically inserted into T4 to generate drive signals V to drive switches Q1, Q2, Q3, and Q4. gsQ1 V gsQ2 V gsQ3 V gsQ4 .

2. The six-switch buck-boost converter based on ZVS as described in claim 1, characterized in that, In a switching cycle T s During time T1, switches Q1, Q3, and Q5 are turned on, while switches Q2, Q4, and Q6 are turned off, and the inductor charges. During time T2, switches Q1, Q3, and Q6 are turned on, while switches Q2, Q4, and Q5 are turned off, entering resonant mode. During time T3, switches Q2, Q4, and Q6 are turned on, while switches Q1, Q3, and Q5 are turned off, and the inductor discharges. During time T4, switches Q2, Q4, and Q5 are turned on, while switches Q1, Q3, and Q6 are turned off, and the inductor freewheels.

Images