A method for detecting defects in a heterojunction bipolar transistor

Abstract

The application provides a heterojunction bipolar transistor defect detection method, which comprises the following steps: acquiring a C-V curve and a 1 / C 2 -V curve of a heterojunction bipolar transistor at a preset voltage; determining the change of the C-V curve and the 1 / C 2 -V curve in a first preset voltage range; and controlling a C-V test module or an I-V test module of deep level transient spectroscopy to detect defects of the heterojunction bipolar transistor according to the change. The heterojunction bipolar transistor defect detection method has the beneficial effects that the different test modules of deep level transient spectroscopy can detect the defect types and defect states of the heterojunction bipolar transistor, and the internal defect properties and radiation damage mechanisms of the heterojunction bipolar transistor can be analyzed in depth.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic device detection, in particular to a heterojunction bipolar transistor defect detection method. BACKGROUND

[0002] Compared with traditional silicon-based bipolar transistors, indium phosphide heterojunction bipolar transistors (InP HBTs) have many unique advantages, including higher electron mobility in the base region, higher electron drift rate in the collector region, higher thermal conductivity and lower surface recombination rate of the substrate, high power density, good linearity and repeatability, etc., which determine its application advantages in the field of high-frequency and high-speed devices, and it shows strong competitiveness in the field of radio frequency and microwave, and is expected to realize large-scale application in the field of satellites, radars, etc. InP HBTs will be affected by various cosmic rays and high-energy particles in a severe space environment, and different types of radiation particles have different damage characteristics and mechanisms, which will introduce or activate defects in the device, leading to performance degradation and increased failure rate. These defect states are related to the properties of incident particles such as energy, type, and irradiation flux, and are closely related to material properties.

[0003] At present, most of the InP HBTs irradiation-related analysis only stays at the performance analysis level, and few in-depth analysis of the types and states of defects generated after irradiation of the device, leading to insufficient understanding of the nature and behavior of defects in InP HBTs, and unclear radiation damage mechanism. SUMMARY

[0004] The problem to be solved by the present application is how to more accurately detect the defects generated inside the heterojunction bipolar transistor after irradiation.

[0005] To solve the above problems, the present application provides a heterojunction bipolar transistor defect detection method, comprising the following steps:

[0006] Obtaining the C-V curve and 1 / C 2 -V curve of the heterojunction bipolar transistor at a preset voltage;

[0007] Determining the change of the C-V curve and the 1 / C 2 -V curve in a first preset voltage range;

[0008] According to the change, the C-V test module or I-V test module of the deep level transient spectrum is controlled to detect the defects of the heterojunction bipolar transistor.

[0009] In the technical solution, the C-V curve and 1 / C 2The C-V curve and the 1 / C-V curve are determined, and the change of the C-V curve in a preset voltage range is selected to determine how to detect defects of the heterojunction bipolar transistor, specifically, the C-V test module or the I-V test module is selected according to different conditions to detect defects of the heterojunction bipolar transistor, so that the types and states of defects generated by different radiation particles in the bipolar transistor can be accurately detected, and the radiation damage and reliability of the heterojunction bipolar transistor can be further analyzed and studied.

[0010] Further, the defect detection of the heterojunction bipolar transistor by the C-V test module or the I-V test module of the deep level transient spectrum according to the change includes:

[0011] When the C-V curve meets a preset smooth condition in the first preset voltage range, and the 1 / C-V curve meets a preset flat condition in the first preset voltage range, the C-V test module is controlled to detect defects of the heterojunction bipolar transistor. 2 When the C-V curve meets a preset smooth condition in the first preset voltage range, and the 1 / C-V curve meets a preset flat condition in the first preset voltage range, the C-V test module is controlled to detect defects of the heterojunction bipolar transistor.

[0012] Otherwise, the I-V test module is controlled to detect defects of the heterojunction bipolar transistor.

[0013] Further, the determination of the change of the C-V curve and the 1 / C-V curve in the first preset voltage range includes: 2

[0014] When the curvature of the C-V curve in the first preset voltage range is less than a first preset value, it is determined that the C-V curve meets the preset smooth condition in the first preset voltage range.

[0015] When the curvature of the 1 / C-V curve in the first preset voltage range is greater than a second preset value, it is determined that the 1 / C-V curve meets the preset flat condition in the first preset voltage range. 2 2 When the curvature of the 1 / C-V curve in the first preset voltage range is greater than a second preset value, it is determined that the 1 / C-V curve meets the preset flat condition in the first preset voltage range.

[0016] Further, the defect detection of the heterojunction bipolar transistor by the I-V test module of the deep level transient spectrum includes:

[0017] The current parameter of the heterojunction bipolar transistor at the preset voltage is obtained, and an I-V curve is generated according to the preset voltage and the current parameter.

[0018] When the I-V curve meets a preset change condition, the I-V test module of the deep level transient spectrum is controlled to detect defects of the heterojunction bipolar transistor.

[0019] ​​Furthermore, when the current value of the IV curve within the second preset voltage range conforms to a preset increasing trend, it is determined that the IV curve satisfies a preset change condition.

[0020] Furthermore, the CV curve and 1 / C curve of the heterojunction bipolar transistor at a preset voltage are obtained. 2 The -V curve includes:

[0021] Obtain the CV curve and 1 / C curve of the BE junction or BC junction of the heterojunction bipolar transistor at the preset voltage. 2 -V curve, wherein the preset voltage is less than the range of the heterojunction bipolar transistor.

[0022] Furthermore, the CV curve and 1 / C curve of the heterojunction bipolar transistor at a preset voltage are obtained. 2 The -V curve includes:

[0023] The preset voltage is applied to the heterojunction bipolar transistor to obtain the capacitance parameters of the heterojunction bipolar transistor;

[0024] The CV curve and the 1 / C curve are generated based on the capacitance parameters and the preset voltage. 2 -V curve.

[0025] The present invention also provides a defect detection device for heterojunction bipolar transistors, comprising:

[0026] The acquisition unit is used to acquire the CV curve and 1 / C curve of a heterojunction bipolar transistor at a preset voltage. 2 -V curve;

[0027] The judgment unit is used to determine the CV curve and the 1 / C curve. 2 The variation of the -V curve within the first preset voltage range;

[0028] The control unit is used to control the CV test module or IV test module of the deep-level transient spectrum to perform defect detection of the heterojunction bipolar transistor according to the changes.

[0029] The heterojunction bipolar transistor defect detection device of the present invention has similar technical effects to the above-mentioned heterojunction bipolar transistor defect detection method, and will not be described in detail here.

[0030] The present invention also provides a heterojunction bipolar transistor defect detection device, comprising a memory and a processor: the memory is used to store a computer program; the processor is used to implement the heterojunction bipolar transistor defect detection method as described above when the computer program is executed.

[0031] The heterojunction bipolar transistor defect detection device of the present invention has similar technical effects to the above-mentioned heterojunction bipolar transistor defect detection method, and will not be described in detail here.

[0032] The present invention also provides a computer-readable storage medium storing a computer program, which, when read and executed by a processor, implements the heterojunction bipolar transistor defect detection method as described above.

[0033] The computer-readable storage medium of this invention has similar technical effects to the above-described heterojunction bipolar transistor defect detection method, and will not be described in detail here. Attached Figure Description

[0034] Figure 1 This is a flowchart of the heterojunction bipolar transistor defect detection method according to an embodiment of the present invention;

[0035] Figure 2 The heterojunction bipolar transistor BE junction CV and 1 / C described in this embodiment of the invention 2 -V curve Figure 1 ;

[0036] Figure 3 The second heterojunction bipolar transistor BE junction CV and 1 / C described in this embodiment of the invention 2 -V curve Figure 2 ;

[0037] Figure 4 This is an IV curve diagram of the BE junction of the heterojunction bipolar transistor described in an embodiment of the present invention;

[0038] Figure 5 This is a deep energy level defect detection diagram of the BE junction of a heterojunction bipolar transistor according to an embodiment of the present invention. Detailed Implementation

[0039] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0040] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in sequences other than those illustrated or described herein.

[0041] In the description of this specification, references to terms such as "embodiment," "one embodiment," and "one implementation" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or implementation is included in at least one embodiment or illustrative implementation of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or implementation. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or implementations.

[0042] Combination Figure 1 As shown in the figure, this invention proposes a method for detecting defects in heterojunction bipolar transistors, including the following steps:

[0043] Obtain the CV curve and 1 / C curve of the heterojunction bipolar transistor at a preset voltage. 2 -V curve;

[0044] In an optional embodiment of the present invention, the step of obtaining the CV curve and 1 / C of the heterojunction bipolar transistor at a preset voltage is described. 2 The -V curve includes: obtaining the CV curve and the 1 / C curve of the BE junction or BC junction of the heterojunction bipolar transistor at the preset voltage. 2 -V curve, wherein the preset voltage is less than the range of the heterojunction bipolar transistor.

[0045] In this embodiment, a preset voltage is applied to the BE junction or BC junction of the heterojunction bipolar transistor. Specifically, for example, a reverse bias voltage is applied to the BE junction of the InP HBTs or a forward bias voltage is applied to the BC junction of the InP HBTs. The applied voltage is less than the range of the indium phosphide heterojunction bipolar transistor to prevent excessive voltage from damaging or breaking down the InP HBTs. Controlling the voltage within the range can protect the device from damage while also obtaining effective experimental data.

[0046] The capacitance parameters of the heterojunction bipolar transistor can be obtained by applying the preset voltage to the transistor; the CV curve and the 1 / C curve are then generated based on the capacitance parameters and the preset voltage. 2 -V curve, thus, by combining the preset voltage with the obtained capacitance parameters, the above-mentioned CV curve and 1 / C curve are obtained. 2 -V curve.

[0047] Determine the CV curve and the 1 / C 2 The variation of the -V curve within the first preset voltage range;

[0048] The first preset voltage range can be set according to the actual situation, thereby selecting a certain interval in the curve to determine the change.

[0049] Based on the changes, control the CV test module or IV test module of the deep-level transient spectrum to perform defect detection of the heterojunction bipolar transistor.

[0050] In summary, in this embodiment, the CV curve and 1 / C curve of the heterojunction bipolar transistor at a preset voltage are obtained. 2 -V curves are used to determine how to detect defects in heterojunction bipolar transistors by observing their changes within a preset voltage range. Specifically, either the CV test module or the IV test module is selected for defect detection of heterojunction bipolar transistors depending on the situation, so as to accurately detect the types and states of defects generated inside the bipolar crystal by different radiation particles, thereby facilitating in-depth analysis and research on radiation damage and reliability of heterojunction bipolar transistors.

[0051] In an optional embodiment of the present invention, the step of controlling the CV test module or IV test module of the deep-level transient spectrum to perform defect detection of the heterojunction bipolar transistor according to the changes includes:

[0052] When the CV curve meets the preset smoothing condition within the first preset voltage range, and the 1 / C 2 When the -V curve meets the preset flat condition within the first preset voltage range, the CV test module is controlled to perform defect detection on the heterojunction bipolar transistor.

[0053] Otherwise, the IV test module is controlled to perform defect detection on the heterojunction bipolar transistor.

[0054] Taking an indium phosphide (InP) heterojunction bipolar transistor (HBT) as an example, the CV curve of the reverse bias voltage of the BE junction of the InP HBT is tested. It is determined whether the CV curve of the InP HBT meets a preset smoothness condition within a first preset voltage range. This is achieved by determining whether the curve within the range is sufficiently smooth, based on curvature or a specific smoothing method. Additionally, the 1 / C ratio of the InP HBT is also determined. 2 The -V curve is used to determine whether a preset smoothness condition is met within a first preset voltage range. This is achieved by checking the curvature and collinearity of points to determine if the curve is a straight line or nearly a straight line. If both the preset smoothness and preset flatness conditions are met, the InP HBTs are tested for device defects using a deep-level transient spectrum CV test module.

[0055] If the corresponding CV curve and 1 / C of InP HBTs 2When the -V curve does not meet the above conditions, the InP HBTs are determined to use the deep-level transient spectrum IV test module for testing deep-level defects. This targeted testing method makes the test results more accurate.

[0056] By controlling the deep-level transient spectrum and selecting different test modules to test InP HBTs in different states, the testing efficiency is improved, unnecessary repeated testing and erroneous testing processes are avoided, and the internal defect states and radiation damage mechanisms of InP HBTs can be analyzed in depth.

[0057] In an optional embodiment of the present invention, the determination of the CV curve and the 1 / C 2 The changes in the -V curve within the first preset voltage range include:

[0058] When the curvature of the CV curve within the first preset voltage range is less than a first preset value, it is determined that the CV curve satisfies the preset smoothness condition within the first preset voltage range.

[0059] When the 1 / C 2 When the curvature of the -V curve within the first preset voltage range is greater than the second preset value, it is determined that the 1 / C 2 -V curve when the preset flat condition is met within the first preset voltage range.

[0060] In this embodiment, combined with Figure 2 and 3 As shown, when the generated CV curve and 1 / C 2 The test results of the -V curve are as follows Figure 2 As shown, the capacitance value changes significantly within a given voltage range, 1 / C 2 The -V curve approximates a straight line within a certain range, so at this point, the conventional CV module is used to detect and analyze deep-level defects by controlling the deep-level transient spectrum. When the generated CV curve and 1 / C... 2 -V curve as shown Figure 3 As shown, the capacitance value does not change significantly within a given voltage range, and its 1 / C 2 The -V curve cannot be approximated as a straight line, therefore, the CV testing module of the deep-level transient spectrum is not used for the detection and analysis of deep-level defects. Instead, the IV testing module of the deep-level transient spectrum is used for the defect detection and analysis of InP HBTs. The generated CV curve and 1 / C curve are then analyzed. 2 The division of the curvature and shape of the -V curve allows for more accurate selection of suitable deep-level transient spectrum testing modules for defect detection and analysis, improving work efficiency and the accuracy of device testing and analysis.

[0061] In an optional embodiment of the present invention, the IV test module controlling the deep-level transient spectrum performs defect detection of the heterojunction bipolar transistor, including:

[0062] Obtain the current parameters of the heterojunction bipolar transistor at the preset voltage;

[0063] Generate an IV curve based on the preset voltage and current parameters;

[0064] When the IV curve meets the preset change conditions, the IV test module of the deep-level transient spectrum is controlled to perform defect detection of the heterojunction bipolar transistor.

[0065] In an optional embodiment of the present invention, when the current value of the IV curve in the second preset voltage range conforms to a preset increasing trend, it is determined that the IV curve satisfies a preset change condition.

[0066] In this embodiment, combined with Figure 4 As shown, when the generated CV curve and 1 / C 2 If the -V curve does not meet the preset conditions, the IV curve of the BE junction of the InP HBTs is generated to determine whether the current value has a significant increasing trend within the selected voltage range. If the reverse bias current value of the BE junction has a significant change within the given voltage range, the IV test module controlling the deep level transient spectrum is used to test its internal deep level defects.

[0067] Combination Figure 5 As shown, select and set the test parameters: temperature scan range 350K~50K, reverse bias voltage U R = -1.5V, pulse voltage U P = -0.1V, pulse time t p =1ms, period T W =0.2048s, representing the deep-level defect signal of this device measured using these test parameters. A significant negative peak can be observed in the 275K–300K range. Without using the deep-level transient spectrum (CV) test module for deep-level defect detection and analysis, the IV curve analysis and judgment, along with controlling the IV test module to test internal deep-level defects, increases the detection methods for InP HBTs under different states, improving detection efficiency. Different detection methods can be selected based on the different tests performed on InP HBTs to conduct in-depth analysis and detection of internal defects.

[0068] Another embodiment of the present invention provides a defect detection device for a heterojunction bipolar transistor, comprising:

[0069] The acquisition unit is used to acquire the CV curve and 1 / C curve of a heterojunction bipolar transistor at a preset voltage. 2 -V curve;

[0070] The judgment unit is used to determine the CV curve and the 1 / C curve. 2 The variation of the -V curve within the first preset voltage range;

[0071] The control unit is used to control the CV test module or IV test module of the deep-level transient spectrum to perform defect detection of the heterojunction bipolar transistor according to the changes.

[0072] The heterojunction bipolar transistor defect detection device of the present invention has similar technical effects to the above-mentioned heterojunction bipolar transistor defect detection method, and will not be described in detail here.

[0073] Another embodiment of the present invention provides a heterojunction bipolar transistor defect detection device, comprising a memory and a processor: the memory is used to store a computer program; the processor is used to implement the heterojunction bipolar transistor defect detection method as described above when the computer program is executed.

[0074] The heterojunction bipolar transistor defect detection device of the present invention has similar technical effects to the above-mentioned heterojunction bipolar transistor defect detection method, and will not be described in detail here.

[0075] Another embodiment of the present invention provides a computer-readable storage medium storing a computer program, which is read and executed by a processor to implement the heterojunction bipolar transistor defect detection method as described above.

[0076] The computer-readable storage medium of this invention has similar technical effects to the above-described heterojunction bipolar transistor defect detection method, and will not be described in detail here.

[0077] Generally, computer instructions for implementing the methods of the present invention can be carried on any combination of one or more computer-readable storage media. Non-transitory computer-readable storage media can include any computer-readable medium except for signals themselves that are temporarily propagating.

[0078] Computer-readable storage media can be, for example—but not limited to—electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in connection with an instruction execution system, apparatus, or device.

[0079] Program code for performing the operations of this invention can be written in one or more programming languages ​​or a combination thereof. These programming languages ​​include object-oriented programming languages—such as Java, Smalltalk, and C++—as well as conventional procedural programming languages—such as the "C" language or similar programming languages. In particular, Python, suitable for neural network computation, and platform frameworks such as TensorFlow and PyTorch can be used. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0080] While the disclosure is as stated above, its scope of protection is not limited thereto. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of this disclosure, and all such changes and modifications will fall within the protection scope of this invention.

Claims

1. A method for detecting defects in a heterojunction bipolar transistor, characterized in that, Includes the following steps: Obtain the CV curve and 1 / C curve of the heterojunction bipolar transistor at a preset voltage. 2 -V curve; Determine the CV curve and the 1 / C 2 The variation of the -V curve within the first preset voltage range; Based on the aforementioned changes, the CV testing module or IV testing module of the deep-level transient spectrum is controlled to perform defect detection of the heterojunction bipolar transistor, including: When the CV curve meets the preset smoothing condition within the first preset voltage range, and the 1 / C 2 When the -V curve meets the preset flat condition within the first preset voltage range, the CV test module is controlled to perform defect detection on the heterojunction bipolar transistor. Otherwise, the IV test module is controlled to perform defect detection on the heterojunction bipolar transistor; Wherein, determining the CV curve and the 1 / C 2 The changes in the -V curve within the first preset voltage range include: When the curvature of the CV curve within the first preset voltage range is less than a first preset value, it is determined that the CV curve satisfies the preset smoothness condition within the first preset voltage range. When the 1 / C 2 When the curvature of the -V curve within the first preset voltage range is greater than the second preset value, it is determined that the 1 / C 2 -V curve when the preset flat condition is met within the first preset voltage range.

2. The method for detecting defects in a heterojunction bipolar transistor according to claim 1, characterized in that, The IV test module for controlling the deep-level transient spectrum performs defect detection on the heterojunction bipolar transistor, including: Obtain the current parameters of the heterojunction bipolar transistor at the preset voltage; Generate an IV curve based on the preset voltage and current parameters; When the IV curve meets the preset change conditions, the IV test module of the deep-level transient spectrum is controlled to perform defect detection of the heterojunction bipolar transistor.

3. The method for detecting defects in a heterojunction bipolar transistor according to claim 2, characterized in that, When the current value of the IV curve in the second preset voltage range conforms to a preset increasing trend, it is determined that the IV curve meets the preset change condition.

4. The method for detecting defects in a heterojunction bipolar transistor according to claim 1, characterized in that, The CV curve and 1 / C curve of the heterojunction bipolar transistor at a preset voltage are obtained. 2 The -V curve includes: Obtain the CV curve and 1 / C curve of the BE junction or BC junction of the heterojunction bipolar transistor at the preset voltage. 2 -V curve, wherein the preset voltage is less than the range of the heterojunction bipolar transistor.

5. The method for detecting defects in a heterojunction bipolar transistor according to any one of claims 1-4, characterized in that, The CV curve and 1 / C curve of the heterojunction bipolar transistor at a preset voltage are obtained. 2 The -V curve includes: The preset voltage is applied to the heterojunction bipolar transistor to obtain the capacitance parameters of the heterojunction bipolar transistor; The CV curve and the 1 / C curve are generated based on the capacitance parameters and the preset voltage. 2 -V curve.

6. A defect detection device for heterojunction bipolar transistors, characterized in that, include: The acquisition unit is used to acquire the CV curve and 1 / C curve of a heterojunction bipolar transistor at a preset voltage. 2 -V curve; The judgment unit is used to determine the CV curve and the 1 / C curve. 2 The variation of the -V curve within the first preset voltage range includes: when the curvature of the CV curve within the first preset voltage range is less than a first preset value, it is determined that the CV curve satisfies the preset smoothness condition within the first preset voltage range; when the 1 / C 2 When the curvature of the -V curve within the first preset voltage range is greater than the second preset value, it is determined that the 1 / C 2 -V curve when the preset flat condition is met in the first preset voltage range; The control unit is configured to control the deep-level transient spectrum CV test module or IV test module to perform defect detection of the heterojunction bipolar transistor according to the changes, including: when the CV curve meets a preset smoothing condition within the first preset voltage range, and the 1 / C 2 When the -V curve meets the preset flat condition within the first preset voltage range, the CV test module is controlled to perform defect detection of the heterojunction bipolar transistor; otherwise, the IV test module is controlled to perform defect detection of the heterojunction bipolar transistor.

7. A defect detection device for heterojunction bipolar transistors, characterized in that, Including memory and processor: The memory is used to store computer programs; The processor is configured to implement the heterojunction bipolar transistor defect detection method as described in any one of claims 1-5 when executing the computer program.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, which is read and executed by a processor to implement the heterojunction bipolar transistor defect detection method as described in any one of claims 1-5.

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