Electronic device

Abstract

An electronic device includes a first electronic module, a second electronic module, and an offset distance S. The first electronic module includes a plurality of first electronic units arranged in a plurality of columns, with a top column of the first electronic units defining a first baseline. The second electronic module is adjacent to the first electronic module. The second electronic module includes a plurality of second electronic units arranged in a plurality of columns, with a top column of the second electronic units defining a second baseline. The offset distance S is between the first baseline and the second baseline. The offset distance S satisfies 0 < S ≤ (P1 + P2) / 4, where P1 is defined by two adjacent first electronic units in the top column and a column adjacent to the top column, and P2 is defined by two adjacent second electronic units in the top column and a column adjacent to the top column.

Description

[0001] This application is a divisional application of the application for patent application No. 202010194458.0, filed on March 19, 2020, with the title of “Electronic device”. TECHNICAL FIELD

[0002] The present disclosure relates to an electronic device, and more particularly, to an electronic device having an offset design. BACKGROUND

[0003] Display apparatuses have been widely used to dynamically display advertisements. In recent years, a plurality of display panels have been combined to form a large display apparatus for displaying advertisements on a large area.

[0004] However, although the existing display apparatuses have generally been adequate for their intended purposes, they are not entirely satisfactory in every respect. SUMMARY

[0005] The present disclosure provides an electronic device including a first electronic module and a second electronic module. The first electronic module includes a plurality of first electronic units arranged in a plurality of columns, wherein a first top column of the first electronic units defines a first base line. The second electronic module is adjacent to the first electronic module. The second electronic module includes a plurality of second electronic units arranged in a plurality of columns, wherein a second top column of the second electronic units defines a second base line. An offset distance S between the first base line and the second base line satisfies 0 < S ≤ (P1+P2) / 4, wherein P1 is a pitch defined by two adjacent first electronic units respectively located in the first top column and an adjacent column adjacent to the first top column, and P2 is a pitch defined by two adjacent second electronic units respectively located in the second top column and an adjacent column adjacent to the second top column. BRIEF DESCRIPTION OF DRAWINGS

[0006] In order to make the above objectives, features and advantages of the present disclosure more clear and comprehensible, the specific embodiments of the present disclosure will be described below in detail with reference to the accompanying drawings, in which:

[0007] Figure 1 is a schematic view of a display apparatus according to an embodiment of the present disclosure.

[0008] Figure 2 is a schematic view of an electronic device having an offset design according to an embodiment of the present disclosure.

[0009] Figures 3A to 3C is a schematic view of an electronic module having electronic units with different reference points according to an embodiment of the present disclosure.

[0010] Figure 4 is a schematic view of an electronic device having an offset design according to an embodiment of the present disclosure.

[0011] Figure 5 This is a schematic diagram of an electronic device with an offset design according to an embodiment of the present disclosure.

[0012] Figure 6 This is a schematic diagram of an electronic module having an offset design in an electronic device according to an embodiment of the present disclosure.

[0013] Figure 7 This is a schematic diagram of an electronic system with an offset design according to an embodiment of the present disclosure.

[0014] in:

[0015] 106, 106' ~ Electronic Devices

[0016] 108 - Electronic Module

[0017] 110~line

[0018] 200 - Electronic Devices

[0019] 202~Substrate

[0020] 204 - First Electronic Module

[0021] 206 - Second Electronic Module

[0022] 208-1, 208-2, 208-3, 208-4, 208-5, 208-6 ~ First Electronic Unit

[0023] 210-1, 210-2, 210-3, 210-4, 210-5, 210-6 ~ Second electronic unit

[0024] 1, 2 ~ Direction

[0025] 204-1, 204-2, 206-1, 206-2 ~ Edge

[0026] P1, P2, P3, P4 ~ Spacing

[0027] 212, 214 ~ Baseline

[0028] Reference points 216 and 218

[0029] S ~ Offset distance

[0030] G ~ Gap Distance

[0031] 302, 306, 310 – Electronic Units

[0032] 304, 308, 314 ~ Reference points

[0033] 312 ~ Minimum circumscribed rectangle

[0034] 602 - Electronic Module

[0035] 604, 606 - Electronic Unit

[0036] 604-1, 604-2, 606-1, 606-2 ~ Edge

[0037] 608-1, 608-2, 608-3, 608-4, 610-1, 610-2, 610-3, 610-4 ~ Electronic Components

[0038] 612, 614 ~ Baseline

[0039] Reference points 616 and 618

[0040] P1', P2', P3', P4' ~ Spacing

[0041] S' ~ Offset distance

[0042] G' ~ Gap Distance

[0043] 700 - Electronic Systems

[0044] 702, 702' ~ Electronic Devices

[0045] 704 - First Electronic Module

[0046] 706 - Second Electronic Module

[0047] 704-1, 704-2, 706-1, 706-2 ~ Edge

[0048] 708-1, 708-2, 708-3, 708-4 ~ First Electronic Unit

[0049] 710-1, 710-2, 710-3, 710-4 ~ Second Electronic Unit

[0050] 712, 714 ~ Baseline

[0051] 716, 718 ~ Reference points

[0052] 702-1, 702'-2 ~ Edge

[0053] Spacing between P1”, P2”, P3”, P4”

[0054] S" ~ Offset distance

[0055] G” ~ Gap distance Detailed Implementation

[0056] The following disclosure provides numerous different embodiments or examples to implement various features of this invention. The following disclosure describes specific examples of the various components and their arrangements for simplification. Of course, these specific examples are not intended to be limiting. For example, if this disclosure describes a first feature formed on or above a second feature, it indicates that it may include embodiments where the first and second features are in direct contact, or embodiments where an additional feature is formed between the first and second features, so that the first and second features may not be in direct contact. Furthermore, the same reference numerals and / or designations may be used repeatedly in the different examples disclosed below. These repetitions are for simplification and clarity and are not intended to limit any specific relationship between the different embodiments and / or structures discussed.

[0057] For the purposes of detailed description of this disclosure, unless specifically denied, the singular includes multiple words, and vice versa. Furthermore, the word "comprising" means "inclusively includes" without limitation. Additionally, approximation terms such as "about," "almost," "quite," "probably," etc., may be used in embodiments of this disclosure in the sense of "in," "close to," or "nearly in," or "within 3 to 5%," or "within acceptable manufacturing tolerances," or any logical combination thereof.

[0058] Furthermore, the use of spatial terms, such as "below," "below," "lower," "above," "higher," and similar terms, is intended to facilitate the description of the relationship between one component or feature and another in the diagram. In addition to the orientations shown in the accompanying drawings, these spatial terms are intended to encompass different orientations of the device in use or operation. For example, if the device in the diagram is reversed, a component described as "below" or "below" of other components or features will thus become "above" of yet another component or feature. In this way, the exemplary term "below" will encompass both upward and downward interpretations. Furthermore, if the device is rotated to different orientations (rotated 90 degrees or other orientations), the spatial terms used here can be interpreted in the same way.

[0059] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include multiple forms as well. Furthermore, with respect to the terms “encompassing,” “comprising,” “having,” “containing,” “including,” or variations thereof used in the detailed description and / or claims, these multiple terms are intended to be inclusive in a manner similar to “comprising.”

[0060] The use of ordinal numbers such as "first," "second," etc., in the specification and claims to modify the components of the claims does not imply or represent any prior ordinal number of the claimed component, nor does it represent the order of one claimed component with another, or the order of manufacturing methods. The use of these multiple ordinal numbers is only to enable a claimed component with a certain name to be clearly distinguished from another claimed component with the same name.

[0061] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. Furthermore, terms such as those defined in general dictionaries should be interpreted as having the same meaning as they have in the context of their respective fields and should not be construed as idealized or overly formal, unless explicitly defined herein.

[0062] This disclosure provides an offset design. For example... Figure 1 As shown, electronic device 106 includes a plurality of electronic modules 108. The electronic modules 108 can be arranged in an array with an offset design (i.e., the columns of electronic modules 108 are slightly staggered). With this offset design, when the rows of electronic modules 108 are offset due to processing errors, such offsets caused by these errors may be less noticeable (e.g., column 110 of electronic device 106'). With this offset design, the tolerance for offsets caused by processing errors is higher. Therefore, fewer electronic devices will be scrapped.

[0063] Figure 2 This is a schematic diagram of an electronic device with an offset design according to an embodiment of the present disclosure. The electronic device 200 includes a substrate 202, a first electronic module 204, and a second electronic module 206. The substrate 202 may be a thin-film transistor (TFT) substrate, a printed circuit board (PCB) substrate, a ceramic substrate, a glass substrate, a polymer substrate, a semiconductor substrate, or any suitable substrate including, but not limited to, suitable insulating or dielectric materials for forming electronic components.

[0064] In this disclosure, the first electronic module 204 and the second electronic module 206 may be disposed (or alternatively formed) on the same side of the substrate 202, and the dimensions of the first electronic module 204 and the second electronic module 206 may be substantially the same or different. The shapes of the first electronic module 204 and the second electronic module 206 may be substantially the same or different. In embodiments of this disclosure, the first electronic module 204 and the second electronic module 206 may be rectangular, but are not limited thereto. In other embodiments, the dimensions and / or shapes of the first electronic module 204 and the second electronic module 206 may vary.

[0065] For clarity, Figure 2 Two electronic modules (first electronic module 204 and second electronic module 206) are shown. It should be understood that, as needed, there may be two or more electronic modules in the electronic device 200. For example, there may be two, four, six, nine, twelve, or sixteen electronic modules, but it is not limited thereto. First electronic module 204 and second electronic module 206 may include a display panel, a sensing module, an antenna module, other suitable electronic modules, or combinations thereof, but are not limited thereto. In one embodiment, the electronic device 200 may be a tiled display device, a touch display device, a curved display device, a flexible display device, or combinations thereof, but is not limited thereto.

[0066] like Figure 2As shown, the first electronic module 204 and the second electronic module 206 are arranged in an array (1×2 array). In some embodiments, the first electronic module 204 is adjacent to the second electronic module 206 in direction 1 (e.g., along the X-axis). The first electronic module 204 may include a plurality of first electronic units 208 (i.e., first electronic units 208-1 to 208-6), and the second electronic module 206 may include a plurality of second electronic units 210 (i.e., second electronic units 210-1 to 210-6). In this disclosure, the first electronic units 208 and the second electronic units 210 may be substantially the same size. In this embodiment, the first electronic units 208 and the second electronic units 210 may be square, but are not limited thereto. For clarity, the first electronic module 204 and the second electronic module 206 each include six electronic units. It should be understood that electronic modules may have more electronic units. The first electronic units 208 and the second electronic units 210 may include a display unit, a sensor, an antenna unit, or a combination thereof. The display unit may include liquid crystal (LC), organic light-emitting diode (OLED), inorganic light-emitting diode (LED), mini light-emitting diode (mini LED), micro light-emitting diode (micro LED), quantum dot light-emitting diode (QLED or QDLED), quantum dot (QD), phosphor, fluorescence, other display units or combinations thereof, but is not limited thereto. In one embodiment, the first electronic unit 208 and the second electronic unit 210 may be represented as pixels or sub-pixels of the electronic device 200.

[0067] The first electronic unit 208 may be arranged in an array in the first electronic module 204, and the second electronic unit 210 may be arranged in an array in the second electronic module 206. As an example, in the first electronic module 204, the first electronic unit 208 is arranged in two rows (columns 1 and 2 in the first electronic module 204) in direction 1, and in three rows (rows 1 and 3 in the first electronic module 204) in direction 2 (e.g., along the Y-axis), which may be different from direction 1 (i.e., along the Y-axis) (i.e., a 2×3 array). For example, direction 2 may be substantially perpendicular to direction 1. Columns 1 and 2 of the first electronic unit 208 are arranged along direction 2. Similarly, in the second electronic module 206, the second electronic unit 210 is arranged in two columns (columns 3 and 4 in the second electronic module 206) in direction 1, and in three rows (rows 4 and 6 in the second electronic module 206) in direction 2 (i.e., a 2×3 array). Columns 3 and 4 of the second electronic module 206 are arranged along direction 2. In some embodiments, a column of the first electronic unit 208 may be adjacent to another column in direction 2 (i.e., in the first electronic module 204, column 1 is adjacent to column 2 in direction 2), and a column of the second electronic unit 210 may be adjacent to another column in direction 2 (i.e., in the second electronic module 206, column 3 is adjacent to column 4 in direction 2). Column 1 of the first electronic unit 208 may be referred to as the top row of the first electronic unit 208, and it may be the edge 204-1 closest to the first electronic module 204. Similarly, column 3 of the second electronic unit 210 may be referred to as the top row of the second electronic unit 208, and it may be the edge 206-1 closest to the second electronic module 206.

[0068] Additionally, at least one of the first electronic units 208 has a reference point 216, and at least one of the second electronic units 210 has a reference point 218. It should be noted that the reference points are individually located at substantially the same position in each individual electronic unit. In this embodiment, a reference point (e.g., reference point 216) may be defined as one of the vertices of the electronic unit (e.g., the upper right vertex of the first electronic unit 208). In some embodiments, a reference point may be defined as the highest point of the electronic unit in direction 2. For example, such as... Figure 3A As shown, the electronic unit 302 can be rhomboid in shape, and the highest point of the electronic unit 302 in direction 2 can be defined as reference point 304. In some embodiments, the reference point can be defined as the center point of the electronic unit. For example, as... Figure 3B As shown, the electronic unit 306 is circular in shape, and its center point is defined as reference point 308. In other embodiments, the reference point may be defined as one vertex of the smallest enclosing rectangle of the circumscribed electronic unit. For example, as... Figure 3CAs shown, the shape of the electronic unit 306 is irregular, and one vertex (e.g., the upper right vertex) of the minimum circumscribed rectangle 312 of the electronic unit 310 can be used as a reference point 314. One side of the minimum circumscribed rectangle 312 may extend along direction 1 or along a direction substantially perpendicular to direction 1, but is not limited thereto. In other embodiments, the reference point may be defined as the center point of the minimum circumscribed rectangle 312.

[0069] Refer again Figure 2 The first electronic unit 208 has a spacing of P1 between two adjacent columns and a spacing of P3 between two adjacent rows. Similarly, the second electronic unit 210 has a spacing of P2 between two adjacent columns and a spacing of P4 between two adjacent rows.

[0070] Spacing P1 can be defined by two adjacent first electronic units 208 in column 1 (top column) and column 2 of the first electronic module 204 along direction 2. Spacing P2 can be defined by two adjacent second electronic units 210 in column 3 and column 4 of the second electronic module 206 along direction 2. For example, as Figure 2 As shown, the first electronic unit 208-1 in column 1 and the first electronic unit 208-2 in column 2 can define a spacing P1. Specifically, the spacing P1 can be defined as the distance from reference point 216 of the first electronic unit 208-1 to reference point 216 of the first electronic unit 208-2. Similarly, the second electronic unit 210-1 in column 3 and the second electronic unit 210-2 in column 4 can define a spacing P2. Specifically, the spacing P2 can be defined as the distance from reference point 218 of the second electronic unit 210-1 to reference point 218 of the second electronic unit 210-2.

[0071] In some embodiments, the spacing P l The distance P2 can be defined along direction 2 by two adjacent first electronic units 208 in row 3 of the first electronic module 204, and the spacing P2 can be defined along direction 2 by two adjacent second electronic units 210 in row 4 of the second electronic module 206.

[0072] Spacing P3 can be defined by two adjacent first electronic units 208 in column 1 (top column) of the first electronic module 204 along direction 1. Spacing P4 can be defined by two adjacent second electronic units 210 in column 3 of the second electronic module 206 along direction 1. For example, as Figure 2As shown, the first electronic unit 208-1 and the first electronic unit 208-3 in column 1 can define a spacing P3. Specifically, the spacing P3 can be defined as the distance from reference point 216 of the first electronic unit 208-1 to reference point 216 of the first electronic unit 208-3. Similarly, the second electronic unit 210-1 and the second electronic unit 210-3 in column 3 can define a spacing P4. Specifically, the spacing P4 can be defined as the distance from reference point 218 of the second electronic unit 210-1 to reference point 218 of the second electronic unit 210-3.

[0073] In some embodiments, spacing P3 may be defined along direction 1 by two adjacent first electronic units 208 in rows 2 and 3 of the first electronic module 204. Spacing P4 may be defined along direction 1 by two adjacent second electronic units 210 in rows 4 and 5 of the second electronic module 206.

[0074] In this embodiment, the first electronic unit 208-1 may be the electronic unit in column 1 closest to the second electronic module 206 (or the edge 206-2 of the second electronic module 206) or the electronic unit closest to the edge 204-2 of the first electronic module 204. In some embodiments, the first electronic unit 208-1 may be the electronic unit closest to the corner of the first electronic module 204 formed by the connection of edge 204-1 and edge 204-2. The second electronic unit 210-1 may be the electronic unit in column 3 closest to the first electronic module 204 (or the edge 204-2 of the first electronic module 204) or the electronic unit closest to the edge 206-2 of the second electronic module 206. In some embodiments, the second electronic unit 210-1 may be the electronic unit closest to the corner of the second electronic module 206 formed by the connection of edge 206-1 and edge 206-2.

[0075] The first electronic unit 208-2 can be the electronic unit in column 2 that is closest to the first electronic unit 208-1 in column 1 in direction 2. The first electronic unit 208-2 can also be the electronic unit in column 2 that is closest to the second electronic module 206 (or the edge 206-2 of the second electronic module 206) in direction 1, or the electronic unit that is closest to the edge 204-2 of the first electronic module 204. The second electronic unit 210-2 can be the electronic unit in column 4 that is closest to the second electronic unit 210-1 in column 3 in direction 2. The second electronic unit 210-2 can also be the electronic unit in column 4 that is closest to the first electronic module 204 (or the edge 204-2 of the first electronic module 204) in direction 1, or the electronic unit that is closest to the edge 206-2 of the first electronic module 206. The first electronic unit 208-3 can be the electronic unit in column 1 that is closest to the first electronic unit 208-1 in column 1 in direction 1. The second electronic unit 210-3 can be the electronic unit in column 3 that is closest to the second electronic unit 210-1 in column 3 in direction 1.

[0076] Furthermore, column 1 of the first electronic unit 208 (e.g., first electronic units 208-1, 208-3, and 208-5) can define a baseline 212. Column 3 of the second electronic unit 210 (e.g., second electronic units 210-1, 210-3, and 210-5) can define a baseline 214. Specifically, reference point 216 of column 1 of the first electronic unit 208 can define baseline 212, and reference point 218 of column 3 of the second electronic unit 210 can define baseline 214. In some embodiments, baseline 212 can be a line passing through reference point 216 of column 1 of the first electronic unit 208, and baseline 214 can be a line passing through reference point 218 of column 3 of the second electronic unit 210. Figure 2 In some embodiments, baseline 212 may be parallel to baseline 214, but is not limited thereto.

[0077] Electronic device 200 may include an offset design. In this embodiment, first electronic unit 208 may be separated from second electronic unit 210 (offset) by a distance in direction 2. For example, column 1 of first electronic unit 208 may have an offset distance away from column 3 of second electronic unit 210 in direction 2, and column 2 of first electronic unit 208 may have a substantially the same offset distance away from column 4 of second electronic unit 210 in direction 2. The offset distance S may be between (or defined by) baseline 212 and baseline 214. Specifically, the offset distance S may be the distance from baseline 212 to baseline 214 in direction 2. Furthermore, the offset distance S satisfies the following relationship:

[0078] 0 <S≤(P1+P2) / 4,

[0079] Where P1 is the spacing P1 (length of spacing P1) mentioned above, and P2 is the spacing P2 (length of spacing P2) mentioned above. In some embodiments, the offset distance S, spacing P1, and spacing P2 may have the same unit of measurement, such as millimeters (mm) or micrometers (μm).

[0080] In another embodiment, the offset distance S satisfies the following relationship:

[0081] (P1+P2) / 6≤S≤(P1+P2) / 4.

[0082] If the offset distance S is less than (P1+P2) / 6, the offset caused by the process error described above may still be significant. Furthermore, if the offset distance S is greater than (P1+P2) / 4, the offset distance S of the offset design may affect the image displayed by the electronic device 200.

[0083] exist Figure 2 In the embodiments, the offset design is that the first electronic unit 208 is offset upwards (or the second electronic unit 210 is offset downwards). It should be understood that the offset design can be that the first electronic unit 208 is offset downwards (or the second electronic unit 210 is offset upwards) or offset in other directions, but is not limited thereto.

[0084] In some embodiments, the first electronic module 204 has a gap relative to the second electronic module 206. For example, such as Figure 2 As shown, the first electronic module 204 is separated from the second electronic module 206 by a gap distance G in direction 1. Specifically, the gap distance G can be defined as the minimum distance between the edge 204-2 of the first electronic module 204 and the edge 206-2 of the second electronic module 206 in direction 1. Furthermore, the gap distance G satisfies the following relationship:

[0085] 0 <G≤(P3+P4) / 4,

[0086] Where P3 is the spacing P3 (length of spacing P3) mentioned above, and P4 is the spacing P4 (length of spacing P4) mentioned above. In some embodiments, the gap distance G, spacing P3, and spacing P4 may have the same unit of measurement, such as millimeters (mm) or micrometers (μm).

[0087] In another embodiment, the gap distance G satisfies the following relationship:

[0088] (P3+P4) / 6≤G≤(P3+P4) / 4.

[0089] Similarly, if the gap distance G is less than (P3 + P4) / 6, the offset caused by the process errors described above may still be significant. Additionally, if the gap distance G is greater than (P3 + P4) / 4, the offset of the designed gap distance G may affect the image displayed by the electronic device 200.

[0090] In the case where the length of pitch P1 is approximately the same as the length of pitch P3 and the length of pitch P2 is approximately the same as the length of pitch P4, the gap distance G can satisfy the following relationship:

[0091] 0 < G ≤ (P1 + P2) / 4, or

[0092] (P1 + P2) / 6 ≤ G ≤ (P1 + P2) / 4.

[0093] In some embodiments, baseline 212 may intersect baseline 214 (i.e., baseline 212 may not be parallel to baseline 214), as Figure 4 shown. In this case, the offset distance S (in direction 2, the distance from the reference point 216 of the first electronic unit 208-1 to the reference point 218 of the second electronic unit 210-1) can be the average of distance S1 and distance S2 (S = (S1 + S2) / 2). Distance S1 can be the distance from the reference point 216 of the first electronic unit 208-1 to baseline 214 in direction 2. Distance S2 can be the distance from the reference point 218 of the second electronic unit 210-1 to baseline 212 in direction 2. As Figure 4 shown, the reference point 216 of the first electronic unit 208-1 is separated from baseline 214 by distance S1 in direction 2, and the reference point 218 of the second electronic unit 210-1 is separated from baseline 212 by distance S2 in direction 2.

[0094] As Figure 2 shown, the arrangement of the first electronic unit 208 in the first electronic module 204 can be approximately the same as the arrangement of the second electronic unit 210 in the second electronic module 206. In some embodiments, when the first electronic unit 208 has an offset relative to the second electronic unit 210, the first electronic module 204 may also have an offset relative to the second electronic module 206. Specifically, the edge 204-1 of the first electronic module 204 and the edge 206-1 of the second electronic module 206 may not be aligned (i.e., the edge 204-1 of the first electronic module 204 has an offset relative to the edge 206-1 of the second electronic module 206). In some embodiments, the arrangement of the first electronic unit 208 in the first electronic module 204 can be different from the arrangement of the second electronic unit 210 in the second electronic module 206, as Figure 5As shown. In this case, the first electronic module 204 can be aligned with the second electronic module 206 (i.e., the edge 204-1 of the first electronic module 204 can be aligned with the edge 206-1 of the second electronic module 206). However, the first electronic unit 208 can still be offset relative to the second electronic unit 210, and the offset distance S satisfies the above relationship.

[0095] In some embodiments, an electronic unit may include multiple electronic components, such as chips or dies. The offset design described above can also be applied to the electronic components in an electronic unit. Figure 6 This is a schematic diagram of an electronic module 602 with an offset design in an electronic device 200 according to an embodiment of the present disclosure. The electronic module 602 includes electronic units 604 and 606. The electronic module 602 is similar to the first electronic module 204 and / or the second electronic module 206, and will not be described in detail here. Electronic units 604 and 606 are similar to the first electronic unit 208 and / or the second electronic unit 210, and will not be described in detail here either.

[0096] Electronic units 604 and 606 may include a plurality of electronic components 608 (i.e., electronic components 608-1 to 608-4) and a plurality of electronic components 610 (i.e., electronic components 610-1 to 610-4). In this disclosure, electronic components 608 and 610 may be substantially the same size. In this embodiment, the shapes of electronic components 608 and 610 may include, but are not limited to, squares. For clarity, electronic units 604 and 606 may each include four electronic components. It should be understood that electronic units may have more or fewer electronic components as needed. For example, electronic components 608 and 610 may be light-emitting diode (LED) chips or dies, such as red LED chips, green LED chips, blue LED chips, white LED chips, or combinations thereof.

[0097] Electronic components 608 may be arranged in an array within electronic unit 604. Electronic components 610 may be arranged in an array within electronic unit 606. Specifically, in electronic unit 604, electronic components 608 may be arranged in two rows (columns 1' to 2' in electronic unit 604) in direction 1 and in two rows (rows 1' to 2' in electronic unit 604) in direction 2 (i.e., a 2×2 array). Similarly, in electronic unit 606, electronic components 610 may be arranged in two columns (columns 3' to 4' in electronic unit 606) in direction 1 and in two rows (rows 3' to 4' in electronic unit 606) in direction 2 (i.e., a 2×2 array). In some embodiments, one column of electronic components 608 may be adjacent to another column in direction 2 (i.e., in electronic unit 604, column 1' is adjacent to column 2' in direction 2). A column of electronic component 610 may be adjacent to another column in direction 2 (i.e., in electronic unit 606, column 3' is adjacent to column 4' in direction 2). Column 1' of electronic component 608 may be referred to as the top column of electronic component 608, and column 1' is closest to the edge 604-1 of electronic unit 604. Similarly, column 3' of electronic component 610 may be referred to as the top column of electronic component 610, and column 3' is closest to the edge 606-1 of electronic unit 606.

[0098] Additionally, electronic component 608 may have a reference point 616, and electronic component 610 may have a reference point 618. It should be noted that the reference points are individually located at substantially the same position in the individual electronic components. In this embodiment, the reference point (e.g., reference point 616) may be one of the vertices of the electronic component (e.g., the upper right vertex of electronic component 608). In some embodiments, the reference point may be the highest point of the electronic component in direction 2. In some embodiments, the reference point is the center point of the electronic component. In other embodiments, the reference point is one of the vertices of the smallest externally circumscribed rectangle of the externally circumscribed electronic component.

[0099] Furthermore, adjacent columns of electronic component 608 have a spacing P1', and adjacent rows of electronic component 608 have a spacing P3'. Similarly, adjacent columns of electronic component 610 have a spacing P2', and adjacent rows of electronic component 610 have a spacing P4'.

[0100] Spacing P1' can be defined by two adjacent electronic components 608, each located in column 1' (top column) and column 2' of electronic unit 604 along direction 2. Spacing P2' can be defined by two adjacent electronic components 610, each located in column 3' and column 4' of electronic unit 606 along direction 2. For example, as Figure 6As shown, electronic components 608-1 in column 1' and 608-2 in column 2' can define a spacing P1'. Specifically, spacing P1' can be defined as the distance from reference point 616 of electronic component 608-1 to reference point 616 of electronic component 608-2. Similarly, electronic components 610-1 in column 3' and 610-2 in column 4' can define a spacing P2'. Specifically, spacing P2' can be defined as the distance from reference point 618 of electronic component 610-1 to reference point 618 of electronic component 610-2.

[0101] In some embodiments, the spacing P l The spacing P2 can be defined along direction 2 by two adjacent electronic components 608 in row 2 of electronic unit 604, and the spacing P2 can be defined along direction 2 by two adjacent electronic components 610 in row 3 of electronic unit 606, but is not limited thereto. In some embodiments, the spacing can be defined by two adjacent electronic components in a row, and the row can be adjacent to the edge of the electronic unit.

[0102] Spacing P3' can be defined by two adjacent electronic components 608 in column 1' (top column) of electronic unit 604 along direction 1. Spacing P4' can be defined by two adjacent electronic components 610 in column 3' of electronic unit 606 along direction 1. For example, as Figure 6 As shown, electronic components 608-1 and 608-3 in column 1' can define a spacing P3'. Specifically, spacing P3' can be defined as the distance from reference point 616 of electronic component 608-1 to reference point 616 of electronic component 608-3. Similarly, electronic components 610-1 and 610-3 in column 3' can define a spacing P4'. Specifically, spacing P4' can be defined as the distance from reference point 618 of electronic component 610-1 to reference point 618 of electronic component 610-3.

[0103] In some embodiments, the spacing P3' may be defined by two adjacent electronic components 608 in rows 1' and 2' of electronic unit 604 along direction 1. The spacing P4' may be defined by two adjacent electronic components 610 in rows 3' and 4' of electronic unit 606 along direction 1.

[0104] In this embodiment, electronic component 608-1 may be the electronic component closest to electronic unit 606 (or edge 606-2 of electronic unit 606) in column 1' or the electronic component closest to edge 604-2 of electronic unit 604. In some embodiments, electronic component 608-1 may be the electronic component closest to the upper right corner of the electronic unit 604 formed by connecting edge 604-1 to edge 604-2. Electronic component 610-1 may be the electronic component closest to electronic unit 604 (or edge 604-2 of electronic unit 604) in column 3' or the electronic component closest to edge 606-2 of electronic unit 606. In some embodiments, electronic component 610-1 may be the electronic component closest to the upper left corner of the electronic unit 606 formed by connecting edge 606-1 to edge 606-2.

[0105] Electronic component 608-2 can be the electronic component in column 2' that is closest to electronic component 608-1 in column 1' in direction 2, and the electronic component in column 2' that is closest to electronic unit 606 (or edge 606-2 of electronic unit 606) or the electronic component that is closest to edge 604-2 of electronic unit 604 in direction 1. Electronic component 610-2 can be the electronic unit in column 4' that is closest to electronic component 610-1 in column 3' in direction 2, and the electronic component in column 4' that is closest to electronic unit 604 (or edge 604-2 of electronic unit 604) or the electronic component that is closest to edge 606-2 of electronic unit 606 in direction 1. Electronic component 608-3 can be the electronic component in column 1' that is closest to electronic component 608-1 in column 1' in direction 1. Electronic component 610-3 may be the electronic component in column 3' that is closest to electronic component 610-1 in column 3' in direction 1.

[0106] Furthermore, columns 1' (electronic components 608-1 and 608-3) of electronic component 608 can define a baseline 612. Columns 3' (electronic components 610-1 and 610-3) of electronic component 610 can define a baseline 614. Specifically, reference point 616 of column 1' of electronic component 608 can define baseline 612, and reference point 618 of column 3' of electronic component 610 can define baseline 614. In some embodiments, baseline 612 can be a line passing through reference point 616 of column 1' of electronic component 608, and baseline 614 can be a line passing through reference point 618 of column 3' of electronic component 610. Figure 6 In one embodiment, baseline 612 may be substantially parallel to baseline 614.

[0107] Electronic module 602 may include an offset design. In this embodiment, electronic component 608 may be separated from electronic component 610 (offset) by a distance in direction 2. For example, column 1' of electronic component 608 may have an offset distance from column 3' of electronic component 610 in direction 2. Column 2' of electronic component 608 may have a substantially the same offset distance from column 4' of electronic component 610 in direction 2. The offset distance S' may be between (or defined by) baselines 612 and 614. Specifically, the offset distance S' may be the distance from baseline 612 to baseline 614 in direction 2. Furthermore, the offset distance S' satisfies the following relationship:

[0108] 0 <S’≤(P1’+P2’) / 4,

[0109] Where P1' is the spacing P1' (length of spacing P1') mentioned above, and P2' is the spacing P2' (length of spacing P2') mentioned above. In some embodiments, the offset distance S', spacing P1', and spacing P2' may have the same unit of measurement, such as millimeters (mm) or micrometers (μm).

[0110] In another embodiment, the offset distance S' satisfies the following relationship:

[0111] (P1'+P2') / 6≤S'≤(P1'+P2') / 4.

[0112] If the offset distance S' is less than (P1'+P2') / 6, the offset caused by the process error described above may still be significant. Furthermore, if the offset distance S' is greater than (P1'+P2') / 4, this offset design offset distance S' may affect the image displayed by the electronic device 200.

[0113] exist Figure 6 In some embodiments, the offset design may be that electronic component 608 is offset upwards (or electronic component 610 is offset downwards). It should be understood that the offset design may be that electronic component 608 is offset downwards (or electronic component 610 is offset upwards) or offset in other directions, but is not limited thereto.

[0114] In some embodiments, electronic unit 604 has a gap relative to electronic unit 606. For example, such as Figure 6 As shown, electronic unit 604 is separated from electronic unit 606 by a gap distance G' in direction 1. Specifically, the gap distance G' is the minimum distance in direction 1 from the edge 604-2 of electronic unit 604 to the edge 606-2 of electronic unit 606. Furthermore, the gap distance G' satisfies the following relationship:

[0115] 0 <G’≤(P3’+P4’) / 4,

[0116] Where P3’ is the above-mentioned spacing P3’ (the length of the spacing P3’), and P4’ is the above-mentioned spacing P4’ (the length of the spacing P4’). In some embodiments, the gap distance G’, the spacing P3’, and the spacing P4’ may have the same unit of measurement, such as millimeters (mm) or micrometers (μm).

[0117] In another embodiment, the gap distance G’ satisfies the following relationship:

[0118] (P3’ + P4’) / 6 ≤ G’ ≤ (P3’ + P4’) / 4.

[0119] Similarly, if the gap distance G’ is less than (P3’ + P4’) / 6, the offset caused by the above-mentioned process error may still be obvious. In addition, if the gap distance G’ is greater than (P3’ + P4’) / 4, the offset of the designed gap distance G’ may affect the image displayed by the electronic device 200.

[0120] In the case where the length of the spacing P1’ may be approximately the same as the length of the spacing P3’ and the length of the spacing P2’ may be approximately the same as the length of the spacing P4’, the gap distance G’ satisfies the following relationship:

[0121] 0 < G’ ≤ (P1’ + P2’) / 4, or

[0122] (P1’ + P2’) / 6 ≤ G’ ≤ (P1’ + P2’) / 4.

[0123] In some embodiments, the baseline 612 may intersect the baseline 614 (i.e., the baseline 612 may not be parallel to the baseline 614) (not shown). In this case, the offset distance S’ (the distance from the reference point 616 of the electronic component 608-1 to the reference point 618 of the electronic component 610-1 in the direction 2) may be the average value of the distance S1’ and the distance S2’ (S’ = (S1’ + S2’) / 2). The distance S1’ may be the distance from the reference point 616 of the electronic component 608-1 to the baseline 614 in the direction 2, and the distance S2’ may be the distance from the reference point 618 of the electronic component 610-1 to the baseline 612 in the direction 2.

[0124] The above-mentioned offset design can also be applied to an electronic system. Figure 7This is a schematic diagram of an electronic system designed according to an embodiment of the present disclosure. Electronic system 700 may include electronic device 702 and electronic device 702'. Electronic device 702 may include a first electronic module 704, and electronic device 702' may include a second electronic module 706. Electronic system 700 may be a video wall, a public information display (PID), an antenna system, a sensing system, or a combination thereof, but is not limited thereto.

[0125] Electronic devices 702 and 702' may be similar to or substantially the same as electronic device 200. The first electronic module 704 and the second electronic module 706 may be similar to or substantially the same as the first electronic module 204 and the second electronic module 206, and will not be described in detail here.

[0126] The first electronic module 704 may include a plurality of electronic units 708 (i.e., first electronic units 708-1 to 708-4). The second electronic module 706 may include a plurality of electronic units 710 (i.e., second electronic units 710-1 to 710-4). Electronic units 708 and 710 may be similar to or substantially the same as the first electronic unit 208 and the second electronic unit 210, and will not be described in detail here. Electronic unit 708 may have a reference point 716, and electronic unit 710 may have a reference point 718. Reference points 716 and 718 may be similar to or substantially the same as reference points 216 and 218, and will not be described in detail here.

[0127] Adjacent columns of electronic unit 708 (e.g., column 1” and column 2”) have a spacing P1”, and adjacent rows of electronic unit 708 (e.g., row 1” and row 2”) have a spacing P3”. Similarly, adjacent columns of electronic unit 710 (e.g., column 3” and column 4”) have a spacing P2”, and adjacent rows of electronic unit 710 (e.g., row 3” and row 4”) have a spacing P4”. Spacings P1”, P2”, P3”, and P4” may be similar to or substantially the same as spacings P1, P2, P3, and P4. Figure 2 Similar to the embodiments described above, column 1 of electronic unit 708 (first electronic units 708-1 and 708-3) can define baseline 712, and column 3 of electronic unit 710 (second electronic units 710-1 and 710-3) can define baseline 714. Figure 7 In one embodiment, baseline 712 may be parallel to baseline 714.

[0128] Electronic system 700 has an offset design. In this embodiment, electronic unit 708 may be separated from electronic unit 710 (offset) by a distance in direction 2. For example, column 1” of electronic unit 708 may have an offset distance in direction 2 away from column 3” of electronic unit 710. Column 2” of electronic unit 708 may have an offset distance in direction 2 away from column 4” of electronic unit 710. The offset distance S” may be between baseline 712 and baseline 714 (or defined by baseline 712 and baseline 714). Specifically, the offset distance S” may be the distance from baseline 712 to baseline 714 in direction 2. Furthermore, the offset distance S” satisfies the following relationship:

[0129] 0 <S”≤(P1”+P2”) / 4,

[0130] Where P1” is the length of the aforementioned spacing P1”, and P2” is the length of the aforementioned spacing P2”. In some embodiments, the offset distance S”, spacing P1”, and spacing P2” may have the same unit of measurement, such as millimeters (mm) or micrometers (μm).

[0131] In another embodiment, the offset distance S” satisfies the following relationship:

[0132] (P1”+P2”) / 6≤S”≤(P1”+P2”) / 4.

[0133] If the offset distance S” is less than (P1”+P2”) / 6, the offset caused by the process error mentioned above may still be significant. In addition, if the offset distance S” is greater than (P1”+P2”) / 4, the offset distance S” of this offset design may affect the image displayed by the electronic system 700.

[0134] exist Figure 7 In some embodiments, the offset design may include offsetting electronic unit 708 upward (or offsetting electronic unit 710 downward). It should be understood that the offset design may include offsetting electronic unit 708 downward (or offsetting electronic unit 710 upward). In other embodiments, electronic unit 708 may be offset in other directions.

[0135] In some embodiments, in the electronic system 700, electronic device 702 has a gap relative to electronic device 702'. For example, such as Figure 7 As shown, electronic device 702 is separated from electronic device 702' by a gap distance G” in direction 1. Specifically, the gap distance G” is the minimum distance in direction 1 from edge 702-1 of electronic device 702 to edge 702'-1 of electronic device 702'. Furthermore, the gap distance G” satisfies the following relationship:

[0136] 0 < G” ≤ (P3” + P4”) / 4,

[0137] where P3” is the spacing P3” described above (the length of the spacing P3”), and P4” is the spacing P4” described above (the length of the spacing P4”). In some embodiments, the gap distance G”, the spacing P3”, and the spacing P4” may have the same unit of measurement, such as millimeters (mm) or micrometers (μm).

[0138] In another embodiment, the gap distance G” satisfies the following relationship:

[0139] (P3” + P4”) / 6 ≤ G” ≤ (P3” + P4”) / 4.

[0140] Similarly, if the gap distance G” is less than (P3” + P4”) / 6, the offset caused by the process error described above may still be significant. In addition, if the gap distance G” is greater than (P3” + P4”) / 4, the offset of the designed gap distance G” may affect the image displayed by the electronic system 700.

[0141] In the case where the length of the spacing P1” is approximately the same as the length of the spacing P3” and the length of the spacing P2” is approximately the same as the length of the spacing P4”, the gap distance G” satisfies the following relationship:

[0142] 0 < G” ≤ (P1” + P2”) / 4, or

[0143] (P1” + P2”) / 6 ≤ G” ≤ (P1” + P2”) / 4.

[0144] In some embodiments, the baseline 712 may intersect the baseline 714 (i.e., the baseline 712 may not be parallel to the baseline 714) (not shown). In this case, the offset distance S” (the distance from the reference point 716 of the first electronic unit 708-1 to the reference point 718 of the second electronic unit 710-1 in the direction 2) is the average of the distance S1” and the distance S2” (S” = (S1” + S2”) / 2). The distance S1” may be the distance from the reference point 716 of the first electronic unit 708-1 to the baseline 714 in the direction 2, and the distance S2” may be the distance from the reference point 718 of the second electronic unit 710-1 to the baseline 712 in the direction 2. As long as the features between the embodiments do not violate the inventive spirit or conflict with each other, they can be used in any combination.

[0145] The foregoing outlines features of numerous embodiments to enable those skilled in the art to better understand this disclosure from various perspectives. Those skilled in the art will understand that other processes and structures can be readily designed or modified based on this disclosure to achieve the same purpose and / or the same advantages as the embodiments described herein. Those skilled in the art will also understand that these multiple equivalent structures do not depart from the inventive spirit and scope of this disclosure. Various changes, substitutions, or modifications can be made to this disclosure without departing from its inventive spirit and scope.

Claims

1. An electronic device comprising: A first electronic module includes a plurality of first electronic units arranged in multiple columns, each of the plurality of first electronic units having a first reference point, wherein the first reference point of a first top column of the plurality of first electronic units defines a first baseline; and A second electronic module, adjacent to the first electronic module, comprises a plurality of second electronic units arranged in multiple columns, each of the plurality of second electronic units having a second reference point, wherein the second reference point of a second top column of the plurality of second electronic units defines a second baseline. The first baseline mentioned above intersects with the second baseline mentioned above. The first electronic module is adjacent to the second electronic module in a first direction, and the plurality of columns of the plurality of first electronic units are arranged along a second direction, and the plurality of columns of the plurality of second electronic units are arranged along the second direction, wherein the first direction is perpendicular to the second direction. The offset distance S between the first baseline and the second baseline satisfies the following relationship: 0 <S≤(P1+P2) / 4, Wherein P1 is the spacing defined by two adjacent first electronic units located in the first top column and an adjacent column adjacent to the first top column, and P2 is the spacing defined by two adjacent second electronic units located in the second top column and an adjacent column adjacent to the second top column. Wherein, the first reference point of the first electronic unit in the first top column is separated from the second baseline by a first distance S1 in the second direction. The second reference point of the second electronic unit in the second top column is separated from the first baseline by a second distance S2 in the second direction. The aforementioned offset distance S follows the following relationship: S = (S1 + S2) / 2.

2. The electronic device as claimed in claim 1, characterized in that: The aforementioned first distance S1 is the distance from the first reference point of the first electronic unit in the first top row of the first electronic module, which is closest to the second electronic module, to the second baseline in the second direction; and The second distance S2 is the distance from the second reference point of the second electronic unit in the second top column of the second electronic module, which is closest to the first electronic module, to the first baseline in the second direction.

3. An electronic device comprising an electronic module, wherein the electronic module includes: A first electronic unit includes a plurality of first electronic components arranged in multiple columns, each of the plurality of first electronic components having a first reference point, wherein the first reference point of a first top column of the plurality of first electronic components defines a first baseline; and A second electronic unit, adjacent to the first electronic unit, comprises a plurality of second electronic components arranged in multiple columns, each of the plurality of second electronic components having a second reference point, wherein the second reference point of a second top column of the plurality of second electronic components defines a second baseline. The first baseline mentioned above intersects with the second baseline mentioned above. The first electronic unit is adjacent to the second electronic unit in a first direction, and the plurality of columns of the plurality of first electronic components are arranged along a second direction, and the plurality of columns of the plurality of second electronic components are arranged along the second direction, wherein the first direction is perpendicular to the second direction. The offset distance S between the first baseline and the second baseline satisfies the following relationship: 0 <S≤(P1+P2) / 4, Wherein P1 is the spacing defined by two adjacent first electronic components located in the first top column and an adjacent column adjacent to the first top column, and P2 is the spacing defined by two adjacent second electronic components located in the second top column and an adjacent column adjacent to the second top column. Wherein, the first reference point of the first electronic component in the first top column is separated from the second baseline by a first distance S1 in the second direction. The second reference point of the second electronic component in the second top column is separated from the first baseline by a second distance S2 in the second direction. The aforementioned offset distance S follows the following relationship: S = (S1 + S2) / 2.

4. The electronic device as claimed in claim 3, characterized in that, The aforementioned offset distance S satisfies the following relationship: (P1+P2) / 6≤S≤(P1+P2) / 4.

5. The electronic device as claimed in claim 3, characterized in that, The gap distance G between the first electronic unit and the second electronic unit in the first direction satisfies the following relationship: 0 <G≤(P1+P2) / 4。 6. The electronic device as claimed in claim 5, characterized in that, The aforementioned gap distance G satisfies the following relationship: (P1+P2) / 6≤G≤(P1+P2) / 4.

7. The electronic device as claimed in claim 3, characterized in that, In the first top column, two adjacent first electronic components have a spacing P3, and in the second top column, two adjacent second electronic components have a spacing P4. The first electronic unit is separated from the second electronic unit by a gap distance G in the first direction, wherein the gap distance G satisfies the following relationship: 0 <G≤(P3+P4) / 4。 8. The electronic device as claimed in claim 7, characterized in that, The aforementioned gap distance G satisfies the following relationship: (P3+P4) / 6≤G≤(P3+P4) / 4.

9. The electronic device as claimed in claim 3, characterized in that, The aforementioned plurality of first electronic components and the aforementioned plurality of second electronic components are light-emitting diodes, sensors, antenna units, or combinations thereof.

10. The electronic device as claimed in claim 3, characterized in that, The first distance S1 is the distance from the first reference point of the first electronic component, which is closest to the second electronic unit in the first top row of the first electronic unit, to the second baseline in the second direction.

11. The electronic device as claimed in claim 3, characterized in that, The second distance S2 is the distance from the second reference point of the second electronic component that is closest to the first electronic unit in the second top row of the second electronic unit to the first baseline in the second direction.

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