A multi-mode power amplifier circuit for electronic warfare and dual band communication systems
By introducing reconfigurable stubs and drain power supply circuit adjustments into the multimode power amplifier, the switching between ultra-wideband and dual-band communication modes was realized, solving the problem that existing technologies could not simultaneously cover electronic warfare and dual-band communication, and achieving high-performance operation.
Patent Information
- Application Number
- CN202211362590.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-02
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2042-11-02
AI Technical Summary
Existing multimode power amplifiers cannot simultaneously cover the ultra-wideband and dual-band operating modes required for electronic warfare in multimode and multi-system communication systems. Traditional designs suffer from large size and complex peripheral circuits.
By combining preamplifier and power amplifier circuits with a reconfigurable stub structure, the switching between ultra-wideband and dual communication bands can be achieved by adjusting the control voltage and drain power supply circuit. The center frequency is changed by utilizing the changes in the capacitance and inductance values in the reconfigurable stub, and the mode switching is achieved by controlling the on-chip voltage and external voltage.
It achieves high-performance ultra-wideband and dual-band multi-mode operation, with output power and power-added efficiency reaching excellent levels in different modes, meeting the needs of electronic warfare and dual-band communication systems.
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Figure CN115664358B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of microwave integrated circuit technology, specifically relating to a multimode power amplifier circuit for electronic warfare and dual-band communication systems. Background Technology
[0002] Power amplifiers (PAs), as the core final-stage device in the transmit link, play a crucial role in the operating range of the entire wireless communication system. With the development of multi-mode and multi-system communication technologies, communication systems need to be compatible with multiple different frequency bands, requiring power amplifiers to have dual-band operation capabilities. With the development of military electronic integration technology, power amplifiers also need to possess electronic warfare capabilities, especially requiring microwave power amplifiers to cover both narrow-band dual-band communication frequencies and ultra-wideband (e.g., greater than 5 octaves) operating frequencies required for electronic warfare. Traditional power amplifiers using switching methods suffer from large size and complex external circuitry, making them unable to meet the needs of multi-mode and multi-system applications.
[0003] In recent years, researchers have conducted numerous studies on multi-band amplifiers for multi-mode and multi-system applications, with representative achievements including:
[0004] In 2005, Koji Uchida et al. from Hyogo Prefectural University in Japan implemented a power amplifier that could operate in both 800MHz and 1500MHz frequency bands using a dual-frequency matching network designed with lumped elements. However, the hybrid integration method resulted in a large size and poor suppression between the two frequency bands. See [K.Uchida, Y.Takayama, T.Fujita and K.Maenaka, "Dual-band GaAs FET power amplifier with two-frequency matching circuits," 2005 Asia-Pacific Microwave Conference Proceedings, 2005, pp.4pp.-, doi:10.1109 / APMC.2005.1606222.].
[0005] In 2008, Chang-Tsung Fu et al. from National Chiao Tung University in Taiwan designed a low-noise amplifier with continuously adjustable frequency bands from 2.4 to 5.4 GHz. They achieved band switching by using a switching inductor with a value that can be changed four times for coarse adjustment combined with a varactor diode for fine adjustment. However, this structure is essentially a low-noise amplifier with low output power and cannot cover ultra-wideband operation. (See [C.-T.Fu, C.-L.Ko, C.-N.Kuo and Y.-Z.Juang, "A 2.4–5.4-GHz WideTuning-Range CMOS Reconfigurable Low-Noise Amplifier," in IEEE Transactions on Microwave Theory and Techniques, vol.56, no.12, pp.2754-2763, Dec.2008, doi:10.1109 / TMTT.2008.2006804.]).
[0006] In 2015, Ming-Lung Lee et al. from National Taiwan University designed a multimode power amplifier using an adjustable input matching network and a wideband output matching network. This amplifier can operate in multiple modes at frequencies with three different modulation schemes: 1.95 GHz, 2.35 GHz, and 2.45 GHz. The gain is greater than 41 dB and the output power is greater than 28 dBm. However, it is limited to switching between a few narrow communication frequency bands and cannot cover ultra-wideband operating modes. See [Lee ML, Liou CY, Tsai WT, et al. Fully Monolithic BiCMOS Reconfigurable Power Amplifier for Multi-Mode and Multi-Band Applications[J].IEEE Transactions on Microwave Theory & Techniques, 2015, 63(2):614-624.].
[0007] In 2018, Kwangseok Choi et al. from Seoul National University in South Korea designed a 6–18 GHz power amplifier using a line-based duplexer, which could operate in two frequency bands: 5–11 GHz and 9–18 GHz. However, the power amplifier could not switch modes between electronic warfare and communication systems. See [K. Choi, H. Park, M. Kim, J. Kim and Y. Kwon, "A 6–18-GHz Switchless Reconfigurable Dual-Band Dual-Mode PA MMIC Using Coupled-Line-Based Diplexer," in IEEE Transactions on Microwave Theory and Techniques, vol.66, no.12, pp.5685-5695, Dec.2018, doi:10.1109 / TMTT.2018.2879356.].
[0008] Current multimode power amplifier designs only switch between operating modes in a few narrow frequency bands. The main technical directions include dual-frequency matching networks, adjustable input matching networks, and duplexer forms. There are no reports yet on power amplifiers that can simultaneously cover the ultra-wideband operating modes required for electronic warfare. Summary of the Invention
[0009] The purpose of this invention is to provide a multimode power amplifier circuit for electronic warfare and dual-band communication systems, which can simultaneously achieve ultra-wideband and dual-communication band multimode operation while maintaining high performance.
[0010] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0011] A multimode power amplifier circuit for electronic warfare and dual-band communication systems includes a pre-amplifier circuit, a post-amplifier circuit, and a DC blocking capacitor C disposed between the pre-amplifier circuit and the post-amplifier circuit. B2 ;
[0012] The preamplifier circuit includes: a DC blocking capacitor C B1 , Stabilizing resistor R in Input matching inductors L0 and L1, transistor Q0, output matching inductor L2, first, second, and third reconfigurable branches, gate power supply circuit and drain power supply circuit; DC blocking capacitor C B1 One end serves as the input to the preamplifier circuit, and the other end is connected in sequence to a stabilizing resistor R. inThe input matching inductor L0, input matching inductor L1, and the gate of transistor Q0 are connected. The source of transistor Q0 is grounded, and its drain is connected to one end of the output matching inductor L2. The other end of the output matching inductor L2 serves as the output of the preamplifier circuit and is connected to the DC blocking capacitor C. B2 One end; the first reconfigurable stub is connected in parallel to the stabilizing resistor R. in The second reconfigurable stub is connected in parallel between the input matching inductor L0 and the input matching inductor L1. The third reconfigurable stub and the gate power supply circuit are both connected in parallel between the input matching inductor L1 and the gate of transistor Q0. The three reconfigurable stubs have the same structure and all include a capacitor C. pn Inductor L pn DC blocking capacitor C sn and switching transistor Q sn Capacitor C pn and inductor L pn The parallel connections form a bandpass network, with one end connected to a DC blocking capacitor C. sn With switching transistor Q sn The drains of the transistors are connected, and the switching transistor Q is connected. sn The source is grounded, and the switching transistor Q in the first, second, and third reconfigurable stubs. sn The gates are connected and all are connected to the DC control power supply V. gc Its other end is connected to its corresponding access point; the gate power supply circuit is connected in parallel between the input matching inductor L1 and the gate of transistor Q0, including the input matching inductor L... g Isolation resistor R G1 and the isolation resistor C c1 Input matching inductor L g One end is connected between inductor L1 and the gate of transistor Q0, and the other end is connected to the isolation resistor R. G1 One end, the isolation resistor R G1 The other end is connected to a DC power supply V. gs1 Coupling capacitor C c1 One end, coupling capacitor C c1 The other end is grounded; the drain power supply circuit is connected in parallel with the output matching inductor L2 and the DC blocking capacitor C. B2 It consists of two power supplies connected in parallel, one of which is an inductor L. D1,1 Parallel decoupling capacitor C c2,1 Upon arrival, C c2,1 The end is connected to a DC power supply V. ds1,1 The other path is an inductor L D1,2 Parallel decoupling capacitor C c2,2 Upon arrival, C c2,2 The end is connected to a DC power supply V. ds1,2 ;
[0013] The subsequent amplifier circuit includes: gate matching microstrip lines MLIN1, MLIN2, MLIN3, MLIN4, and MLIN5, and inductor L. g and L d Isolation resistor R G2 Decoupling capacitor C c3 and C B3 The fourth, fifth, and sixth reconfigurable branches; the first, second, and third RC networks; transistors Q1, Q2, and Q3; and the power supply circuit for the subsequent stage; one end of the gate-matching microstrip line MLIN1 serves as the input to the subsequent amplifier circuit, connected to a DC blocking capacitor C. B2 The other end is connected in sequence to inductor L. g Gate matching microstrip lines MLIN2 and MLIN3, and interlocking resistor R G2 One end, the isolation resistor R G2 The other end is connected to decoupling capacitor C. c3 One end and the supply voltage V gs2 Decoupling capacitor C c3 The other end is grounded; the gate matches the microstrip line MLIN1 and the inductor L. g The common connection points are respectively connected to one end of the first RC network and the fourth reconfigurable stub; the other end of the first RC network is connected to the gate of transistor Q1, the source of transistor Q1 is grounded, and the drain is connected to L. d One end, inductor L d The other end is connected to one end of MLIN5 via MLIN4; the other end of MLIN5 is connected to the subsequent power supply circuit and the decoupling capacitor C. B3 One end, decoupling capacitor C B3 The other end serves as the output of the subsequent amplifier circuit; inductor L g The common junction of the gate-matched microstrip line MLIN2 is connected to one end of the second RC network and the fifth reconfigurable stub, respectively. The other end of the second RC network is connected to the gate of transistor Q2. The source of transistor Q2 is grounded, and the drain is connected to inductor L. d The common connection between MLIN4 and MLIN5; the common connections of gate matching microstrip lines MLIN2 and MLIN3 are respectively connected to one end of the third RC network and the sixth reconfigurable stub, the other end of the RC network is connected to the gate of transistor Q3, the source of transistor Q3 is grounded, and the drain is connected to the common connection of gate matching microstrip lines MLIN4 and MLIN5; the subsequent power supply circuit includes a series inductor L D2 and the capacitor C connected in parallel to ground c4 L D2 and C c4 The common contact is connected to the DC power supply V. ds2 All three RC networks consist of resistors R n and capacitor C nThe components are connected in parallel; the fourth, fifth, and sixth reconfigurable branches have the same structure as the first reconfigurable branch, and the switching transistor Q in the fourth, fifth, and sixth reconfigurable branches is... sn The gates are connected and all are connected to the DC control power supply V. gc .
[0014] It should be noted that capacitor C pn Inductor L pn DC blocking capacitor C sn Switching transistor Q sn Resistance R n and capacitor C n The range of values for n in the equation is: n = 1, 2, 3.
[0015] This invention provides a multimode power amplifier circuit for electronic warfare and dual-band communication systems. By adjusting the control voltage and the drain power supply circuit of the pre-amplifier circuit, switching between ultra-wideband and dual communication bands can be achieved. The center frequencies of the two communication bands can be designed independently, i.e., by changing the values of the capacitors and inductors in the reconfigurable stub and the inductor in the drain power supply circuit of the pre-amplifier circuit. This is achieved through the on-chip voltage V... gc The switching between ultra-wideband and dual-communication band modes can be achieved by external voltage switching control, realizing multi-mode operation of high-performance power amplifiers in ultra-wideband and dual-communication band modes. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of Embodiment 1 of the present invention;
[0017] Figure 2 The figure shows the simulation results of Embodiment 1 of the present invention. Detailed Implementation
[0018] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in conjunction with the following specific embodiments and with reference to the accompanying drawings.
[0019] like Figure 1 As shown, this embodiment provides a multimode power amplifier circuit for electronic warfare and dual-band communication systems, including a pre-amplifier circuit, a post-amplifier circuit, and a DC blocking capacitor C between the pre-amplifier circuit and the post-amplifier circuit. B2The specific structures of the preamplifier and power amplifier circuits are set according to the aforementioned content and will not be repeated here. In the entire circuit, the transistor input terminals are matched using inductors, resistors, and microstrip lines, while the output terminals are matched using microstrip lines. After passing through a DC blocking capacitor, the transistors are connected to the multi-stage traveling-wave amplifier circuit via microstrip lines. A reconfigurable stub is introduced into the entire circuit. By changing the control voltage of the switching transistors in the reconfigurable stub and switching the drain power supply circuit of the preamplifier circuit, switching between ultra-wideband and communication bands can be achieved. Specifically:
[0020] When the control voltage V gc = -30V and the power supply circuit for the drain of the preceding stage is a DC source V ds1,1 When the power supply branch is connected, due to the DC source V ds1,1 Inductor L on the power supply branch D1,1 With a value of 1500nH, low-frequency signals cannot leak from the drain, and all reconfigurable branches are turned off. Therefore, the power amplifier operates in ultra-wideband mode. The RF signal is first amplified by the preamplifier circuit consisting of transistor Q0 and its matching network. The transistor Q0 in the preamplifier stage is matched with a smaller size to obtain flat amplification with an ultra-wideband bandwidth. The RF signal output from the preamplifier circuit passes through the DC blocking capacitor C. B2 The signal then enters the subsequent amplifier circuit. When the reconfigurable stub is turned off, the subsequent amplifier circuit is a distributed amplifier topology with a low-pass structure. The microstrip line MLIN1 at the input still participates in the output matching of transistor Q0. Transistors Q1, Q2, and Q3 are selected with different sizes to achieve optimal power and efficiency matching. The drain matching inductor L of transistor Q1... d Select an inductor for matching. DC blocking capacitor C B1 C B2 C B3 An external large capacitor is selected to effectively block DC at low frequencies, and an AC blocking inductor L is used. D1 and L D2 Choose an external large inductor to prevent low-frequency signal leakage.
[0021] When the control voltage V gc =0V and the drain power supply circuit of the preceding stage is switched to DC source V ds1,2 When the power supply branch is in operation, the bandpass network of the reconfigurable branch operates, and the DC source V ds1,1 Inductor L on the power supply branch D1,1 The value is 100nH. At this time, the power amplifier operates in dual-band communication mode, and the C in the reconfigurable stub is... p L p and C s The series inductance of the artificial transmission line forms a bandpass and bandstop network, where C p and L p This forms a high-frequency passband, and due to C sThe addition of [certain elements] forms a bandstop network, and the leakage of low-frequency signals due to the 100nH inductor creates a lower-frequency passband, where C [is involved]. s The center frequency of the low-frequency passband can be set by selecting a capacitor of 10pF or less.
[0022] Figure 2 This is a simulation result diagram of Embodiment 1 of the present invention. Figure 2 It can be seen that in ultra-wideband operating mode, the amplifier operates at a frequency of 0.03–6 GHz, with an output power greater than 41.3 dBm, a power-added efficiency greater than 48%, and a gain greater than 18 dB. In dual-communication band operating mode, the first band operates at a frequency of 0.3–0.6 GHz, with an output power greater than 40.4 dBm and a power-added efficiency greater than 55%, while the second band operates at a frequency of 2.4–2.7 GHz, with an output power greater than 40.2 dBm and a power-added efficiency greater than 45%.
[0023] In summary, the multimode power amplifier circuit proposed in this invention for electronic warfare and dual-band communication systems can achieve mode switching between ultra-wideband and dual-band communication by adjusting the control voltage of the switching transistor in the reconfigurable stub and switching the drain power supply circuit of the preamplifier circuit, thus realizing multimode operation of the high-performance power amplifier in ultra-wideband and dual communication bands.
Claims
1. A multi-mode microwave power amplifier circuit for an electronic warfare system and a dual-band communication system, comprising a pre-stage amplification circuit, a post-stage amplification circuit, a blocking capacitor C arranged between the pre-stage amplification circuit and the post-stage amplification circuit, B2 characterized in that The front-stage amplification circuit comprises a DC blocking capacitor C B1 , a stabilizing resistor R in , an input matching inductor L0 and an input matching inductor L1, a transistor Q0, an output matching inductor L2, a first, a second and a third reconfigurable branch, a gate power supply circuit and a drain power supply circuit; one end of the DC blocking capacitor C B1 serves as the input of the front-stage amplification circuit, and the other end is connected in sequence with the stabilizing resistor R in , the input matching inductor L0, the input matching inductor L1 and the gate of the transistor Q0, the source of the transistor Q0 is grounded, the drain is connected with one end of the output matching inductor L2, and the other end of the output matching inductor L2 is connected with one end of the DC blocking capacitor C B2 ; the first reconfigurable branch is connected in parallel between the stabilizing resistor R in and the input matching inductor L0, the second reconfigurable branch is connected in parallel between the input matching inductor L0 and the input matching inductor L1, and the third reconfigurable branch and the gate power supply circuit are both connected in parallel between the input matching inductor L1 and the gate of the transistor Q0; the three reconfigurable branches have the same structure and each comprises a capacitor C pn , an inductor L pn , a DC blocking capacitor C sn and a switching transistor Q sn ; the capacitor C pn and the inductor L pn are connected in parallel to form a band-pass network, one end of which is connected with the drain of the switching transistor Q sn through the DC blocking capacitor C sn , the source of the switching transistor Q sn is grounded, the gates of the switching transistor Q sn in the first, the second and the third reconfigurable branches are connected and are all connected to a DC control power supply V gc , and the other end is connected to a corresponding access point; the gate power supply circuit is connected in parallel between the input matching inductor L1 and the gate of the transistor Q0 and comprises an input matching inductor L g , a AC blocking resistor R G1 and a decoupling capacitor C c1 , one end of the input matching inductor L g is connected between the inductor L1 and the gate of the transistor Q0, the other end is connected with one end of the AC blocking resistor R G1 , the other end of the AC blocking resistor R G1 is respectively connected with a DC power supply V gs1 and one end of the decoupling capacitor C c1 , and the other end of the decoupling capacitor C c1 is grounded; the drain power supply circuit is connected in parallel between the output matching inductor L2 and the DC blocking capacitor C B2 and is composed of two parallel-connected power supply circuits, one of which is an inductor L D1,1 connected in parallel with a decoupling capacitor C c2,1 to ground, C c2,1 DC power supply V ds1,1 , the other is inductance L D1,2 Parallel decoupling capacitor C c2,2 to ground, C c2,2 DC power supply V ds1,2 ; The back-stage amplification circuit comprises: gate matching microstrip lines MLIN1, MLIN2, MLIN3, MLIN4, MLIN5, inductors L g , and L d , a DC blocking resistor R G2 , decoupling capacitors C c3 and C B3 , a fourth, a fifth and a sixth reconfigurable branch, a first, a second and a third RC network, transistors Q1, Q2 and Q3, and a back-stage power supply circuit; one end of the gate matching microstrip line MLIN1 is connected to the input of the back-stage amplification circuit, and the other end is connected to a DC blocking capacitor C B2 , the other end of the DC blocking capacitor C g is connected to an inductor L G2 , the gate matching microstrip line MLIN2, the gate matching microstrip line MLIN3 and one end of a DC blocking resistor R G2 , the other end of the DC blocking resistor R c3 is connected to one end of a decoupling capacitor C gs2 and a power supply voltage V c3 , the other end of the decoupling capacitor C g is connected to the ground; the common connection point of the gate matching microstrip line MLIN1 and the inductor L d is connected to one end of the first RC network and the fourth reconfigurable branch; the other end of the first RC network is connected to the gate of the transistor Q1, the source of the transistor Q1 is connected to the ground, and the drain is connected to one end of an inductor L d , the other end of the inductor L B3 is connected to one end of the microstrip line MLIN5 through the microstrip line MLIN4; the other end of the microstrip line MLIN5 is connected to the back-stage power supply circuit and one end of a decoupling capacitor C B3 , and the other end of the decoupling capacitor C g is connected to the output of the back-stage amplification circuit; the common connection point of the inductor L d and the gate matching microstrip line MLIN2 is connected to one end of the second RC network and the fifth reconfigurable branch, and the other end of the second RC network is connected to the gate of the transistor Q2, the source of the transistor Q2 is connected to the ground, and the drain is connected to the common connection point between the inductor L D2 and the microstrip line MLIN4; the common connection point of the gate matching microstrip line MLIN2 and the gate matching microstrip line MLIN3 is connected to one end of the third RC network and the sixth reconfigurable branch, the other end of the third RC network is connected to the gate of the transistor Q3, the source of the transistor Q3 is connected to the ground, and the drain is connected to the common connection point of the gate matching microstrip line MLIN4 and the gate matching microstrip line MLIN5; the back-stage power supply circuit comprises an inductor L c4 and a capacitor C D2 connected in parallel to the ground, the common connection point of the inductor L c4 and the capacitor C B3 is connected to the common connection point of the microstrip line MLIN5 and the decoupling capacitor C D2 , and the other end of the inductor L ds2 is connected to a DC power supply V; three RC networks are composed of resistor R n and capacitor C n in parallel; the fourth, fifth and sixth reconfigurable branches are of the same structure as the first reconfigurable branch, the gates of the switch transistors Q sn in the fourth, fifth and sixth reconfigurable branches are connected and are connected to DC control power supply V gc .
Citation Information
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