Clock Synchronization Method, Apparatus, System, Device, and Storage Medium

Abstract

The present disclosure provides a clock synchronization method, apparatus, system, device, and storage medium, which relate to the field of artificial intelligence technology, and specifically relate to technical fields such as autonomous driving and industrial control. The clock synchronization method includes: determining the local time of a first slave node by responding to a first level output by a master node through a second level interface; receiving a first message sent by the master node through the second communication interface, where the first message carries the local time of the first master node; determining the local time of a second slave node by responding to a second level output by the master node through the second level interface; receiving a second message sent by the master node through the second communication interface, where the second message carries the local time of the second master node; and performing clock synchronization processing based on the local time of the first slave node, the local time of the first master node, the local time of the second slave node, and the local time of the second master node. The present disclosure can reduce the resource overhead of clock synchronization processing.

Description

Technical Field

[0001] The present disclosure relates to the field of artificial intelligence technologies, specifically to technical fields such as autonomous driving and industrial control, and particularly relates to a clock synchronization method, apparatus, system, device, and storage medium. Background Art

[0002] The vehicle network of an autonomous driving vehicle generally includes multiple processors. The local time of each processor is maintained by its respective independent clock source, and the frequencies of the respective clock sources may be different. After long-term operation, a large time difference may occur in the local times of different processors.

[0003] To solve the problems caused by time inconsistency, clock synchronization processing needs to be performed for different processors. Summary of the Invention

[0004] The present disclosure provides a clock synchronization method, apparatus, device, and storage medium.

[0005] According to one aspect of the present disclosure, there is provided a clock synchronization method applied to a slave node. The slave node has a second level interface and a second communication interface. The second level interface corresponds to a first level interface of a master node, and the second communication interface corresponds to a first communication interface of the master node. The method includes: determining a first slave node local time through the second level interface in response to the master node outputting a first level through the first level interface; receiving, through the second communication interface, a first message sent by the master node through the first communication interface, where the first message carries a first master node local time when the master node outputs the first level; determining a second slave node local time through the second level interface in response to the master node outputting a second level through the first level interface, where the second level is a flipped level of the first level; receiving, through the second communication interface, a second message sent by the master node through the first communication interface, where the second message carries a second master node local time when the master node outputs the second level; and performing clock synchronization processing based on the first slave node local time, the first master node local time, the second slave node local time, and the second master node local time.

[0006] According to another aspect of the present disclosure, a clock synchronization method is provided, which is applied to a master node. The master node has a first level interface and a first communication interface. The first level interface corresponds to a second level interface of a slave node, and the first communication interface corresponds to a second communication interface of the slave node. The method includes: outputting a first level to the slave node through the first level interface, so that the slave node determines the first local time of the slave node when the master node outputs the first level; sending a first message to the slave node through the first communication interface, where the first message carries the first local time of the master node when the master node outputs the first level; outputting a second level to the slave node through the first level interface, so that the slave node determines the second local time of the slave node when the master node outputs the second level; where the second level is a flipped level of the first level; sending a second message to the slave node through the first communication interface, where the second message carries the second local time of the master node when the master node outputs the second level; where the slave node is used to perform clock synchronization processing based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node.

[0007] According to another aspect of the present disclosure, a clock synchronization device is provided, which is applied to a slave node. The slave node has a second level interface and a second communication interface. The second level interface corresponds to a first level interface of a master node, and the second communication interface corresponds to a first communication interface of the master node. The device includes: a first determination module, configured to determine the first local time of the slave node by responding to the master node outputting a first level through the first level interface through the second level interface; a first reception module, configured to receive a first message sent by the master node through the first communication interface through the second communication interface, where the first message carries the first local time of the master node when the master node outputs the first level; a second determination module, configured to determine the second local time of the slave node by responding to the master node outputting a second level through the first level interface through the second level interface; where the second level is a flipped level of the first level; a second reception module, configured to receive a second message sent by the master node through the first communication interface through the second communication interface, where the second message carries the second local time of the master node when the master node outputs the second level; a synchronization module, configured to perform clock synchronization processing based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node.

[0008] According to another aspect of the present disclosure, a clock synchronization device is provided, which is applied to a master node. The master node has a first level interface and a first communication interface. The first level interface corresponds to a second level interface of a slave node, and the first communication interface corresponds to a second communication interface of the slave node. The device includes: a first output module, configured to output a first level to the slave node through the first level interface, so that the slave node determines a first local time of the slave node when the master node outputs the first level; a first sending module, configured to send a first message to the slave node through the first communication interface, where the first message carries a first local time of the master node when the master node outputs the first level; a second output module, configured to output a second level to the slave node through the first level interface, so that the slave node determines a second local time of the slave node when the master node outputs the second level; where the second level is a flipped level of the first level; a second sending module, configured to send a second message to the slave node through the first communication interface, where the second message carries a second local time of the master node when the master node outputs the second level; where the slave node is configured to perform clock synchronization processing based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node.

[0009] According to another aspect of the present disclosure, a clock synchronization system is provided, including: the device applied to the master node according to any one of the above aspects, and the device applied to the slave node according to any one of the above aspects.

[0010] According to another aspect of the present disclosure, an electronic device is provided, including: at least one processor; and a memory communicatively connected to the at least one processor; where the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method according to any one of the above aspects.

[0011] According to another aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, where the computer instructions are used to cause the computer to execute the method according to any one of the above aspects.

[0012] According to another aspect of the present disclosure, a computer program product is provided, including a computer program, where the computer program implements the method according to any one of the above aspects when executed by a processor.

[0013] According to the technical solution of the present disclosure, the resource overhead of clock synchronization processing can be reduced.

[0014] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it used to limit the scope of the present disclosure. Other features of the present disclosure will become readily apparent from the following description. Description of the Drawings

[0015] The drawings are used to better understand the solution and do not constitute a limitation to the present disclosure. Among them:

[0016] Figure 1 is a schematic diagram according to the first embodiment of the present disclosure;

[0017] Figure 2 is a schematic diagram according to the second embodiment of the present disclosure;

[0018] Figure 3 is a schematic diagram of the application scenario corresponding to the embodiment of the present disclosure;

[0019] Figure 4 is a schematic diagram according to the third embodiment of the present disclosure;

[0020] Figure 5 is a schematic diagram according to the fourth embodiment of the present disclosure;

[0021] Figure 6 is a schematic diagram according to the fifth embodiment of the present disclosure;

[0022] Figure 7 is a schematic diagram according to the sixth embodiment of the present disclosure;

[0023] Figure 8 is a schematic diagram of an electronic device for implementing the clock synchronization method of the embodiment of the present disclosure. Detailed Embodiments

[0024] The following describes exemplary embodiments of the present disclosure in conjunction with the accompanying drawings. Various details of the embodiments of the present disclosure are included to assist understanding, and they should be considered merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0025] In the related art, clock synchronization is usually implemented based on Ethernet, and each processor needs to access the Ethernet using a network card, which requires dedicated hardware and incurs a large resource overhead.

[0026] To reduce the resource overhead of clock synchronization processing, the present disclosure provides the following embodiments.

[0027] Figure 1is a schematic diagram according to the first embodiment of the present disclosure, and the present embodiment provides a clock synchronization method. The method of the present embodiment can be applied to a slave node, the slave node having a second level interface and a second communication interface, the second level interface corresponds to the first level interface of the master node, and the second communication interface corresponds to the first communication interface of the master node, such as Figure 1 As shown, the method includes:

[0028] 101. Determine, via the second level interface, a local time of a first slave node in response to the master node outputting a first level via the first level interface.

[0029] 102. Receive, through the second communication interface, a first message sent by the master node through the first communication interface, where the first message carries the first master node local time when the master node outputs the first level.

[0030] 103. Determine, via the second level interface, a local time of a second slave node in response to the master node outputting a second level via the first level interface; wherein the second level is an inversion level of the first level.

[0031] 104. Receive, through the second communication interface, a second message sent by the master node through the first communication interface, where the second message carries the second master node local time when the master node outputs the second level.

[0032] 105. Perform clock synchronization based on the local time of the first slave node, the local time of the first master node, the local time of the second slave node, and the local time of the second master node.

[0033] Among them, the master node is the node that provides the reference time, and the slave node is the node to be synchronized.

[0034] Taking the field of autonomous driving as an example, the entire vehicle network may include multiple processors. The master node may be selected as one of the multiple processors, and the other processors may serve as slave nodes.

[0035] Both the master node and the slave node have a level interface and a communication interface, that is, the master node and the slave node have their own hardware, rather than additional hardware.

[0036] For the purpose of distinction, the level interface and the communication interface on the master node may be referred to as a first level interface and a first communication interface, and the level interface and the communication interface on the slave node may be referred to as a second level interface and a second communication interface.

[0037] A level interface refers to an interface that outputs high and low level signals. For example, the level interface is a General Purpose Input Output (GPIO) interface.

[0038] That the first level and the second level are inverted levels means that if the first level is a high level, the second level is a low level; if the first level is a low level, the second level is a high level. The specific values of the high and low levels can be set according to actual needs.

[0039] A communication interface refers to an interface that outputs data signals. For example, the communication interface may include at least one of the following items:

[0040] Universal Asynchronous Receiver Transmitter (URAT) interface, Inter Integrated Circuit (I2C) interface, Serial Peripheral Interface (SPI).

[0041] The master node can send data signals to the slave node through the communication interface, which are respectively called the first message and the second message. The first message carries the first master node local time, and the first master node local time is the time when the master node outputs the first level; the second message carries the second master node local time, and the second master node local time is the time when the master node outputs the second level.

[0042] Taking the GPIO interface as an example, the speed of the GPIO for transmitting level signals is very fast. That is, when the master node outputs a level signal through the GPIO interface, it can be considered that the slave node receives the level signal simultaneously. The slave node can record the local time of the slave node when the master node outputs the level signal.

[0043] In addition, the master node can also send the local time of the master node when the master node outputs the level signal to the slave node through the communication interface.

[0044] Therefore, the slave node can obtain the local time of the master node and the local time of the slave node for the same event (the master node outputs the level signal). Based on the local time of the master node and the local time of the slave node, clock synchronization processing can be performed on the local clock source of the slave node.

[0045] In this embodiment, level signals are transmitted through a level interface, and messages are transmitted through a communication interface. Clock synchronization processing is performed based on the relevant time of the level signals and the relevant time of the messages. Since the level interface and the communication interface are the interfaces of the master node and the slave node, the interfaces of the master node and the slave node can be used for clock synchronization processing without the need to additionally introduce dedicated hardware devices such as network cards, thereby reducing the resource overhead of clock synchronization processing.

[0046] Figure 2 FIG. is a schematic diagram according to the second embodiment of the present disclosure. This embodiment provides a clock synchronization method. The method of this embodiment can be applied to a master node. The master node has a first level interface and a first communication interface. The first level interface corresponds to a second level interface of a slave node, and the first communication interface corresponds to a second communication interface of the slave node. As Figure 2 shown, the method includes:

[0047] 201. Output a first level to the slave node through the first level interface, so that the slave node determines the first local time of the slave node when the master node outputs the first level.

[0048] 202. Send a first message to the slave node through the first communication interface. The first message carries the first local time of the master node when the master node outputs the first level.

[0049] 203. Output a second level to the slave node through the first level interface, so that the slave node determines the second local time of the slave node when the master node outputs the second level; wherein, the second level is the inverted level of the first level.

[0050] 204. Send a second message to the slave node through the first communication interface. The second message carries the second local time of the master node when the master node outputs the second level.

[0051] Wherein, the slave node is used to perform clock synchronization processing based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node.

[0052] Wherein, the master node is a node that provides a reference time, and the slave node is a node to be synchronized.

[0053] Taking the field of autonomous driving as an example, the vehicle network can include multiple processors. The master node can be selected as one of the multiple processors, and the other processors can be used as slave nodes.

[0054] Both the master node and the slave node have a level interface and a communication interface, that is, the hardware built into the master node and the slave node, rather than additional hardware.

[0055] For the sake of distinction, the level interface and the communication interface on the master node can be called the first level interface and the first communication interface, and the level interface and the communication interface on the slave node can be called the second level interface and the second communication interface.

[0056] The level interface refers to an interface that outputs high and low level signals. For example, the level interface is a General Purpose Input Output (GPIO) interface.

[0057] The first level and the second level being inverted levels means that if the first level is high, the second level is low; if the first level is low, the second level is high. The specific values of the high and low levels can be set according to actual needs.

[0058] The communication interface refers to an interface that outputs data signals. For example, the communication interface can include at least one of the following items:

[0059] Universal Asynchronous Receiver Transmitter (URAT) interface, Inter Integrated Circuit (I2C) interface, Serial Peripheral Interface (SPI).

[0060] The master node can send data signals to the slave node through the communication interface, which are called the first message and the second message respectively. The first message carries the first master node local time, which is the time when the master node outputs the first level; the second message carries the second master node local time, which is the time when the master node outputs the second level.

[0061] Taking the GPIO interface as an example, the speed of the GPIO transmitting the level signal is very fast. That is, when the master node outputs the level signal through the GPIO interface, it can be considered that the slave node receives the level signal at the same time. The slave node can record the local time of the slave node when the master node outputs the level signal.

[0062] In addition, the master node can also send the local time of the master node when the master node outputs the level signal to the slave node through the communication interface.

[0063] Therefore, the master node local time and the slave node local time of the same event (the master node output level signal) can be obtained from the slave node. Based on the master node local time and the slave node local time, clock synchronization processing can be performed on the local clock source of the slave node.

[0064] In this embodiment, level signals are transmitted through the level interface, and messages are transmitted through the communication interface. Clock synchronization processing is performed based on the relevant time of the level signal and the relevant time of the message. Since the level interface and the communication interface are interfaces possessed by the master node and the slave node, clock synchronization processing can be performed using the interfaces built into the master node and the slave node, without the need to additionally introduce dedicated hardware devices such as network cards, thereby reducing the resource overhead of clock synchronization processing.

[0065] To better understand the embodiments of the present disclosure, the application scenarios of the embodiments of the present disclosure are described. This embodiment can be applied to the clock synchronization process of autonomous vehicles.

[0066] An autonomous vehicle may include multiple processors, such as Figure 3 shown, the multiple processors are respectively represented by the first processor to the third processor. Different processors can control different devices. For example, the multiple processors may include: a body processor, an autonomous driving processor, an in-vehicle entertainment system processor, etc.

[0067] During clock synchronization, one of the processors can be selected as the master node according to actual needs, and the remaining processors as slave nodes. For example, the first processor is used as the master node 301, and the second processor and the third processor are used as slave nodes 302a and 302b.

[0068] Both the master node and the slave node are equipped with a level interface and a communication interface, as Figure 3 shown, the level interface takes the GPIO interface as an example, and the communication interface takes the SPI interface as an example. Additionally, for distinction, the GPIO interface and the SPI interface of the master node can be respectively referred to as the first GPIO interface and the first SPI interface, and the GPIO interface and the SPI interface of the slave node can be respectively referred to as the second GPIO interface and the second SPI interface. The first GPIO interface of the master node can be connected to the second GPIO interface of the slave node through a wire, and the first SPI interface of the master node can be connected to the second SPI interface of the slave node through an SPI bus.

[0069] In addition, the master node may further include a master controller, and the slave node may further include a slave controller. The master controller is configured to control the first GPIO interface of the master node to output level signals (a first level and a second level), and send messages (a first message and a second message) through the first SPI interface of the master node. The slave controller is configured to respond to the level signal output by the master node through the second GPIO interface of the slave node to determine the corresponding local time of the slave node, receive the message through the second SPI interface of the slave node, obtain the corresponding local time of the master node from the message, and then perform clock synchronization processing based on the local time of the slave node and the local time of the master node.

[0070] Combined with the above application scenarios, the present disclosure also provides a clock synchronization method.

[0071] Figure 4 FIG. is a schematic diagram according to the third embodiment of the present disclosure. This embodiment provides a clock synchronization method.

[0072] As Figure 4 shown, the clock synchronization method provided in this embodiment includes:

[0073] 401. The master node outputs a first level to the slave node through a first level interface.

[0074] Among them, the master controller of the master node can control the first level interface to output the first level, and can record the local time of the master node at this time. The local time of the master node at this time can be referred to as the first local time of the master node, denoted as master_T1.

[0075] 402. The slave node determines a first local time of the slave node in response to the master node outputting the first level through the first level interface through a second level interface.

[0076] Among them, the first level interface of the master node and the second level interface of the slave node can be connected by a wire. After the master node outputs the first level through the first level interface, the slave node can learn of this event and determine the local time of the slave node at this time. The local time of the slave node at this time can be referred to as the first local time of the slave node, denoted as slave_T1.

[0077] 403. The master node sends a first message to the slave node through a first communication interface, and the first message carries the first local time of the master node when the master node outputs the first level.

[0078] Among them, the first message carries the above-mentioned master_T1.

[0079] 404. The slave node receives the first message through a second communication interface and obtains the first local time of the master node from the first message.

[0080] Among them, after receiving the first message from the slave node, it can be parsed to obtain the first master node local time master_T1 therefrom.

[0081] 405. The master node, after a preset duration elapses after outputting the first level, outputs a second level to the slave node through the first level interface.

[0082] Among them, the preset duration is an empirical value, and generally the hardware time required for level inversion and task scheduling time, etc. will be considered.

[0083] For example, if the preset duration is 5 seconds, then 5 seconds after outputting the first level, the main controller of the master node can control the first level interface to output the second level.

[0084] If the first level is a low level, then the second level is a high level; or, if the first level is a high level, then the second level is a low level.

[0085] In addition, the master node can also record the master node local time here, which is called the second master node local time, denoted by master_T2.

[0086] 406. The slave node, through the second level interface, in response to the master node outputting the second level through the first level interface, determines the second slave node local time.

[0087] Among them, the first level interface of the master node and the second level interface of the slave node can be connected by a wire. After the master node outputs the second level through the first level interface, the slave node can learn of this event and determine the slave node local time at this time. The slave node local time at this time can be called the second slave node local time, denoted by slave_T2.

[0088] 407. The master node sends a second message to the slave node through the first communication interface, and the second message carries the second master node local time when the master node outputs the second level.

[0089] Among them, the second message carries the above-mentioned master_T2.

[0090] 408. The slave node, through the second communication interface, receives the second message and obtains the second master node local time from the second message.

[0091] Among them, after the slave node receives the second message, it can be parsed to obtain the second master node local time master_T2 therefrom.

[0092] 409. The slave node performs clock synchronization processing based on the first slave node local time, the first master node local time, the second slave node local time, and the second master node local time.

[0093] Among them, the clock synchronization processing may include: synchronizing the clock time of the local clock source of the slave node, and / or synchronizing the clock frequency of the local clock source.

[0094] For clock time synchronization, the clock time of the local clock source of the slave node may be synchronized based on the time difference between the first slave node local time and the first master node local time, and / or the time difference between the second slave node local time and the second master node local time.

[0095] For clock frequency synchronization, the clock frequency of the local clock source of the slave node may be synchronized based on the first slave node local time and the second slave node local time.

[0096] The calculation formula for clock time synchronization may be:

[0097] T’ = T + path_delay;

[0098] path_delay = master_T1 - slave_T1; or,

[0099] path_delay = master_T2 - slave_T2; or,

[0100] path_delay = ((master_T1 - slave_T1) + (master_T2 - slave_T2)) / 2;

[0101] Among them, T’ is the synchronized time, T is the time before synchronization, path_delay is the path delay, master_T1 is the first master node local time, slave_T1 is the first slave node local time, master_T2 is the second master node local time, and slave_T2 is the second slave node local time.

[0102] Taking the interval duration between the first level and the second level being 5 seconds as an example, the calculation formula for clock frequency synchronization may be:

[0103] F’ = F + A / path_offset;

[0104] path_offset = slave_T2 - slave_T1 - 5;

[0105] Wherein, F’ is the frequency after synchronization; F is the frequency before synchronization; path_offset is the path offset; A / path_offset is the offset frequency; A is a preset parameter, and A can be different for different local clock sources; slave_T2 is the local time of the second slave node; slave_T1 is the local time of the first slave node.

[0106] In this embodiment, based on the time difference between the local time of the first slave node and the local time of the first master node, and / or the time difference between the local time of the second slave node and the local time of the second master node, synchronize the clock time of the local clock source of the slave node, which can realize the clock time synchronization of the local clock source of the slave node and calibrate the time.

[0107] In this embodiment, based on the local time of the first slave node and the local time of the second slave node, synchronize the clock frequency of the local clock source of the slave node, which can realize the clock frequency synchronization of the local clock source of the slave node and calibrate the frequency.

[0108] In this embodiment, by performing clock calibration and frequency calibration, the clock consistency between the master and slave nodes can be better improved.

[0109] In this embodiment, the second level is output after a preset duration from the first level, which can ensure that the master node has enough time to perform operations such as level flipping, improve the accuracy of relevant time points of the master node's operations, and further improve the accuracy of clock synchronization processing.

[0110] Figure 5 It is a schematic diagram according to the fourth embodiment of the present disclosure. This embodiment provides a clock synchronization device. This device can be applied to a slave node. The slave node has a second level interface and a second communication interface. The second level interface corresponds to the first level interface of the master node, and the second communication interface corresponds to the first communication interface of the master node. As Figure 5 shown, the device 500 includes: a first determination module 501, a first reception module 502, a second determination module 503, a second reception module 504, and a synchronization module 505.

[0111] The first determination module 501 is configured to determine the local time of the first slave node through the second level interface in response to the master node outputting a first level through the first level interface;

[0112] The first reception module 502 is configured to receive, through the second communication interface, a first message sent by the master node through the first communication interface. The first message carries the local time of the first master node when the master node outputs the first level;

[0113] The second determination module 503 is used to determine the local time of the second slave node through the second level interface in response to the master node outputting a second level through the first level interface; wherein the second level is a flip level of the first level;

[0114] The second receiving module 504 is used to receive, through the second communication interface, a second message sent by the master node through the first communication interface, wherein the second message carries the second master node local time when the master node outputs the second level;

[0115] The synchronization module 505 is used to perform clock synchronization processing based on the local time of the first slave node, the local time of the first master node, the local time of the second slave node and the local time of the second master node.

[0116] In this embodiment, the level signal is transmitted through the level interface, the message is transmitted through the communication interface, and the clock synchronization processing is performed based on the relevant time of the level signal and the relevant time of the message. Since the level interface and the communication interface are interfaces possessed by the master node and the slave node, the interfaces possessed by the master node and the slave node can be used for clock synchronization processing, and there is no need to introduce additional dedicated hardware devices such as network cards, thereby reducing the resource overhead of clock synchronization processing.

[0117] In some embodiments, the synchronization module 505 is further configured to:

[0118] Based on the time difference between the local time of the first slave node and the local time of the first master node, and / or the time difference between the local time of the second slave node and the local time of the second master node, the clock time of the local clock source of the slave node is synchronized.

[0119] In this embodiment, based on the time difference between the local time of the first slave node and the local time of the first master node, and / or the time difference between the local time of the second slave node and the local time of the second master node, the clock time of the local clock source of the slave node is synchronized, so that the clock synchronization of the local clock source of the slave node can be achieved and the time can be calibrated.

[0120] In some embodiments, the synchronization module 505 is further configured to:

[0121] Based on the first slave node local time and the second slave node local time, a clock frequency of a local clock source of the slave node is synchronized.

[0122] In this embodiment, based on the local time of the first slave node and the local time of the second slave node, the clock frequency of the local clock source of the slave node is synchronized, so that the clock frequency synchronization of the local clock source of the slave node can be achieved and the frequency can be calibrated.

[0123] In some embodiments, the second level is output by the master node after a preset time interval from the output of the first level; the synchronization module 505 is further configured to:

[0124] Based on the local time of the first slave node, the local time of the second slave node, and the preset time interval, determine the offset frequency; and synchronize the clock frequency based on the offset frequency.

[0125] In this embodiment, the second level is output after a preset time interval from the first level, which can ensure that the master node has sufficient time for operations such as level inversion, improve the accuracy of relevant time points of the master node's operations, and thus improve the accuracy of clock synchronization processing.

[0126] Figure 6 FIG. is a schematic diagram according to the fifth embodiment of the present disclosure. This embodiment provides a clock synchronization device. The device can be applied to a master node. The master node has a first level interface and a first communication interface. The first level interface corresponds to a second level interface of a slave node, and the first communication interface corresponds to a second communication interface of the slave node. As Figure 6 shown, the device 600 includes: a first output module 601, a first sending module 602, a second output module 603, and a second sending module 604.

[0127] The first output module 601 is configured to output a first level to the slave node through the first level interface, so that the slave node determines the local time of the first slave node when the master node outputs the first level;

[0128] The first sending module 602 is configured to send a first message to the slave node through the first communication interface. The first message carries the local time of the first master node when the master node outputs the first level;

[0129] The second output module 603 is configured to output a second level to the slave node through the first level interface, so that the slave node determines the local time of the second slave node when the master node outputs the second level; wherein the second level is the inverted level of the first level;

[0130] The second sending module 604 is configured to send a second message to the slave node through the first communication interface. The second message carries the local time of the second master node when the master node outputs the second level;

[0131] Wherein, the slave node is configured to perform clock synchronization processing based on the local time of the first slave node, the local time of the first master node, the local time of the second slave node, and the local time of the second master node.

[0132] In this embodiment, a level signal is transmitted through a level interface, and a message is transmitted through a communication interface. Clock synchronization processing is performed based on the relevant time of the level signal and the relevant time of the message. Since the level interface and the communication interface are the interfaces of the master node and the slave node, the interfaces built in the master node and the slave node can be used for clock synchronization processing, and there is no need to additionally introduce a dedicated hardware device such as a network card, thereby reducing the resource overhead of clock synchronization processing.

[0133] In some embodiments, the second output module is further configured to:

[0134] After a preset time interval from the output of the first level, output the second level to the slave node through the first level interface.

[0135] In this embodiment, the second level is output after a preset time interval from the first level, which can ensure that the master node has enough time for operations such as level inversion, improve the accuracy of the relevant time points of the master node operations, and further improve the accuracy of clock synchronization processing.

[0136] According to an embodiment of the present disclosure, there is also provided a clock synchronization system, as Figure 7 shown. The system 700 includes a master node 701 and a slave node 702. Among them, the master node 701 can be as Figure 6 shown in the corresponding embodiment, and the slave node 702 can be as Figure 5 shown in the corresponding embodiment.

[0137] It can be understood that in the embodiments of the present disclosure, the same or similar content in different embodiments can be referred to each other.

[0138] It can be understood that the "first", "second", etc. in the embodiments of the present disclosure are only used for distinction and do not represent the level of importance, the sequence of time, etc.

[0139] In the technical solution of the present disclosure, the collection, storage, use, processing, transmission, provision, and disclosure of the user's personal information involved all comply with the provisions of relevant laws and regulations and do not violate public order and good customs.

[0140] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium, and a computer program product.

[0141] Figure 8FIG. 0 shows a schematic block diagram of an exemplary electronic device 800 that can be used to implement embodiments of the present disclosure. The electronic device 800 is intended to represent various forms of digital computers, such as, for example, laptop computers, desktop computers, workstations, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as, for example, personal digital assistants, cellular telephones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely exemplary and are not intended to limit the implementations of the present disclosure described and / or claimed herein.

[0142] As Figure 8 shown, the electronic device 800 includes a computing unit 801 that can perform various appropriate actions and processes in accordance with a computer program stored in a read-only memory (ROM) 802 or a computer program loaded from a storage unit 808 into a random access memory (RAM) 803. In the RAM 803, various programs and data required for the operation of the electronic device 800 can also be stored. The computing unit 801, the ROM 802, and the RAM 803 are connected to each other via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0143] A plurality of components in the electronic device 800 are connected to the I / O interface 805, including: an input unit 806, such as a keyboard, a mouse, etc.; an output unit 807, such as various types of displays, speakers, etc.; a storage unit 808, such as a magnetic disk, an optical disk, etc.; and a communication unit 809, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 809 allows the electronic device 800 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0144] The computing unit 801 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, processor, microprocessor, etc. The computing unit 801 executes the various methods and processes described above, such as the clock synchronization method. For example, in some embodiments, the clock synchronization method can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 808. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 800 via the ROM 802 and / or the communication unit 809. When the computer program is loaded into the RAM 803 and executed by the computing unit 801, one or more steps of the clock synchronization method described above can be executed. Alternatively, in other embodiments, the computing unit 801 can be configured to execute the clock synchronization method by any other suitable means (e.g., by means of firmware).

[0145] Various embodiments of the systems and techniques described above in this document can be implemented in digital electronic circuitry, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-chips (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special-purpose or general-purpose programmable processor, and can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit the data and instructions to the storage system, the at least one input device, and the at least one output device.

[0146] The program code for implementing the methods of the present disclosure can be written in any combination of one or more programming languages. These program codes can be provided to the processor or processors of a general-purpose computer, a special-purpose computer, or other programmable map data acquisition devices, such that when the program codes are executed by the processor or processors, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The program code can be executed entirely on the machine, partially on the machine, as a stand-alone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0147] In the context of this disclosure, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0148] In order to provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, speech input, or tactile input).

[0149] The systems and techniques described herein can be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.

[0150] A computer system may include a client and a server. The client and the server are generally far from each other and usually interact through a communication network. The relationship between the client and the server is generated by computer programs running on the respective computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or a cloud host, which is a host product in the cloud computing service system, and solves the defects of difficult management and weak business scalability existing in traditional physical hosts and VPS services ("Virtual Private Server", or simply "VPS"). The server may also be a server of a distributed system, or a server combined with a blockchain.

[0151] It should be understood that various forms of the processes shown above can be used, steps can be reordered, added or deleted. For example, the steps described in the present disclosure can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved, and no limitations are imposed herein.

[0152] The above specific embodiments do not constitute a limitation on the protection scope of the present disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A clock synchronization method is applied to a slave node. The slave node has a second level interface and a second communication interface. The second level interface corresponds to a first level interface of a master node, and the second communication interface corresponds to a first communication interface of the master node. The method includes: Through the second level interface, in response to the master node outputting a first level through the first level interface, determine the local time of the first slave node; Through the second communication interface, receive a first message sent by the master node through the first communication interface. The first message carries the first local time of the master node when the master node outputs the first level; Through the second level interface, in response to the master node outputting a second level through the first level interface, determine the local time of the second slave node; wherein the second level is the inverted level of the first level; Through the second communication interface, receive a second message sent by the master node through the first communication interface. The second message carries the second local time of the master node when the master node outputs the second level; Based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node, perform clock synchronization processing; The performing clock synchronization processing based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node includes: For clock time synchronization, based on the time difference between the first local time of the slave node and the first local time of the master node, and / or the time difference between the second local time of the slave node and the second local time of the master node, synchronize the clock time of the local clock source of the slave node.

2. A clock synchronization method is applied to a slave node. The slave node has a second level interface and a second communication interface. The second level interface corresponds to a first level interface of a master node, and the second communication interface corresponds to a first communication interface of the master node. The method includes: Through the second level interface, in response to the master node outputting a first level through the first level interface, determine the local time of the first slave node; Through the second communication interface, receive a first message sent by the master node through the first communication interface. The first message carries the first local time of the master node when the master node outputs the first level; Through the second level interface, in response to the master node outputting a second level through the first level interface, determine the local time of the second slave node; wherein the second level is the inverted level of the first level; Through the second communication interface, receive a second message sent by the master node through the first communication interface. The second message carries the second local time of the master node when the master node outputs the second level; Based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node, perform clock synchronization processing; Performing clock synchronization processing based on the local time of the first slave node, the local time of the first master node, the local time of the second slave node, and the local time of the second master node, includes: For clock frequency synchronization, determining an offset frequency based on the local time of the first slave node, the local time of the second slave node, and a preset duration; synchronizing the clock frequency based on the offset frequency, where the second level is output by the master node after a lapse of the preset duration after outputting the first level.

3. A clock synchronization method, applied to a master node, the master node having a first level interface and a first communication interface, the first level interface corresponding to a second level interface of a slave node, and the first communication interface corresponding to a second communication interface of the slave node, the method includes: Outputting a first level to the slave node through the first level interface, so that the slave node determines the local time of the first slave node when the master node outputs the first level; Sending a first message to the slave node through the first communication interface, where the first message carries the local time of the first master node when the master node outputs the first level; Outputting a second level to the slave node through the first level interface, so that the slave node determines the local time of the second slave node when the master node outputs the second level; where the second level is a flipped level of the first level; Sending a second message to the slave node through the first communication interface, where the second message carries the local time of the second master node when the master node outputs the second level; Where the slave node is used to perform clock synchronization processing based on the local time of the first slave node, the local time of the first master node, the local time of the second slave node, and the local time of the second master node; The slave node is further used for: For clock time synchronization, synchronizing the clock time of the local clock source of the slave node based on the time difference between the local time of the first slave node and the local time of the first master node, and / or the time difference between the local time of the second slave node and the local time of the second master node.

4. The method according to claim 3, wherein The outputting the second level to the slave node through the first level interface includes: After outputting the first level and after a lapse of a preset duration, outputting the second level to the slave node through the first level interface.

5. A clock synchronization method, applied to a master node, the master node having a first level interface and a first communication interface, the first level interface corresponding to a second level interface of a slave node, and the first communication interface corresponding to a second communication interface of the slave node, the method includes: Outputting a first level to the slave node through the first level interface, so that the slave node determines the local time of the first slave node when the master node outputs the first level; Sending a first message to the slave node through the first communication interface, where the first message carries the local time of the first master node when the master node outputs the first level; Output a second level to the slave node through the first level interface, so that the slave node determines the second local time of the slave node when the master node outputs the second level; wherein, the second level is the inverted level of the first level; Send a second message to the slave node through the first communication interface, where the second message carries the second local time of the master node when the master node outputs the second level; Wherein, the slave node is used to perform clock synchronization processing based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node; The slave node is further used for: For clock frequency synchronization, determine the offset frequency based on the first local time of the slave node, the second local time of the slave node, and a preset duration; synchronize the clock frequency based on the offset frequency, and the second level is output by the master node after a preset duration from the output of the first level.

6. The method according to claim 5, wherein, The outputting the second level to the slave node through the first level interface includes: After a preset duration from the output of the first level, output the second level to the slave node through the first level interface.

7. A clock synchronization device is applied to a slave node. The slave node has a second level interface and a second communication interface. The second level interface corresponds to the first level interface of the master node, and the second communication interface corresponds to the first communication interface of the master node. The device includes: A first determination module, configured to determine the first local time of the slave node through the second level interface in response to the master node outputting a first level through the first level interface; A first reception module, configured to receive a first message sent by the master node through the first communication interface through the second communication interface, where the first message carries the first local time of the master node when the master node outputs the first level; A second determination module, configured to determine the second local time of the slave node through the second level interface in response to the master node outputting a second level through the first level interface; wherein, the second level is the inverted level of the first level; A second reception module, configured to receive a second message sent by the master node through the first communication interface through the second communication interface, where the second message carries the second local time of the master node when the master node outputs the second level; A synchronization module, configured to perform clock synchronization processing based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node; The synchronization module is further used for: For clock time synchronization, synchronize the clock time of the local clock source of the slave node based on the time difference between the first local time of the slave node and the first local time of the master node, and / or the time difference between the second local time of the slave node and the second local time of the master node.

8. A clock synchronization device is applied to a slave node. The slave node has a second level interface and a second communication interface. The second level interface corresponds to the first level interface of the master node, and the second communication interface corresponds to the first communication interface of the master node. The device includes: A first determination module, configured to determine the first local time of the slave node by means of the second level interface in response to the master node outputting a first level through the first level interface. A first receiving module, configured to receive a first message sent by the master node through the first communication interface through the second communication interface. The first message carries the first local time of the master node when the master node outputs the first level. A second determination module, configured to determine the second local time of the slave node by means of the second level interface in response to the master node outputting a second level through the first level interface. Wherein, the second level is the inverted level of the first level. A second receiving module, configured to receive a second message sent by the master node through the first communication interface through the second communication interface. The second message carries the second local time of the master node when the master node outputs the second level. A synchronization module, configured to perform clock synchronization processing based on the first local time of the slave node, the first local time of the master node, the second local time of the slave node, and the second local time of the master node. The synchronization module is further configured to: For clock frequency synchronization, determine an offset frequency based on the first local time of the slave node, the second local time of the slave node, and a preset duration; synchronize the clock frequency based on the offset frequency. The second level is output by the master node after a preset duration from the output of the first level.

9. A clock synchronization device is applied to a master node. The master node has a first level interface and a first communication interface. The first level interface corresponds to the second level interface of the slave node, and the first communication interface corresponds to the second communication interface of the slave node. The device includes: A first output module, configured to output a first level to the slave node through the first level interface, so that the slave node determines the first local time of the slave node when the master node outputs the first level. A first sending module, configured to send a first message to the slave node through the first communication interface. The first message carries the first local time of the master node when the master node outputs the first level. A second output module, configured to output a second level to the slave node through the first level interface, so that the slave node determines the second local time of the slave node when the master node outputs the second level. Wherein, the second level is the inverted level of the first level. A second sending module, configured to send a second message to the slave node through the first communication interface. The second message carries the second local time of the master node when the master node outputs the second level. Wherein, the slave node is used to perform clock synchronization processing based on the local time of the first slave node, the local time of the first master node, the local time of the second slave node, and the local time of the second master node; The slave node is further used for: For clock time synchronization, based on the time difference between the local time of the first slave node and the local time of the first master node, and / or, the time difference between the local time of the second slave node and the local time of the second master node, synchronize the clock time of the local clock source of the slave node.

10. The device according to claim 9, wherein, The second output module is further used for: After a preset time interval from outputting the first level, output the second level to the slave node through the first level interface.

11. A clock synchronization device is applied to a master node. The master node has a first level interface and a first communication interface. The first level interface corresponds to a second level interface of the slave node, and the first communication interface corresponds to a second communication interface of the slave node. The device includes: A first output module, configured to output a first level to the slave node through the first level interface, so that the slave node determines the local time of the first slave node when the master node outputs the first level; A first sending module, configured to send a first message to the slave node through the first communication interface, where the first message carries the local time of the first master node when the master node outputs the first level; A second output module, configured to output a second level to the slave node through the first level interface, so that the slave node determines the local time of the second slave node when the master node outputs the second level; wherein, the second level is the inverted level of the first level; A second sending module, configured to send a second message to the slave node through the first communication interface, where the second message carries the local time of the second master node when the master node outputs the second level; Wherein, the slave node is used to perform clock synchronization processing based on the local time of the first slave node, the local time of the first master node, the local time of the second slave node, and the local time of the second master node; The slave node is further used for: For clock frequency synchronization, based on the local time of the first slave node, the local time of the second slave node, and a preset time interval, determine an offset frequency; based on the offset frequency, synchronize the clock frequency. The second level is output by the master node after a preset time interval from outputting the first level.

12. The apparatus according to claim 11, wherein The second output module is further used for: After a preset time interval from outputting the first level, output the second level to the slave node through the first level interface.

13. A clock synchronization system includes: The device as claimed in claim 7, and, the device as claimed in claim 9 or 10; Or, The device as claimed in claim 8, and, the device as claimed in claim 11 or 12.

14. An electronic device includes: At least one processor; And A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method according to any one of claims 1-6.

15. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to execute the method according to any one of claims 1-6.

16. A computer program product, comprising a computer program which, when executed by a processor, implements the method according to any one of claims 1-6.

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