Display panel, manufacturing method thereof and display device

Abstract

Embodiments of the present disclosure provide a display panel and a manufacturing method, and a display device, and relate to the technical field of display, and are used for reducing the risk of display brightness unevenness of the display panel. The display panel has a first display area and a functional device area. The light transmittance of the functional device area is greater than that of the first display area. The display panel comprises a plurality of first light emitting devices, a plurality of connection lines and a plurality of first pixel circuits. The plurality of first light emitting devices are located in the functional device area. One connection line is electrically connected with one first light emitting device. The plurality of first pixel circuits are located in the first display area. One first pixel circuit is electrically connected with one first light emitting device through one connection line. One first pixel circuit closest to the functional device area is connected with one first light emitting device farthest from the first display area, and one first pixel circuit farthest from the functional device area is connected with one first light emitting device closest to the first display area. The display panel is used for displaying an image.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a display panel and its manufacturing method, and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) have been widely used in the display field due to their advantages such as self-illumination, low driving voltage, high luminous efficiency, fast response speed, and flexible display capabilities. Summary of the Invention

[0003] The purpose of this disclosure is to provide a display panel, a manufacturing method, and a display device to reduce the risk of uneven display brightness in the display panel.

[0004] To achieve the above objectives, the embodiments of this disclosure provide the following technical solutions:

[0005] On one hand, a display panel is provided. The display panel has a first display area and a functional device area, wherein the light transmittance of the functional device area is greater than that of the first display area. The display panel includes a plurality of first light-emitting devices, a plurality of connecting lines, and a plurality of first pixel circuits. The plurality of first light-emitting devices are located in the functional device area. A connecting line is electrically connected to one first light-emitting device. The plurality of first pixel circuits are located in the first display area, and one first pixel circuit is electrically connected to one first light-emitting device via a connecting line. The first pixel circuit closest to the functional device area is connected to the first light-emitting device furthest from the first display area, and the first pixel circuit furthest from the functional device area is connected to the first light-emitting device closest to the first display area.

[0006] The display panel provided in this embodiment has a first display area and a functional device area, wherein the light transmittance of the functional device area is greater than that of the first display area. Multiple first light-emitting devices are located in the functional device area, enabling the functional device area to display images. The first pixel circuit has lower light transmittance; therefore, multiple first pixel circuits located in the first display area ensure that the light transmittance of the functional device area is greater than that of the first display area. Each first pixel circuit is electrically connected to a first light-emitting device via a connecting line, allowing the first pixel circuit to drive the first light-emitting device to emit light, thereby enabling the functional device area to display images. Connecting the first pixel circuit closest to the functional device area to the first light-emitting device furthest from the first display area increases the length of the shortest connecting line. Connecting the first pixel circuit furthest from the functional device area to the first light-emitting device closest to the first display area shortens the length of the longest connecting line. This reduces the ratio of the longest connecting line to the shortest connecting line among the multiple connecting lines—that is, reduces the ratio of the maximum to the minimum capacitive / resistive load among the multiple connecting lines—and reduces the risk of uneven display brightness in the display panel.

[0007] In some embodiments, along the direction close to the functional device area, a plurality of first pixel circuits are sequentially electrically connected to the first light-emitting device that is closer to the first display area among the first light-emitting devices.

[0008] In some embodiments, the first display area includes two sub-areas, which are located on opposite sides of the functional device area along a first direction. The first direction is the row direction in which the plurality of first light-emitting devices are arranged. The first pixel circuit closest to the functional device area is electrically connected to the first light-emitting device at the center of the functional device area along the first direction.

[0009] In some embodiments, the plurality of first pixel circuits are arranged in multiple rows, each row including a plurality of first pixel circuits spaced apart along a first direction. Along the first direction, the spacing between the first pixel circuit closest to the functional device region and the functional device region is greater than the spacing between two adjacent first pixel circuits farther away from the functional device region.

[0010] In some embodiments, the display panel further includes a plurality of second light-emitting devices and a plurality of second pixel circuits. The plurality of second light-emitting devices are located in the first display area. The plurality of second pixel circuits are located in the first display area, with each second pixel circuit electrically connected to one of the second light-emitting devices. Specifically, along the first direction, the first pixel circuit closest to the functional device area includes seven second pixel circuits between it and the functional device area, and two second pixel circuits are included between two adjacent first pixel circuits.

[0011] In some embodiments, the display panel further includes a plurality of second light-emitting devices and a plurality of second pixel circuits. The plurality of second light-emitting devices are located in the first display area. The plurality of second pixel circuits are located in the first display area, and each second pixel circuit is electrically connected to one second light-emitting device. Specifically, along the first direction and away from the functional device area, the number of second pixel circuits between two adjacent first pixel circuits decreases.

[0012] In some embodiments, among the plurality of connecting lines, the ratio of the length of the longest connecting line to the length of the shortest connecting line is less than or equal to 4:1.

[0013] In some embodiments, along the first direction, the ratio of the length of the longer connecting line to the length of the other connecting line in the two connecting lines connecting two adjacent first pixel circuits ranges from 1.03 to 1.09.

[0014] In some embodiments, the display panel further includes an array substrate, a plurality of planarization layers, at least one wiring layer, and light-emitting devices. The array substrate includes a first pixel circuit and a second pixel circuit. The plurality of planarization layers are disposed on the array substrate and are spaced apart. A wiring layer is located between two adjacent planarization layers, and the at least one wiring layer includes multiple interconnecting lines. The light-emitting devices are located on the side of the plurality of planarization layers away from the array substrate, and the light-emitting devices include a first light-emitting device and a second light-emitting device.

[0015] In some embodiments, the display panel includes a plurality of wiring layers, and the plurality of wiring layers further include a plurality of first adapter blocks. The first adapter block is located between the connecting line and the first pixel circuit, and the connecting line and the first pixel circuit are electrically connected through the first adapter block; and / or, the first adapter block is located between the connecting line and the first light-emitting device, and the connecting line and the first light-emitting device are electrically connected through the first adapter block.

[0016] In some embodiments, the material of the plurality of connecting lines includes a transparent conductive material.

[0017] On the other hand, a display device is provided. The display device includes a display panel as described in any of the above embodiments and a driving circuit board. The driving circuit board is connected to the display panel and configured to transmit control signals to the display panel.

[0018] The above-described display device has the same structure and beneficial technical effects as the display panel provided in some of the above embodiments, and will not be described again here.

[0019] In another aspect, a method for manufacturing a display panel is provided. The display panel has a first display area and a functional device area, wherein the light transmittance of the functional device area is greater than that of the first display area. The manufacturing method includes: providing a substrate; fabricating a plurality of first pixel circuits on the substrate, the plurality of first pixel circuits being located in the first display area; fabricating a plurality of connecting lines on the side of the plurality of first pixel circuits away from the substrate, one connecting line being electrically connected to one first pixel circuit; fabricating a plurality of first light-emitting devices on the side of the plurality of connecting lines away from the substrate, the plurality of first light-emitting devices being located in the functional device area; one connecting line being electrically connected to at least one first light-emitting device, the first light-emitting device furthest from the first display area being connected to the first pixel circuit closest to the functional device area, and the first light-emitting device closest to the first display area being connected to the first pixel circuit furthest from the functional device area.

[0020] In some embodiments, while fabricating a plurality of first pixel circuits on the substrate, a plurality of second pixel circuits are also fabricated on the substrate, the plurality of second pixel circuits being located in the first display area; along a first direction, seven second pixel circuits are included between the first pixel circuit closest to the functional device area and the functional device area, and two second pixel circuits are included between two adjacent first pixel circuits. While fabricating a plurality of first light-emitting devices on the side of the plurality of connecting lines away from the substrate, a plurality of second light-emitting devices are also fabricated on the side of the plurality of connecting lines away from the substrate, the plurality of second light-emitting devices being located in the first display area, and one second pixel circuit is connected to at least one second light-emitting device. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0022] Figure 1 This is a structural diagram of a display device according to some embodiments;

[0023] Figure 2 This is a structural diagram of a display panel according to some embodiments;

[0024] Figure 3 for Figure 2 A magnified view of a portion of A in the image;

[0025] Figure 4 This is another structural diagram of a display panel according to some embodiments;

[0026] Figure 5 for Figure 4 A magnified view of part B in the image;

[0027] Figure 6 for Figure 2 Another magnified view of part A in the image;

[0028] Figure 7 This is a connection structure diagram of a first pixel circuit and a first light-emitting device according to some embodiments;

[0029] Figure 8 This is a diagram showing another connection structure between the first pixel circuit and the first light-emitting device according to some embodiments;

[0030] Figure 9 This is another connection structure diagram of the first pixel circuit and the first light-emitting device according to some embodiments. Detailed Implementation

[0031] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0032] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiment," "example," or "some examples" are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0033] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0034] In describing some embodiments, the term "connection" and its derivative expressions may be used. For example, the term "connection" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0035] As used herein, depending on the context, the term “if” may optionally be interpreted as meaning “when” or “at the time” or “in response to determination” or “in response to detection”.

[0036] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.

[0037] As used herein, “equal” includes the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, “equal” includes absolute equality and approximate equality, wherein an acceptable range of deviation for approximate equality may be, for example, a difference between the two equal entities being less than or equal to 5% of either one.

[0038] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.

[0039] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0040] Some embodiments of this disclosure provide a display device 1000, such as Figure 1 As shown, the display device 1000 can be a device or apparatus for visualizing electronic information. Exemplarily, the display device 1000 may include one of a smartphone, tablet computer, laptop computer, television, or smartwatch. Exemplarily, the display device 1000 includes a smartwatch.

[0041] The aforementioned display device 1000 may be an organic light-emitting diode (OLED) display device, a quantum dot light-emitting diode (QLED) display device, or an active-matrix organic light-emitting diode (AMOLED) display device.

[0042] The display device 1000 employs a technology that places functional components on the non-display side of the screen. These functional components include, for example, a front-facing camera assembly, an under-display fingerprint assembly, a 3D face recognition assembly, an iris recognition assembly, and a proximity sensor—devices capable of performing specific functions. For instance, if the front-facing camera assembly is placed on the back of the screen, the display device 1000 employs under-display camera technology.

[0043] like Figure 1 As shown, the display device 1000 includes a display panel 100 and a driving circuit board. The driving circuit board is connected to the display panel 100 and is used to transmit control signals to the display panel 100.

[0044] like Figure 2 As shown, the display panel 100 has a display area AA and a peripheral area BB located at least on one side of the display area AA. The display area AA includes a functional device area 101 and a main display area 102, which is disposed around the functional device area 101.

[0045] The functional devices are located on the non-display side of the functional device area 101, and require external light to operate. To improve the sensitivity of the functional devices, it is necessary to ensure that they receive a sufficient amount of light, which requires increasing the light transmittance of the functional device area 101. Here, the display side refers to the side away from the backlight surface of the display panel 100, the non-display side refers to the side closer to the backlight surface of the display panel 100, the light-emitting surface refers to the surface of the display panel 100 used to display image information, and the backlight surface refers to the surface of the display panel opposite the light-emitting surface.

[0046] The functional device area 101 can be circular, rectangular, triangular, or irregular in shape, and the embodiments of this disclosure do not specifically limit it. The embodiments of this disclosure are illustrated using a rectangular shape for the functional device area 101 as an example.

[0047] The main display area 102 includes a first display area 1021 and a second display area 1022. The first display area 1021 is located at least on one side of the functional device area 101 along the first direction X. For example, the first display area 1021 is located on one side of the functional device area 101 along the first direction X, or the first display area 1021 includes two sub-areas 1001, which are respectively located on opposite sides of the functional device area 101 along the first direction X. The second display area 1022 is at least partially disposed around the first display area 1021.

[0048] like Figure 2 and Figure 3 As shown, the display panel 100 includes a plurality of pixel circuits 10 and a plurality of light-emitting devices 20. The plurality of pixel circuits 10 are arranged in multiple rows and multiple columns, each row of pixel circuits 10 including a plurality of pixel circuits 10 arranged along a first direction X, and each column of pixel circuits 10 including a plurality of pixel circuits 10 arranged along a second direction Y. The plurality of pixel circuits 10 include a first pixel circuit 11 and a plurality of second pixel circuits 12.

[0049] The multiple light-emitting devices 20 include a first light-emitting device 21 and multiple second light-emitting devices 22. The first light-emitting device 21 is located in the functional device area 101, and the second light-emitting devices 22 are located in the main display area 102. A first pixel circuit 11 drives the first light-emitting device 21 to emit light, and a second pixel circuit 12 drives the second light-emitting device 22 to emit light. This allows the display panel 100 to achieve full-screen display.

[0050] The first pixel circuit 11 can block light. Since it is located within the functional device area 101, this reduces the light transmittance of the functional device area 101, leading to decreased sensitivity of the functional device. To solve this problem, the first pixel circuit 11 needs to be separated from the first light-emitting device 21. For example, the first pixel circuit 11 can be placed within the first display area 1021. With the first pixel circuit 11 located within the first display area 1021, the light transmittance of the functional device area 101 can be greater than that of the main display area 102, allowing the functional device to receive sufficient light and improving its sensitivity.

[0051] The first pixel circuit 11 is located within the first display area 1021, such that the distribution density of the pixel circuit 10 within the first display area 1021 is greater than the distribution density of the pixel circuit 10 within the second display area 1022.

[0052] Since the first pixel circuit 11 is separate from the first light-emitting device 21, the display panel 100 also includes multiple connecting lines 30, and one first pixel circuit 11 is electrically connected to one first light-emitting device 21 through one connecting line 30. The first pixel circuit 11 and the first light-emitting device 21 connected to it are located in the same row.

[0053] In some embodiments, the material of the multiple connecting lines 30 includes a transparent conductive material, so that light can pass through the connecting lines 30 located in the functional device region 101, thereby improving the light transmittance of the functional device region 101 and enhancing the sensitivity of the functional device. Exemplarily, the material of the multiple connecting lines 30 includes indium tin oxide (ITO). It is understood that the transparent material can be a material with a light transmittance greater than or equal to 85%, for example, 85%, 90%, or 95%, and the embodiments disclosed herein will not be listed one by one.

[0054] In related technologies, among multiple connecting lines, the ratio of the length of the longest connecting line to the length of the shortest connecting line is relatively large. That is, the ratio of the maximum to the minimum value of the capacitive and resistive load (RC Loading) of the multiple connecting lines is relatively large, resulting in uneven display brightness of the display panel.

[0055] To solve the above problems, such as Figure 3 As shown, in the display panel 100 provided in the embodiments of this disclosure, a first pixel circuit closest to the functional device area 101 is connected to a first light-emitting device 21 furthest from the first display area 1021, which can increase the length of the shortest connecting line 30. A first pixel circuit 11 furthest from the functional device area 101 is connected to a first light-emitting device 21 closest to the first display area 1021, which can shorten the size of the longest connecting line 30. Furthermore, the ratio of the length of the longest connecting line 30 to the length of the shortest connecting line 30 can be reduced, i.e., the ratio of the maximum to the minimum capacitive and resistive load of the multiple connecting lines 30 can be reduced, thereby reducing the risk of uneven display brightness in the display panel 100.

[0056] It should be understood that, when the first display area 1021 includes two sub-areas 1001, and the two sub-areas 1001 are located on opposite sides of the functional device area 101 along the first direction X, the connection between the first pixel circuit 11 closest to the functional device area 101 and the first light-emitting device 21 furthest from the first display area 1021 means that the first pixel circuit 11 closest to the functional device area 101 is electrically connected to the first light-emitting device 21 in the middle of the functional device area 101 along the first direction X. The middle of the functional device area 101 along the first direction X refers to the portion of the functional device area 101 located in the middle along the first direction X.

[0057] In some embodiments, such as Figure 3As shown, in the display panel 100, along the direction close to the functional device area 101, a plurality of first pixel circuits 11 are sequentially electrically connected to the first light-emitting device 21 that is closer to the first display area 1021. This can reduce the length difference of the connecting lines 30 connected to two adjacent first pixel circuits 11, thereby reducing the capacitive and resistive load of the connecting lines 30 connected to two adjacent first pixel circuits 11, and thus improving the uniformity of the display brightness of the display panel 100.

[0058] In some embodiments, the first display area 1021 is located on one side of the functional device area 101 along the first direction X. For example, the first display area 1021 may be located on the left or right side of the functional device area 101 along the first direction X. Figure 3 As shown, the first display area 1021 is located to the left of the functional device area 101. The first pixel circuit 11, which is closest to the functional device area 101, is electrically connected to the first light-emitting device 21, which is furthest from the first display area 1021.

[0059] In some embodiments, such as Figure 4 and Figure 5 As shown, the first display area 1021 includes two sub-areas 1001, which are located on opposite sides of the functional device area 101 along the first direction X. Figure 5 As shown, one sub-region 1001 is located to the left of the functional device region 101, and another sub-region 1001 is located to the right of the functional device region 101. The first pixel circuit 11 closest to the functional device region 101 is electrically connected to the first light-emitting device 21 at the middle of the functional device 101 along the first direction X.

[0060] For example, the two sub-regions 1001 are symmetrically arranged about the functional device region 101. Thus, the multiple connecting lines 30 located on opposite sides of the functional device region 101 along the first direction X can also be symmetrically arranged about the functional device region 101. In this way, the ratio of the length of the longest connecting line 30 to the length of the shortest connecting line 30 among the multiple connecting lines 30 located on both sides of the functional device region 101 is the same, which can improve the uniformity of the display brightness of the functional device region 101, thereby reducing the risk of uneven display brightness in the display panel 100.

[0061] In some embodiments, such as Figure 3As shown, within the first display area 1021, each row of pixel circuits 10 includes multiple spaced-apart first pixel circuits 11. Along the first direction X, the spacing between the first pixel circuit 11 closest to the functional device area 101 and the functional device area 101 is greater than the spacing between two adjacent first pixel circuits 11 farther from the functional device area 101. This increases the length of the shortest connecting line 30 among the multiple connecting lines 30, thereby reducing the ratio of the length of the longest connecting line 30 to the length of the shortest connecting line 30. This reduces the ratio of the maximum to minimum capacitive and resistive loads of the multiple connecting lines 30, thus reducing the risk of uneven display brightness in the display panel 100. The first pixel circuit 11 farther from the functional device area 101 refers to all the remaining first pixel circuits 11 in the same row of pixel circuits 10 within the first display area 1021, excluding the first pixel circuit 11 closest to the functional device area 101.

[0062] Specifically, such as Figure 3 As shown, within the first display area 1021, along the first direction X, the first pixel circuit 11 closest to the functional device area 101 includes seven second pixel circuits 12 between it and the functional device area 101, and two second pixel circuits 12 are included between two adjacent first pixel circuits 11. This allows for the length of the shortest connecting line 30 among the multiple connecting lines 30 to be increased, and the length of the longest connecting line 30 to be shortened to the maximum extent. This reduces the ratio of the length of the longest connecting line 30 to the length of the shortest connecting line 30, thereby reducing the risk of uneven display brightness in the display panel 100.

[0063] For example, among the multiple connecting lines 30, the longest connecting line 30 has a length of 2.99 mm and the shortest connecting line 30 has a length of 1.11 mm. That is, the ratio of the length of the longest connecting line 30 to the length of the shortest connecting line 30 is 2.7:1. In this way, the ratio of the maximum to the minimum capacitive and resistive load among the multiple connecting lines 30 is reduced, which can reduce the risk of uneven display brightness of the display panel 100.

[0064] In some embodiments, the number of second pixel circuits 12 included between two adjacent first pixel circuits 11 is reduced along the first direction X and away from the functional device region 101. This reduces the length difference of the connection lines 30 connecting two adjacent first pixel circuits 11, thereby reducing the capacitive and resistive load of the connection lines 30 connecting two adjacent first pixel circuits 11. For example, as... Figure 6 As shown, the number of second pixel circuits 12 between two adjacent first pixel circuits 11 is reduced from four to two. The embodiments disclosed herein will not be listed one by one.

[0065] It has been verified that the ratio of the length of the longest connecting line 30 to the length of the shortest connecting line 30 is less than or equal to 4:1, which can reduce the risk of uneven display brightness of the display panel 100.

[0066] In some embodiments, along the first direction X, the ratio of the length of the longer connecting line 30 to the length of the other connecting line 30 connecting two adjacent first pixel circuits 11 ranges from 1.03 to 1.09. That is, the length difference between the two connecting lines 30 connecting two adjacent first pixel circuits 11 is small, and the capacitive-resistive load difference between the connecting lines 30 connecting two adjacent first pixel circuits 11 is small, which can improve the uniformity of the display brightness of the display panel 100. Exemplarily, the ratio is 1.03, 1.06, or 1.09; the embodiments disclosed herein will not be listed one by one.

[0067] In some embodiments, such as Figure 6 As shown, along the first direction X, the two connecting lines 30 connecting two adjacent first pixel circuits 11 are located on both sides of the first pixel circuit 11. This helps to avoid the connecting lines 30 being too concentrated and makes full use of the space between the pixel circuits 10 in adjacent rows.

[0068] In some embodiments, such as Figure 6 As shown, along the first direction X, the two connecting lines 30 connecting two adjacent first pixel circuits 11 do not overlap, and among the two adjacent connecting lines 30, at least one connecting line 30 is located between pixel circuits 10 in adjacent rows above and below, and at least one connecting line 30 partially overlaps with the second light-emitting device 22, which helps to reduce the routing length of the connecting line 30 (because the vias connecting the anodes of two adjacent first pixel circuits 11 to the first pixel circuit 11 are located on the same straight line).

[0069] In some embodiments, such as Figure 7 , Figure 8 and Figure 9 As shown, the display panel 100 also includes an array substrate 40, a plurality of planarization layers 50, and at least one wiring layer 60. The array substrate 40 includes a first pixel circuit 11 and a second pixel circuit 12.

[0070] The first pixel circuit 11 includes a plurality of thin film transistors (TFTs) 111 and at least one storage capacitor 112. The thin film transistors 111 can be P-type transistors or N-type transistors, and the embodiments disclosed herein do not specifically limit them.

[0071] The display panel also includes an active layer 70, which includes a first active layer pattern 71 of a plurality of thin film transistors 111, and each first pixel circuit 11 includes a first active layer pattern 71 located on the active layer 70.

[0072] The display panel 100 also includes a first gate conductive layer 80, a second gate conductive layer 90, and a source / drain conductive layer 110.

[0073] The first gate conductive layer 80 is disposed between the active layer 70 and the light-emitting device 20. The first gate conductive layer 80 includes a first gate pattern of a plurality of first pixel circuits 11. The first gate pattern includes the gate G1 of a plurality of thin film transistors 111 and the first plate C11 of the storage capacitor 112.

[0074] The second gate conductive layer 90 is disposed between the first gate conductive layer 80 and the light-emitting device 20. The second gate conductive layer 90 includes second gate patterns of a plurality of first pixel circuits 11. The second gate patterns include the second plate C12 of the storage capacitor 112.

[0075] The source-drain conductive layer 110 is disposed between the second gate conductive layer 90 and the light-emitting device 20, and includes multiple source-drain conductive patterns of the first pixel circuit 11. The source-drain conductive patterns include the source S1 and drain D1 of multiple thin-film transistors 111. The first active layer pattern 71, the first gate pattern, the second gate pattern, and the source-drain conductive patterns together constitute the first pixel circuit 11.

[0076] The display panel 100 further includes a first gate insulating layer 120 disposed between the active layer 70 and the first gate conductive layer 80; a second gate insulating layer 130 disposed between the first gate conductive layer 80 and the second gate conductive layer 90; an interlayer insulating layer 140 disposed between the second gate conductive layer 90 and the source / drain conductive layer 110; and a passivation layer 150 disposed between the source / drain conductive layer 110 and the light-emitting device 20. The first gate insulating layer 120, the second gate insulating layer 130, the interlayer insulating layer 140, and the passivation layer 150 are all integral layers and each covers the active layer pattern 71. At least one insulating layer is disposed between two adjacent conductive layers to prevent the patterns on adjacent conductive layers from overlapping.

[0077] Multiple planarization layers 50 are disposed on the array substrate 40 and are spaced apart. A wiring layer 60 is located between two adjacent planarization layers 50, and at least one wiring layer 60 includes multiple interconnecting lines 30. The light-emitting device 20 is located on the side of the multiple planarization layers 50 away from the array substrate 40.

[0078] The first light-emitting device 21 is located in the functional device area 101, while the first pixel circuit 11 is disposed in the display panel 100 in an area other than the functional device area 101; that is, the orthographic projection of the first pixel circuit 11 on the array substrate 40 does not overlap with the orthographic projection of the first light-emitting device 21 on the array substrate 40, and the first light-emitting device 21 and the first pixel circuit 11 cannot be directly electrically connected through vias.

[0079] Since there are multiple first light-emitting devices 21 within the functional device area 101, multiple connecting lines 30 are needed to connect the multiple first light-emitting devices 21 and the multiple first pixel circuits 11. These multiple connecting lines 30 can be disposed in the same routing layer 60 or in different routing layers 60 to provide sufficient wiring space for the multiple connecting lines 30; wherein, when the number of routing layers 60 is greater than two, at least one planarization layer 50 is disposed between any two adjacent routing layers 60.

[0080] For example, such as Figure 7 , Figure 8 and Figure 9 As shown, there are five planarization layers 50. Along a direction perpendicular to the array substrate 40 and pointing from the array substrate 40 to the light-emitting device 20, the five planarization layers 50 are, in sequence, a first planarization layer 51, a second planarization layer 52, a third planarization layer 53, a fourth planarization layer 54, and a fifth planarization layer 55. The first planarization layer 51 is disposed on the passivation layer 150.

[0081] There are three wiring layers 60, which are perpendicular to the array substrate 40 and point from the array substrate 40 to the light-emitting device 20. The three wiring layers 60 are, in sequence, a first wiring layer 61, a second wiring layer 62, and a third wiring layer 63. The first wiring layer 61 is disposed between the second planarization layer 52 and the third planarization layer 53, the second wiring layer 62 is disposed between the third planarization layer 53 and the fourth planarization layer 54, and the third wiring layer 63 is disposed between the fourth planarization layer 54 and the fifth planarization layer 55.

[0082] In some embodiments, such as Figure 7 , Figure 8 and Figure 9As shown, when the display panel 100 includes multiple wiring layers 60, for the first pixel circuit 11 and the first light-emitting device 21 that need to be electrically connected via connecting lines 30, in addition to setting the connecting lines 30 on one of the wiring layers 60, multiple first adapter blocks 64 also need to be set on the other wiring layers 60 besides the wiring layer 60 where the connecting lines 30 are located. The first adapter block 64 is located between the connecting line 30 and the first pixel circuit 11, and the connecting line 30 and the first pixel circuit 11 are electrically connected through the first adapter block 64; and / or, the first adapter block 64 is located between the connecting line 30 and the first light-emitting device 21, and the connecting line 30 and the first light-emitting device 21 are electrically connected through the first adapter block 64.

[0083] For example, such as Figure 7 As shown, the display panel 100 includes three wiring layers 60. The connecting line 30 is disposed on the third wiring layer 63. The second wiring layer 62 and the first wiring layer 61 are each provided with a plurality of first adapter blocks 64. The first adapter blocks 64 in the first wiring layer 61 and the second wiring layer 62 are located between the first pixel circuit 11 and the connecting line 30. In the functional device area 101, one end of the connecting line 30 is directly electrically connected to the first light-emitting device 21 through the first via 1. In the first display area 1021, the other end of the connecting line 30 is electrically connected to the first pixel circuit 11 through the first adapter block 64 in the first wiring layer 61 and the first adapter block 64 in the second wiring layer 62.

[0084] For example, such as Figure 8 As shown, the display panel 100 includes three wiring layers 60. The connecting line 30 is disposed on the second wiring layer 62. Both the third wiring layer 63 and the first wiring layer 61 are provided with multiple first adapter blocks 64. The first adapter block 64 in the first wiring layer 61 is located between the connecting line 30 and the first pixel circuit 11, and the first adapter block 64 in the third wiring layer 63 is located between the first light-emitting device 21 and the connecting line 30. Within the functional device area 101, one end of the connecting line 30 is connected to the first light-emitting device 21 through the first adapter block 64 in the third wiring layer 63. Within the first display area 1021, the other end of the connecting line 30 is electrically connected to the first pixel circuit 11 through the first adapter block 64 in the first wiring layer 61.

[0085] For example, such as Figure 9As shown, the display panel 100 includes three wiring layers 60. Connecting lines 30 are disposed on the first wiring layer 61. The second wiring layer 62 and the third wiring layer 63 each have multiple first adapter blocks 64, and these first adapter blocks 64 are positioned between the connecting line 30 and the first light-emitting device 21. Within the functional device area 101, one end of the connecting line 30 is connected to the first light-emitting device 21 via the first adapter blocks 64 in the second wiring layer 62 and the third wiring layer 63. Within the first display area 1021, the other end of the connecting line 30 is directly electrically connected to the first pixel circuit 11 through a second via 2.

[0086] In some embodiments, the number of first light-emitting devices 21 is relatively large, and the first light-emitting devices 21 at different locations can be electrically connected to the first pixel circuit 11 through the connection lines 30 of different wiring layers 60. For example, the first light-emitting devices 21 of different sub-pixels of the same pixel unit (including at least red sub-pixels, green sub-pixels and blue sub-pixels) are electrically connected to the first pixel circuit 11 through the connection lines 30 of different layers; or, two adjacent first light-emitting devices 21 are electrically connected to the first pixel circuit 11 through the connection lines 30 of different layers, and so on. The embodiments disclosed herein will not be listed one by one.

[0087] In some embodiments, such as Figure 7 , Figure 8 and Figure 9 As shown, the display panel 100 also includes a transition conductive layer 160, through which the first pixel circuit 11 is electrically connected to the first light-emitting device 21. The transition conductive layer 160 is located between the first planarization layer 51 and the second planarization layer 52. The transition conductive layer 160 can reduce the depth of a single via when the source / drain conductive layer 110 is connected to the light-emitting device 20, improve the connection stability between the pixel circuit 10 and the light-emitting device 20, and at the same time reduce the process difficulty of fabricating vias.

[0088] The transition conductive layer 160 includes a plurality of mutually separated second transition blocks 161. The second transition blocks 161 are electrically connected to the first pixel circuit 11, and the second transition blocks 161 are electrically connected to the connecting line 30 or the first transition block.

[0089] For example, such as Figure 7 As shown, the second adapter block 161 is electrically connected to the connecting line 30 via the first adapter block 64 in the first routing layer 61 and the second routing layer 62. Alternatively, as... Figure 8 As shown, the second adapter block 161 is electrically connected to the connecting wire via the first adapter block 64 in the first wiring layer 61. Alternatively, as... Figure 9 As shown, the second adapter block 161 is electrically connected to the connecting line 30.

[0090] like Figure 2 , Figure 7 , Figure 8 and Figure 9 As shown, the orthographic projection of the second adapter block 161 on the array substrate 40 covers the first connection node N1 of the first pixel circuit 11 electrically connected to it, thereby shielding the wiring layer 60 on the side of the second adapter block 161 away from the array substrate 40, reducing or eliminating the influence of the wiring layer 60 on the first connection node N1. The second adapter block 161 is electrically connected to the first connection node N1, and the first light-emitting device 21 is electrically connected to the second adapter block 161, so that the first light-emitting device 21 is electrically connected to the first pixel circuit 11 through the second adapter block 161. The first connection node N1 is a node in the first pixel circuit 11 configured to connect to the first light-emitting device 21.

[0091] In some embodiments, such as Figure 2 As shown, in a row of pixel circuits 10, the first connection point N1 in the first pixel circuit 11 is connected to a reference line L. The connection lines 30 connected to two adjacent first pixel circuits 11 in a row of pixel circuits 10 are located on both sides of the reference line L along the second direction Y. In this way, the risk of two adjacent connection lines 30 crossing each other can be reduced, the risk of connection lines 30 affecting each other can be reduced, and the risk of uneven display brightness of the display panel 100 can be reduced. It can also reduce the risk of connection lines 30 being too concentrated and make full use of the space between the pixel circuits 10 in adjacent rows.

[0092] The embodiments of this disclosure also provide a method for manufacturing a display panel 100, the display panel 100 having a first display area 1021 and a functional device area 101, wherein the light transmittance of the functional device area 101 is greater than the light transmittance of the first display area 1021.

[0093] The above-mentioned production method includes:

[0094] S10, Provide a substrate.

[0095] S20. Fabricate multiple first pixel circuits 11 on the substrate.

[0096] Multiple first pixel circuits 11 are located in the first display area 1021. The multiple first pixel circuits 11 are arranged in multiple rows and multiple columns in the first display area 1021. Each row of first pixel circuits 11 includes multiple pixel circuits 11 arranged along a first direction X, and each column of first pixel circuits 11 includes multiple pixel circuits 11 arranged along a second direction Y.

[0097] S30, multiple connecting lines 30 are fabricated on the side of the multiple first pixel circuits 11 away from the substrate.

[0098] A connecting line 30 is electrically connected to a first pixel circuit 11. The material of the connecting line 30 includes a transparent conductive material, such as indium tin oxide.

[0099] S40. Multiple first light-emitting devices 21 are fabricated on the side of the multiple connecting lines 30 away from the substrate.

[0100] Multiple first light-emitting devices 21 are located in the functional device area 101. A connecting line 30 is electrically connected to at least one first light-emitting device 21. The first light-emitting device 21 furthest from the first display area 1021 is connected to the first pixel circuit 11 closest to the functional device area 101. The first light-emitting device 21 closest to the first display area 1021 is connected to the first pixel circuit 11 furthest from the functional device area 101.

[0101] The display panel 100 obtained by the above method connects the first light-emitting device 21 furthest from the first display area 1021 to the first pixel circuit 11 closest to the functional device area 101, thereby increasing the length of the shortest connecting line 30. Similarly, connecting the first light-emitting device 21 closest to the first display area 1021 to the first pixel circuit 11 furthest from the functional device area 101 shortens the size of the longest connecting line 30. Furthermore, this reduces the ratio of the length of the longest connecting line 30 to the length of the shortest connecting line 30, i.e., reduces the ratio of the maximum to the minimum capacitive / resistive load of the multiple connecting lines 30, thus reducing the risk of uneven display brightness in the display panel 100.

[0102] In some embodiments, the above manufacturing method further includes:

[0103] While fabricating multiple first pixel circuits 11 on the substrate, multiple second pixel circuits 12 are also fabricated on the substrate, and the multiple second pixel circuits 12 are located in the first display area 1021. Along the first direction X, the first pixel circuit 11 closest to the functional device area 101 includes seven second pixel circuits 12 between it and the functional device area 101, and two second pixel circuits 12 are included between two adjacent first pixel circuits 11.

[0104] While multiple first light-emitting devices 21 are fabricated on the side of multiple connecting lines 30 away from the substrate, multiple second light-emitting devices 22 are fabricated on the side of multiple connecting lines 30 away from the substrate. The multiple second light-emitting devices 22 are located in the first display area 1021, and a second pixel circuit 12 is connected to at least one second light-emitting device 22.

[0105] The first pixel circuit 11 closest to the functional device area 101 includes seven second pixel circuits 12 between it and the functional device area 101. These circuits can increase the length of the shortest connecting line 30 among the multiple connecting lines 30. The presence of two second pixel circuits 12 between adjacent first pixel circuits 11 can minimize the length of the longest connecting line 30, thereby reducing the ratio of the length of the longest connecting line 30 to the length of the shortest connecting line 30, and thus reducing the risk of uneven display brightness in the display panel 100.

[0106] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A display panel, characterized in that, The display panel comprises a first display area and a functional device area, wherein the light transmittance of the functional device area is greater than that of the first display area; the display panel includes: Multiple first light-emitting devices are located in the functional device area; Multiple connecting lines, one of which is electrically connected to at least one first light-emitting device; Multiple first pixel circuits are located in the first display area, and each first pixel circuit is electrically connected to a corresponding first light-emitting device via a connecting line. The first pixel circuit closest to the functional device area is connected to the first light-emitting device furthest from the first display area, and the first pixel circuit furthest from the functional device area is connected to the first light-emitting device closest to the first display area. The multiple first pixel circuits are arranged in multiple rows, and each row includes multiple first pixel circuits spaced apart along a first direction. Along the first direction, the interval between the first pixel circuit closest to the functional device area and the functional device area is greater than the interval between two adjacent first pixel circuits. Multiple second light-emitting devices are located in the first display area; Multiple second pixel circuits are located in the first display area, and each second pixel circuit is electrically connected to a second light-emitting device; In particular, along the first direction and away from the functional device area, the number of second pixel circuits included between two adjacent first pixel circuits is reduced.

2. The display panel according to claim 1, characterized in that, Along the direction close to the functional device area, a plurality of first pixel circuits are sequentially electrically connected to the first light-emitting device that is closer to the first display area.

3. The display panel according to claim 2, characterized in that, The first display area includes two sub-areas, which are located on opposite sides of the functional device area along a first direction; the first direction is the row direction in which the plurality of first light-emitting devices are arranged. The first pixel circuit closest to the functional device area is electrically connected to the first light-emitting device in the middle of the functional device area along the first direction.

4. The display panel according to claim 1, characterized in that, Also includes: Multiple second light-emitting devices are located in the first display area; Multiple second pixel circuits are located in the first display area, and each second pixel circuit is electrically connected to a second light-emitting device; Along the first direction, the first pixel circuit closest to the functional device area includes seven second pixel circuits between it and the functional device area, and two second pixel circuits are included between two adjacent first pixel circuits.

5. The display panel according to any one of claims 1 to 3, characterized in that, Among the multiple connecting lines, the ratio of the length of the longest connecting line to the length of the shortest connecting line is less than or equal to 4:

1.

6. The display panel according to any one of claims 1 to 3, characterized in that, Along the first direction, among the two connecting lines connecting two adjacent first pixel circuits, the ratio of the length of the longer connecting line to the length of the other connecting line ranges from 1.03 to 1.

09.

7. The display panel according to any one of claims 1 to 3, characterized in that, The display panel also includes: An array substrate, comprising the first pixel circuit and the second pixel circuit; Multiple planarization layers are disposed on the array substrate, and the multiple planarization layers are spaced apart; At least one routing layer, a routing layer located between two adjacent planarization layers, the at least one routing layer including the plurality of interconnect lines; The light-emitting device is located on the side of the plurality of planarization layers away from the array substrate, and the light-emitting device includes the first light-emitting device and the second light-emitting device.

8. The display panel according to claim 7, characterized in that, The display panel includes multiple wiring layers, and the multiple wiring layers also include multiple first adapter blocks; The first adapter block is located between the connecting line and the first pixel circuit, and the connecting line and the first pixel circuit are electrically connected through the first adapter block; and / or, the first adapter block is located between the connecting line and the first light-emitting device, and the connecting line and the first light-emitting device are electrically connected through the first adapter block.

9. The display panel according to any one of claims 1 to 3, characterized in that, The materials of the multiple connecting lines include transparent conductive materials.

10. A display device, characterized in that, include: The display panel as described in any one of claims 1 to 9; A driver circuit board, connected to the display panel, is configured to transmit control signals to the display panel.

11. A method for manufacturing a display panel, characterized in that, The display panel has a first display area and a functional device area, wherein the light transmittance of the functional device area is greater than that of the first display area; The manufacturing method includes: Provide a substrate; A plurality of first pixel circuits and a plurality of second pixel circuits are fabricated on the substrate, and the plurality of first pixel circuits and the plurality of second pixel circuits are located in the first display area; the plurality of first pixel circuits are arranged in multiple rows, and each row includes a plurality of first pixel circuits distributed at intervals along a first direction; along the first direction, the interval between the first pixel circuit closest to the functional device area and the functional device area is greater than the interval between two adjacent first pixel circuits. Multiple connecting lines are fabricated on the side of the plurality of first pixel circuits away from the substrate, and each connecting line is electrically connected to one first pixel circuit. Multiple first light-emitting devices and multiple second light-emitting devices are fabricated on the side of the multiple connecting lines away from the substrate. The multiple first light-emitting devices are located in the functional device area. A connecting line is electrically connected to at least one first light-emitting device. The first light-emitting device farthest from the first display area is connected to the first pixel circuit closest to the functional device area. The first light-emitting device closest to the first display area is connected to the first pixel circuit farthest from the functional device area. Multiple second light-emitting devices are located in the first display area. A second pixel circuit is electrically connected to a second light-emitting device. Along the first direction and away from the functional device area, the number of second pixel circuits included between two adjacent first pixel circuits decreases.

12. The manufacturing method according to claim 11, characterized in that, The method further includes: While fabricating a plurality of first pixel circuits on the substrate, a plurality of second pixel circuits are also fabricated on the substrate, the plurality of second pixel circuits being located in the first display area; along the first direction, a first pixel circuit closest to the functional device area includes seven second pixel circuits between it and the functional device area, and two second pixel circuits are included between two adjacent first pixel circuits. While fabricating multiple first light-emitting devices on the side of the multiple connecting lines away from the substrate, multiple second light-emitting devices are also fabricated on the side of the multiple connecting lines away from the substrate. The multiple second light-emitting devices are located in the first display area, and a second pixel circuit is connected to at least one second light-emitting device.

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