Method for manufacturing a substrate wafer and substrate wafer

Abstract

The present application is a manufacturing method of a substrate wafer, including the steps of: preparing a wafer having a first main surface and a second main surface; forming a planarization resin layer on the second main surface; adsorbing and holding the planarization resin layer as a reference surface, and in this state, as first processing, performing grinding or polishing on the first main surface; removing the planarization resin layer from the wafer; adsorbing and holding the first main surface after the first processing, and in this state, as second processing, performing grinding or polishing on the second main surface; adsorbing and holding the second main surface after the second processing, and in this state, as third processing, further performing grinding or polishing on the first main surface; and adsorbing and holding the first main surface after the third processing, and in this state, as fourth processing, further performing grinding or polishing on the second main surface, to obtain a substrate wafer; and in the first processing and / or the third processing, performing the processing in such a manner that the wafer has a concave or convex thickness distribution. Thus, a manufacturing method of a substrate wafer that can manufacture a substrate wafer having warping and good nanotopography can be provided.

Description

TECHNICAL FIELD

[0001] The present application relates to a substrate wafer manufacturing method and a substrate wafer. BACKGROUND

[0002] When an epitaxial layer is grown on a substrate wafer, there is a case where warping occurs due to lattice mismatch. As a countermeasure, there is a method of manufacturing a substrate wafer having warping in the opposite direction to the warping direction caused by the epitaxial layer by polishing or grinding processing of the substrate wafer (Patent Literature 1).

[0003] Further, there is a problem that stress occurs between the oxide film and the silicon side due to the difference in the thermal expansion coefficient on a bonded substrate such as SOI, and warping occurs if only the oxide film on one side is removed.

[0004] On the other hand, undulations shorter in wavelength than warping or warp, which are called nanotopography, become a problem (Patent Literature 2).

[0005] PRIOR ART DOCUMENTS

[0006] PATENT LITERATURE

[0007] Patent Literature 1: Japanese Patent Application Laid-Open No. 2008-140856

[0008] Patent Literature 2: Japanese Patent Application Laid-Open No. 2017-098446

[0009] Patent Literature 3: Japanese Patent Application Laid-Open No. 2006-269761

[0010] Patent Literature 4: Japanese Patent Application Laid-Open No. 2009-148866 SUMMARY

[0011] (1) PROBLEMS TO BE SOLVED BY THE INVENTION

[0012] Here, reference is made to Figure 5 A conventional example of a substrate wafer manufacturing method will be described.

[0013] In Figure 5 In the manufacturing method shown in FIG. 1, first, a wafer 10 shown in (C-1) as a processing target is prepared. The wafer 10 has a first main surface 1 and a second main surface 2 on the opposite side to the first main surface 1. Next, as shown in (C-2), the second main surface 2 of the wafer 10 is adsorbed and held to a chuck table 60. Due to this adsorption, the wafer 10 is elastically deformed, and thus the second main surface 2 becomes a second main surface 2s that is also elastically deformed.

[0014] Next, as shown in (C-2), the first main surface 1 of the wafer 10 is lapped or polished using the lapping wheel 50. At this time, as shown in (C-2), the angle of the first main surface 1 with respect to the lapping wheel 50 is adjusted by adjusting the shaft angle of the chuck table 60, so that the wafer 10 becomes a wafer 15 having a concave thickness distribution (concave TTV) corresponding to the value of the desired warp to be obtained by this method. By this processing, the wafer 15 having the processed first main surface Is is obtained.

[0015] Next, the chuck table 60 is released from the adsorption. Thus, the wafer 15 having the released first main surface It and the released second main surface 2t shown in (C-3) is obtained.

[0016] Next, as shown in (C-4), the obtained wafer 15 is turned upside down so that the released second main surface 2t faces upward, and the first main surface It of the wafer 15 is adsorbed and held on the chuck table 60. Due to this adsorption, the wafer 15 is elastically deformed. At this time, the processed first main surface It shown in (C-4) in dotted line is also elastically deformed to become the first main surface Iu following the surface of the chuck table 60. On the other hand, the second main surface 2t shown in (C-4) in dotted line is elastically deformed to become the second main surface 2u having a shape corresponding to the shape of the released first main surface It.

[0017] Next, as shown in (C-5), in this state, the second main surface 2u of the wafer 15 shown in (C-5) in dotted line is lapped or polished using the lapping wheel 50. Thus, the wafer 16 having the processed second main surface 2v is obtained.

[0018] Finally, the obtained wafer 16 is released from the chuck table 60. Thus, the wafer 16 having a warp, having a concave first main surface Iv and a convex second main surface 2x as shown in (C-6) is obtained.

[0019] If such a method is used, a wafer 16 having a desired value of warp can be obtained. However, the wafer 16 obtained by such a method has a problem that the value of the nano-topography is large.

[0020] As a countermeasure against nanotopography, for example, Patent Literature 2 describes a wafer polishing method in which, in order to suppress the influence of nanotopography, an appropriate polishing pressure is given to each pressure zone, a nanotopography map of the wafer surface is measured, and based on the measurement result, the polishing pressure of the polishing head against the wafer is set for each pressure zone, and polishing processing is performed. Further, in order to improve the nanotopography of the substrate wafer, there is a method in which resin is coated on one surface of the wafer and then the wafer is lapped. For example, Patent Literature 3 describes a wafer manufacturing method in which, after cutting, a curable material is applied to a thickness of 40 to 300 μm on one (back) surface of the wafer, the applied surface is maintained after curing, the opposite (front) surface is lapped, and thereby a wafer having a uniform thickness is manufactured by removing undulations. Further, Patent Literature 4 describes a resin coating method and device, and in the method described in Patent Literature 3, as the curable material, an ultraviolet-curable resin is applied to a thickness of 10 to 200 μm.

[0021] However, in these methods, it is not possible to obtain a substrate wafer having a desired Warp value, that is, a desired warpage.

[0022] Thus, for a substrate wafer for epitaxial growth or bonding, it is required to have warpage and good nanotopography, but there is no wafer satisfying both and a manufacturing method thereof.

[0023] In order to solve the above problems, an object of the present application is to provide a manufacturing method of a substrate wafer capable of manufacturing a substrate wafer having warpage and good nanotopography, and a substrate wafer having warpage and good nanotopography.

[0024] (II) Technical Solution

[0025] In order to solve the above problems, in the present application, a manufacturing method of a substrate wafer is provided, characterized by comprising the steps of:

[0026] preparing a wafer having a first main surface and a second main surface on the opposite side of the first main surface;

[0027] forming a planarization resin layer on the second main surface of the wafer;

[0028] absorbing and holding the planarization resin layer as a reference surface, and in this state, as a first processing, lapping or polishing the first main surface of the wafer;

[0029] removing the planarization resin layer from the wafer;

[0030] absorbing and holding the first main surface of the wafer subjected to the first processing, and in this state, as a second processing, lapping or polishing the second main surface of the wafer;

[0031] the second main surface of the wafer is further subjected to lapping or polishing as a third processing, while the first main surface of the wafer is held by adsorption in this state; and

[0032] the first main surface of the wafer is further subjected to lapping or polishing as a third processing, while the first main surface of the wafer is held by adsorption in this state; and

[0033] In the first processing and / or the third processing, the processing is performed in such a manner that the wafer has a concave or convex thickness distribution.

[0034] The manufacturing method of a substrate wafer according to the present application performs first processing on a first main surface of a wafer while holding the wafer by adsorption using a planarization resin layer as a reference surface, then performs second processing on a second main surface of the wafer while holding the wafer by adsorption using the first main surface subjected to the first processing, then performs third processing on the first main surface of the wafer while holding the wafer by adsorption using the second main surface subjected to the second processing, then performs fourth processing on the second main surface of the wafer while holding the wafer by adsorption using the first main surface subjected to the third processing, and performs the first processing and / or the third processing in such a manner that the wafer has a concave or convex thickness distribution, thereby making it possible to manufacture a substrate wafer having a large Warp value, i.e., having warping, and a small nano-topography, i.e., having a good nano-topography. Furthermore, the substrate wafer that can be manufactured by the manufacturing method has warping and a good nano-topography, and thus can be used as a substrate for epitaxial growth or bonding.

[0035] Preferably, the first processing is performed in such a manner that a thickness distribution a [μm] of the wafer obtained by the first processing is 50% or less of a Warp value w [μm] of the substrate wafer obtained by the fourth processing.

[0036] By performing the first processing in this way, the wafer thickness adjustment amount of the first processing can be made smaller than the wafer thickness adjustment amount of the third processing, and as a result, a substrate wafer having a smaller nano-topography can be manufactured.

[0037] Preferably, the planarization resin layer is formed in such a manner that a thickness deviation of the planarization resin layer is 25% or less of the Warp value w [μm] of the substrate wafer.

[0038] By forming the planarization resin layer in this way, the influence of the thickness deviation of the planarization resin layer on the thickness of the wafer obtained by the first processing can be reduced, and as a result, the Warp value of the substrate wafer after processing can be made close to a target.

[0039] The first processing to the fourth processing can be performed in such a manner that the warp value w [μm] of the substrate wafer is 40 μm or more.

[0040] The manufacturing method of the substrate wafer according to the present application can manufacture a substrate wafer having a warp value w [μm] of 40 μm or more.

[0041] The first processing and / or the third processing can be performed in such a manner that the wafer has a thickness distribution in a convex shape.

[0042] Alternatively, the first processing and / or the third processing can be performed in such a manner that the wafer has a thickness distribution in a concave shape.

[0043] According to the desired shape of the substrate wafer to be manufactured, the thickness distribution of the wafer can be in a convex shape or a concave shape in the first processing and / or the third processing. Specifically, in the case where the second main surface of the wafer is the front surface, by making the thickness distribution of the wafer in a concave shape in the first processing and / or the third processing, a substrate wafer having a convex warp can be manufactured. On the other hand, in the case where the second main surface of the wafer is the front surface, by making the thickness distribution of the wafer in a convex shape in the first processing and / or the third processing, a substrate wafer having a concave warp can be manufactured.

[0044] Preferably, a resin that is a precursor of the planarization resin layer is applied on the second main surface of the wafer,

[0045] A load is applied to the resin,

[0046] The resin to which the load is applied is cured to form the planarization resin layer.

[0047] By thus forming the planarization resin layer, the thickness deviation of the planarization resin layer can be suppressed, and thus a substrate wafer having a smaller nanotopography can be manufactured.

[0048] Further, the present application provides a substrate wafer characterized by having a convex or concave warp and a nanotopography of less than 10 nm in SQMM 2 mm x 2 mm.

[0049] Such a substrate wafer has a warp and a good nanotopography, and thus can be used as a substrate for epitaxial growth or bonding.

[0050] Preferably, the nanotopography of the substrate wafer is less than 5 nm.

[0051] Such a substrate wafer can be used as a substrate for epitaxial growth or bonding.

[0052] Preferably, the warp value w [μm] of the substrate wafer is 40 μm or more.

[0053] Such a substrate wafer can be used as a substrate for epitaxial growth or bonding.

[0054] (III) Advantages

[0055] As described above, the substrate wafer manufacturing method according to the present application can manufacture a substrate wafer having a large Warp value, i.e., having a desired warp, and a small nano-topography, i.e., having a good nano-topography. In addition, the substrate wafer manufactured by the wafer manufacturing method of the present application has a desired warp and a good nano-topography, and thus can be used as a substrate for epitaxial growth or bonding.

[0056] In addition, the substrate wafer of the present application has a desired warp and a good nano-topography, and thus can be used as a substrate for epitaxial growth or bonding, and by using the substrate wafer, a final epitaxial wafer or a bonded substrate having no warp and a good nano-topography can be obtained. BRIEF DESCRIPTION OF DRAWINGS

[0057] Figure 1 is a schematic cross-sectional view showing Step 1 of an example of the substrate wafer manufacturing method of the present application.

[0058] Figure 2 is a schematic cross-sectional view showing Step 2 and Step 3 of an example of the substrate wafer manufacturing method of the present application.

[0059] Figure 3 is a schematic cross-sectional view showing Step 4 and Step 5 of an example of the substrate wafer manufacturing method of the present application.

[0060] Figure 4 is a schematic cross-sectional view showing the first processing of another example of the substrate wafer manufacturing method of the present application.

[0061] Figure 5 is a schematic cross-sectional view showing an example of the conventional substrate wafer manufacturing method. DETAILED DESCRIPTION

[0062] As described above, there is a need to develop a substrate wafer manufacturing method that can manufacture a substrate wafer having a desired warp and a good nano-topography, and a substrate wafer having a desired warp and a good nano-topography.

[0063] The present inventors have repeatedly and carefully studied in view of the above problem, and as a result, have found that a substrate wafer having a large warp value, i.e., a large warp, and a small nano morphology, i.e., a good nano morphology, can be manufactured by the following method, thereby completing the present invention. In the method, first processing of a first main surface of a wafer is performed while the wafer is adsorptively held with a planarization resin layer as a reference surface, then second processing of a second main surface of the wafer is performed while the wafer is adsorptively held with the first main surface subjected to the first processing, then third processing of the first main surface of the wafer is performed while the wafer is adsorptively held with the second main surface subjected to the second processing, then fourth processing of the second main surface of the wafer is performed while the wafer is adsorptively held with the first main surface subjected to the third processing, and the first processing and / or the third processing is performed in a manner such that the wafer has a concave or convex thickness distribution.

[0064] That is, the present invention is a method for manufacturing a substrate wafer, characterized by comprising the steps of:

[0065] preparing a wafer having a first main surface and a second main surface on the opposite side of the first main surface;

[0066] forming a planarization resin layer on the second main surface of the wafer;

[0067] adsorptively holding the planarization resin layer as a reference surface, and in this state, as first processing, performing lapping or polishing on the first main surface of the wafer;

[0068] removing the planarization resin layer from the wafer;

[0069] adsorptively holding the first main surface of the wafer subjected to the first processing, and in this state, as second processing, performing lapping or polishing on the second main surface of the wafer;

[0070] adsorptively holding the second main surface of the wafer subjected to the second processing, and in this state, as third processing, further performing lapping or polishing on the first main surface of the wafer; and

[0071] adsorptively holding the first main surface of the wafer subjected to the third processing, and in this state, as fourth processing, further performing lapping or polishing on the second main surface of the wafer, thereby obtaining a substrate wafer;

[0072] in the first processing and / or the third processing, the processing is performed in a manner such that the wafer has a concave or convex thickness distribution.

[0073] Further, the present invention is a substrate wafer characterized by having a convex or concave warp, and a nano morphology of less than 10 nm in SQMM 2 mm x 2 mm.

[0074] The present invention will now be described in detail with reference to the accompanying drawings, but the present invention is not limited thereto.

[0075] [Substrate wafer manufacturing method]

[0076] The wafer preparation and planarization resin layer formation in the substrate wafer manufacturing method of the present invention described above are taken as (step 1), the first processing and planarization resin layer removal are taken as (step 2), the second processing is taken as (step 3), the third processing is taken as (step 4), and the fourth processing is taken as (step 5), and will be described below.

[0077] (Step 1)

[0078] First, such as Figure 1 As shown in (S1-1), a wafer 10 is prepared as the object of processing. The wafer 10 has a first main surface 1 and a second main surface 2 opposite to the first main surface 1. Furthermore, in Figure 1 For the purpose of illustration, the unevenness of the surfaces of the first main surface 1 and the second main surface 2 is exaggerated, but the surface roughness of the first main surface 1 and the second main surface 2 is not particularly limited.

[0079] There are no particular limitations on the prepared wafer 10 as long as it can be used as a raw material for substrate wafers, such as raw materials for substrate wafers used for epitaxial growth or bonding.

[0080] On the other hand, a lower platform 41 with a flat surface, as shown in (S1-1), is prepared. A light-transmitting film 30, for example, transparent to ultraviolet light, is laid on this lower platform 41. Next, a plastic, for example liquid, resin 21, as a precursor to a planarizing resin layer, is supplied and coated onto the light-transmitting film 30. Figure 1 In the example shown, a UV-curable resin is used as resin 21. However, the material of resin 21 is not particularly limited.

[0081] Next, the first main surface 1 of the wafer 10 is held on the upper platform 42. Then, as shown in (S1-2), the wafer 10 in this state is placed on the resin 21 in such a way that the second main surface 2 is in contact with the resin 21. As a result, the resin 21, which serves as a precursor for a planarization resin layer, is coated onto the second main surface 2 of the wafer 10. Then, the upper platform 42 is used to press (apply a specified load) to flatten the surface of the resin 21.

[0082] The thickness deviation of resin 21 can be adjusted by adjusting the pressure applied at this time. By applying appropriate pressure, the resin can be appropriately pressed and stretched, and an appropriate resin thickness distribution can be obtained. Regarding the resin thickness deviation, it is preferably 25% or less of the desired Warp value w[μm] of the substrate wafer manufactured by the manufacturing method of the present invention, more preferably 15% or less. Ideally, the resin thickness deviation should be set to 0% or more of the desired Warp value w[μm] of the substrate wafer manufactured by the manufacturing method of the present invention, for example, 5% or more.

[0083] Next, the wafer 10, which is fitted with resin 21 and transparent film 30, is removed from the upper platform 42 and the lower platform 41. The removed wafer 10 is then irradiated with UV light from the transparent film 30 side as shown in (S1-3) to cure the resin 21. Furthermore, the curing process of the resin 21 varies depending on the material of the resin 21. If a photocuring process is not performed, the laying of the transparent film 30 can be omitted.

[0084] Through this curing process, Figure 2 The wafer 10 with a planarization resin layer 20 shown in (S2-1).

[0085] (Step 2)

[0086] Next, the above-obtained... Figure 2 The wafer 10 with the planarization resin layer 20 shown in (S2-1) is held in place on the chuck stage 60 shown in (S2-2) with the planarization resin layer 20 as the reference surface. This chuck stage 60 is, for example, made of porous ceramic, and can hold the wafer 10 by vacuum adsorption. Furthermore, the chuck stage 60 has the function of adjusting the axial angle of the wafer 10 relative to the grinding or polishing mechanism. However, in this invention, the mechanism for adsorbing and holding the wafer 10 is not particularly limited.

[0087] In addition, in (S2-2), although the transparent film 30 is in contact with the chuck stage 60, the transparent film 30 has a thickness smaller than that of the wafer 10 and the planarization resin layer 20, and does not hinder adsorption and retention.

[0088] Next, as a first processing step, the first main surface 1 of the wafer 10, which is in an adsorbed and held state, is ground or polished as shown in (S2-2). In (S2-2), an example of grinding using a grinding wheel 50 is shown, but the mechanism for grinding or polishing is not particularly limited. Furthermore, in this invention, in this first processing step and / or the third processing step described later, the processing is performed in a manner that gives the wafer a concave or convex thickness distribution. In (S2-2), an example is shown where, as a first processing step, the first main surface 1 of the wafer 10 is ground to obtain a wafer 11 having a first main surface 1a processed in the first step and having a concave thickness distribution.

[0089] Next, the wafer 11, which has undergone the first processing, is released from the chuck stage 60. Then, the planarization resin layer 20 and the light-transmitting film 30 are removed from the wafer 11. Thus, the wafer 11 shown in (S2-3) is obtained. The obtained wafer 11 has a first main surface 1a, which has undergone the first processing, and a second main surface 2, which is opposite to the first main surface 1a. Furthermore, the wafer 11 has a concave thickness distribution (concave TTV).

[0090] (Step 3)

[0091] Next, as Figure 2 As shown in (S3-1), the wafer 11 obtained in step 2 is flipped so that the second main surface 2 faces upward, and the first main surface 1a, which has undergone the first processing, is held in place on the chuck stage 60. Due to this adsorption, the wafer 11 undergoes elastic deformation. At this time, the first main surface 1a, which has undergone the first processing and is shown as a dotted line in (S3-1), also undergoes elastic deformation and becomes the first main surface 1b that follows the surface of the chuck stage 60. On the other hand, the second main surface 2, which is shown as a dotted line in (S3-1), undergoes elastic deformation and is displaced downward, becoming the second main surface 2a.

[0092] Next, as a second processing step, the second principal surface 2a of the wafer 11, which is held in this adsorbed state, is ground or polished. Example shown in (S3-2) is that the second principal surface 2a, shown as a dotted line, is ground using a grinding wheel 50 as a grinding mechanism. In this second processing step, as shown in (S3-2), grinding or polishing is performed to flatten the wafer thickness. Through this second processing step, a wafer 12 with the second processed principal surface 2b, as shown in (S3-2), is obtained.

[0093] Next, the obtained wafer 12 is released from the chuck stage 60, resulting in the wafer 12 in the state shown in (S3-3). Due to release from adsorption, the first main surface 1b, which has undergone the first processing, deforms into a concave first main surface 1c. On the other hand, the second main surface 2b, which has undergone the second processing, also deforms into a convex second main surface 2c. Therefore, as shown in (S3-3), the wafer 12 is a convex warped wafer with the second main surface 2c as the front side.

[0094] (Step 4)

[0095] Next, as Figure 3As shown in (S4-1), the wafer 12 obtained in step 3 is flipped so that the first main surface 1c of the first processing is facing upwards. The second main surface 2c of the wafer 12 in this orientation, which has undergone the second processing, is held in place by the chuck stage 60. Due to this attachment, the wafer 12 undergoes elastic deformation. At this time, as shown in (S4-2), the second main surface 2c of the second processing also undergoes elastic deformation, becoming the second main surface 2d that follows the surface of the chuck stage 60. Although not shown, the first main surface 1c of the first processing also undergoes elastic deformation.

[0096] As a third processing step, the first principal surface 1c of the wafer 12 in this state is ground or polished. An example of grinding using a grinding wheel 50 is shown in (S4-2), but the grinding or polishing mechanism is not particularly limited. As previously described, in this invention, the first and / or third processing steps are performed in a manner that gives the wafer a concave or convex thickness distribution. An example is shown in (S4-2) where, as a third processing step, the first principal surface 1c of the wafer 12 is ground to obtain a wafer 13 having a third-processed first principal surface 1d and a concave thickness distribution.

[0097] Next, the wafer 13, which has undergone the third processing, is released from the chuck stage 60. Thus, the wafer 13 shown in (S4-3) is obtained. The obtained wafer 13 has a concave first main surface 1e, which has undergone the third processing, and a convex second main surface 2e, which has undergone the second processing, which is opposite to the first main surface 1e. Furthermore, the wafer 13 has a concave thickness distribution (concave TTV).

[0098] (Step 5)

[0099] Next, as Figure 3 As shown in (S5-1), the wafer 13 obtained in step 4 is flipped so that the second main surface 2e faces upward, and the first main surface 1e, which has undergone the third processing, is held in place on the chuck stage 60. Due to this attachment, the wafer 13 undergoes elastic deformation. At this time, the first main surface 1e, which has undergone the third processing and is shown as a dotted line in (S5-1), also undergoes elastic deformation and becomes the first main surface 1f that follows the surface of the chuck stage 60. On the other hand, the second main surface 2e, which is shown as a dotted line in (S5-1), undergoes elastic deformation and is displaced downward, becoming the second main surface 2f.

[0100] Next, as a fourth processing step, the second main surface 2f of the wafer 13, which has been processed in the second step, is ground or polished. Example shown in (S5-2) is that the second main surface 2f, shown as a dotted line, is ground using a grinding wheel 50 as a grinding mechanism. In this fourth processing step, as shown in (S5-2), grinding or polishing is performed to flatten the wafer thickness. Through this fourth processing step, a substrate wafer 14 with the fourth-processed second main surface 2g, as shown in (S5-2), is obtained.

[0101] Next, the obtained substrate wafer 14 is released from the chuck table 60, and a wafer 14 in a state shown in (S5-3) is obtained. Due to the release from the adsorption, the first main face If after the third processing is deformed to become a concave first main face Ig. On the other hand, the second main face 2g after the fourth processing is also deformed to become a convex second main face 2h. Thus, as shown in (S5-3), the substrate wafer 14 is a warped substrate wafer having a convex shape in a case where the second main face 2h is a front face.

[0102] Again, in the present application, the first processing and / or the third processing are performed in a manner that the wafer has a concave or convex thickness distribution. The thickness distribution can be adjusted by adjusting the axis angle of the chuck table. For example, in a case where the processing is performed in a manner that the wafer has a convex thickness distribution, for example, as shown in (S5-2), the axis angle of the chuck table 60 with respect to the grinding or polishing mechanism (the grinding wheel 50 in (S5-2)) is adjusted. By this, a wafer 10' having a convex first main face la' and a convex thickness distribution as shown in (S5-3) is obtained. Figure 4 Figure 4 Again, in the present application, the first processing and / or the third processing are performed in a manner that the wafer has a concave or convex thickness distribution. The thickness distribution can be adjusted by adjusting the axis angle of the chuck table. For example, in a case where the processing is performed in a manner that the wafer has a convex thickness distribution, for example, as shown in (S5-2), the axis angle of the chuck table 60 with respect to the grinding or polishing mechanism (the grinding wheel 50 in (S5-2)) is adjusted. By this, a wafer 10' having a convex first main face la' and a convex thickness distribution as shown in (S5-3) is obtained. Figure 4

[0103] Again, in the present application, the first processing and / or the third processing are performed in a manner that the wafer has a concave or convex thickness distribution. The thickness distribution can be adjusted by adjusting the axis angle of the chuck table. For example, in a case where the processing is performed in a manner that the wafer has a convex thickness distribution, for example, as shown in (S5-2), the axis angle of the chuck table 60 with respect to the grinding or polishing mechanism (the grinding wheel 50 in (S5-2)) is adjusted. By this, a wafer 10' having a convex first main face la' and a convex thickness distribution as shown in (S5-3) is obtained. Figures 1-3 Again, in the present application, the first processing and / or the third processing are performed in a manner that the wafer has a concave or convex thickness distribution. The thickness distribution can be adjusted by adjusting the axis angle of the chuck table. For example, in a case where the processing is performed in a manner that the wafer has a convex thickness distribution, for example, as shown in (S5-2), the axis angle of the chuck table 60 with respect to the grinding or polishing mechanism (the grinding wheel 50 in (S5-2)) is adjusted. By this, a wafer 10' having a convex first main face la' and a convex thickness distribution as shown in (S5-3) is obtained.

[0104] In the above-described example of the method of manufacturing a substrate wafer of the present application, the adjustment of the wafer thickness distribution (thickness deviation) is performed in the first processing and / or the third processing. Further, the first main face is ground or polished by the first processing and the third processing performed in a state where the planarization resin layer is formed on the wafer, and the second main face is also ground or polished by the second processing and the fourth processing. As a result of these, the method of manufacturing a substrate wafer of the present application can manufacture a substrate wafer having a large warp value, i.e., having a desired warp, and a small nano-topography, i.e., having a good nano-topography.

[0105] ​​Preferably, the first processing is performed in such a manner that the thickness distribution a [μm] of the wafer obtained by the first processing is 50% or less of the Warp value w [μm] of the substrate wafer obtained by the fourth processing. That is, the wafer thickness adjustment amount resulting from the first processing is preferably less than the wafer thickness adjustment amount resulting from the third processing. In this way, by performing the first processing and the third processing, a substrate wafer having a smaller nanotopography can be manufactured. Further, for example, the first processing can be performed in such a manner that the thickness distribution a [μm] of the wafer obtained by the first processing is 0% or more of the Warp value w [μm] of the substrate wafer obtained by the fourth processing.

[0106] In the present application, the processing to become convex or concave can be performed in either one of the first processing or the third processing, and the adjustment of the thickness distribution can not be performed in the other. In the processing in which the adjustment of the thickness distribution is not performed, the processing surface (e.g., a lapping wheel or a polishing pad) of the lapping or polishing mechanism can be pushed against the first main surface of the wafer in parallel, and lapping or polishing for planarization can be performed.

[0107] The first processing to the fourth processing can be performed in such a manner that the Warp value w [μm] of the substrate wafer is 40 μm or more. Further, for example, the first processing to the fourth processing can be performed in such a manner that the Warp value w [μm] of the substrate wafer is 200 μm or less.

[0108] According to the method for manufacturing a substrate wafer of the present application, a substrate wafer having a Warp value w [μm] of 40 μm or more can be manufactured.

[0109] Preferably, mirror polishing is performed on the substrate wafer obtained after the fourth processing. In particular, in order to perform formation of an epitaxial layer or bonding, mirror polishing is preferably performed on the surface on which the formation of the epitaxial layer or the bonding is performed. More preferably, mirror polishing is performed on both the first main surface and the second main surface of the substrate wafer. By performing mirror polishing on both surfaces, the warped shape resulting from the first processing to the fourth processing can be more reliably maintained.

[0110] [Substrate Wafer]

[0111] The substrate wafer of the present application has a convex or concave warp and a nanotopography of less than 10 nm under SQMM 2 mm x 2 mm.

[0112] Such a substrate wafer has a warp and a good nanotopography, and thus can be used as a substrate for epitaxial growth or bonding.

[0113] The substrate wafer of the present application can be manufactured, for example, by the method for manufacturing a substrate wafer of the present application described above.

[0114] The nanotopography of the substrate wafer is preferably less than 5 nm.

[0115] Such a substrate wafer can be used as a substrate for epitaxial growth or bonding.

[0116] The nano-topography of the substrate wafer at SQMM 2 mm x 2 mm is more preferably smaller, and can be 0 nm or more.

[0117] The Warp value w [μm] of the substrate wafer is preferably 40 μm or more.

[0118] Such a substrate wafer can be used as a substrate for epitaxial growth or bonding.

[0119] The Warp value w [μm] of the substrate wafer is, for example, 200 μm or less.

[0120] Examples

[0121] Hereinafter, the present application will be specifically described using examples and comparative examples, but the present application is not limited to these examples and comparative examples.

[0122] (Examples 1, 2, 3-1, 3-2, 3-3, 4, and 5)

[0123] In Examples 1, 2, 3-1, 3-2, 3-3, 4, and 5, a substrate wafer was manufactured in the following order. The desired Warp value w was made to be 40 μm.

[0124] (Step 1)

[0125] First, the following materials were prepared.

[0126] • As a processed object, i.e., a wafer, a <100> face orientation P-type Si single-crystal wafer having a diameter of 300 mm was prepared, which had a first main surface and a second main surface on the opposite side from the first main surface.

[0127] • A UV-curable resin was prepared as a precursor of a planarization resin layer (a cover).

[0128] • A PET film was prepared as a light-transmissive film.

[0129] Next, the PET film was laid on a flat glass stage (a lower stage), and 10 ml of the UV-curable resin was dropped on the PET film.

[0130] The first main surface of the wafer was adsorptively held to a ceramic stage (an upper stage), and was pushed against the resin.

[0131] The pressing control was performed by driving a servo motor that held the ceramic stage, and was pressed until a prescribed load L was detected.

[0132] Here, the above prescribed load L was 2000 N in Examples 1, 2, 3-1, 4, and 5, 1900 N in Example 3-2, and 1800 N in Example 3-3, in view of the influence of the resin thickness deviation.

[0133] After the pressing, the UV-curable resin was irradiated with ultraviolet rays from the PET film side to cure the resin, and a planarization resin layer was formed on the second main surface of the wafer. As a light source for resin curing, a UV-LED with a wavelength of 365 nm was used.

[0134] The thickness of the planarization resin layer obtained by measurement under the following conditions was measured.

[0135] • The optical sensor for resin thickness measurement used SI-T80 by Keyence.

[0136] • The sensor was fixed, and the wafer was scanned in a straight line to measure the thickness distribution.

[0137] • For each 1 measurement line, 1160 points were measured at an interval of 0.25 mm.

[0138] • The maximum value - minimum value of the four resin thickness distributions measured equally in a radial pattern was taken as the resin thickness deviation.

[0139] The measurement results are shown in Table 1 below.

[0140] (Steps 2 to 5)

[0141] Next, the wafer on which the planarization resin layer was formed was subjected to first to fourth processes under the following conditions.

[0142] (Overall)

[0143] • The lapping process used DFG8360 by DISCO.

[0144] • As the lapping grinding wheel, a lapping grinding wheel incorporating diamond abrasive grains was used.

[0145] • As the chuck table, a chuck table made of a porous ceramic was used. This chuck table can vacuum-adsorb and hold one side of the main surface of the wafer. In addition, this chuck table has a function of adjusting the axial angle with respect to the lapping grinding wheel.

[0146] <First processing condition (first main surface lapping) (Step 2)>

[0147] • The axial angle of the chuck table was adjusted so that the wafer thickness distribution was concave a μm, and processing was performed.

[0148] • The lapping process of the first main surface (back surface) was performed while vacuum-adsorbing the planarization resin layer side.

[0149] • The flat resin layer is peeled off from the wafer after the lapping.

[0150] In addition, in Example 1, the adjustment of the wafer thickness distribution is not performed in the first processing (a = 0 μm), and the lapping for surface planarization is performed in a manner such that the wafer thickness distribution is 1 μm or less.

[0151] <Second processing condition (second main surface lapping) (Step 3)>

[0152] • The adjustment of the axis angle of the chuck table is performed in a manner such that the wafer thickness distribution is 1 μm or less, and the processing is performed.

[0153] • The lapping processing of the second main surface (front surface) is performed in a state where the first main surface (back surface) subjected to the first processing is vacuum-adsorbed.

[0154] <Third processing condition (first main surface lapping) (Step 4)>

[0155] • The adjustment of the axis angle of the chuck table is performed in a manner such that the wafer thickness distribution is concave β μm, and the processing is performed.

[0156] • The lapping processing of the first main surface (back surface) subjected to the first processing is performed in a state where the second main surface (front surface) subjected to the second processing is vacuum-adsorbed.

[0157] In addition, in Example 5, the adjustment of the wafer thickness distribution is not performed in the third processing (β = 0 μm), and the lapping for surface planarization is performed in a manner such that the wafer thickness distribution is 1 μm or less.

[0158] <Fourth processing condition (second main surface lapping) (Step 5)>

[0159] • The adjustment of the axis angle of the chuck table is performed in a manner such that the wafer thickness distribution is 1 μm or less, and the processing is performed.

[0160] • The lapping processing of the second main surface (front surface) subjected to the second processing is performed in a state where the first main surface (back surface) subjected to the third processing is vacuum-adsorbed.

[0161] In Examples 1, 2, 3-1, 3-2, 3-3, 4, and 5, the above-mentioned wafer thickness distribution adjustment amounts a and β are set to the values shown in Table 1.

[0162] (Finishing)

[0163] In each of the examples, mirror polishing is performed on both the front and back surfaces of the substrate wafer obtained after the fourth processing. Thus, the substrate wafer of each of the examples is obtained.

[0164] (Comparative Example)

[0165] On the other hand, as a comparative example, except for the following, a substrate wafer was manufactured in the same order as in Example 1: the formation of the planarization resin layer, and the first processing and the second processing were skipped; as the third processing, the axis angle of the chuck table was adjusted in such a manner that the wafer thickness distribution was concave by 40 μm, and grinding was performed; and then, as the fourth processing, the axis angle of the chuck table was adjusted in such a manner that the wafer thickness distribution was 1 μm or less, and grinding was performed.

[0166] [Measurement of Warp and nanotopography]

[0167] Measurement of Warp and nanotopography was performed on the substrate wafers of each of the examples and the substrate wafer of the comparative example. The measurement was performed using an optical interference type flatness / nanotopography measurement device (manufactured by KLA: Wafer Sight 2).

[0168] As an index of nanotopography, SQMM 2 mm x 2 mm was used. The results are shown in Table 1 below.

[0169] [Table 1]

[0170]

[0171] For nanotopography, the numerical results under SQMM 2 mm x 2 mm were evaluated as follows.

[0172] O: less than 5 nm

[0173] Δ: 5 nm or more and less than 10 nm

[0174] X: 10 nm or more.

[0175] From the results shown in Table 1, in Examples 1, 2, 3-1, 3-2, 3-3, 4, and 5, a substrate wafer in which the Warp value showed a high value of 35.7 μm or more and the nanotopography was less than 10 nm was obtained. These results were due to the fact that in each of the examples, the first processing was performed in a state in which the wafer had the planarization resin layer formed thereon, the first main surface was ground and the wafer thickness distribution was adjusted by the first processing and the third processing, and the second processing and the fourth processing were performed twice on the second main surface.

[0176] On the other hand, in the comparative example, although the Warp value reached the desired 40 μm or more, since the grinding in a state in which the planarization resin layer was formed was not performed, the grinding of the first main surface and the second main surface was performed only once, and thus the nanotopography was poor.

[0177] In contrast, in Examples 1, 2, 3-1, and 3-2, the Warp was 40 μm or more as desired and the nanotopography was less than 5 nm, and a substrate wafer in which the nanotopography was significantly improved relative to the comparative example could be manufactured.

[0178] Further, the Warp of the substrate wafer of Examples 4 and 5 is also desired to be 40 μm or more and the nano-topography is less than 10 nm, and a substrate wafer with improved nano-topography compared to the comparative example can be manufactured.

[0179] On the other hand, the substrate wafers obtained in Examples 1, 2, 3-1 and 3-2 have better nano-topography compared to the substrate wafers obtained in Examples 4 and 5, wherein in Examples 1, 2, 3-1 and 3-2, the wafer thickness adjustment amount α [μm] of the first processing is equal to or less than the wafer thickness adjustment amount β [μm] of the third processing, and in Examples 4 and 5, the wafer thickness adjustment amount α [μm] of the first processing is greater than the wafer thickness adjustment amount β [μm] of the third processing. From the comparison of the results of such examples, it is preferable to make the wafer thickness adjustment amount α [μm] of the first processing equal to or less than the wafer thickness adjustment amount β [μm] of the third processing.

[0180] Further, in Example 3-3, the nano-topography is less than 5 nm, and a substrate wafer with significantly improved nano-topography compared to the comparative example can be obtained. On the other hand, the substrate wafer obtained in Example 3-3 has a smaller Warp value than the other examples, although it is within the allowable range.

[0181] If the results are compared in Examples 3-1, 3-2 and 3-3, in which the wafer thickness adjustment amount α [μm] of the first processing and the wafer thickness adjustment amount β [μm] of the third processing are each 20 μm and equal, it is known that the smaller the resin thickness deviation, the larger the resulting Warp value. From these results, it is preferable that the resin thickness deviation be smaller, and it is preferable to be 25% or less of the desired Warp value.

[0182] Further, the present application is not limited to the above-described embodiments. The above-described embodiments are examples, and any solution having substantially the same structure as that recited in the technical idea of the claims of the present application and achieving the same effects is included in the technical scope of the present application.

Claims

1. A method of manufacturing a substrate wafer, characterized by, comprising the steps of: preparing a wafer having a first main surface and a second main surface opposite to the first main surface; forming a planarization resin layer on the second main surface of the wafer; absorbing and holding the planarization resin layer as a reference surface, and in this state, as a first processing, performing lapping or polishing on the first main surface of the wafer; removing the planarization resin layer from the wafer; absorbing and holding the first-processed first main surface of the wafer, and in this state, as a second processing, performing lapping or polishing on the second main surface of the wafer; absorbing and holding the second-processed second main surface of the wafer, and in this state, as a third processing, further performing lapping or polishing on the first main surface of the wafer; and absorbing and holding the third-processed first main surface of the wafer, and in this state, as a fourth processing, further performing lapping or polishing on the second main surface of the wafer, to obtain a substrate wafer; in the first processing and / or the third processing, processing is performed in such a manner that the wafer has a concave or convex thickness distribution.

2. The method for manufacturing a substrate wafer according to claim 1, wherein the first processing is performed in such a manner that a thickness distribution a [μm] of the wafer obtained by the first processing is 50% or less of a Warp value w [μm] of the substrate wafer obtained by the fourth processing.

3. The method for manufacturing a substrate wafer according to claim 2, wherein the planarization resin layer is formed in such a manner that a thickness deviation of the planarization resin layer is 25% or less of the Warp value w [μm] of the substrate wafer.

4. The method for manufacturing a substrate wafer according to claim 2, wherein the first processing to the fourth processing are performed in such a manner that the Warp value w [μm] of the substrate wafer is 40 μm or more.

5. The method for manufacturing a substrate wafer according to claim 1, wherein in the first processing and / or the third processing, processing is performed in such a manner that the wafer has a convex thickness distribution.

6. The method for manufacturing a substrate wafer according to claim 1, wherein in the first processing and / or the third processing, processing is performed in such a manner that the wafer has a concave thickness distribution.

7. The method for manufacturing a substrate wafer according to any one of claims 1 to 6, wherein a resin that is a precursor of the planarization resin layer is applied on the second main surface of the wafer, a load is applied to the resin, the resin to which the load is applied is cured to form the planarization resin layer.

8. A substrate wafer, wherein having a convex or concave warp and a nano morphology under SQMM 2 mm x 2 mm of less than 10 nm, and a Warp value w [μm] of 40 μm or more.

9. The substrate wafer according to claim 8, wherein the nano morphology is less than 5 nm.

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