Parameter estimation for linearization of nonlinear components

Abstract

A method is disclosed that includes selecting a mathematical model associated with a nonlinear component, determining an error signal associated with the nonlinear component, where the error signal is indicative of a difference between a first signal and a second signal, estimating one or more parameters that minimize the error signal based on the mathematical model, and estimating and / or linearizing the nonlinear component based on the estimated one or more parameters.

Description

Technical Field

[0001] The following exemplary embodiments relate to wireless communication and digital signal processing for wireless communication. Background Technology

[0002] In wireless communication systems, there may be one or more nonlinear components, such as power amplifiers. For example, it may be desirable to improve the linearity of nonlinear components in a wireless communication system in order to reduce distortion of the transmitted signal. Summary of the Invention

[0003] The independent claims define the scope of protection sought by the various exemplary embodiments. Exemplary embodiments and features (if any) described in this specification that are not within the scope of the independent claims shall be interpreted as examples useful for understanding the various exemplary embodiments.

[0004] According to one aspect, an apparatus is provided, the apparatus comprising components for: selecting a mathematical model associated with a nonlinear component; determining an error signal associated with the nonlinear component, wherein the error signal indicates a difference between a first signal and a second signal; estimating one or more parameters that minimize the error signal based on the mathematical model; and estimating and / or linearizing the nonlinear component based on the estimated one or more parameters.

[0005] According to another aspect, an apparatus is provided, the apparatus comprising at least one processor and at least one memory including computer program code, wherein the at least one memory and the computer program code are configured together with the at least one processor to cause the apparatus to: select a mathematical model associated with a nonlinear component; determine an error signal associated with the nonlinear component, wherein the error signal indicates a difference between a first signal and a second signal; estimate one or more parameters that minimize the error signal based on the mathematical model; and estimate and / or linearize the nonlinear component based on the estimated one or more parameters.

[0006] According to another aspect, a method is provided, the method comprising: selecting a mathematical model associated with a nonlinear component; determining an error signal associated with the nonlinear component, wherein the error signal indicates the difference between a first signal and a second signal; estimating one or more parameters that minimize the error signal based on the mathematical model; and estimating and / or linearizing the nonlinear component based on the estimated one or more parameters.

[0007] According to another aspect, a computer program is provided, the computer program including instructions for causing a device to perform at least the following operations: selecting a mathematical model associated with a nonlinear component; determining an error signal associated with the nonlinear component, wherein the error signal indicates the difference between a first signal and a second signal; estimating one or more parameters that minimize the error signal based on the mathematical model; and estimating and / or linearizing the nonlinear component based on the estimated one or more parameters.

[0008] According to another aspect, a computer-readable medium including program instructions is provided for inducing an apparatus to perform at least the following operations: selecting a mathematical model associated with a nonlinear component; determining an error signal associated with the nonlinear component, wherein the error signal indicates the difference between a first signal and a second signal; estimating one or more parameters that minimize the error signal based on the mathematical model; and estimating and / or linearizing the nonlinear component based on the estimated one or more parameters.

[0009] According to another aspect, a non-transitory computer-readable medium is provided, comprising program instructions for causing a device to perform at least the following operations: selecting a mathematical model associated with a nonlinear component; determining an error signal associated with the nonlinear component, wherein the error signal indicates the difference between a first signal and a second signal; estimating one or more parameters that minimize the error signal based on the mathematical model; and estimating and / or linearizing the nonlinear component based on the estimated one or more parameters. Attached Figure Description

[0010] In the following description, various exemplary embodiments will be described in more detail with reference to the accompanying drawings, in which...

[0011] Figure 1 An exemplary embodiment of a cellular communication network is shown;

[0012] Figure 2 Parameter estimation for power amplifier model identification is shown according to an exemplary embodiment;

[0013] Figure 3 A flowchart for power amplifier model identification is shown according to an exemplary embodiment;

[0014] Figure 4 The digital predistortion parameter estimation according to an exemplary embodiment is shown;

[0015] Figure 5 A flowchart for digital predistortion parameter estimation according to an exemplary embodiment is shown;

[0016] Figure 6 A flowchart according to an exemplary embodiment is shown;

[0017] Figure 7 , Figure 8 and Figure 9 Measurement results according to an exemplary embodiment are shown;

[0018] Figure 10 An apparatus according to an exemplary embodiment is shown. Detailed Implementation

[0019] The following embodiments are exemplary. Although the specification may refer to "an," "one," or "some" embodiments in various places in the text, this does not necessarily mean that each reference is for the same embodiment(s) or that a particular feature applies only to a single embodiment. Individual features of different embodiments may also be combined to provide other embodiments.

[0020] In the following description, radio access architectures based on Advanced Long Term Evolution (LTE-A) or New Radio (NR, 5G) will be used as examples of access architectures to which exemplary embodiments can be applied to describe different exemplary embodiments, but the exemplary embodiments are not limited to such architectures. It will be apparent to those skilled in the art that the exemplary embodiments can also be applied to other types of communication networks with suitable components by appropriately adjusting parameters and processes. Some examples of other options suitable for the system may be Universal Mobile Telecommunications System (UMTS) Radio Access Network (UTRAN or E-UTRAN), Long Term Evolution (LTE, the same as E-UTRA), Wireless Local Area Network (WLAN or WiFi), Global Microwave Access Interoperability (WiMAX). Personal Communication Services (PCS) Wideband Code Division Multiple Access (WCDMA), systems using Ultra Wideband (UWB) technology, sensor networks, Mobile Ad Hoc Networks (MANET), and Internet Protocol Multimedia Subsystem (IMS), or any combination thereof.

[0021] Figure 1 An example of a simplified system architecture is depicted, showing only some components and functional entities, all of which are logical units whose implementations may differ from those shown. Figure 1 The connections shown are logical connections; the actual physical connections may differ. It will be clear to those skilled in the art that the system may also include, in addition to... Figure 1 Other functions and structures besides those shown.

[0022] However, the exemplary embodiments are not limited to the system given as an example, but those skilled in the art can apply this solution to other communication systems with the necessary characteristics.

[0023] Figure 1The example shows a portion of an exemplary radio access network.

[0024] Figure 1 User equipment 100 and 102 are shown, configured to be in a radio connection state with an access node (such as (e / g)NodeB) 104 providing the cell on one or more communication channels in the cell. The physical link from the user equipment to the (e / g)NodeB can be referred to as an uplink or reverse link, while the physical link from the (e / g)NodeB to the user equipment can be referred to as a downlink or forward link. It should be understood that the (e / g)NodeB, or its functionality, can be implemented using any entity suitable for such purposes, such as a node, host, server, or access point.

[0025] A communication system may include more than one (e / g)NodeB, in which case the (e / g)NodeBs may also be configured to communicate with each other via wired or wireless links designed for this purpose. These links may be used for signaling purposes. An (e / g)NodeB may be a computing device configured to control the radio resources of the communication system to which it is coupled. A NodeB may also be referred to as a base station, access point, or any other type of interface device including a relay station capable of operating in a wireless environment. An (e / g)NodeB may include or be coupled to a transceiver. From the transceiver of the (e / g)NodeB, a connection may be provided to an antenna element, establishing a bidirectional radio link to the user equipment. The antenna element may include multiple antennas or antenna elements. The (e / g)NodeB may be further connected to the core network 110 (CN or Next Generation Core NGC). Depending on the system, the counterpart on the CN side may be a Serving Gateway (S-GW, for routing and forwarding user data packets), a Packet Data Network Gateway (P-GW, for providing connectivity between the user equipment (UE) and external packet data networks), or a Mobility Management Entity (MME), etc.

[0026] A user device (also known as a UE, user equipment, user terminal, terminal equipment, etc.) illustrates a type of device to which resources on the air interface can be allocated and assigned, and therefore any features of the user device described herein can be implemented by a corresponding device (such as a relay node). An example of such a relay node could be a Layer 3 relay (self-backhaul relay) toward a base station.

[0027] User equipment can refer to a portable computing device, including wireless mobile communication devices operating with or without a Subscriber Identity Module (SIM), including but not limited to the following types of devices: mobile stations (mobile phones), smartphones, personal digital assistants (PDAs), handsets, devices using wireless modems (alarm or measuring devices, etc.), portable computers and / or touchscreen computers, tablets, game consoles, laptops, and multimedia devices. It should be understood that user equipment can also be a virtually exclusive uplink-only device, an example of which could be a camera or camcorder that loads images or video clips onto a network. User equipment can also be a device capable of operating in an Internet of Things (IoT) network, in which the object can be provided with the ability to transmit data over the network without human-to-human or human-to-computer interaction. User equipment can also utilize the cloud. In some applications, user equipment may include small portable devices with radio components (such as watches, headphones, or glasses), and computation can be performed in the cloud. User equipment (or, in some embodiments, a Layer 3 relay node) can be configured to perform one or more of the functions of a user equipment. User equipment can also be referred to as subscriber unit, mobile station, remote terminal, access terminal, user terminal, terminal equipment, or user equipment (UE), with only a few names or devices mentioned.

[0028] The various techniques described in this paper can also be applied to cyber-physical systems (CPS) (a system of computing elements that cooperate to control physical entities). CPS can realize and utilize a large number of interconnected ICT devices (sensors, actuators, processors, microcontrollers, etc.) embedded in different locations within physical objects. Mobile cyber-physical systems are a subcategory of cyber-physical systems, and the physical systems discussed can have inherent mobility in mobile cyber-physical systems. Examples of mobile physical systems include mobile robots and electronic devices transported by humans or animals.

[0029] Furthermore, although the device is depicted as a single entity, different units, processors, and / or memory units can be implemented. Figure 1 (Not all of them are shown in the image).

[0030] 5G can utilize multiple-input multiple-output (MIMO) antennas, allowing for significantly more base stations or nodes than LTE (the so-called small cell concept), including macro sites that collaborate with smaller base stations and employ multiple radio technologies, depending on service requirements, use cases, and / or available spectrum. 5G mobile communications can support a wide range of use cases and related applications, including video streaming, augmented reality, different data sharing methods, and various forms of machine-type applications (such as massive machine-type communications (mMTC)), including vehicle safety, different sensors, and real-time control. 5G is expected to have multiple radio interfaces—sub-6 GHz, centimeter wave (cmWave), and millimeter wave (mmWave)—and will be able to integrate with existing legacy radio access technologies such as LTE. Integration with LTE can be implemented, at least in the early stages, as a system where macro coverage can be provided by LTE and 5G radio interface access can be aggregated from small cells to LTE. In other words, 5G can simultaneously support inter-RAT interoperability (such as LTE-5G) and inter-RI interoperability (inter-radio interface interoperability, such as sub-6GHz - cmWave, and above 6GHz - mmWave). One concept thought to be used in 5G networks is network slicing, where multiple independent and dedicated virtual subnets (network instances) can be created within the same infrastructure to run services with different requirements for latency, reliability, throughput, and mobility.

[0031] The current architecture in LTE networks can be entirely distributed across radios and entirely centralized in the core network. Low-latency applications and services in 5G may require bringing content closer to the radios, leading to localized bursts and multiple access edge computing (MEC). 5G can enable analytics and knowledge generation to occur at the data source. This approach may require leveraging resources that may not be continuously connected to the network, such as laptops, smartphones, tablets, and sensors. MEC can provide a distributed computing environment for hosting applications and services. It can also have the ability to store and process content near cellular subscribers to accelerate response times. Edge computing can encompass a wide range of technologies, such as wireless sensor networks, mobile data acquisition, mobile signature analytics, collaborative distributed peer-to-peer self-organizing networks and processing (which can also be categorized as local cloud / fog computing and grid / mesh computing), dew computing, mobile edge computing, thin cloud, distributed data storage and retrieval, autonomous self-healing networks, remote cloud services, augmented and virtual reality, data caching, the Internet of Things (massive connectivity and / or latency critical), and critical communications (autonomous vehicles, traffic safety, real-time analytics, time-critical control, healthcare applications).

[0032] The communication system can also communicate with other networks such as the public switched telephone network or the Internet, or utilize services provided by them. The communication network can also support the use of cloud services; for example, at least a portion of the core network operation can be performed as a cloud service (this is in...). Figure 1 (Described by “Cloud” 114). The communication system may also include a central control entity that provides facilities for different operators’ networks to cooperate, for example, in spectrum sharing.

[0033] Edge cloud can be introduced into the radio access network (RAN) using Network Functions Virtualization (NVF) and Software-Defined Networking (SDN). Using edge cloud can represent access node operations that are at least partially performed in servers, hosts, or nodes operationally coupled to a remote radio head or base station, including the radio portion. Node operations can also be distributed across multiple servers, nodes, or hosts. The application of the cloudRAN architecture allows real-time RAN functions to be performed on the RAN side (in the distributed unit DU 104), while non-real-time functions can be performed centrally (in the centralized unit CU 108).

[0034] It should also be understood that the workload allocation between core network operations and base station operations may differ from, or even not exist at all, in LTE. Other technological advancements that can be used include big data and all-IP, which could potentially transform how networks are built and managed. 5G (or New Radio) networks can be designed to support multiple hierarchical structures, where MEC servers can be placed between the core and base stations or NodeBs (gNBs). It should be understood that MEC can also be applied to 4G networks.

[0035] 5G can also leverage satellite communications to enhance or supplement the coverage of 5G services, for example, by providing backhaul. Possible use cases could include providing service continuity for machine-to-machine (M2M) or Internet of Things (IoT) devices or for passengers on board vehicles, or ensuring the availability of critical communications and future rail / maritime / aviation communications. Satellite communications can utilize geostationary Earth orbit (GEO) satellite systems, as well as low Earth orbit (LEO) satellite systems, particularly mega-constellations (systems deploying hundreds of (nano) satellites). Each satellite 106 in a mega-constellation can cover a network entity of several supporting satellites that create a ground cell. Ground cells can be created via ground relay nodes 104 or via gNBs located on the ground or in satellites.

[0036] It will be clear to those skilled in the art that the described system is merely an example of a portion of a radio access system, and in practice, the system may include multiple (e / g) NodeBs, user equipment may access multiple radio cells, and the system may also include other devices such as physical layer relay nodes or other network elements. At least one (e / g) NodeB may be a home (e / g) NodeB. Furthermore, multiple different types of radio cells and multiple radio cells may be provided within the geographical area of ​​the radio communication system. Radio cells may be macrocells (or umbrella cells), which can be large cells with diameters typically tens of kilometers long, or smaller cells such as micro, femtocells, or picocells. Figure 1 An (e / g)NodeB can provide any type of these cells. Cellular radio systems can be implemented as multi-layer networks comprising several cells. In a multi-layer network, an access node can provide one or more cells, and therefore providing such a network structure may require multiple (e / g)NodeBs.

[0037] To meet the need for improved deployment and performance of communication systems, the concept of "plug-and-play" (e / g) NodeBs can be introduced. Besides home (e / g) NodeBs (H(e / g) nodeBs), networks that can use "plug-and-play" (e / g) NodeBs can also include home NodeB gateways or HNB-GWs. Figure 1 (Not shown in the image). HNB gateways (HNB-GWs), which can typically be installed within a carrier's network, can aggregate services from a large number of HNBs back to the core network.

[0038] A power amplifier (PA) is a component used to increase the power of a given input signal in a wireless communication system. It is desirable to transmit signals as efficiently as possible to reduce power consumption while keeping signal distortion as low as possible. However, these two desired characteristics may be contradictory, and therefore trade-offs may need to be made. The efficiency of a power amplifier can be defined as the percentage of power used by the power amplifier for amplification relative to the total DC power consumed by the power amplifier. A highly efficient power amplifier that can operate near its saturation region may inherently be nonlinear in the relationship between the power amplifier's input and output, and thus distortion may be introduced into the power amplifier's output signal. However, linearization techniques can be used to improve the linearity of the power amplifier while still maintaining a reasonable level of efficiency.

[0039] To compensate for the distortion introduced by power amplifiers, characterizing their nonlinear behavior and its inverse behavior can be beneficial. Power amplifiers can be mathematically modeled based on various parameters to describe or predict their nonlinear behavior. Constructing a mathematical power amplifier model can involve selecting a model structure and then estimating the model parameters. Some examples of power amplifier model structures include memoryless nonlinear models such as the Saleh model, Rapp model, and polynomial models, as well as nonlinear models with memory, such as the Volterra series, Wiener model, Hammerstein model, and Wiener-Hammersstein model. Different power amplifier models may have different effects on power amplifier linearization. By identifying an accurate model for a particular power amplifier, linearization performance can be improved.

[0040] Various techniques can be used for power amplifier linearization. For example, feedback linearization can be used to feed back a portion of the power amplifier's output signal and subtract it from the power amplifier's input signal, thereby forcing the output to be a linear copy of the input signal.

[0041] Another linearization technique is feedforward linearization, where the correction signal can be injected at the power amplifier output instead of the power amplifier input. Feedforward linearization uses signal cancellation loop (SCL) coefficients and error cancellation loop (ECL) coefficients to isolate and subtract distortions generated by the power amplifier from the output. However, this operation can be susceptible to delays and coefficient mismatches, as well as variations in the characteristics of the power amplifier circuitry, such as those caused by changing operating conditions and / or aging effects.

[0042] On the other hand, adaptive feedforward linearization (e.g., based on the least mean square (LMS) adaptive algorithm) can adjust the coefficients to minimize the effects of mismatch and can adjust for changes in the operating conditions of the power amplifier, which can improve linearization performance.

[0043] Digital predistortion (DPD) is another linearization technique that can be used to improve the linearity of power amplifiers. In DPD, a predistorter can be used to predistort the input signal fed to the power amplifier, for example, to modify the amplitude and / or phase of the input signal, thereby reversing the nonlinearity introduced by the power amplifier, provided that an accurate model of the power amplifier's nonlinearity is used. In DPD, the predistorter can be implemented in the digital baseband domain. Furthermore, adaptive digital predistortion techniques can be used to adjust for changes in the power amplifier model, such as those caused by aging effects of the power amplifier, and to update the predistorter accordingly. Adaptive digital predistortion may include one or more of the following steps: identifying the power amplifier model, estimating the parameters of the identified power amplifier model, and / or estimating the predistortion parameters to be used by the predistorter to inverse the identified power amplifier model.

[0044] However, if an adaptive algorithm is developed based on floating-point algorithms, and this algorithm is implemented using fixed-point algorithms for reasons such as power consumption and / or cost, this may lead to performance and / or stability degradation. This degradation can be avoided by choosing a high bit width for the implementation, but this may result in higher computational complexity.

[0045] Another potential limitation of fixed-point implementation is the stability and / or performance of the algorithm in the case of time-varying input signals. There may be a large number of parameters that can be tuned using signals with specific signal characteristics (e.g., amplitude and / or phase) to linearize the power amplifier. However, if a different signal is used, a parameter set optimized for one signal can cause problems. Furthermore, the signal characteristics can vary over time.

[0046] Therefore, it is desirable to improve the convergence, performance, and / or stability of adaptive algorithms, and to provide improved robustness to signal variations, especially for time-varying input signals with potentially significant bandwidth and / or power fluctuations in the transmitted signal.

[0047] Figure 2 The illustration shows parameter estimation for power amplifier model identification according to an exemplary embodiment. The parameter estimation unit 202 can be used to estimate one or more power amplifier model parameters (which may also be referred to as coefficients) that indicate the relationship between a first signal (e.g., the output signal z(k) of power amplifier 201) and a second signal (e.g., the power amplifier model...). Power minimization of the difference between the outputs of ∈ (k):

[0048]

[0049] Here, k represents a sample. The parameter estimation unit can use the LMS algorithm to optimize one or more parameters. The LMS algorithm is a filter that simulates a desired filter by finding filter coefficients or weights that have the least mean square correlation with the error signal. The LMS algorithm can approach the optimal filter coefficients by updating the filter coefficients in a manner that converges to the optimal filter coefficients. For example, the algorithm can start by assuming small coefficients (e.g., zero) and then update the coefficients at each iteration by finding the gradient of the mean square error. In an exemplary embodiment, the model of the power amplifier can be different predefined basis functions p. i Weighted sum of (y(k)):

[0050]

[0051] Where a i This represents the estimation of the power amplifier model parameters for the i-th power amplifier model.

[0052] In an exemplary embodiment, a least-squares solution can be computed as a reference for the LMS algorithm. The least-squares solution may include estimates of parameter values ​​that minimize the sum of squares between the output signal of the power amplifier and the output of the power amplifier model. The LMS algorithm can use an iterative method for coefficient optimization:

[0053] a i (k)=a i (k-1)-δ·∈(k)·p i (y(k))

[0054] Here, δ represents the step size of the LMS algorithm. In this exemplary embodiment, a floating-point algorithm can be used, so the LMS algorithm can converge to the least squares solution.

[0055] In another exemplary embodiment, a fixed-point algorithm can be used instead of a floating-point algorithm. If a fixed-point algorithm is used, then the coefficient δ·∈(k)·p i The update of (y(k)) can be significantly smaller than that of fixed-point quantization. Therefore, the adaptive process can stop before the error reaches its minimum.

[0056] a i (k)=a i (k-1)-round(δ·∈(k)·p i (y(k))·2 b-1 ) / 2 b-1

[0057] Here, `round` represents the mathematical operation that outputs the integer closest to the operand, and `b` represents the number of bits used. Alternatively, to achieve the desired performance, the number of bits `b` for the coefficients can be increased. However, since the step size `δ` is very small and / or the expected error ∈(k) is small, the number of bits can become very high, such as 48 bits or 64 bits. This can lead to high computational complexity and require a large amount of memory, as it may be necessary to retain all bits of all coefficients during the adaptive process.

[0058] In another exemplary embodiment using the fixed-point algorithm, as an alternative to increasing the number of bits, dither d(k) can be added to the error ∈(k):

[0059] a i (k)=a i (k-1)-floor(δ·∈(k)·p i (y(k))·2 b-1 +d(k)) / 2 b-1

[0060] Where floor is a mathematical operation that outputs an integer less than or equal to the operand. Jitter can be defined as a form of noise that is intentionally applied, for example, it can be used to randomize quantization errors. Jitter can include values ​​determined at least in part based on the least significant bit (LSB). Jitter can be, for example, a random number based on a probability distribution whose value ranges from 0 to the LSB, which is, for example, 1. For example, jitter can be a uniformly distributed random number, which can also be called a uniformly distributed random number between 0 and the LSB. However, it should be noted that other probability distributions can also be used instead of a uniform distribution. According to δ·∈(k)·p i With a certain high probability of (y(k)), even with a fixed-point algorithm having a low number of bits b (e.g., 16 bits), the coefficients can converge to the desired result.

[0061] Another limiting factor for fixed-point algorithms can be the maximum magnitude of the coefficients. Specifically, if the two basis functions p... i If (y(k)) are similar to each other, they can compensate for each other, which may result in coefficients of large size. To achieve stability and avoid uncontrolled growth of coefficients, a small fraction of the coefficients can be subtracted in each iteration, for example, when using floating-point algorithms. However, due to the relatively high LSB value, the resolution of fixed-point algorithms may make it difficult to subtract a small fraction of the coefficients.

[0062] To address the aforementioned limitations, in another exemplary embodiment using a fixed-point algorithm and jitter, the probability of changes towards lower coefficient values ​​can be increased, thus achieving stability to prevent uncontrolled growth of the coefficients:

[0063] a i (k)=floor((a i (k-1)-δ·∈(k)·p i (y(k))-γ·a i (k-1))·2 b-1 +d(k)) / 2 b-1

[0064] Here, γ represents the forgetting factor in leaky LMS. However, this modification to the LMS algorithm can lead to system degradation in minimizing the power of the error ∈ (k). In other words, the leaky LMS algorithm may attempt to minimize the power of the coefficients, but this can lead to a deterioration in the linearization results. Furthermore, in the case of time-varying signals, the coefficients can be modified so that small coefficients that may be sufficient for the actual input signal can be selected. However, due to this selection, this set of coefficients may lead to high deviations from other input signals. Therefore, in the case of time-varying input signals, there may be periods where high errors may occur until the new coefficients are adapted.

[0065] To address the aforementioned issues, in another exemplary embodiment using fixed-point algorithms and jitter, one or more reference coefficients can be used as convergence targets instead of zero coefficients. These reference coefficients can be adapted, for example, based on an input signal with higher power and / or wider bandwidth than the current input signal, or based on a time-varying input signal with varying amplitude and / or frequency hopping. When these one or more reference coefficients are adapted, for example, based on an input signal with high power and / or wide bandwidth or a time-varying input signal with varying amplitude and / or frequency hopping, the one or more reference coefficients can make the model coefficients applicable to other signal scenarios similar in magnitude to each other, thus reducing degradation and the time for the next adaptation. Using one or more reference coefficients with LMS can prevent adjacent channel leakage ratio (ACLR) degradation due to suboptimal coefficients in time-varying signal scenarios.

[0066] a i (k)=floor((a i (k-1)-δ·∈(k)·p i (y(k))-γ·(a i (k-1)-a i，ref (k-1)))·2 b-1 +d(k)) / 2 b-1

[0067] Where a i，ref This represents the reference coefficient for the i-th power amplifier model.

[0068] Figure 3A flowchart illustrating the identification of a power amplifier model according to an exemplary embodiment is shown. In step 301, initial assumptions for the power amplifier model associated with the power amplifier are selected. In step 302, an error signal is determined, indicating the difference between a first signal (e.g., from the output of the power amplifier) ​​and a second signal (e.g., from the output of the power amplifier model). The error signal is then multiplied by a step size factor and one or more predefined basis functions. The result of the multiplication is subtracted from the power amplifier model parameters to be optimized. In step 303, the difference between the power amplifier model parameters to be optimized and the corresponding reference coefficients is determined. This difference is then multiplied by a forgetting factor, and the result of the multiplication is subtracted from the output of step 302. In step 304, jitter is added to the output of step 303, the value of which is between 0 and LSB. In step 305, the output of step 304 is quantized. This process can be iterative, such that after step 305, the process can return to step 301. In other words, steps 301 to 305 can be performed multiple times to iteratively improve the estimation of one or more power amplifier model parameters that minimize the error signal. In step 306, the power amplifier can be linearized based on the estimated one or more power amplifier model parameters included in the output of step 305. For example, the input or output signal of the power amplifier can be compensated by inversely applying the nonlinear behavior described by the power amplifier model including the estimated one or more power amplifier model parameters.

[0069] Various exemplary embodiments may not be limited to the power amplifier model identifier. Some exemplary embodiments may be used, for example, for DPD. Figure 4 The parameter estimation of digital predistortion according to an exemplary embodiment is shown. Figure 4 In this context, predistorter 401 can be used to provide a predistortion signal to power amplifier 402 to linearize the power amplifier. Parameter estimation unit 403 can be used to estimate predistortion parameters that minimize an error signal indicating the difference between a first signal (e.g., the desired signal x(k) to be amplified) and a second signal (e.g., the power amplifier output z(k)). The difference indicated by the error signal can be, for example, any distortion other than linear amplification. The estimated predistortion parameters can then be used by the predistorter to predistort the desired signal before feeding it to the power amplifier to reverse the nonlinear behavior of the power amplifier, thus linearizing it. In this document, the predistortion parameters may also be referred to as DPD coefficients. The error signal to be minimized, for example, its average power, can be described as follows:

[0070] ∈(k)=z(k)-x(k)

[0071] The output signal of the power amplifier (which indicates the effect of the power amplifier on its input signal y(k)) can be described by the following equation:

[0072] z(k) = p(y(k))

[0073] Optimization of the predistortion parameters can be performed by targeting the minimum power of the error signal:

[0074] |∈(k)| 2 =min

[0075] The chain rule for derivative instruments can be applied to:

[0076]

[0077] In an exemplary embodiment, the power amplifier model can be different predefined basis functions b. i Weighted sum of (x(k)):

[0078]

[0079] Where e i This represents the estimate of the DPD coefficients based on the i-th basis function. This yields:

[0080]

[0081] Furthermore, the DPD coefficients can be updated using the LMS algorithm:

[0082]

[0083] The characteristics of the power amplifier p(y(k)) may be unknown, thus requiring approximations. A direct learning architecture (DLA) can be achieved using a simple power amplifier model:

[0084] p DLA (y(k))=y(k)

[0085] DLA is a technique that can be used to identify DPD coefficients. Using the DLA algorithm, the DPD coefficients can be updated according to the following formula:

[0086] e i，DLA (k)=e i，DLA (k-1)-δ·∈ * (k)·b i (x(k))

[0087] In another exemplary embodiment, a more sophisticated method for power amplifier modeling can be introduced, which can significantly increase the convergence range of the DPD. The power amplifier can be modeled by a linear filter, for example:

[0088]

[0089] In this case, gradient descent can be used, where the gradient can be the sum of different time-delayed versions of a basis function:

[0090]

[0091] This yields the modified coefficient update equation:

[0092]

[0093] The above formula can be implemented, for example, using floating-point arithmetic.

[0094] If a fixed-point algorithm is used instead of a floating-point algorithm, the updated term can be less than one LSB, and therefore may not reach the minimum of the cost function. However, in another exemplary embodiment, convergence of the fixed-point algorithm can be maintained by using the dithering technique previously described for power amplifier model identification:

[0095]

[0096] In some cases, filtering the basis functions based on the linearity of the power amplifier can be numerically expensive. It can be used so that the gradient process implicitly calculates sums at many time points, allowing elements with the same basis functions and the same time indices to be combined. In this case, filtering of the error signal may be necessary.

[0097] In another exemplary embodiment, filtering of the error signal can be performed, which may be referred to herein as matched filtering:

[0098]

[0099] The linear characteristics of a power amplifier model can represent the behavior of the power amplifier in the frequency range where predistortion should occur. However, in some cases, only narrowband signals can be transmitted, which provides limited information. Furthermore, if the DPD input and output signals are treated as such, the nonlinear behavior of the power amplifier may lead to incorrect estimates.

[0100] In another exemplary embodiment, pulse insertion and / or broadband estimation of a linear model can be performed. Improved broadband measurements can be achieved if the input signal is modified to be broadband. However, it may be necessary to maintain wireless transmission requirements, so only short periods or pulses of the broadband signal can be added to the signal. To obtain the desired broadband information, multiple such pulses can be collected over a longer time period. If these pulses are within a certain size range, it may be beneficial that the pulses do not exceed the size of the signal. Such pulses can be generated by subtracting a multiple of a sample of the signal from the signal itself, and if the factor is less than or equal to 2.

[0101] Jitter, combined with coefficient stabilization based on one or more reference coefficients, can be used in any combination with gradient descent and / or LMS algorithms, and can also be applied to artificial neural network architectures. In artificial neural network architectures applying machine learning, backpropagation can be utilized by exemplary embodiments of the chain rule applying the gradient descent algorithm, such as those described above for DPD. Backpropagation can also be referred to as backpropagation.

[0102] Figure 5 A flowchart illustrating DPD parameter estimation according to an exemplary embodiment is shown. In step 501, initial assumptions for the predistortion model associated with the power amplifier are selected. In step 502, the power amplifier is linearized based on one or more predistortion parameters according to the initial predistortion model. In step 503, an error signal is determined, where the error signal indicates the difference between a first signal (e.g., from the output of the power amplifier) ​​and a second signal (e.g., from the output of the power amplifier model). The error signal is then multiplied by a step size factor and one or more basis functions. The result of the multiplication is subtracted from the predistortion parameter to be optimized. In step 504, the difference between the predistortion parameter to be optimized and the corresponding reference coefficient is determined. This difference is then multiplied by a forgetting factor, and the result of the multiplication is subtracted from the output of step 503. In step 505, jitter is added to the output of step 504, the value of which is between 0 and LSB. In step 506, the output of step 505 is quantized. This process can be iterative, such that after step 506, the process can return to step 501. In other words, steps 501 to 506 can be performed multiple times to iteratively improve the estimation of one or more predistortion parameters that minimize the error signal. In step 507, the power amplifier can be linearized by providing a predistortion signal to the power amplifier based on the estimated one or more predistortion parameters included in the output of step 506.

[0103] Figure 6A flowchart according to an exemplary embodiment is shown. In step 601, a mathematical model associated with the nonlinear component is selected. In step 602, an error signal associated with the nonlinear component is determined, wherein the error signal indicates the difference between a first signal and a second signal. In step 603, one or more parameters that minimize the error signal are estimated based on the mathematical model. In step 604, the nonlinear component is estimated and / or linearized based on the estimated one or more parameters.

[0104] In an exemplary embodiment, one or more parameters that minimize the average power of the error signal are estimated based on a mathematical model.

[0105] Furthermore, in some exemplary embodiments, the mathematical model associated with the nonlinear component may be the inverse model of the nonlinear component.

[0106] The above is made with the help of Figures 2 to 6 The described functions and / or steps do not have an absolute temporal order, and some of them may be executed simultaneously or in a different order than described. Other functions may also be executed between or within them.

[0107] Figure 7 Measurement results of gradient jitter according to an exemplary embodiment are shown. The measurement setup according to the exemplary embodiment may include a gallium nitride (GaN) front-end module (FEM) with an output power of 36 dBm, a linearization bandwidth of 250 MHz, and a carrier configuration of five LTE 20 MHz carriers. For signal 701, the step size δ = 2. -9 And jitter is off. For signal 702, δ = 2 -7 And jitter is off. For signal 703, δ = 2 -10 And it shakes to open.

[0108] Figure 8 The measurement results of the spectrum according to an exemplary embodiment are shown. The time-varying measurement setup may include the following switching scenarios:

[0109] ·5LTE 20MHz enabled in 0.04 seconds

[0110] ·1LTE 20MHz enabled in 10 seconds

[0111] For signal 801, there is no reference coefficient lookup table, and a maximum hold condition exists. For signal 802, a reference coefficient lookup table exists, and a maximum hold condition exists. Signal 803 indicates current measurement.

[0112] Figure 9 Measurement results showing time-varying behavior with zero span, according to an exemplary embodiment, are illustrated. The time-varying measurement setup may include the following switching scenarios:

[0113] ·5LTE 20MHz enabled in 0.04 seconds

[0114] ·1LTE 20MHz enabled in 10 seconds

[0115] Signal 901 may not require a reference lookup table. Signal 902 may have a reference lookup table. Signal 903 may indicate current measurement.

[0116] Some exemplary embodiments can be applied to MIMO systems and / or single-transmitter (TX) systems. Some exemplary embodiments offer the technical advantage of improving the performance and / or stability of wireless communication systems. Some exemplary embodiments can provide a faster response to sudden changes in the operating conditions of wireless communication systems and / or provide improved robustness to signal variations. Some exemplary embodiments can reduce distortion, for example, caused by time-varying signals. Furthermore, some exemplary embodiments enable coefficient adaptation based on fixed-point algorithms using a lower number of bits, thereby simplifying hardware and / or software implementation. Additionally, some exemplary embodiments can reduce the convergence time of DPDs, which is particularly beneficial for MIMO implementations.

[0117] Figure 10 The apparatus 1000 illustrates exemplary embodiments that may include or be included in a computing device, such as a system-on-a-chip (SoC) device or a digital front-end (DFE) device. The apparatus 1000 may include, for example, a circuit system or chipset suitable for implementing the exemplary embodiments described above. The apparatus 1000 may be an electronic device including one or more electronic circuit systems. The apparatus 1000 may include a communication control circuit system 1010 (such as at least one processor, e.g., a digital signal processor) and at least one memory 1020, which includes computer program code (software) 1022, wherein the at least one memory and the computer program code (software) 1022 are configured, together with the at least one processor, to cause the apparatus 1000 to execute any of the exemplary embodiments described above.

[0118] The memory 1020 can be implemented using any suitable data storage technology, such as semiconductor-based memory devices, flash memory, magnetic memory devices and systems, optical memory devices and devices, fixed memory, and removable memory. The memory may include a configuration database for storing configuration data. The memory 1020 may include one or more memory cells. Memory cells may be volatile or non-volatile. It should be noted that in some exemplary embodiments, there may be one or more non-volatile memory cells and one or more volatile memory cells, or alternatively, there may be one or more non-volatile memory cells, or alternatively, there may be one or more volatile memory cells. Volatile memory may be, for example, RAM, DRAM, or SDRAM. Non-volatile memory may be, for example, ROM, PROM, EEPROM, flash memory, optical storage devices, or magnetic storage devices. Generally, the memory may be referred to as a non-transitory computer-readable medium. The memory 1020 stores computer-readable instructions that are executed by at least one processor. For example, non-volatile memory stores computer-readable instructions, and at least one processor uses volatile memory for temporarily storing data and / or instructions to execute instructions.

[0119] The device 1000 may further include one or more communication interfaces 1030 (transmitter / receiver TX / RX), each including hardware and / or software for establishing a communication connection according to one or more communication protocols. The communication interface 1030 may provide the device with radio communication capabilities for communication in a wireless communication system. The communication interface may, for example, provide a radio interface with one or more access nodes, one or more terminal devices (possibly via the aforementioned access points), and / or one or more other network nodes or components. The communication interface may also include components controlled by a corresponding control unit, such as power amplifiers, linearizers, filters, frequency converters, analog-to-digital converters, digital-to-analog converters, (de)modulators, antennas, and / or encoder / decoder circuitry. The device 1000 may also include a scheduler 1040 configured to allocate resources.

[0120] As used in this application, the term "circuit system" may refer to one or more or all of the following:

[0121] a. Hardware circuit implementation only (such as implementation using only analog and / or digital circuit systems), and

[0122] b. A combination of hardware circuitry and software, such as (if applicable):

[0123] i. A combination of (multiple) analog and / or digital hardware circuits and software / firmware, and

[0124] ii. Any part of a hardware processor(s) having software (including multiple digital signal processors(s)), software, and memory(s), which work together to cause a device such as a mobile phone to perform various functions, and

[0125] c. (Multiple) hardware circuits and / or (multiple) processors, such as (multiple) microprocessors or a portion thereof, which require software (e.g., firmware) to operate, but may be absent when operation does not require the software.

[0126] This definition of circuit system applies to all uses of the term in this application, including in any claim. As another example, as used herein, the term circuit system also covers only the implementation of hardware circuitry or a processor (or processors) or a portion of hardware circuitry or a processor and its accompanying software and / or firmware. The term circuit system also covers (e.g., if applicable to a particular claim element) baseband integrated circuits or processor integrated circuits for mobile devices, or similar integrated circuits in servers, cellular network devices, or other computing or networking devices.

[0127] The techniques and methods described herein can be implemented using various components. For example, these techniques can be implemented using hardware (one or more devices), firmware (one or more devices), software (one or more modules), or a combination thereof. For hardware implementation, the devices(s) of the exemplary embodiments can be implemented within one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital data processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), graphics processing units (GPUs), processors, controllers, microcontrollers, microprocessors, other electronic units designed to perform the functions described herein, or combinations thereof. For firmware or software, the implementation can be executed by a module (e.g., a program, function, etc.) of at least one chipset performing the functions described herein. Software code can be stored in memory cells and executed by a processor. The memory cells can be implemented inside or outside the processor. In the latter case, it can be communicatively coupled to the processor by various means as known in the art. In addition, the components of the systems described herein can be rearranged and / or supplemented by additional components to facilitate implementation of the various aspects described herein, and as those skilled in the art will understand, they are not limited to the precise configurations illustrated in the given figures.

[0128] It will be apparent to those skilled in the art that the inventive concept can be implemented in various ways as technology advances. The embodiments are not limited to the exemplary embodiments described above, but may vary within the scope of the claims. Therefore, all words and expressions should be interpreted broadly, and they are intended to illustrate rather than limit the exemplary embodiments.

Claims

1. An apparatus for processing a signal, comprising at least one processor and at least one memory including computer program code, wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus to: select a mathematical model associated with a non-linear component; determine an error signal associated with the non-linear component, wherein the error signal is indicative of a difference between a first signal and a second signal; estimate one or more parameters that minimize the error signal based on the mathematical model, wherein dithering and fixed-point arithmetic are used to estimate the one or more parameters; estimate and / or linearize the non-linear component based on the estimated one or more parameters.

2. The apparatus of claim 1, wherein the dithering comprises a value determined based at least in part on a least significant bit.

3. The apparatus of any one of claims 1-2, wherein one or more reference coefficients are used to estimate the one or more parameters, the one or more reference coefficients adapted based on input signals having higher power and / or wider bandwidth than a current input signal, or based on time-varying input signals having varying amplitude and / or frequency hopping.

4. The apparatus of any one of claims 1-2, wherein a gradient descent algorithm is used to estimate the one or more parameters.

5. The apparatus of any one of claims 1-2, wherein a least mean square algorithm is used to estimate the one or more parameters.

6. The apparatus of any one of claims 1-2, wherein an artificial neural network is used to estimate the one or more parameters.

7. The apparatus of claim 6, wherein the artificial neural network utilizes backpropagation of errors to estimate the one or more parameters.

8. The apparatus of any one of claims 1-2, wherein the non-linear component is a power amplifier, and the mathematical model is a power amplifier model.

9. The apparatus of claim 8, wherein the first signal is an output from the power amplifier, and the second signal is an output from the power amplifier model.

10. The apparatus of any one of claims 1-2, wherein a linear model is used for the mathematical model associated with the non-linear component.

11. The apparatus of claim 10, further comprising performing impulse insertion and / or wideband estimation of the linear model.

12. The apparatus of any one of claims 1-2, further comprising performing matched filtering of the error signal.

13. A method for processing a signal, comprising: selecting a mathematical model associated with a non-linear component; determining an error signal associated with the non-linear component, wherein the error signal is indicative of a difference between a first signal and a second signal; estimating one or more parameters that minimize the error signal based on the mathematical model, wherein dithering and fixed-point arithmetic are used to estimate the one or more parameters; estimating and / or linearizing the non-linear component based on the estimated one or more parameters. ​ ​ ​ ​ 14. A computer-readable storage medium comprising program instructions for causing an apparatus to perform at least the following: selecting a mathematical model associated with a nonlinear component; determining an error signal associated with the nonlinear component, wherein the error signal indicates a difference between a first signal and a second signal; estimating one or more parameters that minimize the error signal based on the mathematical model, wherein dithering and fixed-point arithmetic are used to estimate the one or more parameters; estimating and / or linearizing the nonlinear component based on the estimated one or more parameters.

Images