Inductance testing method and device, electronic equipment and storage medium

Abstract

The application provides an inductance testing method, device, electronic equipment and storage medium. The method comprises the following steps: manufacturing an inductance model, the inductance model having a first port and a second port; configuring a metal racetrack layer and a metal sheet, at least part of the metal racetrack layer being arranged around the periphery of the inductance model to form a closed loop structure, the first port being connected with the metal racetrack layer, the metal sheet being arranged inside the metal racetrack layer and having a spacing with the metal racetrack layer, and the metal sheet being connected with the second port; and configuring a test port between any position of the metal racetrack layer and the second port to measure the inductance value of the inductance model. The application makes the inductance value measured by configuring the test port of the preset simulation software between any position of the metal racetrack layer and the second port of the inductance model consistent, and can reduce the measurement error.

Description

Technical Field

[0001] This invention relates to the field of inductance testing technology, and more particularly to an inductance testing method, apparatus, electronic device, and storage medium. Background Technology

[0002] An inductor is a magnetic energy storage element that, when used in conjunction with other passive components (capacitors and resistors), can achieve many functions. Inductance values ​​are typically measured using pre-set simulation software (such as HFSS, CST, Feko, Sonnet, Comsol, etc.).

[0003] To facilitate subsequent probe testing of inductance values, a metal raceway is usually added to one end of the inductor to lead the port to the other end of the inductor. Figure 1 , Figure 2 This demonstrates a method for measuring two-dimensional inductance values ​​using pre-set simulation software. Figure 3 , Figure 4 A method for measuring three-dimensional inductance values ​​using preset simulation software is shown. Figure 1 In the example, when the test port (Port) is configured to the left of inductor 10, the measured inductance value is 3.32nH; while Figure 2 In the example, when the test port is configured on the right side of inductor 10, the measured inductance value is 4.33nH. This means that the measured inductance value of the same inductor differs significantly depending on whether the test port is configured on the left or right side. Similarly, Figure 3 The measured inductance value is 2.02 nH. Figure 4 The measured inductance value was 4.31nH, and the measured inductance values ​​also varied considerably. Therefore, regardless of whether a two-dimensional or three-dimensional model is used, the inductance value measured in the simulation is related to the connection port method, and the consistency of the measurement cannot be guaranteed. Summary of the Invention

[0004] This invention provides an inductance testing method, apparatus, electronic device, and storage medium to solve the problem in the prior art where different inductance values ​​are obtained by HFSS due to different selection of the measurement port.

[0005] In a first aspect, the present invention provides an inductance testing method, the method comprising:

[0006] Construct an inductor model, the inductor model having a first port and a second port;

[0007] A metal track layer and a metal sheet are configured, at least a portion of the metal track layer surrounds the outer periphery of the inductor model to form a closed-loop structure, a first port is connected to the metal track layer, the metal sheet is located inside the metal track layer and spaced from the metal track layer, and the metal sheet is connected to a second port;

[0008] A test port is configured at any point between the metal runway layer and the second port to measure the inductance value of the inductance model.

[0009] In one embodiment of the present invention, the step of at least a portion of the metal runway layer surrounding the outer periphery of the inductor model to form a closed-loop structure includes:

[0010] The entire metal runway layer is directly formed into a closed-loop structure around the outer periphery of the inductor model; or

[0011] A portion of the metal racetrack layer is wrapped around the outer periphery of the inductor model to form an annular opening. This annular opening connects the two ends of the metal racetrack layer in a predetermined manner to form an equivalent closed-loop structure.

[0012] In one embodiment of the present invention, the formula for calculating the inductance value of the inductor model is as follows:

[0013] L = L sefl +M + +M - ;

[0014] in,

[0015]

[0016]

[0017]

[0018]

[0019] Where L represents the inductance value of the inductor model, L sefl M represents the self-inductance value. + M represents the positive mutual inductance value. - Indicates negative mutual inductance, l quan (i) represents the total length of each turn of the inductor, w represents the width of the inductor model, s represents the spacing between the two metal wires of the inductor model, t represents the thickness of the inductor model, n represents the number of overlapping turns of the inductor coil and its lower lead, Ni represents the i-th turn of an N-turn inductor model, l total denoted by , μ0 represents the total length of the conductor in the inductance model, μ0 represents the permeability of free space, and d represents the average distance between parallel conductors with the same current direction.

[0020] In one embodiment of the present invention, the step of fabricating an inductor model includes:

[0021] Receive the "Import Model" command on the preset simulation software menu bar to import an inductor model drawn using the preset drawing software; or

[0022] The inductor model is drawn directly in the preset simulation software.

[0023] In one embodiment of the present invention, the metal runway layer is a grounded copper layer, and the inductance model is a spiral inductor.

[0024] In one embodiment of the present invention, the distance between the metal sheet and the metal racetrack layer used for probe measurement of the inductance model is 100-200 μm.

[0025] Secondly, the present invention also provides an inductance testing device, the device comprising:

[0026] A fabrication module is used to fabricate an inductor model, the inductor model having a first port and a second port;

[0027] A configuration module is used to configure a metal track layer and a metal sheet, wherein at least a portion of the metal track layer surrounds the outer periphery of the inductor model to form a closed-loop structure, a first port is connected to the metal track layer, the metal sheet is located inside the metal track layer and spaced from the metal track layer, and the metal sheet is connected to a second port.

[0028] A measurement module is configured to set up a test port at any point on the metal runway layer and between the second port to measure the inductance value of the inductance model.

[0029] In one embodiment of the present invention, the configuration module further includes:

[0030] The entire metal runway layer is directly surrounded by the outer periphery of the inductor model to form a closed-loop structure; or

[0031] A portion of the metal racetrack layer is wrapped around the outer periphery of the inductor model to form an annular opening. This annular opening connects the two ends of the metal racetrack layer in a predetermined manner to form an equivalent closed-loop structure.

[0032] In one embodiment of the present invention, the interior of the metal track layer is convex, or the metal track layer is C-shaped.

[0033] Thirdly, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the inductance testing method as described in any of the first aspects above.

[0034] Fourthly, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the inductance testing method as described in any of the first aspects above.

[0035] The present invention provides an inductance testing method, apparatus, electronic device and storage medium. By configuring a closed-loop structure metal raceway layer, the inductance value of the inductance model measured by the test port of the preset simulation software at any point on the metal raceway layer and between the second port of the inductance model is basically consistent, thereby reducing measurement error. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0037] Figure 1 This is one of the schematic diagrams illustrating the measurement of two-dimensional inductance using existing technology and preset simulation software;

[0038] Figure 2 This is the second schematic diagram of existing technology for measuring two-dimensional inductance using preset simulation software;

[0039] Figure 3 This is one of the schematic diagrams illustrating the measurement of three-dimensional inductance using existing technology and preset simulation software;

[0040] Figure 4 This is the second schematic diagram of existing technology for measuring three-dimensional inductance using preset simulation software;

[0041] Figure 5 This is a flowchart illustrating the inductance testing method provided by the present invention;

[0042] Figure 6 This is a schematic diagram of the inductor model provided in an embodiment of the present invention;

[0043] Figure 7A This is one of the schematic diagrams for measuring two-dimensional inductance provided in the first embodiment of the present invention;

[0044] Figure 7B This is a second schematic diagram of measuring two-dimensional inductance provided in the first embodiment of the present invention;

[0045] Figure 7C This is the third schematic diagram of measuring two-dimensional inductance provided in the first embodiment of the present invention;

[0046] Figure 8This is a schematic diagram of measuring three-dimensional inductance provided in the first embodiment of the present invention;

[0047] Figure 9 This is a schematic diagram of measuring two-dimensional inductance provided in the second embodiment of the present invention;

[0048] Figure 10 This is a schematic diagram of measuring two-dimensional inductance provided in the third embodiment of the present invention;

[0049] Figure 11 This is a schematic diagram of measuring three-dimensional inductance provided in the second embodiment of the present invention;

[0050] Figure 12 This is a schematic diagram of the inductance testing device provided by the present invention;

[0051] Figure 13 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0052] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0053] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in a sequence other than that illustrated or described herein.

[0054] The technical terms involved in this invention are described below:

[0055] Commonly used electromagnetic simulation software includes HFSS, CST, and FEKO. HFSS is generally considered to be more accurate than CST. HFSS has built-in solution algorithms such as: Finite Element Method (FEM), Integral Equation (IE), High Frequency Algorithm (SBR+Solver), and hybrid algorithms, such as Finite Element Boundary Integral Method (FEBI) and IE-Region, Domain Decomposition (DDM, FA-DDM), Transient Time Domain Algorithm, Eigenmode Algorithm (CMA), and Eigenmode Solver.

[0056] To address the problem in existing technologies where different measurement port selections result in varying inductance values ​​measured by HFSS, this invention provides an inductance testing method, apparatus, electronic device, and storage medium. By configuring a closed-loop metal raceway layer, the inductance value measured by the HFSS software at any point on the metal raceway layer and between it and the second port of the inductance model is essentially consistent, thereby reducing measurement errors.

[0057] The following is combined Figures 5-12 The present invention describes an inductance testing method, apparatus, electronic device, and storage medium.

[0058] Please refer to Figure 5 , Figure 5 This is a flowchart illustrating the inductance testing method provided by the present invention. This inductance testing method can be applied to pre-defined simulation software (e.g., HFSS, CST, Feko, etc.), and includes:

[0059] Step 510: Create an inductor model, which has a first port and a second port. The inductor model can be two-dimensional or three-dimensional.

[0060] It should be noted that you can import an inductor model drawn using preset drawing software (such as SolidWorks) by clicking the "Model Import" command on the preset simulation software menu bar, or you can draw the inductor model directly in the preset simulation software.

[0061] Step 520: Configure a metal racetrack layer and a metal sheet. At least a portion of the metal racetrack layer surrounds the outer periphery of the inductor model to form a closed-loop structure. A first port is connected to the metal racetrack layer. The metal sheet is located inside the metal racetrack layer and is spaced from the metal racetrack layer. The metal sheet is connected to a second port.

[0062] Step 530: Configure a test port at any point on the metal runway layer between the second port to measure the inductance value of the inductance model.

[0063] For example, the inductor model and its parameters are as follows: Figure 6 As shown, its structural parameters include the number of turns N of the spiral inductor and the outer diameter D. out , inner diameter D in The width w of the metal conductor, the spacing s between the two metal wires, and the total inductance L (including self-inductance L) sefl Mutual inductance M (M = M + +M - (Two parts)

[0064] By calculating the self-inductance L of each inductor segment separately sefl The mutual inductance value M and the inductance value are added together to obtain the total inductance value. The formula for calculating the inductance value of the inductance model is:

[0065] L = L sefl +M + +M - ;

[0066] in,

[0067]

[0068]

[0069]

[0070]

[0071] Where L represents the inductance value of the inductor model, L sefl M represents the self-inductance value. + M represents the positive mutual inductance value. - Indicates negative mutual inductance, l quan (i) represents the total length of each turn of the inductor, w represents the width of the inductor model, s represents the spacing between the two metal wires of the inductor model, t represents the thickness of the inductor model, n represents the number of overlapping turns of the inductor coil and its lower lead, Ni represents the i-th turn of an N-turn inductor model, l total denoted by , μ0 represents the total length of the conductor in the inductance model, μ0 represents the permeability of free space, and d represents the average distance between parallel conductors with the same current direction.

[0072] An inductor is an energy storage element, and its performance is defined by its quality factor (Q) and self-resonant frequency. The Q value is defined as the ratio of energy stored to energy dissipated in one cycle. The self-resonant frequency is defined as the frequency at which the inductor's quality factor is zero, i.e., when the inductive reactance and parasitic capacitive reactance have equal amplitudes but opposite phases. Above the resonant frequency, the inductor exhibits capacitive behavior. The self-resonant frequency of an inductor determines the frequency range within which it can be used.

[0073] It should be noted that there are two main methods for obtaining the parameters in the equivalent circuit of the inductor model: The first method is extraction from actual measurement results. This method requires fabricating the inductor first, and then performing measurement and parameter extraction to obtain the parameter values ​​in the model. In many cases, parameters can be extracted from the simulation results of electromagnetic field software, thus eliminating the need for actual fabrication and measurement. The second method is calculation based on physical meaning. Based on a large number of experiments, expressions for each parameter are given. These expressions are related to the inductor's geometric and process parameters, which is beneficial for circuit designers to design and optimize, and facilitates integration into Electronic Design Automation (EDA) tools. This invention can obtain the inductance value of the inductor model based on the first method mentioned above, or it can obtain the inductance value of the inductor model through the above calculation formula.

[0074] The following specific embodiments will be used to describe steps 510 to 530 in detail.

[0075] Please refer to Figures 7A-7C , Figure 8 , Figures 7A-7C This is a schematic diagram of measuring two-dimensional inductance provided in the first embodiment of the present invention. Figure 8 This is a schematic diagram of measuring three-dimensional inductance provided in the first embodiment of the present invention. Figures 7A-7C , Figure 8 The metal racetrack layer 61 shown is entirely surrounded by the inductor model 10 to form a closed loop structure, and the interior of the metal racetrack layer 61 is convex.

[0076] For example, the metal track layer 61 is a grounded copper layer, and there is a gap between the metal track layer 61 and the inductor model 10, the gap being an insulating layer. The inductor model 10 can be a spiral inductor. The layers of the inductor model 10 are connected through metal vias 62. The inductor model 10 has a first port 63 and a second port 64. The first port 63 is connected to the metal track layer 61, and the second port 64 is connected to a metal sheet 65 located inside the metal track layer 61.

[0077] During testing, a test port Port is configured at any point on the metal racetrack layer 61 between the second port 64 and the test port Port to measure the inductance value of the inductor model. Since the metal racetrack layer 61 is a closed-loop structure, the entire metal racetrack layer is interconnected, and the resulting mutual coupling or mutual inductance is the same. Therefore, at any point on the metal racetrack layer 61 (e.g., Port Port Port), the inductance value of the inductor model is measured. Figures 7A-7C As shown, a test port (Port) is configured between the inductor model and the second port (64). The measured inductance values ​​are essentially consistent, unlike the significant differences seen in existing technologies. For example, the measured... Figures 7A-7C The inductor model shown has an inductance of approximately 3.06 nH and a frequency of 2.4 GHz.

[0078] Please refer to Figure 9 , Figure 10 , Figure 9 This is a schematic diagram of measuring two-dimensional inductance provided in the second embodiment of the present invention. Figure 10 This is a schematic diagram of measuring two-dimensional inductance provided in the third embodiment of the present invention. Figure 9 , Figure 10 The metal racetrack layer 61 shown partially surrounds the outer periphery of the inductor model 10, and the metal racetrack layer 61 is C-shaped.

[0079] For example, Figure 9 The metal racetrack layer 61 shown surrounds the inductor model 10 to form an annular opening. This annular opening connects the first end 66 and the second end 67 of the metal racetrack layer 61 in a preset manner to form an equivalent closed-loop structure. The preset manner can be a default connection method in a preset simulation software, and this invention does not limit this. During testing, with the test port configured between the metal sheet 65 and the second end 67 of the metal racetrack layer 61, the measured inductance value was 2.94 nH, and the frequency was 2.4 GHz.

[0080] For example, Figure 10 The metal raceway layer 61 shown surrounds the inductor model 10 to form an annular opening. This annular opening also connects the first end 66 and the second end 67 of the metal raceway layer 61 in a predetermined manner to form an equivalent closed-loop structure. During testing, with the test port configured between the metal sheet 65 and the first end 66 of the metal raceway layer 61, the measured inductance was 2.89 nH, and the frequency was 2.4 GHz.

[0081] From the above Figure 9 and Figure 10 The test results show that Figure 8 The measured inductance value is 2.94 nH. Figure 10The measured inductance value was 2.89 nH, with only a small difference between the two values. This indicates that the present invention configures the metal runway layer 61 as a closed-loop structure, ensuring that the testing conditions of the entire metal runway layer 61 are almost identical. Under these conditions, the measured inductance values ​​are also almost identical, improving the accuracy of the inductance measurement.

[0082] Please refer to Figure 11 , Figure 11 This is a schematic diagram of measuring three-dimensional inductance provided in the second embodiment of the present invention. Figure 10 The metal raceway layer 61 shown partially surrounds the outer periphery of the inductor model 10, and the metal raceway layer 61 is C-shaped. The annular opening of the metal raceway layer 61 connects the metal sheet 65 with the first and second ends of the metal raceway layer 61 through the test port Port, so as to form an equivalent closed-loop structure through the test port Port.

[0083] In summary, by configuring a closed-loop structure metal runway layer, the inductance value of the inductance model measured by the test port of the preset simulation software at any point on the metal runway layer and between it and the second port of the inductance model is basically consistent, thereby reducing measurement errors.

[0084] The inductance testing device provided by the present invention is described below. The inductance testing device described below can be referred to in correspondence with the inductance testing method described above.

[0085] Please refer to Figure 12 , Figure 12 This is a schematic diagram of the inductance testing device provided by the present invention. The inductance testing device 700 is used in high-frequency structure simulation software. The device includes a fabrication module 710, a configuration module 720, and a measurement module 730.

[0086] For example, the fabrication module 710 is used to fabricate an inductor model having a first port and a second port.

[0087] For example, the configuration module 720 is used to configure a metal raceway layer and a metal sheet, at least a portion of the metal raceway layer surrounds the outer periphery of the inductor model to form a closed-loop structure, a first port is connected to the metal raceway layer, the metal sheet is located inside the metal raceway layer and has a gap with the metal raceway layer, and the metal sheet is connected to a second port.

[0088] For example, the measurement module 730 is used to configure a test port at any point in the metal runway layer between the second port to measure the inductance value of the inductance model.

[0089] For example, the configuration module 720 is also used for:

[0090] The entire metal runway layer is wrapped around the outer periphery of the inductor model to form a closed-loop structure; or

[0091] A portion of the metal racetrack layer is wrapped around the outer periphery of the inductor model to form an annular opening. This annular opening connects the two ends of the metal racetrack layer in a predetermined manner to form an equivalent closed-loop structure.

[0092] For example, the interior of the metal runway layer is convex or C-shaped.

[0093] For example, the formula for calculating the inductance value of the inductance model is:

[0094] L = L sefl +M + +M - ;

[0095] in,

[0096]

[0097]

[0098]

[0099]

[0100]

[0101] Where L represents the inductance value of the inductor model, L sefl M represents the self-inductance value. + M represents the positive mutual inductance value. - Indicates negative mutual inductance, l quan (i) represents the total length of each turn of the inductor, w represents the width of the inductor model, s represents the spacing between the two metal wires of the inductor model, t represents the thickness of the inductor model, n represents the number of overlapping turns of the inductor coil and its lower lead, Ni represents the i-th turn of an N-turn inductor model, l total denoted by , μ0 represents the total length of the conductor in the inductance model, μ0 represents the permeability of free space, and d represents the average distance between parallel conductors with the same current direction.

[0102] For example, the fabrication module 710 is also used for:

[0103] Receive the "Import Model" command on the preset simulation software menu bar to import an inductor model drawn using the preset drawing software; or

[0104] Draw the inductor model directly in the preset simulation software.

[0105] For example, the metal runway layer is a grounded copper layer, and the inductance model is a spiral inductor.

[0106] For example, the distance between the metal sheet and the metal raceway layer used for probe measurement of the inductance model is 100-200 μm.

[0107] For example, the interior of the metal runway layer is convex or C-shaped.

[0108] It should be noted that the inductance testing device provided in this embodiment of the invention can implement all the method steps implemented in the above method embodiment and can achieve the same technical effect. Here, the parts that are the same as those in the method embodiment and the beneficial effects will not be described in detail.

[0109] Figure 13 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 13 As shown, the electronic device may include: a processor 810, a communication interface 820, a memory 830, and a communication bus 840, wherein the processor 810, the communication interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call logic instructions in the memory 830 to execute an inductance testing method, which includes:

[0110] Create a one-dimensional or three-dimensional inductor model, which has a first port and a second port;

[0111] A metal racetrack layer and a metal sheet are configured. The metal racetrack layer is ring-shaped and at least partially surrounds the outer periphery of the inductor model to form a closed-loop structure. The first port is connected to the metal racetrack layer, and the metal sheet is located inside the metal racetrack layer and connected to the second port.

[0112] A test port is configured at any point on the metal runway layer between the second port to measure the inductance value of the inductance model.

[0113] Furthermore, the logical instructions in the aforementioned memory 830 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0114] On the other hand, the present invention also provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions, and when the program instructions are executed by a computer, the computer is able to execute the inductance testing methods provided by the above methods.

[0115] In another aspect, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to perform the aforementioned inductance testing methods.

[0116] The present invention provides an electronic device, a computer program product, and a processor-readable storage medium, wherein the computer program stored thereon enables the processor to implement all the method steps implemented in the above method embodiments and achieve the same technical effect. Here, the parts that are the same as those in the method embodiments and the beneficial effects will not be described in detail.

[0117] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0118] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0119] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An inductance testing method, characterized in that, The method includes: Construct an inductor model, the inductor model having a first port and a second port; A metal track layer and a metal sheet are configured, at least a portion of the metal track layer surrounds the outer periphery of the inductor model to form a closed-loop structure, a first port is connected to the metal track layer, the metal sheet is located inside the metal track layer and spaced from the metal track layer, and the metal sheet is connected to a second port; A test port is configured at any point between the metal runway layer and the second port to measure the inductance value of the inductance model.

2. The inductance testing method according to claim 1, characterized in that, The step of at least a portion of the metal racetrack layer surrounding the outer periphery of the inductor model to form a closed-loop structure includes: The entire metal runway layer is directly formed into a closed-loop structure around the outer periphery of the inductor model; or A portion of the metal racetrack layer is wrapped around the outer periphery of the inductor model to form an annular opening. This annular opening connects the two ends of the metal racetrack layer in a predetermined manner to form an equivalent closed-loop structure.

3. The inductance testing method according to claim 1 or 2, characterized in that, The formula for calculating the inductance value of the inductor model is as follows: L=L sefl +M + +M - ; in, Where L represents the inductance value of the inductor model, L sefl M represents the self-inductance value. + M represents the positive mutual inductance value. - Indicates negative mutual inductance, l quan (i) represents the total length of each turn of the inductor, w represents the width of the inductor model, s represents the spacing between the two metal wires of the inductor model, t represents the thickness of the inductor model, n represents the number of overlapping turns of the inductor coil and its lower lead, Ni represents the i-th turn of an N-turn inductor model, l total denoted by , μ0 represents the total length of the conductor in the inductance model, μ0 represents the permeability of free space, and d represents the average distance between parallel conductors with the same current direction.

4. The inductance testing method according to claim 1 or 2, characterized in that, The steps for creating an inductor model include: Receive the "Import Model" command on the preset simulation software menu bar to import an inductor model drawn using the preset drawing software; or The inductor model is drawn directly in the preset simulation software.

5. The inductance testing method according to claim 1 or 2, characterized in that, The metal runway layer is a grounded copper layer, and the inductance model is a spiral inductor.

6. The inductance testing method according to claim 1 or 2, characterized in that, The distance between the metal sheet and the metal raceway layer used for probe measurement of the inductance model is 100-200 μm.

7. An inductance testing device, characterized in that, The device includes: A fabrication module is used to fabricate an inductor model, the inductor model having a first port and a second port; A configuration module is used to configure a metal track layer and a metal sheet, wherein at least a portion of the metal track layer surrounds the outer periphery of the inductor model to form a closed-loop structure, a first port is connected to the metal track layer, the metal sheet is located inside the metal track layer and spaced from the metal track layer, and the metal sheet is connected to a second port. A measurement module is configured to set up a test port at any point on the metal runway layer and between the second port to measure the inductance value of the inductance model.

8. The inductance testing device according to claim 7, characterized in that, The configuration module also includes: The entire metal runway layer is directly formed into a closed-loop structure around the outer periphery of the inductor model; or A portion of the metal racetrack layer is wrapped around the outer periphery of the inductor model to form an annular opening. This annular opening connects the two ends of the metal racetrack layer in a predetermined manner to form an equivalent closed-loop structure.

9. The inductance testing device according to claim 7, characterized in that, The interior of the metal runway layer is convex, or the metal runway layer is C-shaped.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the program, it implements the steps of the inductance testing method as described in any one of claims 1 to 6.

11. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the inductance testing method as described in any one of claims 1 to 6.

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